Formation method of semiconductor structure
By simultaneously forming the first and second isolation ports in the substrate of the image sensor chip and forming an isolation structure therein, the spectroscopy of light is solved, and the problem of improving the performance of the image sensor is achieved, especially in terms of focus performance and white point noise.
Patent Information
- Application Number
- CN202311174526.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-12
- Publication Date
- 2025-03-14
AI Technical Summary
The performance of existing image sensor chips still needs to be improved, especially in terms of focus performance and white point noise.
By simultaneously forming the first and second isolation ports in the substrate, and forming the first and second isolation structures therein, the light distribution of light is achieved, reducing the difference in the light inlet amount between the central region and the edge region, thereby improving the focus performance; at the same time, the number of times the substrate is patterned is reduced and the white point noise is reduced.
It effectively improves the focus performance and performance of the image sensor, reduces white point noise, and improves overall performance.
Smart Images
Figure CN119630087A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Art
[0002] With the rapid development of electrical and electronic technologies, more and more modern mobile electronic products using image sensor technology have emerged, such as smart phones, digital cameras, and laptops, which have been rapidly developed and popularized. People are becoming more and more demanding on product quality and personal experience. Nowadays, electronic products all have camera and video functions. Image sensors are the main imaging components of electronic products, and the requirements for their imaging quality are getting higher and higher.
[0003] Image sensors are devices that convert light signals into electrical signals. Image sensors include charge coupled devices (CCD) and CMOS image sensors (CIS). Compared with traditional CCD sensors, CMOS image sensors have the characteristics of low power consumption, low cost, and compatibility with CMOS processes, so they are increasingly widely used. Currently, CMOS image sensors are not only used in the field of consumer electronics, such as digital cameras, mobile phone cameras, and camcorders, but also in automotive electronics, monitoring, biotechnology, and medicine.
[0004] In order to achieve light splitting, a deep trench isolation (DTI) structure is usually formed in the process of preparing an image sensor chip to isolate adjacent optoelectronic devices. However, the performance of current image sensor chips still needs to be improved. Summary of the invention
[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of an image sensor.
[0006] To solve the above problems, an embodiment of the present invention also provides a method for forming a semiconductor structure, including: providing a substrate, in which a photoelectric device unit is formed; simultaneously forming a first isolation opening and a second isolation opening in the substrate, the first isolation opening being located in the substrate on the side of the photoelectric device unit, and the second isolation opening being located in the substrate at the top of the photoelectric device unit, and the bottom of the first isolation opening is lower than the top of the photoelectric device unit, and the bottom of the second isolation opening is higher than the top of the photoelectric device unit; forming a first isolation structure in the first isolation opening, and forming a second isolation structure in the second isolation opening.
[0007] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:
[0008] In the method for forming a semiconductor structure provided by an embodiment of the present invention, a first isolation opening and a second isolation opening are simultaneously formed in the substrate, the first isolation opening is located in the substrate at the side of the optoelectronic device unit, the second isolation opening is located in the substrate at the top of the optoelectronic device unit, and the bottom of the first isolation opening is lower than the top of the optoelectronic device unit, and the bottom of the second isolation opening is higher than the top of the optoelectronic device unit. Accordingly, after the first isolation structure and the second isolation structure are formed, the bottom of the first isolation structure is lower than the top of the optoelectronic device unit, and the bottom of the second isolation structure is higher than the top of the optoelectronic device unit. The second isolation structure can split the light incident on the same optoelectronic device unit, thereby reducing the difference in the amount of light entering the central area and the edge area of the same optoelectronic device unit, and correspondingly reducing the difference between the amount of light entering the central area and the average amount of light entering, and the difference between the amount of light entering the edge area and the average amount of light entering, thereby facilitating the improvement of the focusing performance of the image sensor; moreover, compared with the solution of forming the first isolation opening and the second isolation opening respectively in different steps, the first isolation opening and the second isolation opening are formed in the same step, thereby reducing the number of times the substrate is patterned, which is conducive to reducing the white point noise of the image sensor, thereby improving the performance of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figures 1 to 3 It is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure;
[0010] Figures 4 to 8 It is a schematic structural diagram corresponding to each step in another method for forming a semiconductor structure;
[0011] Figures 9 and 10 It is a structural schematic diagram corresponding to each step in another method for forming a semiconductor structure;
[0012] Figures 11 to 14 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention. DETAILED DESCRIPTION
[0013] At present, the performance of semiconductor structures still needs to be improved. Now, combining a semiconductor structure, we analyze the reasons why the performance of image sensors needs to be improved.
[0014] Figures 1 to 3 The present invention is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure.
[0015] It should be noted that in order to clearly show the semiconductor structure, Figure 3 The optoelectronic device unit is omitted.
[0016] refer to Figure 1 , providing a substrate 10, in which a photoelectric device unit 11 is formed.
[0017] refer to Figure 2 A first isolation opening 12 is formed in the substrate 10 , the first isolation opening 12 is located in the substrate 10 at the side of the optoelectronic device unit 11 , and the bottom of the first isolation opening 12 is lower than the top of the optoelectronic device unit 11 .
[0018] Specifically, the first isolation opening 12 is located between adjacent optoelectronic device units 11 , and the first isolation structure subsequently formed in the first isolation opening 12 is used to isolate the adjacent optoelectronic device units 11 .
[0019] refer to Figure 3 , a first isolation structure 14 is formed in the first isolation opening 12 .
[0020] Continue to refer Figure 3 , an optical component (such as a microlens, a color filter, etc.) 16 is formed on the substrate 10 on top of the optoelectronic device unit 11.
[0021] It has been found that after the optical component 16 is formed, the incident light 17 is focused on the central area of the optoelectronic device unit 11 (eg Figure 3 As shown), this results in a difference in the amount of light entering the central area and the edge area of the photoelectric device unit 11, which correspondingly also results in a difference between the amount of light entering the central area and the average amount of light entering, as well as a difference between the amount of light entering the edge area and the average amount of light entering, thereby affecting the focusing performance of the image sensor.
[0022] Therefore, in order to improve the above problems, another method for forming a semiconductor structure is proposed. Figures 4 to 8 It is a schematic structural diagram corresponding to each step in another method for forming a semiconductor structure.
[0023] It should be noted that in order to clearly show the semiconductor structure, Figure 8 The optoelectronic device unit is omitted.
[0024] refer to Figure 4 , providing a substrate 20, in which a photoelectric device unit 21 is formed.
[0025] refer to Figure 5 A first isolation opening 22 is formed in the substrate 20 , and the first isolation opening 22 is located in the substrate 20 at the top of the optoelectronic device unit 21 , and the bottom of the first isolation opening 22 is higher than the top of the optoelectronic device unit 21 .
[0026] refer to Figure 6 to Figure 7A second isolation opening 23 is formed in the substrate 20 , and the second isolation opening 23 is located in the substrate 20 at the side of the optoelectronic device unit 21 , and the bottom of the second isolation opening 23 is lower than the top of the optoelectronic device unit 21 .
[0027] refer to Figure 8 , a first isolation structure 24 is formed in the first isolation opening 22 , and a second isolation structure 25 is formed in the second isolation opening 23 .
[0028] Continue to refer Figure 8 After forming the first isolation structure 24 and the second isolation structure 25 , an optical component 26 is formed on the substrate 20 , and the first isolation structure 24 splits the light 27 incident on the same optoelectronic device unit 21 .
[0029] In the above forming method, the first isolation opening 22 and the second isolation opening 23 are formed respectively by different steps, that is, the substrate 20 needs to be etched twice to form the first isolation opening 22 and the second isolation opening 23 with different depths in the substrate 20 (for example, Figure 6 As shown, after forming the first isolation opening 22, it is necessary to form a mask layer again, the mask layer fills the first isolation opening 22, and then etching is performed again). Therefore, after the substrate 20 is etched multiple times, the probability of its surface being damaged (for example, plasma damage) is easily increased, and impurity energy levels are easily introduced accordingly, so that when the optoelectronic device unit 21 is working, some electrons are excited to the impurity energy level, generating additional white point noise, thereby affecting the performance of the image sensor.
[0030] Figures 9 and 10 It is a structural schematic diagram corresponding to each step in another method for forming a semiconductor structure.
[0031] refer to Figures 9 and 10 After one etching, a first isolation opening 32 and a second isolation opening 33 with the same depth are formed in the substrate 30 at the same time, but this will damage the optoelectronic device unit 31 (such as Fig.10 ), making it difficult for the image sensor to image.
[0032] In order to solve the above technical problems, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate, in which a photoelectric device unit is formed; simultaneously forming a first isolation opening and a second isolation opening in the substrate, the first isolation opening being located in the substrate at the side of the photoelectric device unit, and the second isolation opening being located in the substrate at the top of the photoelectric device unit, and the bottom of the first isolation opening is lower than the top of the photoelectric device unit, and the bottom of the second isolation opening is higher than the top of the photoelectric device unit; forming a first isolation structure in the first isolation opening, and forming a second isolation structure in the second isolation opening.
[0033] In the method for forming a semiconductor structure provided by an embodiment of the present invention, a first isolation opening and a second isolation opening are simultaneously formed in the substrate, the first isolation opening is located in the substrate at the side of the optoelectronic device unit, the second isolation opening is located in the substrate at the top of the optoelectronic device unit, and the bottom of the first isolation opening is lower than the top of the optoelectronic device unit, and the bottom of the second isolation opening is higher than the top of the optoelectronic device unit. Accordingly, after the first isolation structure and the second isolation structure are formed, the bottom of the first isolation structure is lower than the top of the optoelectronic device unit, and the bottom of the second isolation structure is higher than the top of the optoelectronic device unit. The second isolation structure can split the light incident on the same optoelectronic device unit, thereby reducing the difference in the amount of light entering the central area and the edge area of the same optoelectronic device unit, and correspondingly reducing the difference between the amount of light entering the central area and the average amount of light entering, and the difference between the amount of light entering the edge area and the average amount of light entering, thereby facilitating the improvement of the focusing performance of the image sensor; moreover, compared with the solution of forming the first isolation opening and the second isolation opening respectively in different steps, the first isolation opening and the second isolation opening are formed in the same step, thereby reducing the number of times the substrate is patterned, which is conducive to reducing the white point noise of the image sensor, thereby improving the performance of the image sensor.
[0034] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0035] Figures 11 to 14 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention.
[0036] refer to Fig.11 , providing a substrate 100, in which a photoelectric device unit 101 is formed.
[0037] The substrate 100 is a pixel substrate, which is used to provide a process platform for subsequent process steps.
[0038] In this embodiment, the substrate 100 is used to form an image sensor.
[0039] In this embodiment, the base 100 includes a substrate (not shown), which is a silicon substrate. In other embodiments, the substrate may be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the substrate may also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.
[0040] The optoelectronic device unit 101 is used to receive an optical signal of incident light. The incident light causes the current of the optoelectronic device unit 101 to change, thereby converting the optical signal into an electrical signal.
[0041] In this embodiment, the number of the optoelectronic device units 101 can be multiple, and the multiple optoelectronic device units 101 are arranged in an array in the substrate 100 to improve the efficiency of photoelectric conversion of the image sensor. In other embodiments, the number of the optoelectronic device unit can also be one.
[0042] In this embodiment, in the step of providing the substrate 100 , the optoelectronic device unit 101 includes a photodiode.
[0043] Photodiodes have the characteristics of high sensitivity, fast response speed, wide response wavelength range, etc., and therefore have been widely used. In other embodiments, the photoelectric device unit may also include other suitable photoelectric devices.
[0044] In this embodiment, in the step of providing the substrate 100 , a gate structure (not shown) is also formed in the substrate 100 .
[0045] The gate structure includes a gate dielectric layer (not shown) and a gate electrode layer (not shown) covering the gate dielectric layer.
[0046] The gate dielectric layer is used to isolate the gate electrode layer from the substrate.
[0047] The material of the gate dielectric layer includes one or more of HfO2, ZrO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, Al2O3, SiO2 and La2O3.
[0048] In this embodiment, the gate structure is a metal gate structure, and therefore, the material of the gate electrode layer includes one or more of TiN, TaN, Ta, Ti, TiAl, W, Al, TiSiN and TiAlC. The gate electrode layer includes a work function layer and an electrode layer covering the work function layer, or may include only the work function layer.
[0049] Correspondingly, the gate dielectric layer includes a high-k gate dielectric layer. The material of the high-k gate dielectric layer is a high-k dielectric material, and the high-k dielectric material refers to a dielectric material having a relative dielectric constant greater than the relative dielectric constant of silicon oxide. Specifically, the material of the high-k gate dielectric layer can be selected from HfO2, ZrO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO or Al2O3. As an example, the material of the high-k gate dielectric layer is HfO2.
[0050] In this embodiment, in the step of providing the substrate 100 , a dielectric layer (not shown) is also formed in the substrate 100 .
[0051] The dielectric layer is used to isolate adjacent semiconductor devices to prevent leakage current between devices. The dielectric layer is made of insulating material, for example, one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride and silicon carbon oxynitride.
[0052] For example, the dielectric layer includes an interlayer dielectric layer (ILD).
[0053] Continue to refer Fig.11 , and combined with reference Fig.12 In this embodiment, after providing the substrate 100 and before forming the first isolation opening and the second isolation opening, the forming method further includes: forming a patterned mask structure 110 on the substrate 100, wherein the mask structure 110 has a first mask opening 115 (such as Fig.12 ) and a second mask opening 116 (as shown Fig.12 As shown in FIG. 1 ), the bottom of the first mask opening 115 is lower than the bottom of the second mask opening 116 .
[0054] Before forming the first isolation opening and the second isolation opening, a mask structure 110 having the first mask opening 115 and the second mask opening 116 is first formed, which is beneficial to improving the size accuracy, position accuracy, and morphology accuracy of the first isolation opening and the second isolation opening formed subsequently; it is also beneficial to protect the substrate 100 outside the first isolation opening and the second isolation opening during the process of forming the first isolation opening and the second isolation opening, thereby reducing the probability of damage thereof.
[0055] Moreover, the bottom of the first mask opening 115 is lower than the bottom of the second mask opening 116, that is, the thickness of the mask structure 110 at the bottom of the first mask opening 115 is less than the thickness of the mask structure 110 at the bottom of the second mask opening 116, so that in the subsequent process of forming the first isolation opening and the second isolation opening, the time spent on removing the mask structure 110 at the bottom of the first mask opening 115 is less than the time spent on removing the mask structure 110 at the bottom of the second mask opening 116. That is to say, when the mask structure 110 at the bottom of the first mask opening 115 is 0 is completely removed, the mask structure 110 still remains at the bottom of the second mask opening 116. Accordingly, when removing the first portion of the thickness of the substrate 100 at the bottom of the first mask opening 115 to form the first isolation opening, it is necessary to first remove the mask structure 110 remaining at the bottom of the second mask opening 116, and then remove the second portion of the thickness of the substrate 100 at the bottom of the second mask opening 116 to form the second isolation opening. Therefore, it is easy to make the thickness of the first portion greater than the thickness of the second portion, thereby reducing the difficulty of the subsequent process of forming the first isolation opening and the second isolation opening with inconsistent depths.
[0056] In this embodiment, the step of forming a patterned mask structure 110 on the substrate 100 includes: Fig.11 As shown, a patterned first sub-mask structure 111 is formed on the substrate 100, and a first initial mask opening 115' and a second initial mask opening 116' are formed in the first sub-mask structure 111, and an opening size W'1 of the first initial mask opening 115' is larger than an opening size W'2 of the second initial mask opening 116'; Fig.12 As shown, in the same step, a second sub-mask structure 112 is formed to cover the bottom of the first initial mask opening 115' and the bottom of the second initial mask opening 116', and the thickness of the second sub-mask structure 112 covering the bottom of the first initial mask opening 115' is less than the thickness of the second sub-mask structure 112 covering the bottom of the second initial mask opening 116', so as to form a first mask opening 115 corresponding to the first initial mask opening 115' and a second mask opening 116 corresponding to the second initial mask opening 116' in the second sub-mask structure 112, and the second sub-mask structure 112 and the first sub-mask structure 111 constitute the mask structure 110.
[0057] It is understandable that, in the process of forming the second sub-mask structure 112 , the second sub-mask structure 112 will also be formed on the sidewalls of the first initial mask opening 115 ′ and the second initial mask opening 116 ′.
[0058] First, a first sub-mask structure 111 having a first initial mask opening 115' and a second initial mask opening 116' is formed. The opening size W'1 of the first initial mask opening 115' is larger than the opening size W'2 of the second initial mask opening 116'. Then, in the process of forming the second sub-mask structure 112, since the opening size W'1 of the first initial mask opening 115' is larger than the opening size W'2 of the second initial mask opening 116', the second initial mask opening 116' is more easily filled with the second sub-mask structure 112 on its sidewall than the first initial mask opening 115'. Thus, the thickness of the second sub-mask structure 112 covering the bottom of the second initial mask opening 116' is greater than the thickness of the second sub-mask structure 112 covering the bottom of the first initial mask opening 115', that is, the thickness of the second sub-mask structure 112 covering the bottom of the first initial mask opening 115' is less than the thickness of the second sub-mask structure 112 covering the bottom of the second initial mask opening 116', and accordingly, the bottom of the first mask opening 115 corresponding to the first initial mask opening 115' is lower than the bottom of the second mask opening 116 corresponding to the second initial mask opening 116'. Moreover, it is also convenient to form the second sub-mask structure 112 covering the bottom of the first initial mask opening 115' and the bottom of the second initial mask opening 116' in the same step, which is conducive to simplifying the process and reducing the process cost.
[0059] Specifically, in the step of forming the second sub-mask structure 112 , the second sub-mask structure 112 covers the first sub-mask structure 111 , the bottom of the first initial mask opening 115 ′ and the bottom of the second initial mask opening 116 ′.
[0060] The second sub-mask structure 112 covers the first sub-mask structure 111, the bottom of the first initial mask opening 115' and the bottom of the second initial mask opening 116', that is, the second sub-mask structure 112 not only covers the side wall and the bottom of the first initial mask opening 115' and the side wall and the bottom of the second initial mask opening 116', but also covers the first sub-mask structure 111 outside the first initial mask opening 115' and the second initial mask opening 116', which is conducive to reducing the difficulty of forming the second sub-mask structure 112, and correspondingly also helps to reduce the difficulty of forming the mask structure 110.
[0061] In this embodiment, in the step of forming the second sub-mask structure 112 , the second sub-mask structure 112 completely fills the second initial mask opening 116 ′, and the second sub-mask structure 112 does not completely fill the first mask opening 115 .
[0062] In the step of forming the second sub-mask structure 112, the second sub-mask structure 112 fills up the second initial mask opening 116', and the second sub-mask structure 112 does not fill up the first mask opening 115, which makes it easy for the thickness of the second sub-mask structure 112 covering the bottom of the first initial mask opening 115' to be less than the thickness of the second sub-mask structure 112 covering the bottom of the second initial mask opening 116', and correspondingly makes it easy for the bottom of the first mask opening 115 to be lower than the bottom of the second mask opening 116.
[0063] It should be noted that, in the step of forming the second sub-mask structure 112, along the normal direction of the top surface of the substrate 100, the thickness D of the second sub-mask structure on the top of the first sub-mask structure 111 should not be too small or too large. If the thickness D of the second sub-mask structure on the top of the first sub-mask structure 111 is too small, it is easy to make the thickness of the second sub-mask structure 112 covering the bottom of the first initial mask opening 115' less than the thickness of the second sub-mask structure 112 covering the bottom of the second initial mask opening 116', which is not good, and it is easy to make the bottom of the first mask opening 115 lower than the bottom of the second mask opening 116, which is not good; if the thickness D of the second sub-mask structure on the top of the first sub-mask structure 111 is too large, it is easy to increase the difficulty of removing the second sub-mask structure 112 later, and it is also easy to cause waste of materials and work time. Therefore, in this embodiment, in the step of forming the second sub-mask structure 112 , along the normal direction of the top surface of the substrate 100 , the thickness D of the second sub-mask structure 112 on the top of the first sub-mask structure 111 is 200 nanometers to 500 nanometers.
[0064] In this embodiment, the first sub-mask structure 111 may be a single-layer structure or a stacked-layer structure.
[0065] As an example, the first sub-mask structure 111 is a stacked structure, including a first mask layer 1111 and a second mask layer 1112 stacked in sequence, and a first initial mask opening 115' and a second initial mask opening 116' are formed in the second mask layer 1112 to expose the top of the first mask layer 1111. In other embodiments, the first sub-mask structure may also be a single-layer structure.
[0066] It should be noted that the material of the first mask layer 1111 includes a photoresist material, and the material of the second mask layer 1112 includes an anti-reflection material.
[0067] The material of the first mask layer 1111 includes a photoresist material, and the material of the second mask layer 1112 includes an anti-reflective material, which is beneficial to reduce the reflection effect during exposure when the first initial mask opening 115' and the second initial mask opening 116' are formed by a photolithography process, thereby improving the transfer accuracy of the pattern, and further improving the morphological accuracy and dimensional accuracy of the first initial mask opening 115' and the second initial mask opening 116. As an example, the material of the first mask layer 1111 is a photoresist material, and the material of the second mask layer 1112 is a bottom anti-reflective coating (BARC) material.
[0068] In other embodiments, the first sub-mask structure may also include only photoresist material, or only anti-reflection material.
[0069] Therefore, in the step of forming the first sub-mask structure 111, the material of the first sub-mask structure 111 includes: one or both of a photoresist material and an anti-reflection material.
[0070] In this embodiment, the process of forming the second sub-mask structure 112 includes a spin coating process. In other embodiments, the process of forming the second sub-mask structure may also include a chemical vapor deposition process.
[0071] The spin coating process is simple to operate, has low process cost, and can achieve high compatibility with existing process technology.
[0072] Specifically, the solvent used in the spin coating process includes a carbon-rich polymer.
[0073] It should be noted that the carbon-rich polymer is a polymer with a relatively high carbon content. The carbon-rich polymer has good fluidity and gap-filling ability, which is beneficial to reducing the difficulty of forming the second sub-mask structure 112 and improving the quality of the second sub-mask structure 112 .
[0074] In this embodiment, in the step of forming the second sub-mask structure 112, the material of the second sub-mask structure 112 includes a spin-on carbon material.
[0075] The material of the carbon coating material is similar to the photoresist material and the anti-reflection material, so it is easy to remove the remaining mask structure 110 in the subsequent process.
[0076] refer to Figure 13 to Figure 14, a first isolation opening 105 and a second isolation opening 106 are simultaneously formed in the substrate 100, the first isolation opening 105 is located in the substrate 100 at the side of the optoelectronic device unit 101, and the second isolation opening 106 is located in the substrate 100 at the top of the optoelectronic device unit 101, and the bottom of the first isolation opening 105 is lower than the top of the optoelectronic device unit 101, and the bottom of the second isolation opening 106 is higher than the top of the optoelectronic device unit 101.
[0077] A first isolation opening 105 and a second isolation opening 106 are simultaneously formed in the substrate 100. The first isolation opening 105 is located in the substrate 100 at the side of the optoelectronic device unit 101, and the second isolation opening 106 is located in the substrate 100 at the top of the optoelectronic device unit 101. The bottom of the first isolation opening 105 is lower than the top of the optoelectronic device unit 101, and the bottom of the second isolation opening 106 is higher than the top of the optoelectronic device unit 101. Accordingly, after the first isolation structure and the second isolation structure are subsequently formed, the bottom of the first isolation structure is lower than the top of the optoelectronic device unit 101, and the bottom of the second isolation structure is higher than the top of the optoelectronic device unit 101. The second isolation structure can split the light incident on the same optoelectronic device unit 101 (such as Fig.14 As shown in the figure, the difference in the amount of light entering the central area and the edge area of the same optoelectronic device unit 101 is reduced, and the difference between the amount of light entering the central area and the average amount of light entering, as well as the difference between the amount of light entering the edge area and the average amount of light entering are correspondingly reduced, which is beneficial to improving the focusing performance of the graphic sensor; moreover, compared with the solution of forming the first isolation opening and the second isolation opening respectively in different steps, the first isolation opening 105 and the second isolation opening 106 are formed in the same step, which reduces the number of times the substrate 100 is patterned, which is beneficial to reducing the white point noise of the image sensor, thereby improving the performance of the image sensor.
[0078] Correspondingly, in this embodiment, the steps of forming the first isolation opening 105 and the second isolation opening 106 include: removing the mask structure 110 and the first part of the thickness of the substrate 100 at the bottom of the first mask opening 115 in sequence along the first mask opening 115 to form the first isolation opening 105, and removing the mask structure 110 and the second part of the thickness of the substrate 100 at the bottom of the second mask opening 116 in sequence along the second mask opening 116 to form the second isolation opening 106.
[0079] It should be noted that in the step of forming the first isolation opening 105 and the second isolation opening 106, the etching selectivity ratio of the second sub-mask structure 112 to the substrate 100 should not be too small. If the etching selectivity ratio of the second sub-mask structure 112 to the substrate 100 is too small, it is easy to make the time spent on removing the remaining mask structure 110 at the bottom of the second mask opening 116 short after the mask structure 110 at the bottom of the first mask opening 115 is completely removed, and accordingly, it is easy to make the difference between the first isolation opening depth H1 and the second isolation opening depth H2 along the normal direction of the top surface of the substrate 100 small, so that when the first isolation opening depth H1 remains unchanged, it is easy to cause the second isolation opening depth H2 to be too large, and then it is easy to increase the probability of the photoelectric device unit 101 being damaged; or when the second isolation opening depth H2 remains unchanged, it is easy to cause the first isolation opening depth H1 to be too small, and accordingly, it is easy to make the effect of the subsequent first isolation structure isolating the adjacent photoelectric device units 101 poor, and then it is easy to affect the performance of the graphic sensor. Therefore, in this embodiment, in the step of forming the first isolation opening 105 and the second isolation opening 106 , the etching selectivity ratio between the second sub-mask structure 112 and the substrate 100 is greater than 5.
[0080] In this embodiment, the process of simultaneously forming the first isolation opening 105 and the second isolation opening 106 in the substrate 100 includes an anisotropic dry etching process, and the anisotropic dry etching process includes a plasma etching process.
[0081] The anisotropic dry etching process has high etching accuracy and better control over the cross section, which is beneficial to improving the morphological accuracy and dimensional accuracy of the first isolation opening 105 and the second isolation opening 106, thereby making it easy for the subsequent formation of the first isolation structure and the second isolation structure to meet the process requirements. As an example, the anisotropic dry etching process includes a plasma etching process.
[0082] In this embodiment, the etching gas of the plasma etching process includes carbon tetrafluoride gas and sulfur hexafluoride gas.
[0083] Carbon tetrafluoride gas and sulfur hexafluoride gas are conventional etching gases, which are relatively easy to obtain, and the etching gases are easy to achieve a better etching selectivity ratio between the second sub-mask structure 112 and the substrate 100 .
[0084] Accordingly, in this embodiment, after forming the first isolation opening 105 and the second isolation opening 106 , the forming method further includes: removing the remaining mask structure 110 .
[0085] Specifically, the process of removing the remaining mask structure 110 includes a wet process.
[0086] The wet etching process has relatively low cost and simple operation steps, and can also achieve a higher etching selectivity ratio between the etched object (ie, the mask structure 110) and other film layers (eg, the substrate 100), thereby reducing damage to other film layers.
[0087] It should be noted that the solution used in the wet process includes a mixed solution of hydrofluoric acid and hydrogen peroxide.
[0088] A mixed solution of hydrofluoric acid and hydrogen peroxide is a commonly used solution in wet etching processes; moreover, the mixed solution of hydrofluoric acid and hydrogen peroxide is convenient for removing residual powder caused by plasma etching.
[0089] Continue to refer Figure 13 to Figure 14 , a first isolation structure 125 is formed in the first isolation opening 105 , and a second isolation structure 126 is formed in the second isolation opening 106 .
[0090] It should be noted that in order to clearly show the semiconductor structure, Fig.14 The optoelectronic device unit is omitted.
[0091] The first isolation structure 125 located in the substrate at the side of the optoelectronic device unit and having its bottom lower than the top of the optoelectronic device unit serves as a deep trench isolation structure for isolating adjacent optoelectronic device units 101 to prevent optical crosstalk between adjacent optoelectronic device units 101 .
[0092] The second isolation structure 126, which is located in the substrate 100 at the top of the optoelectronic device unit 101 and has a bottom higher than the top of the optoelectronic device unit 101, serves as a cell deep trench isolation structure (Cell Deep Trench Isolation, CDTI), and can split the light 200 incident on the same optoelectronic device unit 101, thereby reducing the difference in the amount of light entering the central area and the edge area of the same optoelectronic device unit 101, and correspondingly reduces the difference between the amount of light entering the central area and the average amount of light entering, as well as the difference between the amount of light entering the edge area and the average amount of light entering, thereby facilitating improving the focusing performance of the graphic sensor.
[0093] Specifically, the steps of forming the first isolation structure 125 and the second isolation structure 126 include: simultaneously forming an isolation structure material layer (not shown) in the first isolation opening 105 and the second isolation opening 106, and the isolation structure material layer also covers the substrate 100 outside the first isolation opening 105 and the second isolation opening 106; taking the top of the substrate 100 outside the first isolation opening 105 and the second isolation opening 106 as the stop layer position, flattening the isolation structure material layer, removing the isolation structure material layer higher than the top of the substrate 100 outside the first isolation opening 105 and the second isolation opening 106, and the remaining isolation structure material layer located in the first isolation opening 105 serves as the first isolation structure 125, and the remaining isolation structure material layer located in the second isolation opening 106 serves as the second isolation structure 126.
[0094] It should be noted that the material of the first isolation structure 125 is a light-isolating material. As an example, the material of the first isolation structure 125 is a conductive material, which is usually opaque, thereby satisfying the light-isolating function of the first isolation structure 125. In a specific embodiment, the material of the first isolation structure 125 includes one or more of W, Al, Cu, Ti, TiN, Ta and TaN.
[0095] It should also be noted that the material of the second isolation structure 126 is also a light-isolating material, so that the light incident on the same optoelectronic device unit 101 can be split. As an example, the material of the second isolation structure 126 is a conductive material. In a specific embodiment, the material of the second isolation structure 126 includes one or more of W, Al, Cu, Ti, TiN, Ta and TaN.
[0096] Continue to refer Fig.14 The forming method further includes: after forming the first isolation structure 125 and the second isolation structure 126 , forming an optical component 130 on the substrate 500 .
[0097] In this embodiment, the optical components include microlenses, color filters, etc.
[0098] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.
Claims
1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate having an optoelectronic device unit formed therein; A first isolation opening and a second isolation opening are simultaneously formed in the substrate, wherein the first isolation opening is located in the substrate at the side of the optoelectronic device unit, and the second isolation opening is located in the substrate at the top of the optoelectronic device unit, and the bottom of the first isolation opening is lower than the top of the optoelectronic device unit, and the bottom of the second isolation opening is higher than the top of the optoelectronic device unit; A first isolation structure is formed in the first isolation opening, and a second isolation structure is formed in the second isolation opening.
2. The method for forming a semiconductor structure according to claim 1, wherein: After providing the substrate and before forming the first isolation opening and the second isolation opening, the forming method further includes: forming a patterned mask structure on the substrate, wherein the mask structure is formed with a first mask opening and a second mask opening, and the bottom of the first mask opening is lower than the bottom of the second mask opening; The step of forming the first isolation opening and the second isolation opening comprises: removing the mask structure at the bottom of the first mask opening and a first portion of the thickness of the substrate in sequence along the first mask opening to form the first isolation opening, and removing the mask structure at the bottom of the second mask opening and a second portion of the thickness of the substrate in sequence along the second mask opening to form the second isolation opening; After forming the first isolation opening and the second isolation opening, the forming method further includes: removing the remaining mask structure.
3. The method for forming a semiconductor structure according to claim 2, wherein: The step of forming a patterned mask structure on the substrate comprises: Forming a patterned first sub-mask structure on the substrate, wherein a first initial mask opening and a second initial mask opening are formed in the first sub-mask structure, and the opening size of the first initial mask opening is larger than the opening size of the second initial mask opening; In the same step, a second sub-mask structure covering the bottom of the first initial mask opening and the bottom of the second initial mask opening is formed, and the thickness of the second sub-mask structure covering the bottom of the first initial mask opening is less than the thickness of the second sub-mask structure covering the bottom of the second initial mask opening, so as to form a first mask opening corresponding to the first initial mask opening and a second mask opening corresponding to the second initial mask opening in the second sub-mask structure, and the second sub-mask structure and the first sub-mask structure constitute the mask structure.
4. The method for forming a semiconductor structure according to claim 3, wherein: In the step of forming the second sub-mask structure, the second sub-mask structure covers the first sub-mask structure, the bottom of the first initial mask opening, and the bottom of the second initial mask opening.
5. The method for forming a semiconductor structure according to claim 3 or 4, characterized in that: The process of forming the second sub-mask structure includes one or both of a spin coating process and a chemical vapor deposition process.
6. The method for forming a semiconductor structure according to claim 5, wherein: The solvent used in the spin coating process includes a carbon-rich polymer.
7. The method for forming a semiconductor structure according to claim 3, wherein: In the step of forming the second sub-mask structure, the second sub-mask structure fully fills the second initial mask opening, and the second sub-mask structure does not fully fill the first mask opening.
8. The method for forming a semiconductor structure according to claim 3, characterized in that: In the step of forming the first sub-mask structure, the material of the first sub-mask structure includes: one or both of a photoresist material and an anti-reflection material.
9. The method for forming a semiconductor structure according to claim 3, wherein: In the step of forming the second sub-mask structure, the material of the second sub-mask structure includes a spin-on carbon material.
10. The method for forming a semiconductor structure according to claim 3, wherein: In the step of forming the second sub-mask structure, along the normal direction of the top surface of the substrate, the thickness of the second sub-mask structure on the top of the first sub-mask structure is 200 nanometers to 500 nanometers.
11. The method for forming a semiconductor structure according to any one of claims 3, characterized in that: In the step of forming the first isolation opening and the second isolation opening, an etching selectivity ratio between the second sub-mask structure and the substrate is greater than 5.
12. The method for forming a semiconductor structure according to any one of claims 1 to 3, wherein: The process of simultaneously forming the first isolation opening and the second isolation opening in the substrate includes an anisotropic dry etching process, and the anisotropic dry etching process includes a plasma etching process.
13. The method for forming a semiconductor structure according to claim 12, wherein: The etching gas of the plasma etching process includes carbon tetrafluoride gas and sulfur hexafluoride gas.
14. The method for forming a semiconductor structure according to claim 2 or 3, characterized in that: The process of removing the remaining mask structure includes a wet process.
15. The method for forming a semiconductor structure according to claim 14, wherein: The solution used in the wet process includes a mixed solution of hydrofluoric acid and hydrogen peroxide.
16. The method for forming a semiconductor structure according to any one of claims 1 to 3, characterized in that: In the step of providing the substrate, the optoelectronic device unit includes a photodiode.