Patch processing method, patch generation device, chip and electronic equipment

Abstract

The invention relates to the technical field of chips, and discloses a patch processing method, a patch generation device, a chip and electronic equipment. The method comprises the steps that a patch generation device adds a firmware version number and a patch version number to an original plaintext patch to generate a target plaintext patch; and based on the version numbers, a secret key is generated by using a set rule, and the target plaintext patch is encrypted by using the secret key to obtain a ciphertext patch. The patch generation device sends an installation request containing the version number to the chip, and the chip verifies whether the receiving condition is met or not after receiving the installation request; and when the condition is met, the chip sends an installation permission notification. And after receiving the notification, the patch generation device sends a set rule and a ciphertext patch. And the chip generates a key by using the same rule, decrypts the ciphertext patch to obtain a target plaintext patch, and performs security verification based on the version number in the target plaintext patch. By introducing a stricter version control mechanism, a dynamic key generation strategy and a multi-level security verification process, the security in the patch updating process is remarkably improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of patch processing, for example, to a patch processing method, a patch generating device, a chip and an electronic device. Background Art

[0002] The firmware of a chip refers to the software program that is fixed in the chip, which controls the basic functions and operations of the hardware chip. The security of the firmware in the chip is very important, especially for security chips, which play an increasingly important role in protecting data and performing critical operations. In order to ensure the security and reliability of these chips, the security requirements for the firmware inside them are becoming increasingly stringent. To ensure the security of the firmware, the firmware is usually fixed in the non-volatile storage area of ​​the chip (such as the ROM area) to prevent users or potential attackers from modifying it. However, this immutability of the firmware also brings challenges to developers: once a firmware error is found or a function needs to be updated, the traditional repair method will no longer apply.

[0003] To solve this problem, related technologies can use a patch mechanism to correct code defects in deployed chips. In this way, software-level updates can be achieved without replacing the entire hardware. Ideally, the patch can make the program jump to the new correct implementation, thereby bypassing the original erroneous logic.

[0004] However, some related technologies lack effective anti-rollback measures and cannot prevent old version patches or malicious patches from being installed back into the system. If an attacker can trick a device into accepting an earlier version or even a specially crafted harmful patch, it may cause the fixed security vulnerability to reappear, greatly weakening the overall security of the system. Even if the related technology solution introduces an anti-rollback strategy based on version number comparison, such an approach is vulnerable to attacks such as forged version information. In addition, although the use of public-private key pairs for digital signing can enhance the authenticity and integrity verification of patches, there is still a risk of key leakage if key management is not strictly controlled, which in turn threatens the security of patches.

[0005] In summary, although the chip patch technology in the relevant technologies has a certain foundation, there are still many problems in strengthening the anti-rollback mechanism, optimizing key management practices, and ensuring high-quality patch development and deployment. These problems lead to insufficient security of chip patches.

[0006] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0007] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0008] The disclosed embodiments provide a patch processing method, a patch generating device, a chip and an electronic device, which introduce a stricter version control mechanism, a dynamic key generation strategy and a multi-level security verification process, thereby significantly improving the security during the patch update process.

[0009] According to a first aspect of the present disclosure, a patch processing method is provided, comprising:

[0010] Add the firmware version number and the patch version number to the original plaintext patch to obtain the target plaintext patch;

[0011] Generate a key based on the firmware version number and the patch version number according to the set rules, and use the key to encrypt the target plaintext patch to obtain a ciphertext patch;

[0012] Sending a patch installation request including a firmware version number and a patch version number to the chip, so that the chip determines whether it meets the patch receiving condition based on the firmware version number and the patch version number;

[0013] Upon receiving the installation permission notification returned by the chip in response to the patch installation request, the set rules and the ciphertext patch are sent to the chip, so that the chip generates a key according to the set rules based on the firmware version number and the patch version number, decrypts the ciphertext patch using the key to obtain the target plaintext patch, and performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0014] In some embodiments, adding the firmware version number and the patch version number to the original plaintext patch to obtain the target plaintext patch includes:

[0015] Add the firmware version number and the patch version number to the original plaintext patch to obtain the intermediate plaintext patch;

[0016] Calculate a unique value of the intermediate plaintext patch using a set algorithm;

[0017] Add a specific value to the intermediate plaintext patch to get the target plaintext patch.

[0018] In some embodiments, generating a key according to a set rule based on the firmware version number and the patch version number includes:

[0019] Get a random number sequence;

[0020] Generate a key based on the random number sequence, firmware version number and patch version number according to the set rules.

[0021] In some embodiments, sending the setting rules and the ciphertext patch to the chip includes:

[0022] Sending setting rules to the chip so that the chip generates a key according to the setting rules based on the firmware version number and the patch version number;

[0023] When receiving the key generation completion notification returned by the chip, the ciphertext patch is sent to the chip so that the chip uses the key to decrypt the ciphertext patch to obtain the target plaintext patch, and performs security verification on the target plaintext patch based on the firmware version number and patch version number in the target plaintext patch.

[0024] In some embodiments, the patch processing method further includes: upon receiving a security verification passing notification sent by the chip, sending a patch enabling command to the chip so that the chip enables the original plaintext patch.

[0025] According to a second aspect of the present disclosure, a patch processing method is provided, comprising:

[0026] receiving a patch installation request including a firmware version number and a patch version number sent by a patch generating device, and determining whether a patch receiving condition is met based on the firmware version number and the patch version number;

[0027] When it is determined that the patch receiving conditions are met, an installation permission notification is sent to the patch generating device;

[0028] Receive the setting rules and ciphertext patch sent by the patch generation device, generate a key according to the setting rules based on the firmware version number and the patch version number, and use the key to decrypt the ciphertext patch to obtain a target plaintext patch, where the target plaintext patch contains the original plaintext patch, the firmware version number and the patch version number;

[0029] Based on the firmware version number and the patch version number in the target plaintext patch, security verification is performed on the target plaintext patch.

[0030] In some embodiments, determining whether the patch receiving condition is met based on the firmware version number and the patch version number includes:

[0031] Compare the firmware version number in the patch installation request with the firmware version number stored in the chip;

[0032] Compare the patch version number in the patch installation request with the patch version number stored in the chip;

[0033] When the firmware version number in the patch installation request is consistent with the firmware version number stored in the chip, and the patch version number in the patch installation request is higher than the patch version number stored in the chip, it is determined that the patch reception condition is met.

[0034] In some embodiments, receiving a patch installation request including a firmware version number and a patch version number sent by a patch generation device includes: receiving a patch installation request including a random number sequence, a firmware version number and a patch version number sent by a patch generation device;

[0035] The key is generated according to the set rules based on the firmware version number and the patch version number, including: generating the key according to the set rules based on the random number sequence, the firmware version number and the patch version number.

[0036] In some embodiments, receiving a setting rule and a ciphertext patch sent by a patch generating device, generating a key according to the setting rule based on the firmware version number and the patch version number, and decrypting the ciphertext patch using the key to obtain a target plaintext patch includes:

[0037] Receiving the setting rules sent by the patch generation device, and generating a key according to the setting rules based on the firmware version number and the patch version number;

[0038] After the key is generated, a key generation completion notification is sent to the patch generation device, so that the patch generation device sends a ciphertext patch;

[0039] The ciphertext patch sent by the patch generating device is received, and the ciphertext patch is decrypted using a key to obtain a target plaintext patch.

[0040] In some embodiments, security verification is performed on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch, including:

[0041] Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip;

[0042] When the firmware version number and the patch version number in the target plaintext patch are respectively consistent with the firmware version number and the patch version number in the patch installation request, it is determined that the target plaintext patch security verification has passed.

[0043] In some embodiments, the target plaintext patch includes an intermediate plaintext patch and a unique specific value of the intermediate plaintext patch, wherein the intermediate plaintext patch is obtained by adding a firmware version number and a patch version number to an original plaintext patch;

[0044] Based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including:

[0045] Extract the intermediate plaintext patch from the target plaintext patch, and use the set algorithm to calculate the unique specific value of the intermediate plaintext patch;

[0046] Compare the calculated specific value with the specific value in the target plaintext patch;

[0047] Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip;

[0048] When the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the calculated specific value is consistent with the specific value in the target plaintext patch, it is determined that the target plaintext patch security verification passes.

[0049] In some embodiments, security verification is performed on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch, including:

[0050] Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip;

[0051] Compare the patch version number in the target plaintext patch with the patch version number stored in the chip;

[0052] When the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the patch version number in the target plaintext patch is higher than the patch version number stored in the chip, it is determined that the target plaintext patch security verification passes.

[0053] In some embodiments, the patch processing method further comprises:

[0054] When it is determined that the target plaintext patch passes the security verification, sending a security verification passing notification to the patch generating device so that the patch generating device sends a patch enabling command;

[0055] When receiving the patch enabling command sent by the patch generating device, the original plaintext patch in the target plaintext patch is enabled.

[0056] According to a third aspect of the present disclosure, a patch generating device is provided, comprising a processor and a memory storing program instructions, wherein the processor is configured to execute the patch processing method provided in the first aspect of the present disclosure when running the program instructions.

[0057] According to a fourth aspect of the present disclosure, a chip is provided, characterized in that it is configured to execute the patch processing method provided by the second aspect of the present disclosure.

[0058] According to a fifth aspect of the present disclosure, an electronic device is provided, comprising the chip provided by the fourth aspect of the present disclosure.

[0059] The patch processing method, patch generating device, chip and electronic device provided by the embodiments of the present disclosure can achieve the following technical effects:

[0060] In the patch processing method provided by the embodiment of the present disclosure, the patch generation device adds the firmware version number and the patch version number to the original plaintext patch, and generates a key based on these version numbers. When the chip receives a patch installation request, it determines whether it meets the patch reception conditions based on the firmware version number and the patch version number, which can ensure that the firmware and the patch are compatible with each other, and can also effectively prevent old versions or malicious patches from being installed in the system, thereby enhancing the anti-rollback mechanism. By dynamically generating keys based on the firmware version number and the patch version number, instead of encrypting all patches with a fixed key, the risk of key leakage can be reduced. Even if an attacker manages to obtain the key of a patch, since each patch has its own unique key, the key cannot be used to decrypt other patches, thereby improving the overall security. After accepting and decrypting the patch, the chip will further perform security verification based on the firmware version number and the patch version number in the target plaintext patch. This process helps to confirm the integrity and authenticity of the patch, ensuring that only legal and correct patches can be actually applied to the chip, avoiding potential risks caused by patch quality issues. The entire process above uses encrypted communication to protect the secure transmission of patch data from the patch generation device to the chip, reducing the possibility of being intercepted or tampered with on the way. It can be seen that this method significantly improves the security of the patch update process by introducing a stricter version control mechanism, a dynamic key generation strategy, and a multi-level security verification process.

[0061] The foregoing general description and the following description are exemplary and explanatory only and are not intended to limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein:

[0063] Figure 1 is a schematic diagram of an application scenario of the patch processing method provided by an embodiment of the present disclosure;

[0064] Figure 2 is a flowchart of a patch processing method provided by an embodiment of the present disclosure;

[0065] Figure 3 is a flowchart of another patch processing method provided by an embodiment of the present disclosure;

[0066] Figure 4is a flowchart of another patch processing method provided by an embodiment of the present disclosure;

[0067] Figure 5 is a flowchart of another patch processing method provided by an embodiment of the present disclosure;

[0068] Figure 6 It is a structural schematic diagram of a patch generating device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0069] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0070] The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so that the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0071] Unless otherwise stated, the term "plurality" means two or more.

[0072] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B indicates: A or B.

[0073] The term "and / or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0074] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.

[0075] Combination Figure 1As shown, the patch processing method provided in the embodiment of the present disclosure is applied to the patch generation device 100 and the chip 200. The patch generation device 100 and the chip 200 can communicate with each other. For example, the patch generation device 100 and the chip 200 can be transmitted to the security chip 200 end through a card reader contact or contactless connection. The patch generation device 100 can encrypt the patch for the firmware of the chip 200 and send the encrypted patch to the chip 200. The chip 200 can decrypt the received patch so that the patch can be used normally later.

[0076] The patch generation device 100 is a computing device capable of communicating with the chip 200. For example, the patch generation device 100 may be a personal computer, a server, a mobile device, etc. The chip 200 may be a security chip, a storage chip, a radio frequency chip, or a microprocessor, etc. The non-volatile storage area (such as a ROM area) of the chip 200 stores firmware.

[0077] In combination with the patch generation device and chip provided in the embodiments of the present disclosure, the embodiments of the present disclosure provide a patch processing method, such as Figure 2 As shown, the patch processing method includes:

[0078] S201, the patch generating device adds the firmware version number and the patch version number to the original plaintext patch to obtain a target plaintext patch.

[0079] In the disclosed embodiment, the original plaintext patch is the version number of the patch that currently needs to be sent to the chip, the firmware version number is the version number of the firmware currently stored in the chip, and the patch version number is the version number of the patch (i.e., the original plaintext patch) that currently needs to be sent to the chip. Here, the firmware version number and the patch version number can be added to the location where the version number of the original plaintext patch is stored, and the original plaintext patch with the firmware version number and the patch version number added is used as the target plaintext patch.

[0080] S202, the patch generating device generates a key according to a set rule based on the firmware version number and the patch version number, and uses the key to encrypt the target plaintext patch to obtain a ciphertext patch.

[0081] In the disclosed embodiment, the specific calculation logic of the setting rule can be determined according to the actual design needs. Optionally, the firmware version number and the patch version number can be logically operated, and the operation result can be used as the raw data input of the HKDF function (HMAC-based Key Derivation Function, based on the HMAC key derivation function), and the key can be obtained based on the function result of the HKDF function. For example, the first 256 bits of the function result of the HKDF function can be taken as the key.

[0082] In this embodiment, the specific method of using the key to encrypt the target plaintext patch can be determined according to actual design needs. For example, the key can be used to perform AES-256 encryption on the target plaintext patch to obtain a ciphertext patch.

[0083] S203: The patch generating device sends a patch installation request including a firmware version number and a patch version number to the chip.

[0084] S204, the chip receives a patch installation request including a firmware version number and a patch version number sent by a patch generating device, and determines whether a patch receiving condition is met based on the firmware version number and the patch version number.

[0085] S205: When the chip determines that the patch receiving condition is met, the chip sends an installation permission notification to the patch generating device.

[0086] S206 , when receiving the installation permission notification returned by the chip in response to the patch installation request, the patch generating device sends the setting rules and the encrypted patch to the chip.

[0087] S207, the chip receives the setting rules and the ciphertext patch sent by the patch generating device, generates a key according to the setting rules based on the firmware version number and the patch version number, and uses the key to decrypt the ciphertext patch to obtain a target plaintext patch.

[0088] It is understandable that the setting rules used by the chip are the same as the setting rules used by the patch generation device, so the key generated by the chip is also the same as the key generated by the patch generation device. The specific calculation logic of the setting rules can be determined according to the actual design needs. Optionally, the firmware version number and the patch version number can be logically operated, and the operation result can be used as the original data input of the HKDF function (HMAC-based Key Derivation Function), and the key is obtained based on the function result of the HKDF function. For example, the first 256 bits of the function result of the HKDF function can be taken as the key.

[0089] S208, the chip performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0090] In the patch processing method provided by the embodiment of the present disclosure, the patch generation device adds the firmware version number and the patch version number to the original plaintext patch, and generates a key based on these version numbers. When the chip receives a patch installation request, it determines whether it meets the patch reception conditions based on the firmware version number and the patch version number, which can ensure that the firmware and the patch are compatible with each other, and can also effectively prevent old versions or malicious patches from being installed in the system, thereby enhancing the anti-rollback mechanism. By dynamically generating keys based on the firmware version number and the patch version number, instead of encrypting all patches with a fixed key, the risk of key leakage can be reduced. Even if an attacker manages to obtain the key of a patch, since each patch has its own unique key, the key cannot be used to decrypt other patches, thereby improving the overall security. After accepting and decrypting the patch, the chip will further perform security verification based on the firmware version number and the patch version number in the target plaintext patch. This process helps to confirm the integrity and authenticity of the patch, ensuring that only legal and correct patches can be actually applied to the chip, avoiding potential risks caused by patch quality issues. The entire process above uses encrypted communication to protect the secure transmission of patch data from the patch generation device to the chip, reducing the possibility of being intercepted or tampered with on the way. It can be seen that this method significantly improves the security of the patch update process by introducing a stricter version control mechanism, a dynamic key generation strategy, and a multi-level security verification process.

[0091] In some embodiments, adding the firmware version number and the patch version number to the original plaintext patch to obtain a target plaintext patch includes: adding the firmware version number and the patch version number to the original plaintext patch to obtain an intermediate plaintext patch; using a set algorithm to calculate a unique specific value of the intermediate plaintext patch; adding the specific value to the intermediate plaintext patch to obtain the target plaintext patch.

[0092] In some embodiments, generating a key according to set rules based on the firmware version number and the patch version number includes: obtaining a random number series; generating a key according to set rules based on the random number series, the firmware version number and the patch version number.

[0093] In some embodiments, determining whether the patch reception condition is met based on the firmware version number and the patch version number includes: comparing the firmware version number in the patch installation request with the firmware version number stored in the chip; comparing the patch version number in the patch installation request with the patch version number stored in the chip; when the firmware version number in the patch installation request is consistent with the firmware version number stored in the chip, and the patch version number in the patch installation request is higher than the patch version number stored in the chip, determining that the patch reception condition is met.

[0094] In some embodiments, receiving a patch installation request including a firmware version number and a patch version number from a patch generation device includes: receiving a patch installation request including a random number series, a firmware version number and a patch version number from a patch generation device. Generating a key according to a set rule based on the firmware version number and the patch version number includes: generating a key according to a set rule based on a random number series, a firmware version number and a patch version number.

[0095] like Figure 3 As shown, the embodiment of the present disclosure provides another patch processing method, the patch processing method includes:

[0096] S301, the patch generating device adds the firmware version number and the patch version number to the original plaintext patch to obtain an intermediate plaintext patch.

[0097] In the disclosed embodiment, the original plaintext patch is the version number of the patch that currently needs to be sent to the chip, the firmware version number is the version number of the firmware currently stored in the chip, and the patch version number is the version number of the patch (i.e., the original plaintext patch) that currently needs to be sent to the chip. Here, the firmware version number and the patch version number can be added to the location where the version number of the original plaintext patch is stored, and the original plaintext patch with the firmware version number and the patch version number added is used as the intermediate plaintext patch.

[0098] S302: The patch generating device uses a set algorithm to calculate a unique specific value of the intermediate plaintext patch.

[0099] In the embodiments of the present disclosure, the specific types of the setting algorithm and the specific value can be determined according to actual design requirements. Optionally, the setting algorithm can be a SHA-256 calculation algorithm, and the specific value can be a hash value, such as a SHA-1 value, a SHA-3 value, an HMAC value, or an MD5 value.

[0100] S303, the patch generating device adds a specific value to the intermediate plaintext patch to obtain a target plaintext patch.

[0101] In the embodiment of the present disclosure, the position of the intermediate plaintext patch to which the specific value is added can be determined according to actual design requirements. For example, the specific value can be added to the end of the content of the intermediate plaintext patch to obtain the target plaintext patch.

[0102] S304, the patch generating device obtains a random number sequence, and generates a key according to a set rule based on the random number sequence, the firmware version number and the patch version number.

[0103] In the disclosed embodiment, the specific calculation logic of the setting rule can be determined according to the actual design needs. Optionally, the random number sequence, the firmware version number and the patch version number are logically operated, and the operation result is used as the original data input of the HKDF function (HMAC-based Key Derivation Function, based on the HMAC key derivation function), and the key is obtained based on the function result of the HKDF function. For example, the first 256 bits of the function result of the HKDF function can be taken as the key.

[0104] S305, the patch generating device encrypts the target plaintext patch using the key to obtain a ciphertext patch.

[0105] In this embodiment, the specific method of using the key to encrypt the target plaintext patch can be determined according to actual design needs. For example, the key can be used to perform AES-256 encryption on the target plaintext patch to obtain a ciphertext patch.

[0106] S306: The patch generating device sends a patch installation request including a firmware version number and a patch version number to the chip.

[0107] S307, the chip receives a patch installation request including a random number sequence, a firmware version number and a patch version number sent by the patch generating device.

[0108] S308: The chip compares the firmware version number in the patch installation request with the firmware version number stored in the chip.

[0109] S309: The chip compares the patch version number in the patch installation request with the patch version number stored in the chip.

[0110] S310: When the firmware version number of the chip in the patch installation request is consistent with the firmware version number stored in the chip, and the patch version number in the patch installation request is higher than the patch version number stored in the chip, it is determined that the patch receiving condition is met.

[0111] In the embodiment of the present disclosure, the patch version number stored in the chip refers to the version number of the patch that has been installed and effective on the current chip. If the chip does not currently store any patch, the patch version number stored in the chip is usually set to an initial value or a default value.

[0112] In the disclosed embodiment, by verifying the firmware version number, it is possible to ensure that the patch is compatible with the currently running firmware version, thus avoiding system instability or malfunction caused by version mismatch. In addition, the chip will only accept the patch if the version of the original plaintext patch is higher than the version number of the patch that has been installed and effective on the current chip, which effectively prevents old versions or malicious patches from being installed into the system, thus enhancing the anti-rollback mechanism.

[0113] S311, when the chip determines that the patch receiving condition is met, it sends an installation permission notification to the patch generating device.

[0114] S312: When receiving the installation permission notification returned by the chip in response to the patch installation request, the patch generating device sends the setting rules and the encrypted patch to the chip.

[0115] S313, the chip receives the setting rules and ciphertext patch sent by the patch generation device, generates a key according to the setting rules based on the random number sequence, the firmware version number and the patch version number, and uses the key to decrypt the ciphertext patch to obtain the target plaintext patch.

[0116] It is understandable that the setting rules used by the chip are the same as the setting rules used by the patch generation device, so the key generated by the chip is also the same as the key generated by the patch generation device. The specific calculation logic of the setting rules can be determined according to the actual design needs. Optionally, the random number series, the firmware version number and the patch version number are logically operated, and the operation result is used as the original data input of the HKDF function (HMAC-based Key Derivation Function), and the key is obtained based on the function result of the HKDF function. For example, the first 256 bits of the function result of the HKDF function can be taken as the key.

[0117] S314, the chip performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0118] In some embodiments, setting rules and ciphertext patches are sent to the chip, including: sending setting rules to the chip so that the chip generates a key according to the setting rules based on the firmware version number and the patch version number; upon receiving the key generation completion notification returned by the chip, sending the ciphertext patch to the chip so that the chip uses the key to decrypt the ciphertext patch to obtain a target plaintext patch, and performing security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0119] In some embodiments, setting rules and ciphertext patches sent by a patch generating device are received, keys are generated according to the setting rules based on the firmware version number and the patch version number, and the ciphertext patches are decrypted using the keys to obtain target plaintext patches, including: receiving setting rules sent by a patch generating device, generating keys according to the setting rules based on the firmware version number and the patch version number; after the keys are generated, a key generation end notification is sent to the patch generating device so that the patch generating device sends the ciphertext patch; receiving the ciphertext patch sent by the patch generating device, and decrypting the ciphertext patches using the keys to obtain target plaintext patches.

[0120] like Figure 4As shown, the embodiment of the present disclosure provides another patch processing method, the patch processing method includes:

[0121] S401, the patch generating device adds the firmware version number and the patch version number to the original plaintext patch to obtain a target plaintext patch.

[0122] S202, the patch generating device generates a key according to a set rule based on the firmware version number and the patch version number, and uses the key to encrypt the target plaintext patch to obtain a ciphertext patch.

[0123] S403: The patch generating device sends a patch installation request including a firmware version number and a patch version number to the chip.

[0124] S404, the chip receives a patch installation request including a firmware version number and a patch version number sent by a patch generating device, and determines whether a patch receiving condition is met based on the firmware version number and the patch version number.

[0125] S405: When the chip determines that the patch receiving condition is met, the chip sends an installation permission notification to the patch generating device.

[0126] S406: When receiving the installation permission notification returned by the chip in response to the patch installation request, the patch generating device sends the setting rules to the chip.

[0127] S407, the chip receives the setting rules sent by the patch generating device, and generates a key according to the setting rules based on the firmware version number and the patch version number.

[0128] S408: After generating the key, the chip sends a key generation completion notification to the patch generating device.

[0129] S409: When receiving the key generation completion notification returned by the chip, the patch generating device sends a ciphertext patch to the chip.

[0130] In the disclosed embodiment, by waiting for the chip to return a notification of the end of key generation, the patch generation device can confirm that the chip has successfully generated the required key. This ensures that the chip has the ability to decrypt before sending the ciphertext patch. If the chip fails to generate the key correctly, directly sending the ciphertext patch will result in a decryption failure, resulting in a failure to install the patch. This situation can be avoided by waiting for the notification of the end of key generation. The ciphertext patch is encrypted during transmission, but if the key has not yet been generated or is not ready, sending the ciphertext patch in advance may increase the risk of data exposure. By ensuring that the ciphertext patch is sent after the key generation is completed, the exposure time of the ciphertext patch during transmission can be reduced, effectively reducing security risks.

[0131] In the disclosed embodiment, the ciphertext patch includes multiple patch files. When the patch generation device receives the key generation completion notification, it sends the patch files one by one. After all the patch files are sent, it can send a ciphertext patch completion command. The ciphertext patch completion command is used to notify the security chip that it can start security verification.

[0132] S410, the chip receives the ciphertext patch sent by the patch generating device, and uses the key to decrypt the ciphertext patch to obtain a target plaintext patch.

[0133] In the disclosed embodiment, the chip can receive patch files one by one, and can send a patch receiving completion notification to the patch generating device each time a patch file is received, and the patch receiving completion notification is used to instruct the patch generating device to continue to send the next patch file. When the chip receives the ciphertext patch end command, it confirms that the ciphertext patch has been sent, and at this time, the ciphertext patch can be decrypted using the key to obtain the target plaintext patch, and then security verification is performed.

[0134] S411, the chip performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0135] In some embodiments, the target plaintext patch is security verified based on the firmware version number and patch version number in the target plaintext patch, including: comparing the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; when the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, it is determined that the target plaintext patch security verification has passed.

[0136] In the disclosed embodiment, by comparing the version number in the target plaintext patch with the version number in the patch installation request, it can be ensured that no data tampering or error occurred during the transmission process. If the version numbers are inconsistent, it means that the patch may have been modified or damaged during the transmission process, or there are other problems, which can be discovered in time and the installation can be rejected.

[0137] In some embodiments, the target plaintext patch includes an intermediate plaintext patch and a unique specific value of the intermediate plaintext patch, wherein the intermediate plaintext patch is obtained by adding a firmware version number and a patch version number to an original plaintext patch.

[0138] Based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: extracting the intermediate plaintext patch from the target plaintext patch, and using a set algorithm to calculate a unique specific value of the intermediate plaintext patch; comparing the calculated specific value with the specific value in the target plaintext patch; comparing the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; when the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the calculated specific value is consistent with the specific value in the target plaintext patch, it is determined that the target plaintext patch security verification has passed.

[0139] In the embodiment of the present disclosure, only a specific value can be removed from the target plaintext patch to obtain an intermediate plaintext patch. It can be understood that the setting algorithm used by the chip is the same as the setting algorithm used by the patch generating device, so the specific value generated by the chip is also the same as the specific value generated by the patch generating device. The specific types of the setting algorithm and the specific value can be determined according to actual design needs. Optionally, the setting algorithm can be a SHA-256 calculation algorithm, and the specific value can be a hash value, such as a SHA-1 value, a SHA-3 value, an HMAC value, or an MD5 value.

[0140] In the disclosed embodiment, by including a unique specific value (such as a hash value) in the target plaintext patch and recalculating the value on the chip side, it is possible to detect whether the target plaintext patch has been tampered with during transmission. If the calculated specific value is inconsistent with the specific value in the patch, it means that the patch has been tampered with. By configuring the uniqueness verification process, an integrity verification mechanism is provided to ensure that the patch has not been modified or damaged during transmission.

[0141] In some embodiments, based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: comparing the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; comparing the patch version number in the target plaintext patch with the patch version number stored in the chip; when the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the patch version number in the target plaintext patch is higher than the patch version number stored in the chip, it is determined that the target plaintext patch security verification has passed.

[0142] In the disclosed embodiment, the chip will determine that the target plaintext patch has passed security verification only when the patch version number in the target plaintext patch is higher than the patch version number stored in the chip. This effectively prevents old versions or malicious patches from being installed in the system, thereby enhancing the anti-rollback mechanism.

[0143] In some embodiments, based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: extracting an intermediate plaintext patch from the target plaintext patch, and using a set algorithm to calculate a unique specific value of the intermediate plaintext patch; comparing the calculated specific value with the specific value in the target plaintext patch; comparing the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; comparing the patch version number in the target plaintext patch with the patch version number stored in the chip; when the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, the calculated specific value is consistent with the specific value in the target plaintext patch, and the patch version number in the target plaintext patch is higher than the patch version number stored in the chip, it is determined that the target plaintext patch has passed the security verification.

[0144] In some embodiments, the patch processing method further includes: upon receiving a security verification passing notification sent by the chip, sending a patch enabling command to the chip so that the chip enables the original plaintext patch.

[0145] In some embodiments, the patch processing method also includes: when it is determined that the target plaintext patch has passed security verification, sending a security verification pass notification to the patch generation device so that the patch generation device sends a patch enable command; when receiving the patch enable command sent by the patch generation device, enabling the original plaintext patch in the target plaintext patch.

[0146] Combination Figure 5 As shown, the embodiment of the present disclosure provides another patch processing method, the patch processing method includes:

[0147] S501, the patch generating device adds the firmware version number and the patch version number to the original plaintext patch to obtain a target plaintext patch.

[0148] S502, the patch generating device generates a key according to a set rule based on the firmware version number and the patch version number, and uses the key to encrypt the target plaintext patch to obtain a ciphertext patch.

[0149] S503: The patch generating device sends a patch installation request including a firmware version number and a patch version number to the chip.

[0150] S504, the chip receives a patch installation request including a firmware version number and a patch version number sent by a patch generating device, and determines whether a patch receiving condition is met based on the firmware version number and the patch version number.

[0151] S505: When the chip determines that the patch receiving condition is met, the chip sends an installation permission notification to the patch generating device.

[0152] S506: When receiving the installation permission notification returned by the chip in response to the patch installation request, the patch generating device sends the setting rules and the encrypted patch to the chip.

[0153] S507, the chip receives the setting rules and the ciphertext patch sent by the patch generating device, generates a key according to the setting rules based on the firmware version number and the patch version number, and uses the key to decrypt the ciphertext patch to obtain a target plaintext patch.

[0154] S508, the chip performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

[0155] S509 , when the chip determines that the target plaintext patch passes the security verification, it sends a security verification passing notification to the patch generating device.

[0156] S510: When receiving a security verification passing notification sent by the chip, the patch generating device sends a patch enabling command to the chip.

[0157] In the disclosed embodiment, by waiting for the chip to return a notification that the security verification has passed, the patch generation device can confirm that the chip has successfully verified the integrity and authenticity of the patch. This ensures that the patch has not been tampered with or damaged during transmission. If the patch has been tampered with or contains malicious code, the chip's security verification process will detect these problems and refuse to install. Only after the verification is passed will the patch generation device send an enable command to prevent malicious patches from being activated. If the patch fails the security verification, directly sending an enable command will result in invalid operations and may even cause system instability or failure. This situation can be avoided by ensuring that the patch verification is passed before sending the enable command.

[0158] S511, when the chip receives the patch enabling command sent by the patch generating device, the chip enables the original plaintext patch in the target plaintext patch.

[0159] In the embodiment of the present disclosure, enabling the original plaintext patch in the target plaintext patch is to apply the original plaintext patch to the firmware of the chip to make it effective. Specifically, the chip can perform a system reset after responding to the enabling structure, and after the system reset is completed, the installed original plaintext patch can be executed.

[0160] Combination Figure 6As shown, the embodiment of the present disclosure provides a patch generation device 100, which includes a processor 101 and a memory 102. Optionally, the patch generation device 100 may also include a communication interface 103 and a bus 104. The processor 101, the communication interface 103, and the memory 102 may communicate with each other through the bus 104. The communication interface 103 may be used for information transmission. The processor 101 may call the logic instructions in the memory 102 to execute the patch processing method of the above embodiment.

[0161] In addition, the logic instructions in the memory 102 described above may be implemented in the form of software functional units and when sold or used as independent products, may be stored in a computer-readable storage medium.

[0162] The memory 102 is a computer-readable storage medium that can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor 101 executes the function application and data processing by running the program instructions / modules stored in the memory 102, that is, implements the patch processing method in the above embodiment.

[0163] The memory 102 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 102 may include a high-speed random access memory and may also include a non-volatile memory.

[0164] An embodiment of the present disclosure provides an electronic device, and the electronic device includes the chip 200 provided in the above embodiment.

[0165] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.

[0166] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operation may vary. The parts and features of some embodiments may be included in or replace the parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and the claims, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of listings containing one or more associated ones. In addition, when used in the present application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the presence of other identical elements in the process, method or device comprising the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the various embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0167] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods for each specific application to implement the described functions, but such implementations should not be considered to exceed the scope of the embodiments of the present disclosure. The technicians may clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above may refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0168] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0169] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A patch processing method, characterized in that: include: Add the firmware version number and the patch version number to the original plaintext patch to obtain the target plaintext patch; Generate a key based on the firmware version number and the patch version number according to the set rules, and use the key to encrypt the target plaintext patch to obtain a ciphertext patch; Sending a patch installation request including a firmware version number and a patch version number to the chip, so that the chip determines whether it meets the patch receiving condition based on the firmware version number and the patch version number; Upon receiving the installation permission notification returned by the chip in response to the patch installation request, the set rules and the ciphertext patch are sent to the chip, so that the chip generates a key according to the set rules based on the firmware version number and the patch version number, decrypts the ciphertext patch using the key to obtain the target plaintext patch, and performs security verification on the target plaintext patch based on the firmware version number and the patch version number in the target plaintext patch.

2. The patch processing method according to claim 1, characterized in that: Add the firmware version number and patch version number to the original plaintext patch to get the target plaintext patch, including: Add the firmware version number and the patch version number to the original plaintext patch to obtain the intermediate plaintext patch; Calculate a unique value of the intermediate plaintext patch using a set algorithm; Add a specific value to the intermediate plaintext patch to get the target plaintext patch.

3. The patch processing method according to claim 1, characterized in that: Generate a key based on the firmware version number and patch version number according to the set rules, including: Get a random number sequence; Generate a key based on the random number sequence, firmware version number and patch version number according to the set rules.

4. The patch processing method according to claim 1, characterized in that: Send set rules and ciphertext patches to the chip, including: Sending setting rules to the chip so that the chip generates a key according to the setting rules based on the firmware version number and the patch version number; When receiving the key generation completion notification returned by the chip, the ciphertext patch is sent to the chip so that the chip uses the key to decrypt the ciphertext patch to obtain the target plaintext patch, and performs security verification on the target plaintext patch based on the firmware version number and patch version number in the target plaintext patch.

5. The patch processing method according to any one of claims 1 to 4, characterized in that: Also includes: When receiving the security verification passing notification sent by the chip, a patch enabling command is sent to the chip to enable the chip to enable the original plaintext patch.

6. A patch processing method, characterized in that: include: receiving a patch installation request including a firmware version number and a patch version number sent by a patch generating device, and determining whether a patch receiving condition is met based on the firmware version number and the patch version number; When it is determined that the patch receiving conditions are met, an installation permission notification is sent to the patch generating device; Receive the setting rules and ciphertext patch sent by the patch generation device, generate a key according to the setting rules based on the firmware version number and the patch version number, and use the key to decrypt the ciphertext patch to obtain a target plaintext patch, where the target plaintext patch contains the original plaintext patch, the firmware version number and the patch version number; Based on the firmware version number and the patch version number in the target plaintext patch, security verification is performed on the target plaintext patch.

7. The patch processing method according to claim 6, characterized in that: Determine whether the patch receiving conditions are met based on the firmware version number and patch version number, including: Compare the firmware version number in the patch installation request with the firmware version number stored in the chip; Comparing the patch version number in the patch installation request with the patch version number stored in the chip; When the firmware version number in the patch installation request is consistent with the firmware version number stored in the chip, and the patch version number in the patch installation request is higher than the patch version number stored in the chip, it is determined that the patch reception condition is met.

8. The patch processing method according to claim 6, characterized in that: Receiving a patch installation request including a firmware version number and a patch version number sent by a patch generation device, including: receiving a patch installation request including a random number sequence, a firmware version number and a patch version number sent by the patch generation device; The key is generated according to the set rules based on the firmware version number and the patch version number, including: generating the key according to the set rules based on the random number series, the firmware version number and the patch version number.

9. The patch processing method according to claim 6, characterized in that: Receiving the setting rules and the ciphertext patch sent by the patch generating device, generating a key according to the setting rules based on the firmware version number and the patch version number, and decrypting the ciphertext patch using the key to obtain a target plaintext patch, including: Receiving the setting rules sent by the patch generation device, and generating a key according to the setting rules based on the firmware version number and the patch version number; After the key is generated, a key generation completion notification is sent to the patch generation device, so that the patch generation device sends a ciphertext patch; The ciphertext patch sent by the patch generating device is received, and the ciphertext patch is decrypted using a key to obtain a target plaintext patch.

10. The patch processing method according to claim 6, characterized in that: Based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; When the firmware version number and the patch version number in the target plaintext patch are respectively consistent with the firmware version number and the patch version number in the patch installation request, it is determined that the target plaintext patch security verification has passed.

11. The patch processing method according to claim 6, characterized in that: The target plaintext patch includes an intermediate plaintext patch and a unique specific value of the intermediate plaintext patch, wherein the intermediate plaintext patch is obtained by adding the firmware version number and the patch version number to the original plaintext patch; Based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: Extract the intermediate plaintext patch from the target plaintext patch, and use the set algorithm to calculate the unique specific value of the intermediate plaintext patch; Compare the calculated specific value with the specific value in the target plaintext patch; Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; When the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the calculated specific value is consistent with the specific value in the target plaintext patch, it is determined that the target plaintext patch security verification passes.

12. The patch processing method according to claim 6, characterized in that: Based on the firmware version number and patch version number in the target plaintext patch, the target plaintext patch is security verified, including: Compare the firmware version number and patch version number in the target plaintext patch with the firmware version number in the patch installation request and the firmware version number stored in the chip; Compare the patch version number in the target plaintext patch with the patch version number stored in the chip; When the firmware version number and patch version number in the target plaintext patch are respectively consistent with the firmware version number and patch version number in the patch installation request, and the patch version number in the target plaintext patch is higher than the patch version number stored in the chip, it is determined that the target plaintext patch security verification passes.

13. The patch processing method according to claims 6 to 12, characterized in that: Also includes: When it is determined that the target plaintext patch passes the security verification, sending a security verification passing notification to the patch generating device so that the patch generating device sends a patch enabling command; When receiving the patch enabling command sent by the patch generating device, the original plaintext patch in the target plaintext patch is enabled.

14. A patch generation device, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the patch processing method according to any one of claims 1 to 5 when running program instructions.

15. A chip, characterized in that: The method is configured to execute the patch processing method according to any one of claims 6 to 13.

16. An electronic device, characterized in that: Comprising the chip as claimed in claim 15.

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