Method and method for protecting and updating nonvolatile memory program in debugging port enabling
By using the debug interface to write feature values in the ARM Cortex-M architecture chip to start security protection, restrict access to non-volatile memory, and unrestricted access through ROM programs, the security protection and update of the program is achieved, solving the problem of the inability to reopen the debug interface and hardware timing dependence in the prior art.
Patent Information
- Application Number
- CN202411806671.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-10
- Publication Date
- 2025-03-18
AI Technical Summary
When protecting non-volatile memory programs of ARM Cortex-M architecture chips, the prior art has the problem of not being able to re-open the debug interface, which leads to difficulty in updating the program; on the other hand, the erasure method that relies on hardware timing poses security risks and high cost problems.
The debugging interface writes the feature value into the EEPROM's security protection word to start security protection, restricting the debugging interface from accessing space other than the last word of the nonvolatile memory eFlash; when the program is updated, the eFlash space is erased through the debugging interface, and the access restrictions are lifted through the ROM program, and the initial value is rewrited back to reset the chip.
It realizes the security of non-volatile memory programs without prohibiting debugging interfaces, and allows program updates, avoiding the security risks and high cost problems of hardware timing dependence.
Smart Images
Figure CN119646827A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of computer storage, and in particular to a method and method for protecting and updating a non-volatile memory program in enabling a debugging port. Background Art
[0002] The ARM Cortex-M architecture is a widely used microprocessor architecture. Many chip design companies in the world use this architecture to design microcontrollers. In order to facilitate customers to debug programs, the ARM Cortex-M architecture integrates a debugging system. Developers can access all address spaces on the chip based on the SWD (Single Wire Debugger) or JTAG (Joint Test Action Group) protocol, and can also observe the program running by setting breakpoints. The use of the debugging system makes it easier for program developers to analyze and locate problems. At the same time, the debugging interface can be used to read and update programs and data in non-volatile memory, but this also brings security risks: attackers can read the developer's programs and data through the debugging system. At present, in order to solve security risks, different chip design companies have provided two solutions.
[0003] One of them is to turn off the debug interface. The chip integrates OTP (One Time Program), eFuse and other similar memories. This area can only be written once by the program developer and cannot be modified afterwards. The developer writes a characteristic value at a certain address of this type of memory. During the power-on reset of the chip, the address is read by hardware pre-reading and compared with the characteristic value. If they are equal, the debug function is disabled. If they are not equal, the debug function is not disabled. The advantage of this solution is that once the characteristic value is written to disable the debug interface, the debug interface can never be reopened, and it has a very high security level. The disadvantage of this solution is that since the debug interface cannot be reopened, the debug interface cannot be used to update the program later, and the user needs to return to the Boot state (ROM Boot of the chip company or the secondary Boot of the customer) to upgrade the program.
[0004] The other method is to not prohibit the debug interface, but prohibit the debug interface from accessing the non-volatile memory. This solution does not prohibit the debug interface, and an erasable information block similar to EEPROM is integrated on the chip. When security protection is enabled, the customer can write the characteristic value to the EEPROM through the debug interface. After the reset takes effect, the debug interface cannot access the storage space of the non-volatile memory other than the EEPROM, including read, write, and erase operations. When the customer needs to update the program, the EEPROM is written with the initial value, such as 0xFFFFFFFF, through the debug interface. At this time, the chip hardware will be triggered to erase the customer program. After the customer program is erased, the initial value will be truly written to the EEPROM. The advantage of this method is that the user program can be updated again using the debug interface. The disadvantage is that the method of erasing the user program and finally writing the initial value to the EEPROM by the hardware takes a long time, and the hardware needs to ensure that it is not interrupted in the middle. From a security perspective, there are certain security risks. From a chip design perspective, once the design fails, it means the failure of the chip, which is very costly. In addition, the implementation details are not disclosed, and the reference for other chip designers is limited. Summary of the invention
[0005] The purpose of the present invention is to solve the shortcomings of the above-mentioned prior art, and to provide a method and system for protecting and updating the program of the non-volatile memory in enabling the debug port. On the basis of the solution of "not prohibiting the debug interface, but prohibiting the debug interface from accessing the non-volatile memory", an improvement is made. When the customer re-updates the program, it no longer relies on the hardware timing, but first erases the user program by software, and then uses the ROM program of the chip to complete the release of the access restriction of the debug interface.
[0006] On the one hand, a method for protecting and updating a non-volatile memory program in a debug port enabling state is provided, wherein: The protection method comprises: S1: Start security protection and write the characteristic value into the security protection word of the chip's electrically erasable programmable read-only memory EEPROM through the debug interface; S2: during reset, reading and determining whether the security protection word contains a characteristic value, and implementing access restriction of the debug interface to the non-volatile memory eFlash except for the last word; The updating method comprises: S3: Access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; S4: writing a characteristic value into the degradation flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; S5: After the chip is reset, read and determine whether the degradation flag word is a characteristic value, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.
[0007] Furthermore, when security protection is not enabled, the entire space of the non-volatile memory eFlash is accessible, and the program is downloaded to the eFlash through the debug interface. The program burning process specifically includes: The target chip is connected to the host through the debugging interface, and the parameters of the target chip are configured. After the configuration is completed, the compiled program file is downloaded to the non-volatile memory eFlash through the download function provided by the debugging tool in the host according to the transmission protocol specified by the debugging interface, according to the instruction sequence and data format.
[0008] Further, step S1 and step S4 include: Determine the storage addresses of the security protection word and the degradation flag word according to the storage structure of the electrically erasable programmable read-only memory EEPROM; The electrically erasable programmable read-only memory EEPROM is accessed through a debugging interface, and a host debugging tool writes a characteristic value to the address of the security protection word or the degradation flag word according to a write timing requirement of the EEPROM, wherein the timing requirement includes a write pulse width and a wait write completion flag.
[0009] Further, step S2 includes: S21: The chip starts to reset, and the reset circuit inside the chip initializes each module of the chip, triggering the EEPROM read operation; S22: finding the security protection word address of the electrically erasable programmable read-only memory EEPROM according to a preset address mapping relationship, and reading the data stored at the address according to its reading timing; S23: Determine whether the security protection word is a characteristic value, If it is a characteristic value, the security protection mechanism is triggered, and the storage access control unit in the chip filters the access request to the non-volatile memory eFlash issued by the debug interface, rejects the access request except the last word address of the non-volatile memory eFlash, and also prohibits indirect access and reading by downloading the program to the random access memory SRAM; Otherwise, it is determined that the chip is not in security protection.
[0010] Further, step S3 includes: S31: determining the address of the last word of the non-volatile memory eFlash according to the storage structure of the non-volatile memory eFlash; S32: specifying the entire space of the non-volatile memory eFlash as an erase range, triggering an erase mechanism when the debug interface accesses the last word address of the non-volatile memory eFlash, and clearing data from the non-volatile memory eFlash according to the specified erase range.
[0011] Furthermore, in step S5, reading and determining whether the degradation flag word is a characteristic value further includes: S51: After the chip is reset, the boot program solidified in the read-only memory ROM is first executed; S52: the read-only memory ROM reads data from the designated degradation flag word address according to the read timing of the electrically erasable programmable read-only memory EEPROM, and determines whether the read data is a characteristic value. If so, further checks whether the entire space of the non-volatile memory eFlash is completely erased.
[0012] Further, the checking whether the entire space of the non-volatile memory eFlash is completely erased specifically includes: The read-only memory ROM starts from the start address of the non-volatile memory eFlash, reads data word by word until the end address is read, and determines whether all the read data are default values after erasure. If yes, it is considered that the entire space of the non-volatile memory eFlash has been completely erased, and step S5 is executed to rewrite the security protection word and the degradation flag word back to the initial value and reset the chip; Otherwise, the read-only memory ROM does not perform any processing, and waits for the debug interface to fully erase and reset the eFlash before performing the check and processing again.
[0013] Furthermore, rewriting the security protection word and the degradation flag word back to the initial value and resetting the chip further comprises: According to the method adopted in step S1 and step S4, the default values are written to the security protection word and the degradation flag word address in the electrically erasable programmable read-only memory EEPROM respectively; The read-only memory ROM triggers the reset logic of the reset control register of the chip, the security protection state is released, the restriction of the debug interface accessing the non-volatile memory eFlash is cancelled, and the debug interface is allowed to be reused for program download operations.
[0014] On the other hand, a debug port enabled non-volatile memory program protection and update system is provided, comprising a security protection module and an erase update module, wherein the security protection module comprises a security word write unit and an access restriction unit, and the erase update module comprises an erase unit, a degradation word write unit and a reset unit, wherein: The security word writing unit is used to write a characteristic value into the security protection word of the electrically erasable programmable read-only memory (EEPROM) of the chip through a debugging interface; The access restriction unit is used to read and determine whether the security protection word contains a characteristic value during reset, so as to implement access restriction of the debug interface except for the last word in the non-volatile memory eFlash; The restricted access unit is used to access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; The degraded word writing unit is used to write a characteristic value into the degraded flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; The reset unit is used to read and determine whether the degradation flag word is a characteristic value after the chip is reset, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.
[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention starts security protection by writing a characteristic value into a security protection word of an electrically erasable programmable read-only memory EEPROM through a debugging interface. The address where the security protection word is located cannot be rewritten by the debugging interface, and the debugging interface cannot access other spaces of the EEPROM, the read-only memory ROM, and the non-volatile memory eFlash except the last word address. The present invention accesses the last word of eFlash through a debug interface to achieve erasure of the entire eFlash space, and then writes a characteristic value into the degradation flag word of the EEPROM through the debug interface. After reset, the code in the ROM rewrites the security protection word and the degradation flag word in the EEPROM back to the default value after confirming that the entire eFlash space is erased. Then, after reset, the debug interface can download the program to the eFlash to achieve program update. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings: Figure 1 A flow chart of a method for protecting and updating a non-volatile memory program in a debug port enabling process of the present invention; Figure 2 A schematic diagram of a debugging interface burning program flow of the present invention; Figure 3 This is a schematic flow chart of a method for protecting the security of eFlash according to the present invention; Figure 4The present invention is a cross-functional flow chart for erasing eFlash and releasing protection.
[0017] Figure 5 The figure is a schematic diagram of the hardware architecture of a system of the present invention. DETAILED DESCRIPTION
[0018] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0019] The present invention is a security solution based on the ARM Cortex-M architecture, which protects the program stored in the non-volatile memory from being read by attackers when the debug interface (SWD) is not disabled, and can update new firmware. The solution has the advantages of easy chip design, easy customer operation, high security, etc.
[0020] The specific implementation of the present invention is described below with reference to the accompanying drawings and embodiments.
[0021] like Figure 1 As shown, a technical solution of a non-volatile memory program protection and update method in a debug port enabling process provided by this embodiment, wherein: The protection method comprises: S1: Start security protection and write the characteristic value into the security protection word of the chip's electrically erasable programmable read-only memory EEPROM through the debug interface; S2: during reset, reading and determining whether the security protection word contains a characteristic value, and implementing access restriction of the debug interface to the non-volatile memory eFlash except for the last word; The updating method comprises: S3: Access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; S4: writing a characteristic value into the degradation flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; S5: After the chip is reset, read and determine whether the degradation flag word is a characteristic value, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.
[0022] When the protection function is not enabled, the entire space is accessible and the program can be downloaded to the eFlash through the debug interface. The program is burned through the debug interface. Figure 2 As shown, specifically including: The target chip is connected to the host through the debugging interface. The debugging interface used in this embodiment is SWD. The parameters of the target chip are configured. After the configuration is completed, the compiled program file is downloaded to the non-volatile memory eFlash through the download function provided by the debugging tool in the host according to the transmission protocol specified by the debugging interface, according to the instruction sequence and data format.
[0023] Starting security protection, determining the storage address of the security protection word according to the storage structure of the electrically erasable programmable read-only memory EEPROM; The electrically erasable programmable read-only memory EEPROM is accessed through a debugging interface, and a debugging tool of a host writes a characteristic value to the address of the security protection word according to a writing timing requirement of the EEPROM, wherein the timing requirement includes a writing pulse width and a waiting writing completion flag.
[0024] Then, reading and identifying whether the value in the security protection word is a characteristic value specifically includes: S21: The chip starts to reset, and the reset circuit inside the chip initializes each module of the chip, triggering the EEPROM read operation; S22: finding the security protection word address of the electrically erasable programmable read-only memory EEPROM according to a preset address mapping relationship, and reading the data stored at the address according to its reading timing; S23: Determine whether the security protection word is a characteristic value, If it is a characteristic value, the security protection mechanism is triggered, and the storage access control unit in the chip filters the access request to the non-volatile memory eFlash issued by the debug interface, rejects the access request except the last word address of the non-volatile memory eFlash, and also prohibits indirect access and reading by downloading the program to the random access memory SRAM; Otherwise, it is determined that the chip is not in security protection.
[0025] The entire security protection process is as follows Figure 3 As shown, in this embodiment, when the protection function is turned on, the address of the last word (one word represents 4 bytes) of the eFlash can be accessed, that is, it can be read and written. For example, assuming that the size of the eFlash is 128KB and the starting address is 0, then the address of the last word is 0x1FFFC.
[0026] The address of the last word can be accessed without causing security issues. By accessing the last word, the entire eFlash can be erased because the address space accessed when erasing the eFlash only requires any word address of the eFlash.
[0027] Thus, we can implement program update, as shown in step S3, which specifically includes: S31: determining the address of the last word of the non-volatile memory eFlash according to the storage structure of the non-volatile memory eFlash; S32: specifying the entire space of the non-volatile memory eFlash as an erase range, triggering an erase mechanism when the debug interface accesses the last word address of the non-volatile memory eFlash, and clearing data from the non-volatile memory eFlash according to the specified erase range.
[0028] Then, reading and judging whether the degradation flag word is a characteristic value specifically includes: S51: After the chip is reset, the boot program solidified in the read-only memory ROM is first executed; S52: the read-only memory ROM reads data from the designated degradation flag word address according to the read timing of the electrically erasable programmable read-only memory EEPROM, and determines whether the read data is a characteristic value. If so, further checks whether the entire space of the non-volatile memory eFlash is completely erased.
[0029] The step of checking whether the entire space of the non-volatile memory eFlash is completely erased specifically includes: The read-only memory ROM starts from the start address of the non-volatile memory eFlash, reads data word by word until the end address is read, and determines whether all the read data are default values after erasure. If yes, it is considered that the entire space of the non-volatile memory eFlash has been completely erased, and step S5 is executed to rewrite the security protection word and the degradation flag word back to the initial value and reset the chip; Otherwise, the read-only memory ROM does not perform any processing, and waits for the debug interface to fully erase and reset the eFlash before performing the check and processing again.
[0030] In addition, rewriting the security protection word and the degradation flag word back to the initial value and resetting the chip further includes: According to the method adopted in step S1 and step S4, the default value 0xFFFFFFFF is written to the security protection word and the degradation flag word address in the electrically erasable programmable read-only memory EEPROM respectively; The read-only memory ROM triggers the reset logic of the reset control register of the chip, the security protection state is released, the restriction of the debug interface accessing the non-volatile memory eFlash is cancelled, and the debug interface is allowed to be reused for program download operations.
[0031] The steps to erase eFlash and remove program protection are as follows: Figure 4 shown.
[0032] Based on the solution of "not prohibiting the debug interface, but prohibiting the debug interface from accessing the non-volatile memory", an improvement has been made. When the customer re-updates the program, he no longer relies on hardware timing. Instead, he first erases the user program through software, and then uses the chip's own ROM program to remove the access restriction to the debug interface, thus achieving simple, universal and secure protection and program updates.
[0033] On the other hand, the present embodiment provides a debug port enabled non-volatile memory program protection and update system, including a security protection module and an erase update module, the security protection module includes a security word write unit and an access restriction unit, the erase update module includes an erase unit, a degraded word write unit and a reset unit, wherein: The security word writing unit is used to write a characteristic value into the security protection word of the electrically erasable programmable read-only memory (EEPROM) of the chip through a debugging interface; The access restriction unit is used to read and determine whether the security protection word contains a characteristic value during reset, so as to implement access restriction of the debug interface except for the last word in the non-volatile memory eFlash; The restricted access unit is used to access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; The degraded word writing unit is used to write a characteristic value into the degraded flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; The reset unit is used to read and determine whether the degradation flag word is a characteristic value after the chip is reset, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.
[0034] Among them, the functional implementation of each module and unit in the system corresponds to the steps in the above-mentioned embodiment of the non-volatile memory program protection and update method in enabling the debug port, and its functions and implementation processes are no longer repeated here.
[0035] In addition, the hardware architecture of the system in this embodiment is as follows Figure 5 shown.
[0036] This embodiment adopts the ARM Cortex-M architecture, which is a widely used microprocessor architecture. Many chip design companies in the world use this architecture to design single-chip microcomputers. In order to facilitate customers to debug programs, the ARM Cortex-M architecture integrates a debugging system. Developers can access all address spaces on the chip based on the SWD (Single Wire Debugger) or JTAG (Joint Test Action Group) protocol, and can also observe program operation by setting breakpoints.
[0037] The memory that can be preserved after power failure in the architecture includes three parts: read-only memory ROM, electrically erasable programmable read-only memory EEPROM, and non-volatile memory eFlash.
[0038] ROM memory stores the power-on startup code of the chip manufacturer. It is a one-time memory and cannot be written again after the chip is taped out. EEPROM is a rewritable memory that mainly stores chip parameters and data that can be stored by customers. eFlash is a parallel port Nor Flash built into the chip, which is used to store customer programs and data.
[0039] Specifically, ROM is the solidified code of the chip manufacturer. The code in ROM is responsible for programming the EEPROM. It has only execution permission, the address is kept confidential, and no interface is provided to the outside.
[0040] The EEPROM controller can be programmed through public access when the security protection word is the default value. When the security protection word is not the default value, it can only be restored to the default value through the code in the ROM. The code in the ROM is as mentioned above, the code is unreadable and the address is confidential.
[0041] eFlash is embedded Flash, a non-volatile memory that stores client programs. When the protection function is not enabled, the entire space is accessible and the program can be downloaded to eFlash through the debug interface, as follows Figure 2 As shown. When the protection function is enabled, the address of the last word (one word represents 4 bytes) of the eFlash can be accessed, that is, it can be read and written. For example, assuming that the size of the eFlash is 128KB and the starting address is 0, then the address of the last word is 0x1FFFC.
[0042] Finally, it should be noted that the above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.
[0043] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
Claims
1. A method for protecting and updating a non-volatile memory program in a debug port enabled state, characterized in that: in, The protection method comprises: S1: Start security protection and write the characteristic value into the security protection word of the chip's electrically erasable programmable read-only memory EEPROM through the debug interface; S2: during reset, reading and determining whether the security protection word contains a characteristic value, and implementing access restriction of the debug interface to the non-volatile memory eFlash except for the last word; The updating method comprises: S3: Access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; S4: writing a characteristic value into the degradation flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; S5: After the chip is reset, read and determine whether the degradation flag word is a characteristic value, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.
2. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 1, wherein: When security protection is not enabled, the entire space of the non-volatile memory eFlash is accessible. The program is downloaded to the eFlash through the debug interface. The program burning process specifically includes: The target chip is connected to the host through the debugging interface, and the parameters of the target chip are configured. After the configuration is completed, the compiled program file is downloaded to the non-volatile memory eFlash through the download function provided by the debugging tool in the host according to the transmission protocol specified by the debugging interface, according to the instruction sequence and data format.
3. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 2, wherein: Step S1 and step S4 further include: Determine the storage addresses of the security protection word and the degradation flag word according to the storage structure of the electrically erasable programmable read-only memory EEPROM; The electrically erasable programmable read-only memory EEPROM is accessed through a debugging interface, and a host debugging tool writes a characteristic value to the address of the security protection word or the degradation flag word according to a write timing requirement of the EEPROM, wherein the timing requirement includes a write pulse width and a wait write completion flag.
4. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 1, wherein: Step S2 further comprises: S21: The chip starts to reset, and the reset circuit inside the chip initializes each module of the chip, triggering the EEPROM read operation; S22: finding the security protection word address of the electrically erasable programmable read-only memory EEPROM according to a preset address mapping relationship, and reading the data stored at the address according to its reading timing; S23: Determine whether the security protection word is a characteristic value, If it is a characteristic value, the security protection mechanism is triggered, and the storage access control unit in the chip filters the access request to the non-volatile memory eFlash issued by the debug interface, rejects the access request except the last word address of the non-volatile memory eFlash, and also prohibits indirect access and reading by downloading the program to the random access memory SRAM; Otherwise, it is determined that the chip is not in security protection.
5. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 1, wherein: Step S3 further comprises: S31: determining the address of the last word of the non-volatile memory eFlash according to the storage structure of the non-volatile memory eFlash; S32: specifying the entire space of the non-volatile memory eFlash as an erase range, triggering an erase mechanism when the debug interface accesses the last word address of the non-volatile memory eFlash, and clearing data from the non-volatile memory eFlash according to the specified erase range.
6. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 1, wherein: In step S5, reading and determining whether the degradation flag word is a characteristic value further includes: S51: After the chip is reset, the boot program solidified in the read-only memory ROM is first executed; S52: the read-only memory ROM reads data from the designated degradation flag word address according to the read timing of the electrically erasable programmable read-only memory EEPROM, and determines whether the read data is a characteristic value. If so, further checks whether the entire space of the non-volatile memory eFlash is completely erased.
7. The method for protecting and updating a non-volatile memory program when enabling a debug port according to claim 6, wherein: The checking whether the entire space of the non-volatile memory eFlash is completely erased specifically includes: The read-only memory ROM starts from the start address of the non-volatile memory eFlash, reads data word by word until the end address is read, and determines whether all the read data are default values after erasure. If yes, it is considered that the entire space of the non-volatile memory eFlash has been completely erased, and step S5 is executed to rewrite the security protection word and the degradation flag word back to the initial value and reset the chip; Otherwise, the read-only memory ROM does not perform any processing, and waits for the debug interface to fully erase and reset the eFlash before performing the check and processing again.
8. The method for protecting and updating a non-volatile memory program in a debug port enabled state according to claim 3 or 7, wherein: Rewriting the security protection word and the degradation flag word back to the initial value and resetting the chip further comprises: According to the method adopted in step S1 and step S4, the default values are written to the security protection word and the degradation flag word address in the electrically erasable programmable read-only memory EEPROM respectively; The read-only memory ROM triggers the reset logic of the reset control register of the chip, the security protection state is released, the restriction of the debug interface accessing the non-volatile memory eFlash is cancelled, and the debug interface is allowed to be reused for program download operations.
9. A non-volatile memory program protection and update system with debug port enabled, characterized in that: It includes a security protection module and an erasure update module, wherein the security protection module includes a security word writing unit and an access restriction unit, and the erasure update module includes an erasure unit, a degradation word writing unit and a reset unit, wherein: The security word writing unit is used to write a characteristic value into the security protection word of the electrically erasable programmable read-only memory (EEPROM) of the chip through a debugging interface; The access restriction unit is used to read and determine whether the security protection word contains a characteristic value during reset, so as to implement access restriction of the debug interface except for the last word in the non-volatile memory eFlash; The restricted access unit is used to access the address of the last word of the non-volatile memory eFlash through the debugging interface to erase the entire space of the non-volatile memory eFlash; The degraded word writing unit is used to write a characteristic value into the degraded flag word of the electrically erasable programmable read-only memory EEPROM through a debugging interface; The reset unit is used to read and determine whether the degradation flag word is a characteristic value after the chip is reset, rewrite the security protection word and the degradation flag word back to the initial value and reset the chip.