Data communication system

Abstract

The embodiment of the present disclosure relates to a data communication system. The data communication system includes: a first switch; a second switch; and a plurality of terminal devices, wherein the first channel of each of the plurality of terminal devices is communicatively connected to the first switch, and the second channel of each of the terminal devices is communicatively connected to the second switch, and the plurality of terminal devices include: a source master clock device, wherein the first channel of the auxiliary master clock device and the first channel of the common terminal device both establish clock synchronization with the first channel of the source master clock device; an auxiliary master clock device, wherein the second channel of the auxiliary master clock device establishes clock synchronization with the first channel of the auxiliary master clock device; and a common terminal device, wherein the second channel of the common terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. The scheme of the present disclosure can ensure that the network clock synchronization can be performed normally, and improve the redundancy and stability of the network.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to the field of data communications, and more particularly to a data communication system. Background Art

[0002] In the EPA (Ethernet for Plant Automation, a real-time communication specification based on industrial Ethernet) communication system, for example, multiple network topologies can be used. EPA uses a communication scheduling technology based on time division multiplexing. Each node sends data according to a preset communication time slice, which requires that all nodes in the network must first complete clock synchronization.

[0003] In an EPA network, due to node failure, clock synchronization sometimes fails, causing the entire network to fail to work properly. Summary of the invention

[0004] In view of the above problems, the present disclosure provides a data communication system, which can ensure that network clock synchronization can be performed normally and improve the redundancy and stability of the network.

[0005] According to one aspect of the present disclosure, a data communication system is provided. The data communication system includes: a first switch; a second switch; and a plurality of terminal devices, wherein the first channel of each of the plurality of terminal devices is communicatively connected to the first switch, and the second channel of each of the plurality of terminal devices is communicatively connected to the second switch, and the plurality of terminal devices include: a source master clock device, a main channel of an auxiliary master clock device, and a main channel of an ordinary terminal device, all of which establish clock synchronization with the main channel of the source master clock device; an auxiliary master clock device, a secondary channel of the auxiliary master clock device, and a main channel of the auxiliary master clock device; and an ordinary terminal device, wherein the secondary channel of the ordinary terminal device establishes clock synchronization with the secondary channel of the auxiliary master clock device; the main channel is one of the first channel and the second channel, and the secondary channel is the other of the first channel and the second channel.

[0006] In some embodiments, multiple terminal devices are configured as follows: if the main channel of the source master clock device is normally connected, and at least one of the main channel and the secondary channel of the auxiliary master clock device is disconnected, the auxiliary master clock device is configured as an ordinary terminal device, and an ordinary terminal device in which both the first channel and the second channel are in a normally connected state is configured as an auxiliary master clock device.

[0007] In some embodiments, multiple terminal devices are configured as follows: if the main channel of the source master clock device is disconnected, the source master clock device is configured as an ordinary terminal device, the auxiliary master clock device is configured as the source master clock device, and an ordinary terminal device in which both the first channel and the second channel are in a normal connection state is configured as an auxiliary master clock device.

[0008] In some embodiments, the plurality of terminal devices are further configured to maintain the source master clock device if the primary channel of the source master clock device is normally connected and the secondary channel is disconnected.

[0009] In some embodiments, there are multiple first switches, and the multiple first switches form a first ring network; there are multiple second switches, and the multiple second switches form a second ring network.

[0010] In some embodiments, a first channel of each of the plurality of terminal devices is communicatively connected to a first target switch of the plurality of first switches, and a second channel of each of the plurality of terminal devices is communicatively connected to a second target switch of the plurality of second switches.

[0011] In some embodiments, the multiple terminal devices include a first group of terminal devices and a second group of terminal devices; the first channel of each terminal device in the first group of terminal devices is communicatively connected to a first target switch among multiple first switches, and the second channel of each terminal device in the first group of terminal devices is communicatively connected to a second target switch among multiple second switches; the first channel of each terminal device in the second group of terminal devices is communicatively connected to a third target switch among multiple first switches, and the second channel of each terminal device in the second group of terminal devices is communicatively connected to a fourth target switch among multiple second switches, the first target switch is different from the third target switch, and the second target switch is different from the fourth target switch.

[0012] In some embodiments, the source master clock device is generated through competition by a terminal device in which the first channel and the second channel of a plurality of terminal devices are both in a normal connection state.

[0013] In some embodiments, the source master clock device is generated by designation by a terminal device in which the first channel and the second channel of the plurality of terminal devices are both in a normal connection state.

[0014] In some embodiments, the auxiliary master clock device is generated through competition by a terminal device whose first channel and second channel are both in a normal connection state among a plurality of terminal devices.

[0015] In some embodiments, the auxiliary master clock device is generated by designation for a terminal device in which both the first channel and the second channel of the plurality of terminal devices are in a normal connection state.

[0016] In some embodiments, the data communication system is an Ethernet communication system for factory automation.

[0017] According to the scheme of the present disclosure, the first channel of each of the multiple terminal devices is connected to the first switch for communication, and the second channel of each terminal device is connected to the second switch for communication. The multiple terminal devices include a source master clock device, an auxiliary master clock device, and a common terminal device. The first channel of the auxiliary master clock device and the first channel of the common terminal device both establish clock synchronization with the first channel of the source master clock device; the auxiliary master clock device, the second channel of the auxiliary master clock device establishes clock synchronization with the first channel of the auxiliary master clock device; and the common terminal device, the second channel of the common terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. The scheme of the present disclosure can ensure that the network clock synchronization can be performed normally, and improve the redundancy and stability of the network.

[0018] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements.

[0020] Figure 1 A schematic diagram of an EPA network is shown.

[0021] Figure 2 A schematic diagram of an EPA network is shown.

[0022] Figure 3 A schematic structural diagram of a data communication system according to an embodiment of the present disclosure is shown.

[0023] Figure 4 A schematic diagram showing a single-channel slave clock anomaly in a data communication system according to an embodiment of the present disclosure is shown.

[0024] Figure 5 A schematic diagram showing an abnormality in a secondary main clock channel in a data communication system according to an embodiment of the present disclosure is shown.

[0025] Figure 6 A schematic diagram showing an abnormality in a secondary main clock channel in a data communication system according to an embodiment of the present disclosure is shown.

[0026] Figure 7 A schematic diagram showing an abnormality in a secondary channel of a source main clock in a data communication system according to an embodiment of the present disclosure is shown.

[0027] Figure 8 A schematic diagram showing a data communication system according to an embodiment of the present disclosure having a source master clock master channel abnormality.

[0028] Fig. 9 A schematic diagram showing a switch link abnormality in a data communication system according to an embodiment of the present disclosure.

[0029] Fig.10 A schematic diagram showing a switch link abnormality in a data communication system according to an embodiment of the present disclosure.

[0030] Fig.11 A schematic diagram showing a switch link abnormality in a data communication system according to an embodiment of the present disclosure.

[0031] Fig.12 A schematic diagram showing a switch link abnormality in a data communication system according to an embodiment of the present disclosure.

[0032] Fig.13 A schematic diagram showing a data communication system after switching according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0033] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0034] As used herein, the term "including" and its variations mean open inclusion, i.e., "including but not limited to". Unless otherwise stated, the term "or" means "and / or". The term "based on" means "based at least in part on". The terms "an example embodiment" and "an embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one additional embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0035] As described above, in the EPA network, due to node failure, clock synchronization sometimes fails, causing the entire network to not work properly. EPA uses a communication scheduling technology based on time division multiplexing. Each node sends data according to the preset communication time slice, which requires all nodes in the network to complete clock synchronization first. And because the EPA network is a distributed architecture with equal roles, there will be an EPA node (i.e., terminal device) in the network that will compete to become the master clock device and be responsible for timing the entire network, while all other nodes are slave clock nodes, which synchronize with this master clock device, thereby completing the clock synchronization of the entire network and realizing unified time-sharing scheduling under the same clock reference.

[0036] This requires that the system has one and only one clock source to provide time for the entire network. Figure 1 A schematic diagram of an EPA network is shown. Figure 1 Taking the network shown as an example, terminal devices D1, D2, D3, and D4 all have port A and port B, wherein terminal devices D1, D2, D3, and D4 are respectively connected to switch SWA1 through port A, and terminal devices D1, D2, D3, and D4 are respectively connected to switch SWB1 through port B. In this network, there is only one master clock device, which performs time synchronization on all channels, and a second master clock is not allowed in the system; the two channels of the slave clock node independently apply for synchronization to the master clock node, and if only one channel completes synchronization, the clock of the channel is used, and if both channels complete synchronization, the clock of port A is used.

[0037] If a single port of a slave clock device is abnormal, the node will switch to single-channel operation without affecting the normal operation of the system. However, if a single port of the master clock node is abnormal, assuming that channel B of device D1 is disconnected, channel B of all nodes will lose synchronization. Although the clock of channel A can maintain system operation, the entire channel B is actually in a "running-along" state, providing only a backup channel for data transmission, but does not have complete EPA communication capabilities.

[0038] Figure 2 FIG. 1 shows a schematic diagram of an EPA network. The EPA network includes terminal devices D1 to Dn, switches SWA1 to SWAn, and switches SWB1 to SWBn. In the case of a single channel abnormality in the main clock node, if a partial failure occurs, the operation of the EPA network will be affected. Figure 2 For example, assume that terminal device D1 is the master clock node. If channel A (i.e., the channel corresponding to port A) of terminal device D1, which is the master clock node, is disconnected again, the entire network will lose the master clock. In addition, if channel A of a slave clock node (such as one of terminal devices D2, D3, or D4) is abnormal at this time, although channel B is still effectively physically connected to the system, channels A and B of the node are both out of synchronization and cannot participate in EPA communication, and will be disconnected from network communication.

[0039] In order to at least partially solve one or more of the above problems and other potential problems, an example embodiment of the present disclosure proposes a data communication system. The first channel of each of the multiple terminal devices in the data communication system is communicatively connected to the first switch, and the second channel of each terminal device is communicatively connected to the second switch, and the multiple terminal devices include: a source master clock device, an auxiliary master clock device, and an ordinary terminal device, the first channel of the auxiliary master clock device and the first channel of the ordinary terminal device both establish clock synchronization with the first channel of the source master clock device; the second channel of the auxiliary master clock device establishes clock synchronization with the first channel of the auxiliary master clock device; the second channel of the ordinary terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. Therefore, the data communication system may achieve stable synchronization of the clock, ensure the normal operation of the network, and improve the redundancy and stability of the network.

[0040] Figure 3 The structural diagram of the data communication system 300 of the embodiment of the present disclosure is shown. The data communication system 300, for example, includes a first switch, a second switch, and a plurality of terminal devices. In some embodiments, the number of first switches is multiple, and the multiple first switches, for example, include first switches SWA1~SWAn, and the multiple first switches form a first ring network; the number of second switches is multiple, and the multiple second switches, for example, include second switches SWB1~SWBn, and the multiple second switches form a second ring network. The multiple terminal devices, for example, include terminal devices D1~Dn.

[0041] In some embodiments, the first channel (e.g., channel A) of each of a plurality of terminal devices (e.g., terminal devices D1~Dn) is communicatively connected to a first switch (e.g., first switch SWA1), and the second channel (e.g., channel B) of each of a plurality of terminal devices (e.g., terminal devices D1~Dn) is communicatively connected to a second switch (e.g., second switch SWB1).

[0042] In some embodiments, a plurality of terminal devices (e.g., terminal devices D1-Dn) include a plurality of first terminal devices and a plurality of second terminal devices. The plurality of first terminal devices include, for example, terminal devices D1-D4, and the plurality of second terminal devices include, for example, terminal devices D5-Dn. The first channel (e.g., channel A) of each of the plurality of first terminal devices is communicatively connected to a first target switch (e.g., switch SWA1) of the plurality of first switches, and the second channel (e.g., channel B) of each of the plurality of first terminal devices is communicatively connected to a second target switch (e.g., switch SWB1) of the plurality of second switches; the first channel of each of the plurality of second terminal devices is communicatively connected to a third target switch (e.g., switch SWA2) of the plurality of first switches, and the second channel of each of the plurality of second terminal devices is communicatively connected to a fourth target switch (e.g., switch SWB2) of the plurality of second switches, the first target switch is different from the third target switch, and the second target switch is different from the fourth target switch.

[0043] In the data communication system 300, one of the multiple terminal devices is configured as a source master clock device, another of the multiple terminal devices is configured as an auxiliary master clock device, and the terminal devices other than the source master clock device and the auxiliary master clock device are configured as ordinary terminal devices; the auxiliary master clock device and the ordinary terminal device main channel both establish clock synchronization with the main channel of the source master clock device; the auxiliary master clock device is configured to make the secondary channel establish clock synchronization with the main channel of the auxiliary master clock device; the ordinary terminal device is configured to make the secondary channel establish clock synchronization with the secondary channel of the auxiliary master clock device. The main channel is one of the first channel and the second channel, and the secondary channel is the other of the first channel and the second channel. It is worth noting that the main channel of the terminal device is, for example, the channel corresponding to the channel used by the source master clock device to provide time to the system (i.e., provide a clock signal to the system). For example, if the source master clock device provides time to the system via its first channel, the first channel of each terminal device is the main channel; if the source master clock device provides time to the system via its second channel, the second channel of each terminal device is the main channel.

[0044] That is, in the data communication system 300, the multiple terminal devices include: a source master clock device, an auxiliary master clock device, and a common terminal device. Among them, the main channel of the auxiliary master clock device and the main channel of the common terminal device both establish clock synchronization with the main channel of the source master clock device; the auxiliary master clock device, the secondary channel of the auxiliary master clock device establishes clock synchronization with the main channel of the auxiliary master clock device; the secondary channel of the common terminal device establishes clock synchronization with the secondary channel of the auxiliary master clock device.

[0045] In this solution, the first channel (such as channel A) and the second channel (such as channel B) of multiple terminal devices use different nodes (such as terminal devices) as channel master clocks. For example, to achieve full network synchronization, one of the master clocks is called the source master clock (or the main channel master clock), and the other master clock is called the auxiliary master clock (or the secondary channel master clock). The main channel of the ordinary terminal device in the system establishes clock synchronization with the source master clock, and the secondary channel of the ordinary terminal device in the system establishes clock synchronization with the auxiliary master clock. The terminal device used to provide the source master clock is called the source master clock device, and the terminal device used to provide the auxiliary master clock is called the auxiliary master clock device.

[0046] For example, after the network is formed and the system is started, initialization is performed. During the initialization process, multiple terminal devices compete according to predetermined competition rules to determine the source master clock device, such as terminal device D1 as the source master clock device (e.g., the initial source master clock device). Among them, any one of the two channels of the source master clock device is used as the main channel, and the network is timed through the main channel, and the clock of the main channel is used as the source master clock. For example, the first channel (e.g., channel A) of the source master clock device is used as the main channel, and the second channel (e.g., channel B) is used as the secondary channel. Therefore, when the initialization is completed, the clock of the first channel of the source master clock device is used as the source master clock.

[0047] In some embodiments, the source master clock device is generated by designating a terminal device in which the first channel and the second channel of the plurality of terminal devices are both in a normal connection state. That is, one of the terminal devices in which the first channel and the second channel of the plurality of terminal devices are both in a normal connection state can be designated as the source master clock device.

[0048] Then, the remaining terminal devices compete based on the predetermined competition rules to determine the auxiliary master clock device, such as terminal device D3 as the auxiliary master clock device (such as the initial auxiliary master clock device). The main channel (such as the first channel, i.e., channel A) of the auxiliary master clock device establishes clock synchronization with the main channel of the source master clock device, and the auxiliary master clock device assigns the clock of the main channel to the secondary channel (such as the second channel, i.e., channel B), so that the second channel of the auxiliary master clock device establishes clock synchronization with the first channel. Then, the auxiliary master clock device provides time to the system on its secondary channel (such as the second channel, i.e., channel B) as an auxiliary master clock.

[0049] In some embodiments, the auxiliary master clock device is generated by designating a terminal device whose first channel and second channel are both in a normal connection state among multiple terminal devices. That is, one of the terminal devices whose first channel and second channel are both in a normal connection state among multiple terminal devices can be designated as the auxiliary master clock device.

[0050] The other terminal devices except the source master clock device and the auxiliary master clock device among the multiple terminal devices are used as common terminal devices. The main channel (e.g., the first channel) of the common terminal device establishes clock synchronization with the main channel (e.g., the first channel) of the source master clock device, and the secondary channel (e.g., the second channel) of the common terminal device establishes clock synchronization with the secondary channel (e.g., the second channel) of the auxiliary master clock device.

[0051] Therefore, clock synchronization of the entire network can be achieved in the data communication system 300 .

[0052] It is worth noting that the initial source master clock device and the initial auxiliary master clock device generated through competition or designation are both terminal devices whose first channel and second channel are in a normal connection state (that is, neither the first channel nor the second channel is disconnected).

[0053] Figure 4 The schematic diagram shows a data communication system according to an embodiment of the present disclosure having a single slave clock channel abnormality. The channels of ordinary terminal devices are all slave clock channels. Figure 4 For example, the first channel (channel A) of the common terminal device D2 is disconnected while the second channel (channel B) is still in a normal connection state, that is, a single channel abnormality from the clock occurs. At this time, the second channel of the common terminal device D2 can still maintain clock synchronization and communicate normally. Therefore, when a single channel abnormality from the clock occurs in the common terminal device of the data communication system 300, it does not affect the operation of the system.

[0054] Figure 5 A schematic diagram showing an auxiliary master clock channel anomaly in a data communication system of an embodiment of the present disclosure is shown. Among them, the main channel of the source master clock device D1 is in a normal connection state, and the first channel of the terminal device D3 serving as the auxiliary master clock device is disconnected, that is, an auxiliary master clock channel anomaly occurs. At this time, the terminal device D3 loses clock synchronization with the source master clock device D1, and therefore, the terminal device D3 cannot continue to serve as the auxiliary master clock device. In the data communication system 300, the terminal device D3 currently serving as the auxiliary master clock device is configured as an ordinary terminal device, and an ordinary terminal device in which both the first channel and the second channel are in a normal connection state is configured as an auxiliary master clock device. In some embodiments, for example, the terminal device D3 actively abandons the identity of the auxiliary master clock device. For example, ordinary terminal devices in which both the first channel and the second channel are in a normal connection state compete via predetermined competition rules or form a new auxiliary master clock device via designation. For example, referring to Figure 5, the terminal device D2 becomes the new auxiliary master clock device, and its first channel establishes clock synchronization with the first channel of the source master clock device, and its second channel establishes clock synchronization with its first channel. The second channel of the ordinary terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. Thus, the data communication system 300 continues to maintain the clock synchronization state.

[0055] Figure 6 A schematic diagram showing an auxiliary master clock channel anomaly in a data communication system of an embodiment of the present disclosure is shown. Among them, the second channel of the terminal device D3, which is an auxiliary master clock device, is disconnected, that is, an auxiliary master clock channel anomaly occurs. At this time, the terminal device D3 cannot provide the auxiliary master clock to the system via the second channel, and therefore, the terminal device D3 cannot continue to serve as an auxiliary master clock device. In the data communication system 300, the terminal device D3, which is currently serving as an auxiliary master clock device, is configured as an ordinary terminal device, and an ordinary terminal device whose first channel and second channel are both in a normal connection state is configured as an auxiliary master clock device. For example, ordinary terminal devices whose first channel and second channel are both in a normal connection state compete to form a new auxiliary master clock device through predetermined competition rules. For example, ordinary terminal devices whose first channel and second channel are both in a normal connection state form a new auxiliary master clock device through designation. For example, referring to Figure 6 , the terminal device D2 becomes the new auxiliary master clock device, and its first channel establishes clock synchronization with the first channel of the source master clock device, and its second channel establishes clock synchronization with its first channel. The second channel of the ordinary terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. Thus, the data communication system 300 continues to maintain the clock synchronization state.

[0056] Figure 7 A schematic diagram showing an abnormality in the secondary channel of the source master clock in the data communication system of an embodiment of the present disclosure is shown. Among them, the secondary channel (second channel) of the terminal device D1 as the source master clock device is disconnected, that is, an abnormality in the secondary channel (second channel) of the source master clock occurs. It should be understood that the source master clock device provides time to the system through its main channel. Therefore, an abnormality occurs in the secondary channel (second channel) of the source master clock device, while the main channel (first channel) is still in a normal connection state. At this time, it does not affect the source master clock device to provide the source master clock to the system (network), and will not affect the normal operation of the system. Therefore, the abnormality of the secondary channel of the source master clock is equivalent to the abnormality of the single channel of the slave clock, and has no effect on the operation of the system. That is, when the first channel of the source master clock device is normally connected and the second channel is disconnected, the source master clock device is maintained.

[0057] Figure 8A schematic diagram showing an abnormality of the main channel of the source master clock in the data communication system of an embodiment of the present disclosure is shown. Among them, the main channel (first channel) of the terminal device D1 as the source master clock device is disconnected, that is, the main channel (first channel) of the source master clock is abnormal. It should be understood that the source master clock device provides time to the system through its main channel. Therefore, if the main channel (first channel) of the source master clock device is abnormal, it will not be able to provide clock to the system. In the data communication system 300, when the first channel of the source master clock device is disconnected, the source master clock device is configured as an ordinary terminal device, the auxiliary master clock device is configured as the source master clock device, and an ordinary terminal device in which both the first channel and the second channel are in a normal connection state is configured as an auxiliary master clock device. For example, the terminal device D1 as the source master clock device actively abandons the identity of the source master clock device, and the auxiliary master clock device becomes the new source master clock device. The ordinary terminal device in which both the first channel and the second channel are in a normal connection state determines the new auxiliary master clock device through a predetermined competition rule.

[0058] For example, the original auxiliary master clock device, that is, terminal device D3, becomes the new source master clock device. It is worth noting that when acting as an auxiliary master clock device, terminal device D3 grants time to the system via the second channel (e.g., channel B). After terminal device D3 is converted from an auxiliary master clock device to a source master clock device, terminal device D3 still grants time to the system via its second channel (e.g., channel B). Accordingly, the second channel (e.g., channel B) of terminal device D3 and other terminal devices becomes the primary channel, and the first channel (e.g., channel A) becomes the secondary channel.

[0059] For example, terminal device D2 becomes a new auxiliary master clock device through competition, and its main channel (second channel) establishes clock synchronization with the main channel (second channel) of the source master clock device (terminal device D3), and its secondary channel (first channel) establishes clock synchronization with its own main channel (second channel). The secondary channel (first channel) of the ordinary terminal device establishes clock synchronization with the secondary channel (first channel) of the auxiliary master clock device. Thus, the data communication system 300 continues to maintain the clock synchronization state.

[0060] Fig. 9 A schematic diagram showing a switch link anomaly in a data communication system according to an embodiment of the present disclosure is shown. For example, in the first ring network, the connection between switch SWAn and switch SWA1 is disconnected, and in the second ring network, the connection between switch SWBn and switch SWB1 is disconnected. It should be understood that the first ring network and the second ring network still have ring network redundancy, for example, switch SWA1 and switch SWA2 are still connected normally, and switch SWB1 and switch SWB2 are still connected normally, so the system can still operate normally.

[0061] Fig.10A schematic diagram showing a switch link abnormality in a data communication system according to an embodiment of the present disclosure is shown. For example, in the first ring network, the connection between switch SWAn and switch SWA2 and switch SWA1 is disconnected, and in the second ring network, the connection between switch SWBn and switch SWB1 is disconnected. It should be understood that the first ring network and the second ring network still have ring network redundancy, for example, switch SWB1 and switch SWB2 are still normally connected, so the system can still operate normally.

[0062] Fig.11 A schematic diagram showing a switch link anomaly in a data communication system of an embodiment of the present disclosure is shown. For example, in the second ring network, the switch SWB1 is abnormal, and the connection between the switch SWB1 and the second channel (e.g., channel B) of the corresponding terminal device is disconnected, and the connection between the switch SWB1 and other switches in the second ring network is also disconnected. At this time, a secondary channel switch anomaly occurs. At this time, the terminal device D3 cannot provide the auxiliary master clock to the system via the second channel, so the terminal device D3 cannot continue to serve as the auxiliary master clock device. However, the main channel (e.g., channel A) of each terminal device can still work normally without affecting data communication. In the data communication system 300, the terminal device D3 currently serving as the auxiliary master clock device is configured as an ordinary terminal device, and an ordinary terminal device whose first channel and second channel are both in a normal connection state is configured as an auxiliary master clock device. For example, ordinary terminal devices whose first channel and second channel are both in a normal connection state compete to form a new auxiliary master clock device through a predetermined competition rule. For example, the terminal device D5 becomes a new auxiliary master clock device, and its first channel establishes clock synchronization with the first channel of the source master clock device, and its second channel establishes clock synchronization with its first channel. The second channel of the common terminal device establishes clock synchronization with the second channel of the auxiliary master clock device. Thus, the data communication system 300 continues to maintain the clock synchronization state.

[0063] Fig.12A schematic diagram showing a switch link anomaly in a data communication system of an embodiment of the present disclosure is shown. For example, in the first ring network, an anomaly occurs in switch SWA1, and the connection between switch SWA1 and the first channel (e.g., channel A) of the corresponding terminal device is disconnected, and the connection between switch SWA1 and other switches in the first ring network is also disconnected. At this time, an anomaly occurs in the main channel switch. It should be understood that at this time, terminal device D1 cannot provide the source master clock to the system via the first channel, and therefore, terminal device D1 cannot continue to serve as the source master clock device. Therefore, in the data communication system 300, the auxiliary master clock device (i.e., terminal device D3) is switched to a new source master clock device, and the second channel becomes the main channel. It should be noted that at this time, the main channel (second channel) of terminal device D3 switched to the new source master clock device is in a normally connected state and can provide the source master clock to the system. Fig.13 A schematic diagram showing a data communication system after switching according to an embodiment of the present disclosure is shown.

[0064] The common terminal device whose first channel and second channel are both in a normal connection state determines the new auxiliary master clock device through a predetermined competition rule. For example, the terminal device D6 becomes the new auxiliary master clock device, and its main channel (second channel) establishes clock synchronization with the main channel (second channel) of the source master clock device (terminal device D3), and its secondary channel (first channel) establishes clock synchronization with its own main channel (second channel). The secondary channel (first channel) of the common terminal device establishes clock synchronization with the secondary channel (first channel) of the auxiliary master clock device. Thus, the data communication system 300 continues to maintain the clock synchronization state.

[0065] It is worth mentioning that the data communication system 300 has strong applicability and is suitable for topologies such as ring, star, dual star, and dual switch ring networks; moreover, it can solve system communication problems under previously existing link failures and improve the redundancy and stability of the network; further, it can ensure that the synchronization accuracy will not deviate and data will not be lost during link switching or master-slave switching.

[0066] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0067] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A data communication system, characterized in that: include: First switch; Second switch; as well as A plurality of terminal devices, wherein a first channel of each of the plurality of terminal devices is communicatively connected to a first switch, and a second channel of each of the plurality of terminal devices is communicatively connected to a second switch, and the plurality of terminal devices include: The main channels of the source master clock device, auxiliary master clock device and common terminal devices all establish clock synchronization with the main channel of the source master clock device; A secondary master clock device, a secondary channel of the secondary master clock device establishes clock synchronization with a primary channel of the secondary master clock device; and An ordinary terminal device, wherein a secondary channel of the ordinary terminal device establishes clock synchronization with a secondary channel of an auxiliary master clock device; the main channel is one of the first channel and the second channel, and the secondary channel is the other of the first channel and the second channel; The plurality of terminal devices are configured to: if the main channel of the source master clock device is normally connected and at least one of the main channel and the secondary channel of the auxiliary master clock device is disconnected, configure the auxiliary master clock device as a common terminal device, and configure a common terminal device whose first channel and second channel are both in a normally connected state as an auxiliary master clock device; There are multiple first switches, and the multiple first switches form a first ring network; there are multiple second switches, and the multiple second switches form a second ring network.

2. The data communication system according to claim 1, characterized in that: The multiple terminal devices are configured as follows: if the main channel of the source master clock device is disconnected, the source master clock device is configured as a common terminal device, the auxiliary master clock device is configured as the source master clock device, and a common terminal device in which both the first channel and the second channel are in a normal connection state is configured as an auxiliary master clock device.

3. The data communication system according to claim 2, characterized in that: The plurality of terminal devices are further configured to maintain the source master clock device if the primary channel of the source master clock device is normally connected and the secondary channel is disconnected.

4. The data communication system according to claim 1, characterized in that: The first channel of each of the plurality of terminal devices is communicatively connected to a first target switch of the plurality of first switches, and the second channel of each of the plurality of terminal devices is communicatively connected to a second target switch of the plurality of second switches.

5. The data communication system according to claim 1, characterized in that: The plurality of terminal devices include a first group of terminal devices and a second group of terminal devices; a first channel of each terminal device in the first group of terminal devices is communicatively connected to a first target switch in the plurality of first switches, and a second channel of each terminal device in the first group of terminal devices is communicatively connected to a second target switch in the plurality of second switches; The first channel of each terminal device in the second group of terminal devices is communicatively connected to a third target switch among the multiple first switches, and the second channel of each terminal device in the second group of terminal devices is communicatively connected to a fourth target switch among the multiple second switches, the first target switch is different from the third target switch, and the second target switch is different from the fourth target switch.

6. The data communication system according to claim 1, characterized in that: The source master clock device is generated through competition or designation by a terminal device in which the first channel and the second channel of a plurality of terminal devices are both in a normal connection state.

7. The data communication system according to claim 1, characterized in that: The auxiliary master clock device is generated through competition or designation by a terminal device whose first channel and second channel are both in a normal connection state among a plurality of terminal devices.

8. The data communication system according to claim 1, characterized in that: The data communication system is an Ethernet communication system used for factory automation.

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