Display panel and display device

Abstract

The display panel and the display device are provided in the embodiments of the present application. By making the end of the side wall of the isolation column close to the first pixel definition part contact the end of the side wall of the first pixel definition part close to the isolation column, an included angle is formed between the side wall of the isolation column and the side wall of the first pixel definition part, the included angle between the isolation column and the pixel definition layer is increased, when the encapsulation layer is deposited in the bottom area close to the isolation column, the deposition rate can be increased due to the large included angle between the isolation column and the pixel definition layer, the gap of the encapsulation layer at this position is avoided, the risk of the encapsulation layer breaking during the bending process of the display panel is reduced, and the encapsulation stability is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] OLED (Organic Light-Emitting Diode) displays are widely used due to their advantages such as low power consumption, fast response speed, wide viewing angle, self-emissiveness, and flexibility. To improve efficiency and lifespan, existing OLED displays often employ multilayer devices, which offer higher brightness, longer lifespan, and lower power consumption. Specifically, OLED displays using multilayer devices consist of multiple layers of luminescent material, with a charge generation layer between them. Since this charge generation layer is a common layer and is spread across the entire surface, when the activation voltages of sub-pixels emitting different colors are close, the lateral migration of charges within the common layer can cause other sub-pixels of different colors to be activated when one color is lit. For example, when a green sub-pixel is lit, the lateral migration of electrons and holes in the common layer can cause a red sub-pixel to be lit, leading to display abnormalities.

[0003] To address the aforementioned issues, existing OLED display devices employ isolation pillars or isolation trenches to separate the common layer, thereby improving leakage current. However, when using isolation pillars, limitations in the materials and processes result in a relatively gentle pillar angle. During encapsulation layer deposition, significant differences in deposition rates at various locations lead to gaps forming in the bottom region of the encapsulation layer near the isolation pillar. This can easily cause breakage at this point during subsequent use of the OLED display device, ultimately leading to encapsulation failure.

[0004] Therefore, existing OLED display devices have a technical problem where the encapsulation layer is prone to breakage at the bottom of the isolation pillars, leading to encapsulation failure. Summary of the Invention

[0005] This application provides a display panel and a display device to solve the technical problem that existing OLED display devices have encapsulation layers that are prone to breakage at the bottom region of the isolation pillars, leading to encapsulation failure.

[0006] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, the display panel comprising:

[0007] Substrate;

[0008] A pixel electrode layer is disposed on one side of the substrate;

[0009] A pixel definition layer is disposed on the side of the pixel electrode layer away from the substrate, and the pixel definition layer includes a first pixel definition portion and a pixel opening disposed between the first pixel definition portion;

[0010] An isolation pillar is disposed on the side of the first pixel definition portion away from the pixel electrode layer, and the lower surface of the isolation pillar is in contact with the upper surface of the first pixel definition portion;

[0011] The common layer includes a first common part and a second common part. The first common part is disposed on the isolation pillar, and the second common part is disposed on the bottom surface and side wall of the pixel opening. The first common part and the second common part are disconnected.

[0012] Wherein, one end of the sidewall of the isolation post near the first pixel definition part is in contact with one end of the sidewall of the first pixel definition part near the isolation post.

[0013] Optionally, the projection of each side of the lower surface of the isolation pillar corresponding to the pixel opening onto the substrate coincides with the projection of each side of the upper surface of the first pixel definition portion corresponding to the pixel opening onto the substrate.

[0014] Optionally, the angle between the sidewall of the isolation column and the sidewall of the corresponding first pixel definition portion ranges from 70 degrees to 90 degrees.

[0015] Optionally, the angle between the sidewall of the isolation post and the lower surface of the isolation post ranges from 110 degrees to 120 degrees.

[0016] Optionally, the display panel includes a first sub-pixel unit, a second sub-pixel unit, and a third sub-pixel unit with different emitting colors. The first sub-pixel unit and the second sub-pixel unit are arranged in the same column and the same row, respectively. The third sub-pixel unit is located in two adjacent columns and the first sub-pixel unit is located in two adjacent rows.

[0017] The first pixel definition part is disposed between the first sub-pixel unit and the third sub-pixel unit, and the second sub-pixel unit is disposed between the second sub-pixel unit and the third sub-pixel unit. The isolation pillar includes a first isolation pillar and a second isolation pillar, with the first isolation pillar disposed between the first sub-pixel unit and the third sub-pixel unit, and the second isolation pillar disposed between the second sub-pixel unit and the third sub-pixel unit.

[0018] Optionally, the projected area of ​​the first sub-pixel unit on the substrate is greater than the projected area of ​​the second sub-pixel unit on the substrate, the projected area of ​​the second sub-pixel unit on the substrate is greater than the projected area of ​​the third sub-pixel unit on the substrate, and the width of the first isolation pillar is greater than the width of the second isolation pillar.

[0019] Optionally, the pixel definition layer further includes a second pixel definition part, which is disposed between the first sub-pixel unit and the second sub-pixel unit, and the width of the upper surface of the second pixel definition part is greater than the width of the upper surface of the first pixel definition part.

[0020] Optionally, the display panel further includes a support column, a portion of the second pixel definition portion is provided with the support column, and the support column is in contact with the upper surface of the second pixel definition portion, and there is a gap between the edge of the support column and the edge of the second pixel definition portion.

[0021] Optionally, the angle between the sidewall of the first pixel defining part and the lower surface of the first pixel defining part is smaller than the angle between the sidewall of the second pixel defining part and the lower surface of the second pixel defining part.

[0022] According to a second aspect of this application, a display device is provided, the display device including a display panel as described in any of the above embodiments.

[0023] This application provides a display panel and a display device. The display panel includes a substrate, a pixel electrode layer, a pixel definition layer, an isolation pillar, and a common layer. The pixel electrode layer is disposed on one side of the substrate, and the pixel definition layer is disposed on the side of the pixel electrode layer away from the substrate. The pixel definition layer includes a first pixel definition portion and a pixel opening disposed between the first pixel definition portion. The isolation pillar is disposed on the side of the first pixel definition portion away from the pixel definition layer, and the lower surface of the isolation pillar contacts the upper surface of the first pixel definition portion. The common layer is disposed on the side of the isolation pillar away from the pixel definition layer, and the common layer includes a first common portion and a second common portion. The first common portion is disposed on the isolation pillar, and the second common portion is disposed within the pixel opening. The first common portion and the second common portion are disconnected. The end of the sidewall of the isolation pillar near the first pixel definition portion contacts the end of the sidewall of the first pixel definition portion near the isolation pillar. By making one end of the sidewall of the isolation pillar near the first pixel definition part contact the other end of the sidewall of the first pixel definition part near the isolation pillar, an angle is formed between the sidewall of the isolation pillar and the sidewall of the first pixel definition part. This increases the angle between the isolation pillar and the pixel definition layer. As a result, when the encapsulation layer is deposited in the bottom region near the isolation pillar, the deposition rate can be increased due to the larger angle between the isolation pillar and the pixel definition layer. This avoids gaps in the encapsulation layer at this location, reduces the risk of the encapsulation layer breaking during the bending of the display panel, and improves encapsulation stability.

[0024] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0027] Figure 1 This is a schematic diagram of the first type of contrast display device provided in the embodiments of this application.

[0028] Figure 2 This is a schematic diagram of a second type of contrast display device provided in an embodiment of this application.

[0029] Figure 3 This is a plan view of the display panel provided in an embodiment of this application.

[0030] Figure 4 for Figure 3 The A1-A2 cross-sectional view of the display panel.

[0031] Figure 5 for Figure 3 The B1-B2 cross-sectional view of the display panel.

[0032] Figure 6 The diagram shows the structure of the display panel corresponding to each step of the manufacturing method of the display panel provided in the embodiments of this application. Detailed Implementation

[0033] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0034] To illustrate the principle behind the technical problems in the embodiments of this application, some comparative display devices are provided. It should be understood that these comparative display devices are not considered prior art in this application. Figure 1As shown, a contrast display device includes an anode 11, a pixel defining film 12, a hole transport film 13, a first green light-emitting film 141, a first red light-emitting film 142, an N-type charge-generating film 15, a P-type charge-generating film 16, a second green light-emitting film 171, a second red light-emitting film 172, and an electron transport film 18. Figure 1 As can be seen, each sub-pixel of a given color comprises two layers of emissive film, resulting in higher brightness and longer lifespan for each sub-pixel, compared to lower power consumption in the display device. From Figure 1 As can be seen, the hole transport film 13, N-type charge generation film 15, P-type charge generation film 16, and electron transport film 18 are all common layers. When the green sub-pixel is lit, the particles in the hole transport film 13, N-type charge generation film 15, P-type charge generation film 16, and electron transport film 18 all undergo lateral movement; that is, both electrons and holes in the common layer migrate laterally. When the activation voltages of the green and red sub-pixels are similar, the originally off red sub-pixel may be lit, resulting in a display anomaly.

[0035] To address the aforementioned issues, an alternative contrast display device is provided, such as... Figure 2 As shown, the contrast display device includes a substrate 21, an anode 11, a pixel defining film 12, a hole transport film (not shown), a first green light-emitting film (not shown), a first red light-emitting film (not shown), an N-type charge-generating film (not shown), a P-type charge-generating film (not shown), a second green light-emitting film (not shown), a second red light-emitting film (not shown), an electron transport film (not shown), an isolation structure 22, a support structure 23, and an encapsulation structure 24. By setting the isolation structure 22, the common layer is isolated, thereby improving leakage current. Figure 2 As can be seen, there are some pores 25 within the encapsulation structure 24 in the bottom region of the isolation structure 22. This is because, during the deposition of inorganic materials, the upper and planar regions of the isolation structure are unobstructed, resulting in a faster deposition rate. However, the bottom region of the isolation structure, being a chamfered area, has a smaller angle α between the isolation structure and the pixel defining film, making it difficult for materials to deposit into the bottom region. This leads to significant differences in deposition rates between different regions, resulting in pores in the bottom region of the isolation structure. Furthermore, during the use of display devices, there will be some bending. For foldable displays and other flexible display devices, the number and magnitude of bending are even greater, making the encapsulation structure at the bottom region of the isolation structure prone to breakage, leading to encapsulation failure. Therefore, existing OLED display devices suffer from the technical problem of the encapsulation layer easily breaking at the bottom region of the isolation pillars, causing encapsulation failure.

[0036] This application provides a display panel and a display device to address the aforementioned technical problems.

[0037] Figure 3 This is a plan view of the display panel provided in an embodiment of this application. Figure 4 for Figure 3 The A1-A2 cross-sectional view of the display panel. Figure 5 for Figure 3 The B1-B2 cross-sectional view of the display panel. Figure 6 The diagram shows the structure of the display panel corresponding to each step of the manufacturing method of the display panel provided in the embodiments of this application.

[0038] This application provides a display panel, such as... Figures 3 to 5 As shown, the display panel 3 includes a substrate 31, a pixel electrode layer 32, a pixel definition layer 33, isolation pillars 38, and a common layer 34. The pixel electrode layer 32 is disposed on one side of the substrate 31. The pixel definition layer 33 is disposed on the side of the pixel electrode layer 32 away from the substrate 31, and the pixel definition layer 33 includes a first pixel definition portion 331 and a pixel opening 33a disposed between the first pixel definition portion 331. The isolation pillars 38 are disposed on the side of the first pixel definition portion 331 away from the pixel electrode layer 32, and the lower surface 382 of the isolation pillars 38 contacts the upper surface 331b of the first pixel definition portion 331. The common layer 34 includes a first common portion 34a and a second common portion 34b. The first common portion 34a is disposed on the isolation pillars 38, and the second common portion 34b is disposed on the bottom surface and sidewall of the pixel opening 33a. The first common portion 34a and the second common portion 34b are disconnected.

[0039] Wherein, one end of the sidewall 381 of the isolation post 38 near the first pixel definition part 331 is in contact with one end of the sidewall 331a of the first pixel definition part 331 near the isolation post 38.

[0040] This application provides a display panel in which the end of the sidewall of the isolation pillar near the first pixel definition portion is in contact with the end of the sidewall of the first pixel definition portion near the isolation pillar. This creates an angle between the sidewall of the isolation pillar and the sidewall of the first pixel definition portion, increasing the angle between the isolation pillar and the pixel definition layer. As a result, when the encapsulation layer is deposited in the bottom region near the isolation pillar, the deposition rate can be increased due to the larger angle between the isolation pillar and the pixel definition layer. This avoids gaps in the encapsulation layer at this location, reduces the risk of breakage of the encapsulation layer during bending of the display panel, and improves encapsulation stability.

[0041] Specifically, the display panel also includes a driving circuit layer, which is disposed between the substrate and the pixel electrode layer. The driving circuit layer includes an active layer, a gate insulating layer, a gate layer, an interlayer insulating layer, a source drain layer and a planarization layer disposed sequentially.

[0042] Specifically, the end of the side wall 381 of the isolation pillar 38 near the first pixel definition part 331 refers to the connection between the side wall 381 of the isolation pillar 38 and the lower surface 382 of the isolation pillar 38, and the end of the side wall 331a of the first pixel definition part 331 near the isolation pillar 38 refers to the connection between the side wall 331a of the first pixel definition part 331 corresponding to the pixel opening 33a and the upper surface 331b of the first pixel definition part 331.

[0043] Specifically, it can be understood that, without considering factors such as curvature, the isolation column can be regarded as having only four sidewalls in different directions. Two of the sidewalls are set opposite to the pixel openings on both sides, and the orthographic projection of the other two sidewalls is basically parallel to the line connecting the pixel openings on both sides (not limited to parallel, but can be understood as having a certain angle with the pixel openings on both sides). In the embodiments of this application, the sidewall of the isolation column corresponding to the pixel opening refers to the sidewall of the isolation column that is set opposite to the pixel openings on both sides.

[0044] Specifically, it can be understood that since the pixel definition layer is set as a whole to form multiple pixel openings, the pixel definition layer will only have a ramp at the locations where pixel openings are set, while the pixel definition layer will not have a ramp in other areas where no pixel openings are set. Therefore, the two sidewalls of the isolation column that are parallel to the lines connecting the pixel openings on both sides will be set in the flat area of ​​the pixel definition layer and will form an angle with the upper surface of the pixel definition layer, but will not form an angle with the sidewalls of the pixel definition layer.

[0045] Specifically, such as Figure 4 As shown, the common layer 34 includes a hole transport layer 341, an N-type charge generation layer 342, a P-type charge generation layer 343, an electron transport layer 344, and a common electrode layer 345. Within the display area, each sub-pixel unit includes a common electrode layer. In order to ensure that the common electrode layer is uninterrupted, only a portion of the common electrode layer is disconnected at the location where the isolation pillar is set, while the common electrode layers in other areas are connected together. Correspondingly, the hole transport layer, the N-type charge generation layer, the P-type charge generation layer, and the electron transport layer are all set as a whole layer, and are only disconnected at the location where the isolation pillar is set.

[0046] Specifically, such as Figure 4 , Figure 5 As shown, the display panel 3 also includes a first light-emitting sub-layer 35 and a second light-emitting sub-layer 36. The first light-emitting sub-layer 35 is disposed between the hole transport layer 341 and the N-type charge generation layer 342, and the second light-emitting sub-layer 36 is disposed between the P-type charge generation layer 343 and the electron transport layer 344. The first light-emitting sub-layer 35 includes a first red light-emitting sub-layer 351, a first green light-emitting sub-layer 352, and a first blue light-emitting sub-layer 353, and the second light-emitting sub-layer 36 includes a second red light-emitting sub-layer 361, a second green light-emitting sub-layer 362, and a second blue light-emitting sub-layer 363.

[0047] Specifically, such as Figure 4 As shown, the display panel 3 also includes an encapsulation layer 37, which is disposed on the side of the common layer 34 away from the pixel definition layer 33. The encapsulation layer 37 includes a first inorganic layer 371, an organic layer 372, and a second inorganic layer 373. The first inorganic layer 371 is disposed on the side of the common layer 34 away from the pixel definition layer 33, the organic layer 372 is disposed on the side of the first inorganic layer 371 away from the common layer 34, and the second inorganic layer 373 is disposed on the side of the organic layer 372 away from the first inorganic layer 371.

[0048] Specifically, it can be understood that since each pixel opening 33a contains a common layer, a first light-emitting sub-layer, and a second light-emitting sub-layer, the pixel opening 33a cannot be seen. The shape and position of the pixel opening can be determined based on the shape and position of the common layer, the first light-emitting sub-layer, and the second light-emitting sub-layer.

[0049] In some embodiments, such as Figure 3 , Figure 4 As shown, the projections of the sides of the lower surface 382 of the isolation pillar 38 corresponding to the pixel opening 33a onto the substrate 31 coincide with the projections of the sides of the upper surface 331b of the first pixel defining portion 331 corresponding to the pixel opening 33a onto the substrate 31. By making the projections of the sides of the lower surface of the isolation pillar corresponding to the pixel opening onto the substrate coincide with the projections of the sides of the upper surface of the first pixel defining portion corresponding to the pixel opening onto the substrate, the two side walls of the isolation pillar and the two side walls of the first pixel defining portion form an angle, thereby increasing the angle between the isolation pillar and the pixel defining layer. When the encapsulation layer is deposited near the bottom region of the isolation pillar, the deposition rate can be increased due to the larger angle between the isolation pillar and the pixel defining layer, avoiding gaps in the encapsulation layer at this location, reducing the risk of breakage of the encapsulation layer during bending of the display panel, and improving encapsulation stability.

[0050] Specifically, it can be understood that since the isolation pillars are spaced apart, while the pixel definition layer is a whole surface, the limitation that the projections of the sides of the corresponding pixel openings on the substrate on the lower surface of the isolation pillars coincide with the projections of the sides of the corresponding pixel openings on the substrate on the upper surface of the first pixel definition section is based on the fact that the first pixel definition section has a certain width. However, in actual design, the first pixel definition sections of the pixel definition layer are interconnected with other parts and there are no actual boundaries. The width of the first pixel definition section is not limited and varies depending on the division method.

[0051] Specifically, the above embodiment is illustrated by taking the example that the projections of the sides of the corresponding pixel openings on the lower surface of the isolation pillar onto the substrate coincide with the projections of the sides of the corresponding pixel openings on the upper surface of the first pixel definition portion onto the substrate. However, the embodiments of this application are not limited to this. The lower surface of the isolation pillar may have only one side coinciding with the side of the first pixel definition portion. For example, taking two pixel openings with red and green sub-pixel units as an example, on the side near the pixel opening of the red sub-pixel unit, the projection of the side of the pixel opening corresponding to the red sub-pixel unit on the lower surface of the isolation pillar onto the substrate coincides with the projection of the side of the pixel opening corresponding to the red sub-pixel unit on the upper surface of the first pixel definition portion onto the substrate, and the projection of the side of the pixel opening corresponding to the green sub-pixel unit on the lower surface of the isolation pillar onto the substrate does not coincide with the projection of the side of the pixel opening corresponding to the green sub-pixel unit on the upper surface of the first pixel definition portion onto the substrate.

[0052] In some embodiments, such as Figure 4 As shown, the angle b between the sidewall 381 of the isolation pillar 38 and the sidewall 331a of the corresponding first pixel defining part 331 ranges from 70 degrees to 90 degrees. By making the angle between the sidewall of the isolation pillar and the sidewall of the corresponding first pixel defining part range from 70 degrees to 90 degrees, the opening degree of the angle formed by the isolation pillar and the first pixel defining part can be increased. This allows for a faster deposition rate in the bottom region of the isolation pillar when depositing inorganic materials, resulting in similar or even identical deposition rates of inorganic materials in various regions of the isolation pillar. This avoids the formation of pores in the encapsulation layer in the bottom region of the isolation pillar, thereby reducing the risk of encapsulation layer breakage during display panel bending and improving encapsulation stability.

[0053] Specifically, the angle between the sidewall of the isolation pillar and the sidewall of the corresponding first pixel definition part is greater than 70 degrees and less than 90 degrees.

[0054] Specifically, compared to the angle between the isolation structure and the pixel definition film in the comparative display device being greater than 60 degrees and less than 70 degrees, this application makes the angle between the sidewall of the isolation pillar and the sidewall of the corresponding first pixel definition part range from 70 degrees to 90 degrees. This increases the opening degree of the angle formed by the sidewall of the isolation pillar and the sidewall of the first pixel definition part, changes the film formation topography of the inorganic layer in the encapsulation layer, avoids the formation of pores when the inorganic material is formed at the bottom of the isolation pillar, avoids the encapsulation layer from breaking, and improves the encapsulation stability.

[0055] In some embodiments, such as Figure 4 As shown, the angle c between the sidewall 381 and the lower surface 382 of the isolation column 38 ranges from 110 degrees to 120 degrees. By making the angle between the sidewall and the lower surface of the isolation column range from 110 degrees to 120 degrees, the isolation column can isolate the common layer and prevent leakage.

[0056] In some embodiments, such as Figure 3 , Figure 4 As shown, the display panel 3 includes a first sub-pixel unit 301, a second sub-pixel unit 302, and a third sub-pixel unit 303 with different luminous colors. The first sub-pixel unit 301 and the second sub-pixel unit 302 are arranged intersectingly in the same column and in the same row. The third sub-pixel unit 303 and the first sub-pixel unit 301 are located in two adjacent columns and in two adjacent rows.

[0057] The first pixel definition section 331 is disposed between the first sub-pixel unit 301 and the third sub-pixel unit 303, and the second sub-pixel unit 302 and the third sub-pixel unit 303 are also disposed between them. The isolation pillar 38 includes a first isolation pillar 411 and a second isolation pillar 412. The first isolation pillar 411 is disposed between the first sub-pixel unit 301 and the third sub-pixel unit 303, and the second isolation pillar 412 is disposed between the second sub-pixel unit 302 and the third sub-pixel unit 303. By disposing the first isolation pillar between the first sub-pixel unit and the third sub-pixel unit, and the second isolation pillar between the second sub-pixel unit and the third sub-pixel unit, the common layer between the first sub-pixel unit and the third sub-pixel unit, as well as the common layer between the second sub-pixel unit and the third sub-pixel unit, can be isolated, preventing leakage that could lead to display defects.

[0058] Specifically, pixel opening 33a includes a first pixel opening 421, a second pixel opening 422 and a third pixel opening 423. A first sub-pixel unit 301 is disposed in the first pixel opening 421, a second sub-pixel unit 302 is disposed in the second pixel opening 422 and a third sub-pixel unit 303 is disposed in the third pixel opening 423.

[0059] It is understandable that solid lines are used to represent the boundaries of each pixel opening in order to show the pixel opening. However, in practice, the pixel definition layer is set for the entire surface, and there are openings in the areas where sub-pixel units are set. Therefore, except for the areas where sub-pixel units are set, the pixel definition layers in other areas will be connected together and there will be no obvious boundaries.

[0060] In some embodiments, such as Figure 3As shown, the projected area of ​​the first sub-pixel unit 301 on the substrate 31 is larger than the projected area of ​​the second sub-pixel unit 302 on the substrate 31, the projected area of ​​the second sub-pixel unit 302 on the substrate 31 is larger than the projected area of ​​the third sub-pixel unit 303 on the substrate 31, and the width L1 of the first isolation pillar 411 is larger than the width L2 of the second isolation pillar 412. By making the projected area of ​​the first sub-pixel unit on the substrate larger than the projected area of ​​the second sub-pixel unit on the substrate, the projected area of ​​the second sub-pixel unit on the substrate larger than the projected area of ​​the third sub-pixel unit on the substrate, and the width of the first isolation pillar larger than the width of the second isolation pillar, the isolation effect of the first isolation pillar on the common layer between the first and third sub-pixel units is similar to or even the same as the isolation effect of the second isolation pillar on the common layer between the second and third sub-pixel units, thereby improving leakage and avoiding display defects.

[0061] Specifically, the light emission colors of the first sub-pixel unit 301, the second sub-pixel unit 302, and the third sub-pixel unit are blue, red, and green, respectively, that is, the first sub-pixel unit is a blue sub-pixel unit, the second sub-pixel unit is a red sub-pixel unit, and the third sub-pixel unit is a green sub-pixel unit.

[0062] Specifically, due to the different luminous efficiencies of different luminescent materials, the area of ​​the blue sub-pixel unit is generally larger than that of the red sub-pixel unit, and the area of ​​the red sub-pixel unit is larger than that of the green sub-pixel unit. Correspondingly, the width of the first isolation pillar can be larger than the width of the second isolation pillar.

[0063] Specifically, Figure 3 The image shows an arrangement of pixel units in a display panel. It is understood that the isolation column design in this application can also be used when the display panel adopts other pixel arrangements.

[0064] Specifically, the lengths of the first and second isolation pillars can be determined based on the spacing between adjacent sub-pixel units; for example, the length of the first isolation pillar is equal to the length of the second isolation pillar.

[0065] In some embodiments, such as Figures 3 to 5As shown, the pixel definition layer 33 further includes a second pixel definition portion 332, which is disposed between the first sub-pixel unit 301 and the second sub-pixel unit 302. The width L4 of the upper surface of the second pixel definition portion 332 is greater than the width L3 of the upper surface of the first pixel definition portion 331. By making the width of the upper surface of the second pixel definition portion greater than the width of the upper surface of the first pixel definition portion, the isolation pillar can form an angle with the sidewall of the first pixel definition portion without changing the size of each sub-pixel unit. This allows each sub-pixel unit in the display panel to achieve a predetermined panel size, and the opening angle of the first pixel definition portion can be increased, thereby increasing the light emission angle of the pixel unit and improving the light efficiency.

[0066] In some embodiments, such as Figures 3 to 5 As shown, the display panel 3 also includes a support post 39. The support post 39 is provided on a portion of the second pixel definition portion 332, and the support post 39 contacts the upper surface of the second pixel definition portion 332. There is a gap between the edge of the support post 39 and the edge of the second pixel definition portion 332. By providing the support post, components such as the mask can be supported during the formation of each film layer, preventing damage to the display panel. Furthermore, the gap between the support post and the edge of the second pixel definition portion allows each common layer to overlap on the sidewalls of the support post and the second pixel definition portion, thereby preventing breakage of the common layer.

[0067] In some embodiments, such as Figures 3 to 5 As shown, the angle d between the sidewall of the first pixel defining part 331 and its lower surface is smaller than the angle e between the sidewall of the second pixel defining part 332 and its lower surface. By making the angle between the sidewall of the first pixel defining part and its lower surface smaller than the angle between the sidewall of the second pixel defining part and its lower surface, the width of the upper surface of the first pixel defining part can be reduced without changing the area of ​​the bottom surfaces of the first and second pixel defining parts. This allows the isolation pillar to form an angle with the sidewall of the first pixel defining part, increasing the angle between the isolation pillar and the pixel defining layer. Consequently, when the encapsulation layer is deposited near the bottom region of the isolation pillar, the larger angle between the isolation pillar and the pixel defining layer increases the deposition rate, preventing gaps in the encapsulation layer at this location, reducing the risk of breakage during display panel bending, and improving encapsulation stability.

[0068] Specifically, the above embodiment is illustrated by taking the example that the angle between the sidewall of the first pixel defining part and the lower surface of the first pixel defining part is smaller than the angle between the sidewall of the second pixel defining part and the lower surface of the second pixel defining part. However, the embodiments of this application are not limited to this. The angle between the sidewall of the first pixel defining part and the lower surface of the first pixel defining part can be equal to the angle between the sidewall of the second pixel defining part and the lower surface of the second pixel defining part, and the width of the upper surface of the first pixel defining part is smaller than the width of the upper surface of the second pixel defining part. This design can reduce the spacing between the first pixel defining parts of adjacent sub-pixel units and improve the aperture ratio.

[0069] Specifically, it can be seen that there are isolation pillars between the first and third sub-pixel units, and between the second and third sub-pixel units. There are no isolation pillars between the first and second sub-pixel units. This design is based on the significant difference in the activation voltage between the first and second sub-pixel units, and is intended to avoid disconnecting the common layers and pixel definition layers. Therefore, although there are no isolation pillars between the first and second sub-pixel units, leakage will not cause display abnormalities. Furthermore, the isolation pillars are not connected, so that the common layers and pixel definition layers only have openings, rather than being broken into multiple spaced sections. This ensures that the potential at all points of the common electrode layer is consistent, and multiple input terminals are not required for signal input.

[0070] Specifically, the materials used for the isolation pillars include negative photoresist.

[0071] Specifically, the above embodiments have provided a detailed description of the display panel from the perspective of the arrangement of each film layer and the arrangement between each film layer. It is understood that when there is no conflict between the embodiments, the embodiments can be combined. For example, the projection of each side of the lower surface of the isolation pillar corresponding to the pixel opening onto the substrate coincides with the projection of each side of the upper surface of the first pixel definition portion corresponding to the pixel opening onto the substrate. The angle between the sidewall of the isolation pillar and the sidewall of the corresponding first pixel definition portion is in the range of 70 degrees to 90 degrees.

[0072] Meanwhile, this application embodiment provides a method for manufacturing a display panel, the method comprising:

[0073] A substrate is provided, and a pixel electrode layer and a pixel definition layer are sequentially formed on the substrate. Isolation pillars and support pillars are then formed on the pixel definition layer. The corresponding display panel structure for this step is as follows: Figure 6 As shown in (a) in the text;

[0074] A first light-emitting sublayer, a second light-emitting sublayer, and a common layer are formed on the isolation pillars; the structure of the display panel corresponding to this step is as follows: Figure 6 As shown in (b) in the image;

[0075] An encapsulation layer is formed on the common layer; the structure of the display panel corresponding to this step is as follows: Figure 4 and Figure 5 As shown.

[0076] Specifically, the steps of forming an encapsulation layer on the common layer include depositing a first inorganic layer on the common layer using a plasma-enhanced chemical vapor deposition process, forming an organic layer on the first inorganic layer using an inkjet printing process, and forming a second inorganic layer on the organic layer using a plasma-enhanced chemical vapor deposition process.

[0077] Meanwhile, this application provides a display device, which includes a display panel as described in any of the above embodiments.

[0078] Specifically, the display panel includes an organic light-emitting diode (OLED) display panel.

[0079] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0080] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0081] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0082] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, include: Substrate; A pixel electrode layer is disposed on one side of the substrate; A pixel definition layer is disposed on the side of the pixel electrode layer away from the substrate, and the pixel definition layer includes a first pixel definition portion and a pixel opening disposed between the first pixel definition portion; An isolation pillar is disposed on the side of the first pixel definition portion away from the pixel electrode layer, and the lower surface of the isolation pillar is in contact with the upper surface of the first pixel definition portion; The common layer includes a first common part and a second common part. The first common part is disposed on the isolation pillar, and the second common part is disposed on the bottom surface and sidewall of the pixel opening. The first common part and the second common part are disconnected. Wherein, one end of the sidewall of the isolation post near the first pixel definition part is in contact with one end of the sidewall of the first pixel definition part near the isolation post; The projections of the lower surface of the isolation pillar corresponding to each side of the pixel opening onto the substrate coincide with the projections of the upper surface of the first pixel defining part corresponding to each side of the pixel opening onto the substrate; and / or, the angle between the sidewall of the isolation pillar and the sidewall of the corresponding first pixel defining part ranges from 70 degrees to 90 degrees; and / or, the display panel includes a first sub-pixel unit, a second sub-pixel unit, and a third sub-pixel unit of different emitting colors, the first sub-pixel unit and the second sub-pixel unit are interleaved in the same column, the first sub-pixel unit and the second sub-pixel unit are interleaved in the same row, the third sub-pixel unit and the first sub-pixel unit are located in two adjacent columns, and the third sub-pixel unit and the first sub-pixel unit are located in two adjacent rows; wherein, the first pixel defining part is disposed between the first sub-pixel unit and the third sub-pixel unit, the first pixel defining part is disposed between the second sub-pixel unit and the third sub-pixel unit, the isolation pillar includes a first isolation pillar and a second isolation pillar, the first isolation pillar is disposed between the first sub-pixel unit and the third sub-pixel unit, and the second isolation pillar is disposed between the second sub-pixel unit and the third sub-pixel unit.

2. The display panel according to claim 1, characterized in that, The angle between the sidewall of the isolation column and the lower surface of the isolation column ranges from 110 degrees to 120 degrees.

3. The display panel according to claim 1, characterized in that, The projected area of ​​the first sub-pixel unit on the substrate is greater than the projected area of ​​the second sub-pixel unit on the substrate, the projected area of ​​the second sub-pixel unit on the substrate is greater than the projected area of ​​the third sub-pixel unit on the substrate, and the width of the first isolation pillar is greater than the width of the second isolation pillar.

4. The display panel according to claim 1, characterized in that, The pixel definition layer further includes a second pixel definition section, which is disposed between the first sub-pixel unit and the second sub-pixel unit, and the width of the upper surface of the second pixel definition section is greater than the width of the upper surface of the first pixel definition section.

5. The display panel according to claim 4, characterized in that, The display panel further includes a support column, and the support column is provided on a portion of the second pixel definition portion. The support column is in contact with the upper surface of the second pixel definition portion, and there is a gap between the edge of the support column and the edge of the second pixel definition portion.

6. The display panel according to claim 4, characterized in that, The angle between the sidewall of the first pixel defining part and the lower surface of the first pixel defining part is smaller than the angle between the sidewall of the second pixel defining part and the lower surface of the second pixel defining part.

7. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 6.

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