Light-emitting unit and preparation method thereof, display panel and display device

Abstract

The invention provides a light-emitting unit and a preparation method thereof, a display panel and a display device, and belongs to the technical field of display. The light-emitting unit comprises an epitaxial layer located on one side of the substrate, a first groove and a second groove penetrating through and exposing the substrate, a first insulating layer located on the side, away from the substrate, of the epitaxial layer and covering the inner wall of the first groove, and a conductive layer located on the side, away from the substrate, of the first insulating layer and extending into the second groove through the first groove. The second insulating layer is positioned on one side, far away from the substrate, of the conductive layer; and the two bonding pads are electrically connected with the conductive layer and the current expansion layer in the epitaxial layer respectively through via holes penetrating through the insulating layers. In this way, driving current can be provided for the two semiconductor layers stacked in the epitaxial layer through the two bonding pads, so that the light-emitting layer located between the two semiconductor layers emits light. Therefore, the light-emitting unit has the advantage of vertical LED current, and has a non-vertical LED structure, so that the step of stripping the substrate can be omitted. And furthermore, the preparation yield of the light-emitting unit is relatively high.

Description

Light-emitting unit and manufacturing method thereof, display panel, and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting unit and a preparation method thereof, a display panel, and a display device. Background Art

[0002] Light-emitting diodes (LEDs) are widely used in various display products due to their advantages such as high brightness, low energy consumption and high color reproduction.

[0003] In the related art, LEDs usually include: a sapphire substrate, an epitaxial layer located on one side of the sapphire substrate, and an N-type electrode and a P-type electrode. In addition, LEDs are usually divided into traditional face-up / flip-chip non-vertical LEDs and vertical LEDs. Among them, the N-type electrode and the P-type electrode in the non-vertical LED are located on the same side, and the current mostly flows horizontally, resulting in current congestion and poor heat dissipation. In the vertical LED, the N-type electrode and the P-type electrode are located on different sides, the current can flow vertically, the current distribution is uniform, and the heat dissipation capacity is better. In addition, for vertical LEDs, during the preparation process, laser stripping of the sapphire substrate is often used, and the other parts except the sapphire substrate are transferred as a whole to other substrates with better heat dissipation capacity to ensure better heat dissipation.

[0004] However, in the related art, laser lift-off may damage the epitaxial layer due to stress mismatch, resulting in a low LED production yield.

[0005] Summary of the Invention

[0006] Provided are a light-emitting unit and a method for manufacturing the same, a display panel, and a display device. The technical solution is as follows:

[0007] In one aspect, a light emitting unit is provided, comprising:

[0008] substrate;

[0009] an epitaxial layer, located on one side of the substrate, and the epitaxial layer includes a current spreading layer;

[0010] at least one first trench and at least one second trench penetrating and exposing the substrate, wherein the at least one first trench penetrates the epitaxial layer, and the at least one second trench is located between the epitaxial layer and the substrate, and an orthographic projection of the at least one second trench on the substrate overlaps with an orthographic projection of the epitaxial layer on the substrate;

[0011] a first insulating layer, located on a side of the epitaxial layer away from the substrate and covering an inner wall of the at least one first trench;

[0012] a conductive layer, located on a side of the first insulating layer away from the substrate, extending through the at least one first trench into the at least one second trench, and contacting the substrate;

[0013] a second insulating layer, located on a side of the conductive layer away from the substrate;

[0014] a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer;

[0015] A first pad and a second pad are located on a side of the second insulating layer away from the substrate and are spaced apart from each other. The first pad is electrically connected to the conductive layer through the first via hole, and the second pad is electrically connected to the current spreading layer through the second via hole.

[0016] Optionally, the light emitting unit further includes:

[0017] The sacrificial layer pattern is located between the substrate and the epitaxial layer and has the at least one second trench exposing the substrate.

[0018] Optionally, the light emitting unit further includes:

[0019] a support layer, located on a side of the epitaxial layer away from the substrate, between the current spreading layer and the first insulating layer, covering a sidewall of the epitaxial layer close to an edge of the substrate, and in contact with the substrate;

[0020] Furthermore, the at least one first trench sequentially penetrates the support layer and the epitaxial layer, and the first insulating layer is located on a side of the support layer away from the substrate and covers an inner wall of the at least one first trench.

[0021] Optionally, the material of the support layer includes: insulating material.

[0022] Optionally, the second via includes: a first sub-via and a second sub-via, wherein the first sub-via passes through the first insulating layer and exposes the current spreading layer, and the second sub-via passes through the second insulating layer; the second pad includes: a conductive electrode and a pad body;

[0023] The conductive electrode is located in the first sub-via and is electrically connected to the current spreading layer through the first sub-via; the pad body is located on a side of the second insulating layer away from the substrate and is electrically connected to the conductive electrode through the second sub-via.

[0024] Optionally, the conductive electrode and the conductive layer are located in the same layer.

[0025] Optionally, the conductive layer includes: a first conductive block and a second conductive block;

[0026] The first conductive block is filled in the at least one second trench, the second conductive block is located on the side of the first insulating layer away from the substrate, and is filled in the at least one first trench, and is electrically connected to the first conductive block through the at least one first trench.

[0027] Optionally, the light-emitting unit further satisfies any of the following conditions:

[0028] The epitaxial layer includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer located between the current spreading layer and the substrate and stacked in sequence in a direction away from the substrate;

[0029] The first pad includes an N-type pad; the second pad includes a P-type pad;

[0030] The substrate includes: a sapphire substrate;

[0031] The second insulating layer includes a distributed Bragg reflector.

[0032] In another aspect, a method for preparing a light-emitting unit is provided, for preparing the light-emitting unit according to the above aspect, the method comprising:

[0033] obtaining a substrate;

[0034] forming a sacrificial layer and an epitaxial layer in sequence on the substrate, wherein the formed epitaxial layer includes a current spreading layer;

[0035] forming at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer;

[0036] forming a first insulating layer, wherein the formed first insulating layer is located on a side of the epitaxial layer away from the substrate and covers an inner wall of the at least one first trench;

[0037] removing at least a portion of the sacrificial layer to form at least one second trench penetrating the at least one first trench, so as to expose the substrate through the at least one first trench and the at least one second trench, wherein an orthographic projection of the at least one second trench formed on the substrate overlaps with an orthographic projection of the epitaxial layer on the substrate;

[0038] forming a conductive layer, wherein the formed conductive layer is located on a side of the first insulating layer away from the substrate, extends through the at least one first trench into the at least one second trench, and contacts the substrate;

[0039] forming a second insulating layer on a side of the conductive layer away from the substrate;

[0040] forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer;

[0041] A first pad and a second pad spaced apart from each other are formed on a side of the second insulating layer away from the substrate, and the first pad is electrically connected to the conductive layer through the first via hole, and the second pad is electrically connected to the current spreading layer through the second via hole.

[0042] Optionally, removing at least part of the sacrificial layer to form at least one second trench penetrating the at least one first trench includes:

[0043] A portion of the sacrificial layer between the at least one first trench and the substrate is removed to form at least one second trench penetrating the at least one first trench.

[0044] Optionally, before forming the first insulating layer, the method further includes:

[0045] forming a support layer, wherein the formed support layer is located on a side of the epitaxial layer away from the substrate, covers the sidewalls of the epitaxial layer and the sacrificial layer close to the edge of the substrate, and contacts the substrate;

[0046] The at least one first trench is formed to sequentially penetrate the support layer and the epitaxial layer and expose the sacrificial layer. The first insulating layer is formed on a side of the support layer away from the substrate and covers the inner wall of the at least one first trench.

[0047] Optionally, removing at least part of the sacrificial layer to form at least one second trench penetrating the at least one first trench includes:

[0048] The entire sacrificial layer is removed to form a second trench penetrating the at least one first trench.

[0049] Optionally, removing at least part of the sacrificial layer includes:

[0050] At least a portion of the sacrificial layer is etched using an etching process to remove at least a portion of the sacrificial layer.

[0051] Optionally, forming a second via hole that sequentially penetrates the second insulating layer and the first insulating layer and exposes the current spreading layer includes:

[0052] Before forming the second insulating layer, forming a first sub-via hole penetrating the first insulating layer and exposing the current spreading layer;

[0053] After forming the second insulating layer, forming a second sub-via hole that penetrates the second insulating layer and is connected to the first sub-via hole, thereby obtaining a second via hole including the first sub-via hole and the second sub-via hole;

[0054] forming a second pad on a side of the second insulating layer away from the substrate, comprising:

[0055] Before forming the second insulating layer, forming a conductive electrode in the first sub-via hole, and the formed conductive electrode is electrically connected to the current spreading layer through the first sub-via hole;

[0056] After forming the second insulating layer, a pad body is formed on a side of the second insulating layer away from the substrate, and the formed pad body is electrically connected to the conductive electrode through the second sub-via to obtain a second pad including the conductive electrode and the pad body.

[0057] Optionally, forming a conductive electrode in the first sub-via hole includes:

[0058] After forming the conductive layer, forming a conductive electrode in the first sub-via hole;

[0059] or,

[0060] While the conductive layer is being formed, a conductive electrode located in the same layer as the conductive layer is formed in the first sub-via hole.

[0061] Optionally, forming at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer includes:

[0062] Etching the epitaxial layer using an etching process to form at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer;

[0063] Furthermore, the number of the formed first grooves is positively correlated with the size of the light-emitting unit to be formed, and the shape of the formed first grooves and the arrangement of the formed first grooves match the shape of the light-emitting unit to be formed.

[0064] Optionally, forming a conductive layer includes:

[0065] Filling a conductive material into the at least one first trench and the at least one second trench from a side of the first insulating layer away from the substrate to form a conductive layer;

[0066] Wherein, the conductive material includes: transparent conductive material.

[0067] Optionally, the sequentially forming a sacrificial layer and an epitaxial layer on the substrate includes:

[0068] forming a sacrificial film layer and an epitaxial film layer on the substrate in sequence, wherein the epitaxial film layer includes: a current spreading film layer, and a first semiconductor film layer, a light-emitting film layer, and a second semiconductor film layer located between the current spreading film layer and the substrate and sequentially stacked in a direction away from the substrate;

[0069] Based on the shape of the light-emitting unit to be formed, the sacrificial film layer and the epitaxial film layer are removed from the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence. The epitaxial layer also includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer located between the current spreading layer and the substrate and stacked in sequence in a direction away from the substrate.

[0070] Optionally, the sequentially forming a sacrificial film layer and an epitaxial film layer on the substrate includes:

[0071] growing a sacrificial film layer on the substrate;

[0072] An epitaxial film layer is grown on a side of the sacrificial film layer away from the substrate.

[0073] Optionally, removing the sacrificial film layer and a portion of the epitaxial film layer close to an edge of the substrate includes:

[0074] The sacrificial film layer and the epitaxial film layer are etched in portions close to the edge of the substrate by using an etching process, so as to remove the sacrificial film layer and the epitaxial film layer in portions close to the edge of the substrate.

[0075] In another aspect, a display panel is provided, comprising: a driving backplane, and a plurality of light-emitting units as described in the above aspect;

[0076] The driving backplane is coupled to the light emitting unit and is used to drive the light emitting unit to emit light.

[0077] In another aspect, a display device is provided, comprising: a power supply component, and the display panel as described in the above-mentioned further aspect;

[0078] The power supply component is coupled to the display panel and is used to supply power to the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0080] FIG1 is a schematic structural diagram of a light-emitting unit provided by an embodiment of the present disclosure;

[0081] FIG2 is a schematic structural diagram of another light-emitting unit provided in an embodiment of the present disclosure;

[0082] FIG3 is a schematic structural diagram of another light-emitting unit provided in an embodiment of the present disclosure;

[0083] FIG4 is a schematic structural diagram of another light-emitting unit provided in an embodiment of the present disclosure;

[0084] FIG5 is a flow chart of a method for preparing a light-emitting unit provided in an embodiment of the present disclosure;

[0085] FIG6A is a schematic diagram showing the preparation of a portion of a film layer in a light-emitting unit based on FIG1 ;

[0086] FIG6B is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0087] FIG6C is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0088] FIG6D is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0089] FIG6E is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0090] FIG6F is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0091] FIG6G is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0092] FIG6H is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0093] FIG6I is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG1 ;

[0094] FIG7A is a schematic diagram showing the preparation of a portion of a film layer in a light-emitting unit based on FIG2 ;

[0095] FIG7B is a schematic diagram of preparing another portion of a film layer in a light-emitting unit based on FIG2 ;

[0096] FIG7C is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG2 ;

[0097] FIG7D is a schematic diagram of preparing another portion of a film layer in a light-emitting unit based on FIG2 ;

[0098] FIG7E is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG2 ;

[0099] FIG7F is a schematic diagram of preparing another portion of a film layer in a light-emitting unit based on FIG2 ;

[0100] FIG7G is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG2 ;

[0101] FIG8A is a schematic diagram showing the preparation of a portion of a film layer in a light-emitting unit based on FIG3 ;

[0102] FIG8B is a schematic diagram of preparing another portion of a film layer in a light-emitting unit based on FIG3 ;

[0103] FIG8C is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG3 ;

[0104] FIG8D is a schematic diagram of preparing another portion of a film layer in a light-emitting unit based on FIG3 ;

[0105] FIG8E is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG3 ;

[0106] FIG9A is a schematic diagram showing the preparation of a portion of a film layer in a light-emitting unit based on FIG4 ;

[0107] FIG9B is a schematic diagram showing the preparation of another portion of a film layer in a light-emitting unit based on FIG4 ;

[0108] FIG10 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure;

[0109] FIG11 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0110] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0111] FIG1 is a schematic diagram of the structure of a light-emitting unit provided by an embodiment of the present disclosure. The light-emitting unit may be an LED. As shown in FIG1 , the light-emitting unit includes:

[0112] Substrate 01.

[0113] Epitaxial layer 02 : The epitaxial layer 02 is located on one side of the substrate 01 , and the epitaxial layer 02 includes a current spreading layer 021 .

[0114] At least one first trench G1 and at least one second trench G2 that penetrate and expose the substrate 01. The at least one first trench G1 penetrates the epitaxial layer 02, and the at least one second trench G2 is located between the epitaxial layer 02 and the substrate 01, and its orthographic projection on the substrate 01 overlaps with the orthographic projection of the epitaxial layer 02 on the substrate 01. That is, the first trench G1 that penetrates the epitaxial layer 02 can expose the second trench G2 that penetrates it, and the second trench G2 can expose the substrate 01, thereby exposing the substrate 01 through the first trench G1 and the second trench G2 that penetrate. For example, the light-emitting unit shown in FIG1 has two first trenches G1 and two second trenches G2 that penetrate in a one-to-one correspondence. The two first trenches G1 are spaced apart from each other, and the two second trenches G2 are spaced apart from each other.

[0115] The first insulating layer 03 is located on a side of the epitaxial layer 02 away from the substrate 01 and covers the inner wall of at least one first trench G1.

[0116] Conductive layer 04. This conductive layer 04 is located on the side of the first insulating layer 03 away from the substrate 01 and extends through at least one first trench G1 into at least one second trench G2, contacting the substrate 01. That is, the conductive layer 04 is not only located on the side of the first insulating layer 03 away from the substrate 01, but also located within the first trench G1 and the second trench G2 that penetrate each other.

[0117] The second insulating layer 05 is located on a side of the conductive layer 04 away from the substrate 01 .

[0118] A first via hole K1 penetrates the second insulating layer 05 and exposes the conductive layer 04 , and a second via hole K2 penetrates the second insulating layer 05 and the first insulating layer 03 in sequence and exposes the current spreading layer 021 .

[0119] The first pad Pad1 and the second pad Pad2 are located on a side of the second insulating layer 05 away from the substrate 01 and are spaced apart from each other. The first pad Pad1 is electrically connected to the conductive layer 04 via a first via K1, and the second pad Pad2 is electrically connected to the current spreading layer 021 via a second via K2. Accordingly, it can be seen that the first via K1 and the second via K2 are also spaced apart from each other.

[0120] Optionally, referring to FIG1 , it can be seen that, in addition to the current spreading layer 021 , the epitaxial layer 02 may also include: a first semiconductor layer 022 , a light emitting layer 023 , and a second semiconductor layer 024 , which are located between the current spreading layer 021 and the substrate 01 and are stacked sequentially in a direction away from the substrate 01 .

[0121] It can be seen that the first pad Pad1 can be indirectly electrically connected to the first semiconductor layer 022 through the conductive layer 04, and the second pad Pad2 can be indirectly electrically connected to the second semiconductor layer 024 through the current spreading layer 021. In addition, the first pad Pad1 and the second pad Pad2 can both be used to electrically connect to the driving backplane to transmit the driving signal (such as driving current) provided by the driving backplane to the first semiconductor layer 022 and the second semiconductor layer 024, respectively. Thereby, the light-emitting layer 023 can emit light under the action of the voltage difference of the driving signal received by the first semiconductor layer 022 and the second semiconductor layer 024. Combined with the structure shown in Figure 1, it can be seen that the driving current can flow in a direction perpendicular to the supporting surface of the substrate 01. It can be seen that the structure of the light-emitting unit recorded in the embodiment of the present disclosure is similar to the current non-vertical LED, and at the same time has the characteristic that the current can flow vertically in the vertical LED. Furthermore, on the one hand, it has the advantages of uniform current distribution of vertical LEDs and good heat dissipation capacity; on the other hand, it can eliminate the step of laser peeling off the substrate 01 required in the vertical LED and the step of connecting the electrodes, ensuring a good preparation yield of the light-emitting unit and saving preparation costs at the same time.

[0122] Continuing with the structure shown in FIG1 , it can be seen that the first insulating layer 03 can be used to insulate the current spreading layer 021 from the conductive layer 04, thereby preventing interference between the drive signal transmitted to the first semiconductor layer 022 via the first pad Pad1 and the conductive layer 04, and the drive signal transmitted to the second semiconductor layer 024 via the second pad Pad2 and the current spreading layer 021. The second insulating layer 05 can be used to insulate the conductive layer 04 from the pads (including the first pad Pad1 and the second pad Pad2), preventing interference between the signals therebetween.

[0123] In summary, embodiments of the present disclosure provide a light-emitting unit. The light-emitting unit includes: a substrate; an epitaxial layer located on one side of the substrate; a first trench extending through the epitaxial layer and extending through the epitaxial layer; a second trench located between the epitaxial layer and the substrate to expose the substrate; a first insulating layer located on the side of the epitaxial layer away from the substrate and covering the inner wall of the first trench; a conductive layer located on the side of the first insulating layer away from the substrate and extending through the first trench into the second trench; a second insulating layer located on the side of the conductive layer away from the substrate; and first and second solder pads electrically connected to the conductive layer and a current spreading layer in the epitaxial layer, respectively, via vias extending through the insulating layer and the insulating layer. In this manner, the first and second solder pads can reliably provide a driving current to the two semiconductor layers stacked in the epitaxial layer through the conductive layer and the current spreading layer, respectively, so that the light-emitting layer sandwiched between the two semiconductor layers reliably emits light. As can be seen, the driving current in the light-emitting unit can flow vertically, i.e., the light-emitting unit has the advantages of uniform current distribution and good heat dissipation of a vertical LED, while also having a non-vertical LED structure, eliminating the need for substrate stripping. Furthermore, the light-emitting unit has a good manufacturing yield.

[0124] Optionally, as can be seen from FIG1 , the light emitting unit described in the embodiment of the present disclosure may further include:

[0125] Sacrificial layer pattern 06M: The sacrificial layer pattern 06M may be located between the substrate 01 and the epitaxial layer 02 and may have at least one second trench G2 exposing the substrate 01 .

[0126] Based on this, it can be seen that in some embodiments, during the fabrication process of the light-emitting unit, a sacrificial layer may be first formed between the substrate 01 and the epitaxial layer 02. A portion of the sacrificial layer located between the at least one first trench G1 and the substrate 01 is then removed to form at least one second trench G2 that penetrates the at least one first trench G1. The portion remaining after the sacrificial layer is removed is referred to as a sacrificial layer pattern 06M.

[0127] Optionally, referring to the structural schematic diagram of another light-emitting unit shown in FIG2 , it can be seen that the light-emitting unit described in the embodiment of the present disclosure may further include:

[0128] Support layer 07 . The support layer 07 may be located on a side of the epitaxial layer 02 away from the substrate 01 , and may be located between the current spreading layer 021 and the first insulating layer 03 . The support layer 07 may cover the sidewall of the epitaxial layer 02 close to the edge of the substrate 01 and contact the substrate 01 .

[0129] On the basis of also including the support layer 07, it can be seen from Figure 2 that the above-mentioned at least one first trench G1 can be sequentially passed through the support layer 07 and the epitaxial layer 02, and the first insulating layer 03 can be located on the side of the support layer 07 away from the substrate 01 and cover the inner wall of the at least one first trench G1.

[0130] In addition, based on the embodiment including the support layer 07, as shown in Figure 2, the light-emitting unit may include a second groove G2 that penetrates the two first grooves G1 spaced apart from each other at the same time, and the orthographic projection of the second groove G2 on the substrate 01 overlaps with the orthographic projection of the epitaxial layer 02 on the substrate 01.

[0131] Alternatively, in some embodiments, during the fabrication of the light-emitting unit, a sacrificial layer may be first formed between the substrate 01 and the epitaxial layer 02, and then the entire sacrificial layer may be removed to form the second trench G2. That is, based on the embodiment shown in FIG2 , the light-emitting unit may not include the sacrificial layer pattern 06M.

[0132] Moreover, for the embodiment structure shown in FIG2 , on the basis of removing all the sacrificial layers, by setting a support layer 07, it can be used to stabilize the structure after the sacrificial layer is removed (such as the epitaxial layer 02) during the preparation process, so as to facilitate the subsequent formation of other film layers (such as the conductive layer 04) on one side of the epitaxial layer 02. In this way, a good preparation yield can be further ensured. With reference to FIG1 , it can be seen that on the basis of removing only part of the sacrificial layer, the remaining sacrificial layer pattern 06M can be used as a support layer to stabilize the structure after the sacrificial layer is removed during the preparation process, ensuring a good preparation yield without the need to set a support layer 07. Of course, this is only a schematic illustration. For example, in some embodiments, the light-emitting unit may include both the sacrificial layer pattern 06M shown in FIG1 and the support layer 07 shown in FIG2 to ensure a better preparation yield. The embodiments disclosed herein are not limited to this.

[0133] Optionally, the material of the support layer 07 may include: insulating material. Accordingly, the support layer 07 may be considered as another insulating layer different from the first insulating layer 03 and the second insulating layer 05 .

[0134] Optionally, the material of each insulating layer described in the embodiments of the present disclosure may include at least one of silicon oxide (SiO2), silicon nitride (Si3N4), titanium oxide (TiO2) and aluminum oxide (Al2O3).

[0135] Optionally, as shown in Figures 1 and 2 above, in the light-emitting unit described in the embodiment of the present disclosure, the second via K2 may include: a first sub-via K21 and a second sub-via K22, wherein the first sub-via K21 may penetrate the first insulating layer 03 and expose the current spreading layer 021, and the second sub-via K22 may penetrate the second insulating layer 05. Furthermore, the second pad Pad2 may include: a conductive electrode Pad21 and a pad body Pad22.

[0136] The conductive electrode Pad21 may be located within the first sub-via K21 and may be electrically connected to the current spreading layer 021 through the first sub-via K21. The pad body Pad22 may be located on a side of the second insulating layer 05 away from the substrate 01 and may be electrically connected to the conductive electrode Pad21 through the second sub-via K22.

[0137] It should be noted that, as shown in Figure 2, on the basis that the light-emitting unit also includes a supporting layer 07, the first sub-via K21 also penetrates the supporting layer 07, that is, the first sub-via K21 can penetrate the first insulating layer 03 and the supporting layer 07 in sequence to reliably expose the current spreading layer 021.

[0138] Optionally, the conductive electrode Pad21 may be made of at least one of aluminum (Al), molybdenum (Mo), copper (Cu), titanium (Ti), and silver (Ag). For example, the conductive electrode may be made of an alloy of the aforementioned metal materials, or may include multiple metal film layers, each of which may be made of the aforementioned metal materials. This ensures a good conductive effect of the conductive electrode.

[0139] Optionally, in some embodiments, referring to the structural schematic diagram of another light-emitting unit shown in FIG3 , it can be seen that the conductive electrode Pad 21 and the conductive layer 04 may be located in the same layer and represented by the same filling pattern.

[0140] It should be noted that being located in the same layer may refer to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. That is, multiple elements, components, structures, and / or parts located in the "same layer" are made of the same material and are formed through the same patterning process. In this way, the preparation process and preparation costs can be saved, and the preparation efficiency can be accelerated.

[0141] Optionally, in some embodiments, as can be seen from the structural schematic diagram of another light-emitting unit shown in Figure 4, the second pad Pad2 can be a whole like the first pad Pad1, without including the electrically connected conductive electrode Pad21 and the pad body Pad22, and the second pad Pad2 can be directly electrically connected to the current expansion layer 021 through the second via K2.

[0142] Optionally, referring to the structure shown in FIG. 4 , it can be seen that the conductive layer 04 described in the embodiment of the present disclosure may include: a first conductive block 041 and a second conductive block 042 .

[0143] The first conductive block 041 can be filled in at least one second trench G2. The second conductive block 042 can be located on the side of the first insulating layer 03 away from the substrate 01 and can be filled in at least one first trench G1. It can also be electrically connected to the first conductive block 041 through the at least one first trench G1. That is, the conductive layer 04 can be divided into: a portion located on the side of the epitaxial layer 02 close to the substrate 01 and within the second trench G2; and another portion located within the epitaxial layer 02 and on the side of the epitaxial layer 02 away from the substrate 01.

[0144] Optionally, in the embodiment of the present disclosure, one of the first semiconductor layer 022 and the second semiconductor layer 024 may be an N-type layer and the other may be a P-type layer. Of the first pad Pad1 and the second pad Pad2, the one electrically connected to the N-type layer may be a P-type pad (i.e., N-Pad), and the one electrically connected to the P-type layer may be a P-type pad (i.e., P-Pad).

[0145] For example, referring to FIG. 4 , it can be seen that the first semiconductor layer 022 shown in the embodiment of the present disclosure can be an N-type layer, and the second semiconductor layer 024 can be a P-type layer. Accordingly, it can be seen that the first pad Pad1 electrically connected to the N-type first semiconductor layer 022 can be an N-Pad, and the second pad Pad2 electrically connected to the P-type second semiconductor layer 024 can be a P-Pad. Given that the second pad Pad2 includes an electrically connected conductive electrode Pad21 and a pad body Pad22, the conductive electrode Pad21 can be a P-electrode.

[0146] Optionally, the material of the N-type first semiconductor layer 022 may be N-type gallium nitride (N-GaN). Accordingly, the first semiconductor layer 022 may also be referred to as an N-GaN layer. The material of the P-type second semiconductor layer 024 may be P-type gallium nitride (P-GaN). Accordingly, the second semiconductor layer 024 may also be referred to as a P-GaN layer. The material of the light-emitting layer 023 may include a multiple quantum well (MQW) having a self-luminous effect. Accordingly, the light-emitting layer 023 may also be referred to as an MQW layer.

[0147] Optionally, referring to FIG4 , it can be seen that the light-emitting unit described in the embodiment of the present disclosure may also meet any of the following conditions:

[0148] First, as described in the above embodiment, the epitaxial layer 02 may include: a first semiconductor layer 022 , a light emitting layer 023 , and a second semiconductor layer 024 located between the current spreading layer 021 and the substrate 01 and sequentially stacked in a direction away from the substrate 01 .

[0149] Secondly, as described in the above embodiment, the first pad Pad1 includes an N-type pad (ie, N-Pad), and the second pad Pad2 includes a P-type pad (ie, P-Pad).

[0150] Third, the substrate 01 may include a sapphire substrate. The sapphire substrate has a high light transmittance, is relatively hard, and has relatively stable chemical properties, which can ensure that the light-emitting unit has good luminous efficiency and stability.

[0151] Fourthly, the second insulating layer 05 may include a distributed Bragg reflector (DBR). Accordingly, the second insulating layer 05 may also be called a DBR layer.

[0152] As can be seen from the accompanying drawings, the side of the second insulating layer 05 away from the substrate 01 can be the light emitting surface. In this way, by setting the second insulating layer 05 farthest from the substrate 01 as the DBR layer, the better reflection effect of the DBR layer can be utilized to ensure a better display effect of the light-emitting unit.

[0153] Furthermore, in some embodiments, the conductive layer 04 can be made of a transparent conductive material. Accordingly, the conductive layer 04 can also be referred to as a transparent conductive layer. Since the second pad Pad2 includes an electrically connected conductive electrode Pad21 and a pad body Pad22, and the conductive electrode Pad21 and the conductive layer 04 are located on the same layer, the conductive electrode Pad21 can also be made of the same transparent conductive material as the conductive layer 04. This ensures reliable transmission of light emitted by the light-emitting layer 023, further enhancing display quality.

[0154] Optionally, the transparent conductive material may include polyethylene dioxythiophene (PSS / PEDOT); a conductive plastic made by blending metal or carbon powder with a polymer; or a 3D-printed conductive material, for example, the 3D-printed conductive material may include polystyrene, graphene, dimethylformamide, an aluminate coupling agent, and isocyanate. It should be noted that the materials described in the embodiments of this disclosure are for illustrative purposes only.

[0155] Optionally, in the embodiment of the present disclosure, the number of at least one first groove G1 may be positively correlated with the size of the light-emitting unit. Here, the size of the light-emitting unit may refer to the area of ​​the light-emitting unit. That is, the larger the size of the light-emitting unit, the more the number of at least one first groove G1 may be; conversely, the smaller the size of the light-emitting unit, the fewer the number of at least one first groove G1 may be. For example, generally 1 to 20 first grooves G1 may be included. For example, for a light-emitting unit having a size greater than 0 and less than 10 micrometers (μm), 1 or less than 4 first grooves G1 may be included.

[0156] Optionally, in the embodiment of the present disclosure, the shape of the first groove G1 and the arrangement of the multiple first grooves G1 can match the shape of the light-emitting unit. Matching here can refer to the same or similar shapes. For example, assuming that the light-emitting unit is rectangular, each first groove G1 can be the same rectangle, and, in the scenario including multiple (e.g., 4) first grooves G1, the shape of the area enclosed by the multiple first grooves G1 can also be the same rectangle. Assuming that the light-emitting unit is circular, each first groove G1 can be the same circle, and, in the scenario including multiple (e.g., 4) first grooves G1, the shape of the area enclosed by the multiple first grooves G1 can also be the same circle.

[0157] In summary, embodiments of the present disclosure provide a light-emitting unit. The light-emitting unit includes: a substrate; an epitaxial layer located on one side of the substrate; a first trench extending through the epitaxial layer and extending through the epitaxial layer; a second trench located between the epitaxial layer and the substrate to expose the substrate; a first insulating layer located on the side of the epitaxial layer away from the substrate and covering the inner wall of the first trench; a conductive layer located on the side of the first insulating layer away from the substrate and extending through the first trench into the second trench; a second insulating layer located on the side of the conductive layer away from the substrate; and first and second solder pads electrically connected to the conductive layer and a current spreading layer in the epitaxial layer, respectively, via vias extending through the insulating layer and the insulating layer. In this manner, the first and second solder pads can reliably provide a driving current to the two semiconductor layers stacked in the epitaxial layer through the conductive layer and the current spreading layer, respectively, so that the light-emitting layer sandwiched between the two semiconductor layers reliably emits light. As can be seen, the driving current in the light-emitting unit can flow vertically, i.e., the light-emitting unit has the advantages of uniform current distribution and good heat dissipation of a vertical LED, while also having a non-vertical LED structure, eliminating the need for substrate stripping. Furthermore, the light-emitting unit has a good manufacturing yield.

[0158] FIG5 is a flow chart of a method for preparing a light-emitting unit according to an embodiment of the present disclosure, wherein the method is used to prepare a light-emitting unit as shown in any one of FIG1 to FIG4. As shown in FIG5, the method includes:

[0159] Step 501: Obtain a substrate.

[0160] Step 502: forming a sacrificial layer and an epitaxial layer in sequence on a substrate, wherein the formed epitaxial layer includes a current spreading layer.

[0161] Step 503 : forming at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer.

[0162] Step 504 : forming a first insulating layer. The formed first insulating layer is located on a side of the epitaxial layer away from the substrate and covers an inner wall of at least one first trench.

[0163] Step 505: remove at least part of the sacrificial layer to form at least one second trench that penetrates the at least one first trench, so as to expose the substrate through the at least one first trench and the at least one second trench, and the orthographic projection of the at least one second trench formed on the substrate overlaps with the orthographic projection of the epitaxial layer on the substrate.

[0164] Step 506 : forming a conductive layer. The formed conductive layer is located on a side of the first insulating layer away from the substrate, extends through the at least one first trench into the at least one second trench, and contacts the substrate.

[0165] Step 507 : forming a second insulating layer on a side of the conductive layer away from the substrate.

[0166] Step 508 : forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer.

[0167] Step 509 , forming a first pad and a second pad spaced apart from each other on a side of the second insulating layer away from the substrate, wherein the first pad is electrically connected to the conductive layer through a first via, and the second pad is electrically connected to the current spreading layer through a second via.

[0168] Optionally, the preparation methods are described one by one by taking the light-emitting units shown in FIG. 1 to FIG. 4 as examples:

[0169] (1) For the light-emitting unit of the structure shown in FIG1 , the preparation method is as follows:

[0170] Step A1: Obtain a substrate.

[0171] Optionally, as described in the above embodiment, the obtained substrate 01 may include: a sapphire substrate.

[0172] Step A2: forming a sacrificial film layer and an epitaxial film layer in sequence on the substrate.

[0173] Optionally, in the embodiment of the present disclosure, a sacrificial film layer may be first grown on the obtained substrate, and then an epitaxial film layer may be continuously grown on the side of the sacrificial film layer away from the substrate.

[0174] For example, Figure 6A shows a schematic structural diagram of a substrate 01 obtained and a sacrificial film layer 006 and an epitaxial film layer 002 sequentially formed thereon. A top view (see Figure a) and a cross-sectional view of the top view taken along the nn' direction (see Figure b) are also shown. The same principles apply to the drawings shown in the following embodiments and will not be further described.

[0175] Referring to FIG. 6A , it can be seen that the formed epitaxial film layer 002 includes a current spreading film layer 0021, and a first semiconductor film layer 0022, a light-emitting film layer 0023, and a second semiconductor film layer 0024, which are located between the current spreading film layer 0021 and the substrate 01 and stacked sequentially in a direction away from the substrate 01. The orthographic projection of the formed epitaxial film layer 002 on the substrate 01 overlaps with the orthographic projection of the sacrificial film layer 006 on the substrate 01, and the edges of the epitaxial film layer 002, the edges of the sacrificial film layer 006, and the edges of the substrate 01 coincide.

[0176] Step A3: Based on the shape of the light-emitting unit to be formed, the sacrificial film layer and the epitaxial film layer are removed from the portions close to the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence.

[0177] Optionally, in the embodiment of the present disclosure, in combination with Figure 6A, an etching process can be used to etch the portions of the formed sacrificial film layer 006 and the epitaxial film layer 002 close to the edge of the substrate 01 to remove the portions of the sacrificial film layer 006 and the epitaxial film layer 002 close to the edge of the substrate 01, thereby forming sacrificial layers and epitaxial layers stacked in sequence.

[0178] For example, Figure 6B shows a schematic diagram of the structure of a sacrificial layer 06 and an epitaxial layer 02 stacked sequentially after removing portions of the sacrificial film layer 006 and the epitaxial film layer 002 near the substrate edge, including a top view (a) and a cross-sectional view (b). Combining Figures 6A and 6B , it can be seen that, based on the epitaxial film layer 002 comprising a first semiconductor film layer 0022, a light-emitting film layer 0023, a second semiconductor film layer 0024, and a current spreading film layer 0021 stacked sequentially, the epitaxial layer 02 formed, in addition to the current spreading layer 021, may also include: a first semiconductor layer 022, a light-emitting layer 023, and a second semiconductor layer 024, located between the current spreading layer 021 and the substrate 01 and stacked sequentially in a direction away from the substrate 01. Because sacrificial layer 06 and epitaxial layer 02 are obtained by removing the edge portions of sacrificial film layer 006 and epitaxial film layer 002, as can be seen in conjunction with FIG6B , the orthographic projection of sacrificial layer 06 on substrate 01 and the orthographic projection of epitaxial layer 02 on substrate 01 can overlap and be surrounded by substrate 01. This step can be called step etching to define pixels.

[0179] Step A4: forming at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer.

[0180] Optionally, in the disclosed embodiment, referring to FIG6B , an etching process can be used to etch the epitaxial layer 02 to form at least one first trench G1 that penetrates the epitaxial layer 02 and exposes the sacrificial layer 06. Furthermore, the number of first trenches G1 formed is positively correlated with the size of the desired light-emitting unit, and the shape and arrangement of the first trenches G1 match the shape of the desired light-emitting unit. In other words, the first trenches G1 can be arranged based on the size and shape of the light-emitting unit.

[0181] For example, FIG6C shows a schematic diagram of a structure for forming first trenches G1 that penetrate the epitaxial layer 02 and expose the sacrificial layer 06, including a top view (a) and a cross-sectional view (b). Referring to FIG6C , it can be seen that four first trenches G1 are formed, each of which is circular in shape, and the area enclosed by the four first trenches G1 is rectangular. Furthermore, the four first trenches G1 are evenly distributed. Of course, this is merely a schematic illustration.

[0182] Step A5: forming a first insulating layer.

[0183] Optionally, in the embodiment of the present disclosure, in combination with Figure 6C, a composition process can be used to form a first insulating layer located on the side of the epitaxial layer 02 away from the substrate 01 and covering the inner wall of at least one first trench G1 to ensure that no short circuit occurs between the first semiconductor layer 022 and the second semiconductor layer 024.

[0184] For example, FIG6D shows a schematic structural diagram of a formed first insulating layer 03, including a top view a and a cross-sectional view b.

[0185] Step A6: removing a portion of the sacrificial layer between the at least one first trench and the substrate to form at least one second trench penetrating the at least one first trench.

[0186] 6D , an etching process may be used to etch the portion of the sacrificial layer 06 between the at least one first trench G1 and the substrate 01 to remove at least a portion of the sacrificial layer 06. This step may also be referred to as sacrificial layer etching.

[0187] For example, FIG6E shows a schematic diagram of a structure in which a portion of the sacrificial layer 06 is removed to form a second trench G2, including a top view a and a cross-sectional view b. Combining FIG6D and FIG6E , it can be seen that since four first trenches G1 are formed, four second trenches G2 can be formed correspondingly to the four first trenches G1. Each of the first trenches G1 and the second trenches G2 that pass through exposes the substrate 01, and the orthographic projection of each second trench G2 on the substrate 01 overlaps with the orthographic projection of the epitaxial layer 02 (which can be the first semiconductor layer 022 therein) on the substrate 01.

[0188] In addition, in conjunction with the above-mentioned embodiments, the remaining sacrificial layer 06 can be referred to as a sacrificial layer pattern 06M. Since only a portion of the sacrificial layer 06 is removed, the remaining sacrificial layer pattern 06M can serve as a support layer to prevent the remaining portion from collapsing after the sacrificial layer 06 is removed, thereby ensuring a good yield of the fabricated light-emitting unit.

[0189] Step A7: forming a conductive layer.

[0190] Optionally, in the disclosed embodiment, referring to FIG6E , a conductive material may be filled from the side of the first insulating layer 03 away from the substrate 01 into the at least one first trench G1 and the at least one second trench G2 to form a conductive layer. The conductive material may include a transparent conductive material. The types of transparent conductive materials are described in the above-described structural embodiment and are not further described here.

[0191] For example, Figure 6F shows a schematic diagram of the structure of a formed conductive layer, including a top view (a) and a cross-sectional view (b). Referring to Figure 6F , it can be seen that the formed conductive layer 04 can be located on the side of the first insulating layer 03 away from the substrate 01, and can extend through at least one first trench G1 into at least one second trench G2, thereby contacting the substrate 01. That is, referring to the structural embodiment, the formed conductive layer 04 can include: a first conductive block 041 and a second conductive block 042.

[0192] The first conductive block 041 may be filled in the second trench G2. The second conductive block 042 may be located on the side of the first insulating layer 03 away from the substrate 01 and may be filled in a trench G1. The second conductive block 042 may be electrically connected to the first conductive block 041 through the first trench G1 to ensure better conductivity.

[0193] Step A8: forming a first sub-via hole penetrating the first insulating layer and exposing the current spreading layer.

[0194] 6F , the first insulating layer 03 can be etched by an etching process to form a first sub-via hole that penetrates the first insulating layer and exposes the current spreading layer 021. Alternatively, when the first insulating layer 03 is formed by a patterning process, the first sub-via hole can be directly opened through a mask.

[0195] For example, Figure 6G shows a schematic diagram of the structure of a first sub-via K21, including a top view (a) and a cross-sectional view (b). Depending on the process, in some embodiments, the first insulating layer 03 having the first sub-via K21 can be formed directly before forming the second trench G2, i.e., in step A5 above; or the first sub-via K21 can be formed after forming the conductive layer 04, i.e., after step A7 above.

[0196] Step A9: forming a conductive electrode in the first sub-via hole.

[0197] 6G , it can be seen that the conductive electrode Pad21 is formed in the first sub-via K21. The conductive electrode Pad21 can be electrically connected to the current spreading layer O21 through the first sub-via K21. For the structure shown in FIG1 , in which the conductive electrode Pad21 and the conductive layer O4 are located in different layers, as described in this embodiment, the conductive electrode Pad21 can be formed after the conductive layer O4 is formed.

[0198] Optionally, as described in the above structural side embodiment, the conductive electrode Pad21 can be a P electrode. Accordingly, step A9 can also be called a P electrode manufacturing step. The material of the manufactured P electrode can refer to the description in the above structural side embodiment and will not be repeated here.

[0199] Step A10: forming a second insulating layer on a side of the conductive layer away from the substrate.

[0200] 6H shows a schematic structural diagram of a formed second insulating layer 05, including a top view a and a cross-sectional view b. Optionally, as described in the above embodiment, the second insulating layer 05 can be a DBR layer.

[0201] Step A11: forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second sub-via hole penetrating the second insulating layer and communicating with the first sub-via hole, to obtain a second via hole including the first sub-via hole and the second sub-via hole.

[0202] 6H , which further shows the formed first via hole K1 and the second sub-via hole K22 . Alternatively, the insulating layer may be etched by an etching process to obtain the via hole.

[0203] Step A12: forming a first pad on a side of the second insulating layer away from the substrate, and forming a pad body on a side of the second insulating layer away from the substrate, to obtain a second pad including the pad body and a conductive electrode.

[0204] For example, FIG6I shows a schematic structural diagram of the formed first pad Pad1 and the pad body Pad22, including a top view a and a cross-sectional view b.

[0205] Referring to FIG6I , it can be seen that the formed first pad Pad1 can be electrically connected to the conductive layer 04 via the first via K1, and the formed pad body Pad22 can be electrically connected to the conductive electrode Pad21 via the second sub-via K22, resulting in a second pad Pad2 comprising the conductive electrode Pad21 and the pad body Pad22. In other words, the first pad Pad1 can be fabricated and electrically connected to the conductive layer 04 via the first via K1, allowing the drive signal to be transmitted from the first pad Pad1 to the first semiconductor layer 022 via the conductive layer 04. Furthermore, a second pad Pad2, spaced apart from the first pad Pad1, can be fabricated and electrically connected to the current spreading layer 021, allowing the drive signal to be transmitted from the second pad Pad2 to the second semiconductor layer 024 via the current spreading layer 021. Consequently, the light-emitting layer 023 located between the first semiconductor layer 022 and the second semiconductor layer 024 can reliably emit light.

[0206] Optionally, as described in the above structural embodiment, the first pad Pad1 may be an N-Pad, and the second pad Pad2 may be a P-Pad. Step A12 may also be referred to as a step for fabricating the N-Pad and the P-Pad.

[0207] (2) For the light-emitting unit shown in FIG2 , the preparation method is as follows:

[0208] Step B1: Obtain a substrate.

[0209] Optionally, you can refer to the record of step A1 above and will not repeat it here.

[0210] Step B2: forming a sacrificial film layer and an epitaxial film layer in sequence on the substrate.

[0211] Optionally, you can refer to the record of step A2 above and will not repeat it here.

[0212] Step B3: Based on the shape of the light-emitting unit to be formed, remove the sacrificial film layer and the epitaxial film layer near the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence.

[0213] Optionally, you can refer to the record of step A3 above and will not repeat it here.

[0214] Step B4: forming a support layer and at least one first trench that sequentially penetrates the support layer and the epitaxial layer and exposes the sacrificial layer.

[0215] For example, Figure 7A shows a schematic diagram of the structure of the formed support layer 07 and the first trench G1, including a top view (a) and a cross-sectional view (b). Referring to Figure 7A , it can be seen that the formed support layer 07 can be located on the side of the epitaxial layer 02 away from the substrate 01, and can cover the sidewalls of the epitaxial layer 02 and the sacrificial layer 06 near the edge of the substrate 01, and can be in contact with the substrate 01.

[0216] Optionally, in some embodiments, referring to the description of step A4 above, a first trench G1 penetrating the epitaxial layer 02 may be formed first, and then the support layer 07 may be formed at the position shown in FIG7A . Alternatively, in some embodiments, after forming the epitaxial layer 02 and the support layer 07, the epitaxial layer 02 and the support layer 07 may be etched simultaneously to form the first trench G1 penetrating the epitaxial layer 02 and the support layer 07 in sequence, thereby obtaining the support layer 07 with the structure shown in FIG7A .

[0217] Optionally, as described in the above structural embodiment, the material of the support layer 07 may include an insulating material. The support layer 07 may play a supporting role so that subsequent preparation processes can be carried out reliably.

[0218] Step B5: forming a first insulating layer.

[0219] Optionally, you can refer to the record of step A5 above and will not repeat it here.

[0220] For example, FIG7B shows a schematic structural diagram of the formed first insulating layer 03, including a top view a and a cross-sectional view b. Referring to FIG7B , it can be seen that when forming the support layer 07, the formed first insulating layer 03 can be located on the side of the support layer 07 away from the substrate 01 and can cover the inner wall of at least one first trench G1.

[0221] Optionally, in some embodiments, because the material of the support layer 07 also includes an insulating material, the first insulating layer 03 and the support layer 07 can be formed simultaneously to form an integral structure. It should be noted that in this scenario, it is necessary to first form the first trench G1 through the epitaxial layer 02, and then form the first insulating layer 03 and the support layer 07 in an integral structure at the position shown in Figure 7B.

[0222] Step B6: removing all sacrificial layers to form a second trench penetrating the at least one first trench.

[0223] Optionally, you can refer to the record of step A6 above and will not repeat it here.

[0224] For example, FIG7C shows a schematic diagram of a structure in which a second trench G2 is formed after removing all sacrificial layers 06, including a top view a and a cross-sectional view b. Referring to FIG7C , it can be seen that the formed second trench G2 can penetrate each first trench G1 and simultaneously expose the substrate 01.

[0225] Although the entire sacrificial layer 06 is removed in this embodiment, the pre-formed support layer 07 ensures a stable structure after the sacrificial layer 06 is removed. In other words, due to the presence of the support layer 07, the entire sacrificial layer 06 can be removed, and the resulting light-emitting unit does not include a sacrificial layer or sacrificial layer pattern. Referring to FIG. 6I , it can be seen that when only a portion of the sacrificial layer 06 is removed, the remaining sacrificial layer pattern 06M can still provide the same support function, eliminating the need for an additional support layer 07. Of course, in some embodiments, an additional support layer 07 can be provided while only a portion of the sacrificial layer 06 is removed to ensure even greater stability.

[0226] Step B7: forming a conductive layer.

[0227] Optionally, you can refer to the record of step A7 above and will not repeat it here.

[0228] For example, FIG7D shows a schematic structural diagram of a formed conductive layer 04, including a top view a and a cross-sectional view b.

[0229] Step B8: forming a first sub-via hole penetrating the first insulating layer and the supporting layer and exposing the current spreading layer.

[0230] It should be noted that, since in this embodiment, a support layer 07 is also formed between the first insulating layer 03 and the current spreading layer 021, in combination with Figure 7D, the first insulating layer 03 and the support layer 07 can be etched to form a first sub-via that penetrates the first insulating layer 03 and the support layer 07 and exposes the current spreading layer 021.

[0231] 7E shows a schematic structural diagram of a first sub-via K21, including a top view a and a cross-sectional view b. It should be noted that the sequence of steps for forming the first sub-via K21 in this embodiment can refer to the description of step A8 above and will not be repeated here.

[0232] Step B9: forming a conductive electrode in the first sub-via hole.

[0233] Optionally, you can refer to the record of step A9 above and will not elaborate on it. This step can also be called the P-electrode manufacturing step.

[0234] 7E , it can be seen that the conductive electrode Pad 21 is also formed. In this embodiment, the conductive electrode Pad 21 and the conductive layer 04 are also located in different layers and formed in different stages.

[0235] Step B10: forming a second insulating layer on a side of the conductive layer away from the substrate.

[0236] Optionally, you can refer to the record of step A10 above and will not repeat it here.

[0237] For example, FIG7F shows a schematic structural diagram of the formed second insulating layer 05 , including a top view a and a cross-sectional view b.

[0238] Step B11: forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second sub-via hole penetrating the second insulating layer and communicating with the first sub-via hole, to obtain a second via hole including the first sub-via hole and the second sub-via hole.

[0239] Optionally, you can refer to the record of step A11 above and will not repeat it here.

[0240] For example, referring to FIG. 7F , it can be seen that the formed first via hole K1 and the second sub-via hole K22 are also shown.

[0241] Step B12: forming a first pad on a side of the second insulating layer away from the substrate, and forming a pad body on a side of the second insulating layer away from the substrate, to obtain a second pad including the pad body and a conductive electrode.

[0242] Optionally, reference may be made to the description of step A12 above, which will not be repeated here, and may also be referred to as the steps for making N-Pad and P-Pad.

[0243] For example, FIG7G shows a schematic structural diagram of the formed first pad Pad1 and the pad body Pad22, including a top view a and a cross-sectional view b.

[0244] (3) For the light-emitting unit shown in FIG3 , the preparation method is as follows:

[0245] Step C1: Obtain a substrate.

[0246] Optionally, you can refer to the record of step A1 above and will not repeat it here.

[0247] Step C2: forming a sacrificial film layer and an epitaxial film layer in sequence on the substrate.

[0248] Optionally, you can refer to the record of step A2 above and will not repeat it here.

[0249] Step C3: Based on the shape of the light-emitting unit to be formed, the sacrificial film layer and the epitaxial film layer are removed from the portions close to the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence.

[0250] Optionally, you can refer to the record of step A3 above and will not repeat it here.

[0251] Step C4: forming a support layer, and forming at least one first trench that sequentially penetrates the support layer and the epitaxial layer and exposes the sacrificial layer.

[0252] Optionally, the formation of the support layer may refer to the description of step B4 above, which will not be repeated here.

[0253] Step C5: forming a first insulating layer and a first sub-via hole that sequentially penetrates the first insulating layer and the supporting layer and exposes the current spreading layer.

[0254] Optionally, the formation of the first insulating layer can refer to the description of step A5 above, which will not be repeated here. The formation of the first sub-via can refer to the description of step B8 above, which will not be repeated here. That is, in this embodiment, the first sub-via can be formed simultaneously with the formation of the first insulating layer in a manner described above.

[0255] For example, FIG8A shows a schematic structural diagram of a first insulating layer 03 and a first sub-via K21 formed, including a top view a and a cross-sectional view b.

[0256] Step C6: removing all the sacrificial layers to form a second trench penetrating the at least one first trench.

[0257] Optionally, you can refer to the record of step B6 above and will not repeat it here.

[0258] For example, FIG8B shows a schematic structural diagram of a formed second trench G2, including a top view a and a cross-sectional view b.

[0259] Step C7: forming a conductive layer and simultaneously forming a conductive electrode.

[0260] Optionally, the method for forming the conductive layer can refer to the description of step A7 above and will not be repeated here. The method for forming the conductive electrode can refer to the description of step A9 above and will not be repeated here. That is, unlike the above embodiment, in this embodiment, the conductive layer and the conductive electrode can be formed simultaneously. Accordingly, the formed conductive layer and the conductive electrode can be located on the same layer as shown in Figure 3.

[0261] For example, FIG8C shows a schematic structural diagram of a conductive layer 04 and a conductive electrode Pad21 formed simultaneously, including a top view a and a cross-sectional view b.

[0262] Step C8: forming a second insulating layer on a side of the conductive layer away from the substrate.

[0263] Optionally, you can refer to the record of step A10 above and will not repeat it here.

[0264] For example, FIG8D shows a schematic structural diagram of the formed second insulating layer 05, including a top view a and a cross-sectional view b.

[0265] Step C9: forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second sub-via hole penetrating the second insulating layer and communicating with the first sub-via hole, thereby obtaining a second via hole including the first sub-via hole and the second sub-via hole.

[0266] Optionally, you can refer to the record of step A11 above and will not repeat it here.

[0267] For example, referring to FIG. 8D , it can be seen that the formed first via hole K1 and the second sub-via hole K22 are also shown.

[0268] Step C10: forming a first pad on a side of the second insulating layer away from the substrate, and forming a pad body on a side of the second insulating layer away from the substrate, to obtain a second pad including the pad body and a conductive electrode.

[0269] Optionally, reference may be made to the description of step A12 above, which will not be repeated here, and may also be referred to as the steps for making N-Pad and P-Pad.

[0270] For example, FIG8E shows a schematic structural diagram of the formed first pad Pad1 and the pad body Pad22, including a top view a and a cross-sectional view b.

[0271] (4) For the light-emitting unit shown in FIG4 , the preparation method is as follows:

[0272] Step D1: Obtain a substrate.

[0273] Optionally, you can refer to the record of step A1 above and will not repeat it here.

[0274] Step D2: forming a sacrificial film layer and an epitaxial film layer in sequence on the substrate.

[0275] Optionally, you can refer to the record of step A2 above and will not repeat it here.

[0276] Step D3: Based on the shape of the light-emitting unit to be formed, the sacrificial film layer and the epitaxial film layer are removed from the portion close to the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence.

[0277] Optionally, you can refer to the record of step A3 above and will not repeat it here.

[0278] Step D4: forming a support layer and at least one first trench that sequentially penetrates the support layer and the epitaxial layer and exposes the sacrificial layer.

[0279] Optionally, you can refer to the record of step B4 above and will not repeat it here.

[0280] Step D5: forming a first insulating layer.

[0281] Optionally, you can refer to the record of step A5 above and will not repeat it here.

[0282] Step D6: removing all the sacrificial layers to form a second trench penetrating the at least one first trench.

[0283] Optionally, you can refer to the record of step A6 above and will not repeat it here.

[0284] Step D7: forming a conductive layer.

[0285] Optionally, you can refer to the record of step A7 above and will not repeat it here.

[0286] Step D8: forming a second insulating layer on a side of the conductive layer away from the substrate.

[0287] Optionally, you can refer to the record of step A10 above and will not repeat it here.

[0288] For example, FIG9A shows a schematic structural diagram of the formed second insulating layer 05 , including a top view a and a cross-sectional view b.

[0289] Step D9: forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer.

[0290] Optionally, the method for forming the first via hole can refer to the description of the above step A11. In addition, in this implementation, after forming the second insulating layer 05, the second insulating layer and the first insulating layer can be etched together to form a second via hole that penetrates the second insulating layer and the first insulating layer and exposes the current spreading layer at one time. Of course, in some other embodiments, the methods described in (1) to (3) above can also be referred to. At different stages, the first sub-via hole K21 that penetrates the first insulating layer 03 and the second sub-via hole K22 that penetrates the second insulating layer 05 are sequentially formed to obtain the second via hole K2 including the first sub-via hole K21 and the second sub-via hole K22.

[0291] For example, referring to FIG. 9A , it can be seen that the formed first via hole K1 and the second via hole K2 are also shown.

[0292] Step D10: forming a first pad and a second pad spaced apart from each other on a side of the second insulating layer away from the substrate.

[0293] For example, FIG9B shows a schematic diagram of the structure of the formed first pad Pad1 and second pad Pad2, including a top view (a) and a cross-sectional view (b). Referring to FIG9B , it can be seen that in this implementation, the second pad Pad2 can be directly formed and electrically connected to the current spreading layer 021 through the second via K2, without forming the conductive electrode Pad21. That is, the formed first pad Pad1 can be electrically connected to the conductive layer 04 through the first via K1, and the formed second pad Pad2 can be electrically connected to the current spreading layer 021 through the second via K2. This simplifies the manufacturing process and saves costs.

[0294] That is, for the embodiments described in (1) to (3) above, forming the second via hole K2 that sequentially penetrates the second insulating layer 05 and the first insulating layer 03 and exposes the current spreading layer 021 may include:

[0295] First, before forming the second insulating layer 05 , a first sub-via hole K21 is formed penetrating the first insulating layer 03 and exposing the current spreading layer 021 .

[0296] Then, after forming the second insulating layer 05 , a second sub-via hole K22 is formed that penetrates the second insulating layer 05 and is connected to the first sub-via hole K21 , thereby obtaining a second via hole K2 including the first sub-via hole K21 and the second sub-via hole K22 .

[0297] Furthermore, forming a second pad Pad2 on a side of the second insulating layer 05 away from the substrate 01 may include:

[0298] First, before forming the second insulating layer 05 , a conductive electrode Pad21 is formed in the first sub-via hole K21 , and the formed conductive electrode Pad21 is electrically connected to the current spreading layer 021 through the first sub-via hole K21 .

[0299] Then, after forming the second insulating layer 05, a pad body Pad22 is formed on the side of the second insulating layer 05 away from the substrate 01, and the formed pad body Pad22 is electrically connected to the conductive electrode Pad21 through the second sub-via K22, thereby obtaining a second pad Pad2 including the conductive electrode Pad21 and the pad body Pad22.

[0300] For the embodiment shown in (4) above, as shown in FIG5 , a second via K2 can be directly formed, which penetrates the second insulating layer 05 and the first insulating layer 03 in sequence and exposes the current spreading layer 021, without distinguishing between the first sub-via K21 and the second sub-via K22. Furthermore, a second pad Pad2 can be formed and electrically connected directly to the current spreading layer 021 through the second via K2, without forming a conductive electrode Pad21.

[0301] Furthermore, in the scenario of forming the conductive electrode Pad21: for the embodiments described in (1) and (2) above, forming the conductive electrode Pad21 in the first sub-via K21 may include: forming the conductive electrode Pad21 in the first sub-via K21 after forming the conductive layer 04. And for the embodiment described in (3) above, forming the conductive electrode Pad21 in the first sub-via K21 may include: forming the conductive electrode Pad21 in the first sub-via K21, i.e., forming the conductive electrode Pad21 in the same layer as the conductive layer 04, in the first sub-via K21 simultaneously with forming the conductive layer 04. This simplifies the process and saves costs.

[0302] In summary, embodiments of the present disclosure provide a method for fabricating a light-emitting unit. The light-emitting unit fabricated by this method includes: a substrate; an epitaxial layer located on one side of the substrate; a first trench extending through the epitaxial layer and extending through the epitaxial layer; a second trench located between the epitaxial layer and the substrate to expose the substrate; a first insulating layer located on the side of the epitaxial layer away from the substrate and covering the inner wall of the first trench; a conductive layer located on the side of the first insulating layer away from the substrate and extending through the first trench into the second trench; a second insulating layer located on the side of the conductive layer away from the substrate; and first and second solder pads electrically connected to the conductive layer and a current spreading layer in the epitaxial layer, respectively, via vias extending through the insulating layer and the insulating layer. In this manner, the first and second solder pads can reliably provide a driving current to the two semiconductor layers stacked in the epitaxial layer through the conductive layer and the current spreading layer, respectively, so that the light-emitting layer sandwiched between the two semiconductor layers reliably emits light. As can be seen, the driving current in the fabricated light-emitting unit can flow vertically, meaning that the fabricated light-emitting unit has the advantages of a vertical LED while also having a non-vertical LED structure, eliminating the need for substrate stripping. Furthermore, the fabrication yield of the light-emitting unit is high.

[0303] FIG10 is a schematic structural diagram of a display panel provided by an embodiment of the present disclosure. As shown in FIG10 , the display panel includes: a driving backplane 10 and a plurality of light-emitting units 00 as shown in any one of FIG1 to FIG4 .

[0304] The driving backplane 10 is coupled to the light emitting unit 00 and is used to drive the light emitting unit 00 to emit light.

[0305] Since the display panel can have substantially the same technical effects as the light-emitting unit described in the previous embodiment, the technical effects of the display panel will not be repeatedly described here for the purpose of brevity.

[0306] FIG11 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure. As shown in FIG11 , the display device includes: a power supply component 100 and a display panel 000 as shown in FIG10 .

[0307] The power supply component 100 is coupled to the display panel 000 and is used to supply power to the display panel 000 .

[0308] Since the display device can have substantially the same technical effects as the light-emitting unit described in the previous embodiment, the technical effects of the display panel will not be repeatedly described here for the purpose of brevity.

[0309] It should be noted that the terms used in the examples of this disclosure are only used to explain the examples and are not intended to limit the present disclosure. Unless otherwise defined, technical terms or scientific terms used in the embodiments of this disclosure should have the common meanings understood by people with ordinary skills in the field to which this disclosure belongs.

[0310] For example, the words "first", "second" or "third" and similar words used in the patent application specification and claims of this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components.

[0311] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.

[0312] Words such as “include” or “comprising” mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.

[0313] "Up," "down," "left," or "right" are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly. "Connected" or "coupled" refers to an electrical connection.

[0314] "And / or" indicates that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the related objects are in an "or" relationship.

[0315] The above description is merely an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A light-emitting unit, comprising: substrate; An epitaxial layer, located on one side of the substrate, and the epitaxial layer includes a current spreading layer; at least one first trench and at least one second trench penetrating and exposing the substrate, wherein the at least one first trench penetrates the epitaxial layer, and the at least one second trench is located between the epitaxial layer and the substrate, and an orthographic projection of the epitaxial layer on the substrate overlaps with an orthographic projection of the epitaxial layer on the substrate; A first insulating layer, located on a side of the epitaxial layer away from the substrate and covering an inner wall of the at least one first trench; a conductive layer, located on a side of the first insulating layer away from the substrate, extending through the at least one first trench into the at least one second trench, and contacting the substrate; A second insulating layer, located on a side of the conductive layer away from the substrate; a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer; A first pad and a second pad are located on a side of the second insulating layer away from the substrate and are spaced apart from each other, the first pad is electrically connected to the conductive layer through the first via hole, and the second pad is electrically connected to the current spreading layer through the second via hole.

2. The light emitting unit according to claim 1, wherein: The light emitting unit further comprises: The sacrificial layer pattern is located between the substrate and the epitaxial layer and has the at least one second trench exposing the substrate.

3. The light emitting unit according to claim 1, wherein: The light emitting unit further comprises: A support layer, located on a side of the epitaxial layer away from the substrate, between the current spreading layer and the first insulating layer, covering a side wall of the epitaxial layer close to an edge of the substrate, and in contact with the substrate; Furthermore, the at least one first trench sequentially penetrates the support layer and the epitaxial layer, and the first insulating layer is located on a side of the support layer away from the substrate and covers an inner wall of the at least one first trench.

4. The light emitting unit according to claim 3, wherein: The material of the support layer includes: insulating material.

5. The light emitting unit according to any one of claims 1 to 4, wherein: The second via hole includes: a first sub-via hole and a second sub-via hole that are connected, and the first sub-via hole passes through the first insulating layer and exposes the current spreading layer, and the second sub-via hole passes through the second insulating layer; the second pad includes: a conductive electrode and a pad body; The conductive electrode is located in the first sub-via and is electrically connected to the current spreading layer through the first sub-via; the pad body is located on a side of the second insulating layer away from the substrate and is electrically connected to the conductive electrode through the second sub-via.

6. The light emitting unit according to claim 5, wherein: The conductive electrode and the conductive layer are located in the same layer.

7. The light emitting unit according to any one of claims 1 to 6, wherein: The conductive layer comprises: a first conductive block and a second conductive block; The first conductive block is filled in the at least one second groove, the second conductive block is located on the side of the first insulating layer away from the substrate, filled in the at least one first groove, and electrically connected to the first conductive block through the at least one first groove.

8. The light emitting unit according to any one of claims 1 to 7, wherein: The light-emitting unit also satisfies any of the following conditions: The epitaxial layer includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer, which are located between the current spreading layer and the substrate and are sequentially stacked in a direction away from the substrate; The first pad includes: an N-type pad; the second pad includes: a P-type pad; The substrate comprises: a sapphire substrate; The second insulating layer includes a distributed Bragg reflector.

9. A method for preparing a light-emitting unit, for preparing the light-emitting unit according to any one of claims 1 to 8, the method comprising: obtaining a substrate; forming a sacrificial layer and an epitaxial layer in sequence on the substrate, wherein the formed epitaxial layer includes a current spreading layer; forming at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer; forming a first insulating layer, wherein the formed first insulating layer is located on a side of the epitaxial layer away from the substrate and covers an inner wall of the at least one first trench; removing at least a portion of the sacrificial layer, forming at least one second trench penetrating the at least one first trench, so as to expose the substrate through the at least one first trench and the at least one second trench penetrating therethrough, and an orthographic projection of the at least one second trench formed on the substrate overlaps with an orthographic projection of the epitaxial layer on the substrate; forming a conductive layer, wherein the formed conductive layer is located on a side of the first insulating layer away from the substrate, extends through the at least one first trench into the at least one second trench, and contacts the substrate; forming a second insulating layer on a side of the conductive layer away from the substrate; forming a first via hole penetrating the second insulating layer and exposing the conductive layer, and a second via hole penetrating the second insulating layer and the first insulating layer in sequence and exposing the current spreading layer; A first pad and a second pad spaced apart from each other are formed on a side of the second insulating layer away from the substrate, and the first pad is electrically connected to the conductive layer through the first via hole, and the second pad is electrically connected to the current spreading layer through the second via hole.

10. The method according to claim 9, wherein: The removing at least a portion of the sacrificial layer to form at least one second trench penetrating the at least one first trench comprises: A portion of the sacrificial layer between the at least one first trench and the substrate is removed to form at least one second trench penetrating the at least one first trench.

11. The method according to claim 9, wherein: Before forming the first insulating layer, the method further includes: Forming a support layer, wherein the formed support layer is located on a side of the epitaxial layer away from the substrate, covers the sidewalls of the epitaxial layer and the sacrificial layer close to the edge of the substrate, and contacts the substrate; The at least one first trench is formed to sequentially penetrate the support layer and the epitaxial layer and expose the sacrificial layer, and the first insulating layer is formed to be located on a side of the support layer away from the substrate and covers An inner wall of the at least one first groove.

12. The method according to claim 11, wherein: The removing at least a portion of the sacrificial layer to form at least one second trench penetrating the at least one first trench comprises: The entire sacrificial layer is removed to form a second trench penetrating the at least one first trench.

13. The method according to any one of claims 9 to 12, wherein: The removing at least part of the sacrificial layer comprises: At least a portion of the sacrificial layer is etched using an etching process to remove at least a portion of the sacrificial layer.

14. The method according to any one of claims 9 to 13, wherein: Forming a second via hole that sequentially penetrates the second insulating layer and the first insulating layer and exposes the current spreading layer, comprising: Before forming the second insulating layer, forming a first sub-via hole penetrating the first insulating layer and exposing the current spreading layer; After forming the second insulating layer, forming a second sub-via hole that penetrates the second insulating layer and is connected with the first sub-via hole, so as to obtain a second via hole including the first sub-via hole and the second sub-via hole; A second pad is formed on a side of the second insulating layer away from the substrate, comprising: Before forming the second insulating layer, forming a conductive electrode in the first sub-via hole, and the formed conductive electrode is electrically connected to the current spreading layer through the first sub-via hole; After forming the second insulating layer, a pad body is formed on a side of the second insulating layer away from the substrate, and the formed pad body is electrically connected to the conductive electrode through the second sub-via to obtain a second pad including the conductive electrode and the pad body.

15. The method according to claim 14, wherein: Forming a conductive electrode in the first sub-via hole, comprising: After forming the conductive layer, forming a conductive electrode in the first sub-via hole; or, While the conductive layer is being formed, a conductive electrode located at the same layer as the conductive layer is formed in the first sub-via hole.

16. The method according to any one of claims 9 to 15, wherein: The forming of at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer comprises: Etching the epitaxial layer using an etching process to form at least one first trench penetrating the epitaxial layer and exposing the sacrificial layer; Furthermore, the number of the formed first grooves is positively correlated with the size of the light-emitting unit to be formed, and the shape of the formed first grooves and the arrangement of the formed first grooves match the shape of the light-emitting unit to be formed.

17. The method according to any one of claims 9 to 16, wherein: The forming of the conductive layer comprises: Filling a conductive material into the at least one first trench and the at least one second trench from a side of the first insulating layer away from the substrate to form a conductive layer; Wherein, the conductive material includes: a transparent conductive material.

18. The method according to any one of claims 9 to 17, wherein: The step of sequentially forming a sacrificial layer and an epitaxial layer on the substrate comprises: A sacrificial film layer and an epitaxial film layer are sequentially formed on the substrate, wherein the epitaxial film layer includes: a current spreading film layer, and a first semiconductor film layer, a light-emitting film layer, and a second semiconductor film layer which are located between the current spreading film layer and the substrate and are sequentially stacked in a direction away from the substrate; Based on the shape of the light-emitting unit to be formed, the sacrificial film layer and the epitaxial film layer are removed near the edge of the substrate to form a sacrificial layer and an epitaxial layer stacked in sequence, and the epitaxial layer also includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer located between the current spreading layer and the substrate and stacked in sequence in a direction away from the substrate.

19. The method according to claim 18, wherein: The step of sequentially forming a sacrificial film layer and an epitaxial film layer on the substrate comprises: growing a sacrificial film layer on the substrate; An epitaxial film layer is grown on a side of the sacrificial film layer away from the substrate.

20. The method according to claim 18, wherein: The removing of the sacrificial film layer and the portion of the epitaxial film layer close to the edge of the substrate comprises: The sacrificial film layer and the epitaxial film layer are etched in portions close to the edge of the substrate by an etching process, so as to remove the sacrificial film layer and the epitaxial film layer in portions close to the edge of the substrate.

21. A display panel, comprising: A driving backplane, and a plurality of light-emitting units as claimed in any one of claims 1 to 8; The driving backplane is coupled to the light-emitting unit and is used to drive the light-emitting unit to emit light.

22. A display device, comprising: A power supply component, and a display panel as claimed in claim 21; Wherein, the power supply component is coupled to the display panel and is used to supply power to the display panel.

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