A full-digital hysteresis control method for sampling time online prediction of a three-level inductance-free inverter

Abstract

The present application relates to a kind of full digital hysteresis control method of inductance-free three-level inverter sampling time online prediction, belong to power electronic converter technical field, solve the dependence of full digital hysteresis control algorithm of three-level converter on high sampling rate, and the problem of being greatly influenced by main circuit filter parameter, it includes determining the mathematical model and modulation method of three-level converter, determining the full digital three-level hysteresis control algorithm of inductance-free sampling time online prediction, correction prediction sampling time interval.The full digital hysteresis control method is used for inductance-free three-level inverter hysteresis control simulation.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter technology, specifically relating to a fully digital hysteresis control method for online prediction of sampling time in a three-level inverter without inductance. Background Technology

[0002] With social progress and industrial development, the superior performance of power electronic devices in power transmission, distribution, and transformation has led to their widespread use across various industries. Power electronic converters based on new energy power generation have made significant contributions to solving the fossil fuel crisis and curbing environmental pollution. Furthermore, new electric vehicles, represented by Tesla and BYD, widely utilize power electronic converters to drive high-speed motors, achieving unparalleled performance and minimal emissions. In power electronic converters, besides the circuitry itself, the core factor enabling superior output performance lies in its control strategy. For over a century, classic power electronic converters have employed the traditional proportional-integral-derivative (PID) control strategy. Hysteresis control algorithms offer numerous advantages over traditional PID control algorithms: they can track arbitrary command signals, tracking error accuracy is controllable and adjustable, and the control bandwidth is extremely high. Therefore, they are widely used in applications such as new energy power generation, electric drives, harmonic suppression, noise filtering, and other applications that achieve power conversion, improve power quality, and provide electromagnetic protection. However, traditional digital hysteresis control relies on high sampling rates to achieve relatively accurate control, which significantly hinders improvements in control system frequency and equipment size. Furthermore, digital hysteresis control is highly sensitive to the converter's filter inductance parameters, exhibiting poor robustness and making it difficult to commercialize.

[0003] To address the issues of excessive reliance on sampling rates and significant influence from filters, especially filter inductors, in the fully digital hysteresis control strategy employed in power electronic converters, numerous research works and results have been proposed. Some studies have proposed a control strategy based on oversampling and virtual sampling to solve the problem of excessive reliance on sampling rates in digital hysteresis control methods. This strategy reduces the dependence of digital hysteresis control on high sampling rates through numerous repeated samplings and virtual sampling based on sampling characteristics. However, this method still results in a high sampling rate, large data storage requirements, and the reliability of the virtual sampled data needs further verification. Other studies have proposed online sampling time prediction algorithms to reduce the sampling rate and improve control accuracy and performance by predicting the sampling time interval of the next sampling point. However, these methods do not consider the nonlinear changes in the main circuit inductance caused by variations in power and output current, leading to a shift in prediction time and ultimately poor control performance. As a further improvement, some studies have proposed using error current at different stages to change the number of output levels of the power electronic converter, thereby improving the accuracy and dynamic response speed of hysteresis control. However, this method increases switching losses, makes the control process extremely complex, hinders productization, and increases costs. Therefore, a systematic study is needed on the fully digital hysteresis control strategy for power electronic converters, especially the widely used three-level converters. Summary of the Invention

[0004] To address the issues of dependence on high sampling rates and significant influence from main circuit filter parameters in the fully digital hysteresis control algorithm of three-level inverters, this invention proposes a fully digital hysteresis control method for online prediction of sampling time in three-level inverters without inductance.

[0005] The technical solution adopted by this invention to solve its technical problem is:

[0006] A fully digital hysteresis control method for online prediction of sampling time in a three-level inverter without inductance includes the following steps:

[0007] Step 1: Determine the mathematical model and modulation method of the three-level converter.

[0008] Based on Kirchhoff's voltage and current laws, a mathematical model of the three-level converter is calculated. Based on the modulation rules of the three-level converter's switching transistors, a working state table for the three-level converter is obtained. Through the modulation working state table of the three-level converter, the mathematical relationship between the rate of change of the inductor current in any phase of the three-level converter and the switching state of the corresponding phase bridge arm's switching transistor is derived. Through the control logic relationship at the intersection of the hysteresis control sampling point and the loop width, the mathematical relationship between the sampling time interval and the rate of change of current under fully digital hysteresis control is derived.

[0009] Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of inductance sampling time.

[0010] The main inductance parameters of the filter in a simplified three-level converter are used to derive the relationship between the hysteresis control loop width and the control frequency of the desired theoretical digital hysteresis control. The expressions for the command current, hysteresis control loop width, and their upper and lower boundaries at adjacent sampling times are obtained. The predicted sampling time interval is determined, and the relationship between the predicted sampling time value and the switching control quantity is determined.

[0011] Step 3, Correct the predicted sampling time interval

[0012] The predicted sampling time interval is corrected; the correction time is determined to obtain the fully digital hysteresis sampling time.

[0013] The aforementioned fully digital hysteresis control method, in step 1, determining the mathematical model and modulation method of the three-level converter, further includes:

[0014] In the mathematical model calculation of the three-level converter, the side inductance of any phase of the three-level converter... The calculation formula is as follows:

[0015] (1);

[0016] In equation (1), This represents the current in the inductor on the converter side. For the differential operation of the converter-side inductor current, This represents the PWM voltage at the converter-side port. This indicates the grid voltage on the grid side.

[0017] The mathematical relationship between the rate of change of inductor current in any phase of a three-level converter and the switching state of the corresponding phase arm switch is as follows:

[0018] (2);

[0019] In equation (2), This represents the rate of change of the inductor current in any phase on the converter side. This represents the total DC voltage on the DC side of the three-level converter. To control variables, , These represent the switching states of the switching transistors in any phase arm of a three-level converter. L represents the grid voltage on the grid side, and L is the inductance on the inverter side.

[0020] The mathematical relationship between the sampling time interval and the rate of change of current under all-digital hysteresis control is expressed as follows:

[0021] (3);

[0022] In equation (3), This indicates the sampling time interval for hysteresis control. Indicates the first The upper bound of the hysteresis control loop width at the sampling time. Indicates the first under digital control Next sampling time The loop width for hysteresis control. Indicates the command current, i.e., the first The target current size to be output at any given time. Indicates the first The rate of change of the converter-side inductor current at the sampling time. Indicates the first The actual current value sampled at the converter side at the sampling time.

[0023] The aforementioned fully digital hysteresis control method, in step 2, determining the fully digital three-level hysteresis control algorithm for online prediction of the sampling time of the inductorless quantity, further includes:

[0024] The hysteresis control loop width should satisfy the following variation relationship:

[0025] (4);

[0026] In equation (4): Indicates the current The system of adjusting time, This indicates the total DC voltage value on the DC side of the three-level converter. This indicates the desired fixed target switching frequency. This indicates the AC side filter inductor.

[0027] The expressions for the command current, hysteresis control loop width, and its upper and lower boundaries at adjacent sampling times are as follows:

[0028] (5);

[0029] In equation (5), For the first The previous sampling point of the next sampling point This refers to the target desired output command current of the three-phase three-level converter. For the loop width of fully digital hysteresis control, This is the upper bound of the loop width for fully digital hysteresis control. This is the lower bound of the loop width for fully digital hysteresis control.

[0030] The predicted sampling time interval is expressed as follows:

[0031] (6);

[0032] In equation (6), The predicted sampling time interval.

[0033] The relationship between the predicted value of the sampling time and the switching control quantity is expressed as follows:

[0034] (7);

[0035] In equation (7), For digital hysteresis control, the desired fixed switching period is... For control variables.

[0036] The above-described fully digital hysteresis control method, step 3, correcting the prediction sampling time interval, further includes:

[0037] From the The timer starts counting from the next sampling time, after which... After the time The next sampling will yield the sampled current. With the The current obtained from the second sampling Perform the difference calculation and compare it with the loop width of the hysteresis control. Comparison. When At that time, there is no need to predict the sampling time interval. Perform corrections.

[0038] When the difference At this time, it is necessary to predict the sampling time interval. Perform corrections.

[0039] Determine the calibration time, and let If the error current is represented, then the correction time is expressed as:

[0040] (8);

[0041] The final online prediction algorithm for the sampling time of the inductorless quantity is expressed as follows:

[0042] (9);

[0043] In equation (9): .

[0044] The beneficial effects of this invention are:

[0045] A fully digital hysteresis control method for online prediction of sampling time in a three-level inverter without inductance is proposed. This method combines the mathematical model of the three-level inverter with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time prediction method. Through the prediction algorithm, the influence of the main circuit filter, especially the filter inductor, on the sampling time and sampling rate is offset. The algorithm corrects the sampling time prediction deviation and performs periodic iterative correction, thereby solving the problems of the fully digital hysteresis control algorithm of the three-level inverter being dependent on high sampling rates and greatly affected by the parameters of the main circuit filter. Attached Figure Description

[0046] Figure 1 It is the main circuit topology of a three-phase T-type three-level converter;

[0047] Figure 2 It is the main circuit topology of a three-phase type I three-level converter.

[0048] Figure 3 This is a schematic diagram of digital hysteresis control downsampling time prediction and correction;

[0049] Figure 4 This is the overall system control block diagram based on the online prediction of the sampling time of a three-level inverter without inductance;

[0050] Figure 5 This is a schematic diagram of the steady-state output waveform using the hysteresis control method of this invention.

[0051] Figure 6 This is an online prediction and correction diagram of the sampling time using the hysteresis control method of this invention. Detailed Implementation

[0052] The invention will now be described in more detail with reference to examples.

[0053] As attached Figure 1-4 As shown, this invention proposes a fully digital hysteresis control method for online prediction of sampling time in a three-level inverter without inductance. Specifically, it combines the mathematical model of the three-level inverter with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time prediction method. Through the prediction algorithm, the influence of the main circuit filter, especially the filter inductor, on the sampling time and sampling rate is offset. Furthermore, the algorithm corrects the sampling time prediction deviation by periodically iterating, thereby solving the problems of dependence on high sampling rates and significant influence from main circuit filter parameters in the fully digital hysteresis control algorithm of the three-level inverter. The steps are as follows:

[0054] Step 1: Determine the mathematical model and modulation method of the three-level converter.

[0055] Step 1.1, as follows Figure 1As shown, based on Kirchhoff's voltage and current laws, the mathematical model of the three-level converter is calculated. Taking any one phase of the three phases as an example (the other two phases are exactly the same), its expression is as follows:

[0056] ;

[0057] in, Indicates the inductance on the converter side. This represents the current in the inductor on the converter side. For the differential operation of the converter-side inductor current, This represents the PWM voltage at the converter-side port. This represents the grid voltage on the grid side. In establishing the mathematical model, based on the characteristics of the actual product, the inverter-side inductance is ignored. series equivalent resistance Furthermore, LCL filters typically have a grid-side inductor in their design. Therefore, the grid-side inductor The voltage drop across the device can also be ignored.

[0058] Step 1.2: Based on the modulation rules of the three-level converter switching transistors, its operating state table can be obtained. Taking any one phase of the three phases as an example (the other two phases are exactly the same), as shown in Table 1:

[0059] Table 1

[0060]

[0061] In the table, , , and These represent the switching states of the four switching transistors in any phase arm of a three-level converter, and... and They are and The logical inverse state. When When this indicates that the switch is on, This indicates that the switch is off. Indicates the grid voltage on the grid side. This represents the PWM voltage at the converter-side port of any phase in the three-phase output. This represents the rate of change of the inductor current on the converter side.

[0062] Step 1.3: Using the modulation relationship table of the three-level converter in Step 1.2, derive the mathematical relationship between the rate of change of inductor current in any phase on the converter side and the switching state of the corresponding phase bridge arm's switching transistor. The expression is as follows:

[0063] ;

[0064] In the formula, This represents the rate of change of the inductor current in any phase on the converter side. This represents the total DC voltage on the DC side of the three-level converter. For control variables.

[0065] Step 1.4: Based on the control logic relationship at the intersection of the hysteresis control sampling point and the loop width, the mathematical relationship between the sampling time interval and the rate of change of current under all-digital hysteresis control is derived, and its expression is as follows:

[0066] ;

[0067] In the formula, This indicates the sampling time interval for hysteresis control. Indicates the first The upper bound of the hysteresis control loop width at the sampling time. Indicates the first under digital control Next sampling time The loop width for hysteresis control. Indicates the command current, i.e., the first The target current value to be output at any time. Indicates the first The rate of change of the converter-side inductor current at the sampling time. Indicates the first The actual current value sampled at the converter side at the sampling time.

[0068] Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of inductance sampling time.

[0069] Step 2.1: For a three-phase three-level converter, regardless of whether its AC filter is L-type, LC-type, or LCL-type, the variation relationship that the hysteresis control loop width should satisfy when the theoretical digital hysteresis control control frequency is to be kept fixed can be derived by simplifying the main inductance parameters of the filter, as shown below:

[0070] ;

[0071] In the formula: Indicates the current The system of adjusting time, This indicates the total DC voltage value on the DC side of the three-level converter. This indicates the desired fixed target switching frequency. This indicates the AC side filter inductor.

[0072] Step 2.2: For a three-phase three-level converter, its switching frequency is usually much higher than the power grid frequency, while the digital hysteresis control loop width derived in Step 2.1... The frequency of change is only twice that of the power frequency. Therefore, it is assumed that within each switching cycle, the ring width... It remains unchanged. And the three-level converter typically uses its command current signal. This is also a power frequency component, so it remains constant within each switching cycle. From this, we can derive the expressions for the command current, hysteresis control loop width, and its upper and lower boundaries at adjacent sampling times:

[0073] ;

[0074] In the formula, For the first The previous sampling point of the next sampling point This refers to the target desired output command current of the three-phase three-level converter. For the loop width of fully digital hysteresis control, This is the upper bound of the loop width for fully digital hysteresis control. This is the lower bound of the loop width for fully digital hysteresis control.

[0075] Step 2.3, determine the predicted value for the sampling time, such as... Figure 2 As shown, step 2.2 determines the predicted sampling time interval, expressed as follows:

[0076] ;

[0077] In the formula, The predicted sampling time interval.

[0078] Step 2.4: Determine the relationship between the predicted sampling time value and the switching control quantity. Substitute the formulas obtained in Steps 1.3 and 2.1 into the predicted value of the sampling time interval in Step 2.3, and eliminate the influence of the filter parameters to obtain the following expression:

[0079] ;

[0080] In the formula, For digital hysteresis control, the desired fixed switching period is... For control variables.

[0081] Step 3, Correct the predicted sampling time interval

[0082] Step 3.1, from the first The timer starts counting from the next sampling time, after which... After the time The next sampling will yield the sampled current. With the The current obtained from the second sampling Perform the difference calculation and compare it with the loop width of the hysteresis control. Comparison. When At that time, there is no need to predict the sampling time interval. Perform corrections, such as Figure 3 As shown. When the difference At this time, it is necessary to predict the sampling time interval. Perform corrections.

[0083] Step 3.2, determine the calibration time, let If the error current is represented, then the correction time can be expressed as:

[0084] ;

[0085] The final online prediction algorithm for the sampling time of the inductorless quantity can be expressed as:

[0086] ;

[0087] in: , For control variables.

[0088] This invention combines the mathematical model of a three-phase three-level converter with the characteristics of its modulation strategy to obtain a fully digital hysteresis sampling time budgeting method. Through a prediction algorithm, the influence of the main circuit filter, especially the filter inductor, on the sampling time and sampling rate is offset. The algorithm performs sampling time prediction correction for the prediction result deviation and performs periodic iterative correction, thereby solving the problems of the fully digital hysteresis control algorithm of the three-level converter being dependent on high sampling rates and greatly affected by the parameters of the main circuit filter.

[0089] The fully digital hysteresis control method for online prediction of sampling time of a three-level inverter without inductance, as described in this invention, was verified in simulation software according to the above steps. Figure 5 , Figure 6 As shown, the simulation results prove that the method is correct and reliable, providing a valuable reference for engineering applications.

Claims

1. A fully digital hysteresis control method for online prediction of sampling time in a three-level inverter without inductance, characterized in that, Includes the following steps: Step 1: Determine the mathematical model and modulation method of the three-level converter: Based on Kirchhoff's voltage and current laws, a mathematical model of the three-level converter is calculated. Based on the modulation rules of the three-level converter's switching transistors, a three-level converter operating state table is obtained. Through the three-level converter's modulation operating state table, the mathematical relationship between the rate of change of inductor current in any phase of the three-level converter and the switching state of the corresponding phase bridge arm's switching transistor is derived. Through the control logic relationship at the intersection of the hysteresis control sampling point and the loop width, the mathematical relationship between the sampling time interval and the rate of change of current under fully digital hysteresis control is derived. Step 2: Determine the fully digital three-level hysteresis control algorithm for online prediction of sampling time without inductance: By simplifying the main inductance parameters of the filter in a three-level converter, the relationship between the hysteresis control loop width and the desired theoretical digital hysteresis control frequency is derived. The hysteresis control loop width should satisfy the following variation relationship: ； In the above formula: Indicates the current The system of adjusting time, This indicates the total DC voltage value on the DC side of the three-level converter. This indicates the desired fixed target switching frequency. This represents the AC side filter inductance, and E(t) is the grid voltage on the mains side. The expressions for the command current, hysteresis control loop width, and upper and lower boundaries at adjacent sampling times are as follows: ； In the above formula, For the first The previous sampling point of the next sampling point This refers to the target desired output command current of the three-phase three-level converter. For the loop width of fully digital hysteresis control, This is the upper bound of the loop width for fully digital hysteresis control. This is the lower bound of the loop width for fully digital hysteresis control. Determine the predicted sampling time interval; determine the relationship between the predicted sampling time value and the switching control quantity; Step 3, Correct the prediction sampling time interval: The predicted sampling time interval is corrected; the correction time is determined to obtain the fully digital hysteresis sampling time.

2. The fully digital hysteresis control method according to claim 1, characterized in that, Step 1, determining the mathematical model and modulation method of the three-level converter, further includes: In the mathematical model calculation of the three-level converter, the side inductance of any phase of the three-level converter... The calculation formula is as follows: ； In the above formula, This represents the current in the inductor on the converter side. For the differential operation of the converter-side inductor current, This represents the PWM voltage at the converter-side port. This indicates the grid voltage on the grid side; The mathematical relationship between the rate of change of inductor current in any phase of a three-level converter and the switching state of the corresponding phase arm switch is as follows: ； In the above formula, This represents the rate of change of the inductor current in any phase on the converter side. This represents the total DC voltage on the DC side of the three-level converter. To control variables, , These represent the switching states of the switching transistors in any phase arm of a three-level converter. This represents the grid voltage on the grid side, and L is the inverter-side inductance. The mathematical relationship between the sampling time interval and the rate of change of current under all-digital hysteresis control is expressed as follows: ； In the above formula, Indicates the hysteresis control sampling time interval. Indicates the first The upper bound of the hysteresis control loop width at the sampling time. Indicates the first under digital control Next sampling time The loop width for hysteresis control. Indicates the command current, i.e., the first The target current magnitude to be output at any given time; Indicates the first The rate of change of the converter-side inductor current at the sampling time. Indicates the first The actual current value sampled at the converter side at the sampling time.

3. The fully digital hysteresis control method according to claim 1, characterized in that, Step 2, determining the fully digital three-level hysteresis control algorithm for online prediction of sampling time without inductance, further includes: The predicted sampling time interval is expressed as follows: ； In the above formula, Predicted sampling time interval; The relationship between the predicted value of the sampling time and the switching control quantity is expressed as follows: ； In the above formula, For digital hysteresis control, the desired fixed switching period is... For control variables.

4. The fully digital hysteresis control method according to claim 1, characterized in that, Step 3, correcting the predicted sampling time interval, further includes: From the The timer starts counting from the next sampling time, after which... After the time The next sampling will yield the sampled current. With the The current obtained from the second sampling Perform the difference calculation and compare it with the loop width of the hysteresis control. Compare; when At that time, there is no need to predict the sampling time interval. Perform correction; When the difference At this time, it is necessary to predict the sampling time interval. Perform correction; Determine the calibration time, and let If the error current is represented, then the correction time is expressed as: ； The final online prediction algorithm for the sampling time of the inductorless quantity is expressed as follows: ； In the above formula: .

Images