Short-circuit protection circuit for power tube

Abstract

The invention discloses a short-circuit protection circuit for a power tube, and the circuit comprises a first comparator which is used for generating an effective first comparison signal under the condition that the sampling voltage of the power tube is greater than a first reference voltage; the voltage compensation circuit is used for generating a triangular wave signal after the first comparison signal is valid, and superposing the triangular wave signal with the first reference voltage to generate a second reference voltage; the second comparator is used for generating an effective second comparison signal under the condition that the sampling voltage is greater than the second reference voltage; and a latch circuit for generating a short-circuit fault signal when the second comparison signal is valid. The short-circuit protection circuit can provide corresponding anti-spike pulse time according to the magnitude of the spike pulse on the external power tube, so that false triggering caused by instantaneous load can be effectively avoided, the response speed of short-circuit protection can be improved, and the safety and stability of the circuit are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and more specifically, to a short-circuit protection circuit for a power tube. Background Art

[0002] One of the main applications of power tubes such as IGBT (Insulated Gate Bipolar Transistor) is as a switch device for turning on and off the load. However, as a switch device for turning on and off the load, the power tube is relatively fragile. In many applications, due to internal short circuits or other abnormal conditions of the load, excessive current and rapid heating may cause the power tube to burn out. For example, when the power tube is short-circuited to the ground or power supply, the current will increase to 30A within 100ns, so the protection of the power tube is particularly important.

[0003] Figure 1 A short-circuit protection circuit for a power tube in the prior art requires a long deglitch time to avoid false triggering during load transients. The short-circuit protection circuit includes a comparator 110 and a delay circuit 120. The comparator 110 is used to compare a sampled voltage Vsen representing the drain-source voltage difference of the power tube with a reference voltage Vref to generate a comparison signal SC to the delay circuit 120. When a short-circuit event occurs in the power tube, the sampled voltage Vsen rises. When the sampled voltage Vsen is greater than the reference voltage Vref, the comparator 110 outputs a high-level comparison signal SC. Since the sampled voltage Vsen may also be greater than the reference voltage Vref during load transients, in order to avoid false triggering, the delay circuit 120 will trigger a short-circuit fault signal Fault to shut down the power tube only after the sampled voltage Vsen continues to be greater than the reference voltage Vref for a period of time.

[0004] The anti-spike pulse time of the short-circuit protection circuit in the prior art is fixed. If this delay time is set too long, it will not only slow down the reaction of the short-circuit protection, but also cause more power loss. If this delay time is set too short, it will not be able to effectively avoid false triggering caused by load transients. Summary of the invention

[0005] In view of the above problems, the purpose of the present invention is to provide a short-circuit protection circuit for a power tube, which can provide corresponding anti-spike pulse time according to the size of the spike pulse on the power tube, which can not only effectively avoid false triggering caused by load transients, but also improve the response speed of short-circuit protection and improve the safety and stability of the circuit.

[0006] According to one aspect of the present invention, there is provided a short-circuit protection circuit for a power tube, comprising: a first comparator for comparing a sampled voltage representing a drain-source voltage difference of the power tube with a first reference voltage, and generating a valid first comparison signal when the sampled voltage is greater than the first reference voltage; a voltage compensation circuit for generating a triangular wave signal after the first comparison signal is valid, and superimposing the triangular wave signal with the first reference voltage to generate a second reference voltage; a second comparator for comparing the sampled voltage with the second reference voltage, and generating a valid second comparison signal when the sampled voltage is greater than the second reference voltage; and a latch circuit for generating a short-circuit fault signal when the second comparison signal is valid.

[0007] Optionally, a start-up time of the voltage compensation circuit is delayed by a first time relative to a valid edge of the first comparison signal, and a start-up time of the second comparator is delayed by a second time relative to a start-up time of the voltage compensation circuit.

[0008] Optionally, it also includes: a logic circuit for generating a first enable signal and a second enable signal according to the first comparison signal, wherein the first enable signal is used to control the opening and closing of the voltage compensation circuit, and the second enable signal is used to control the opening and closing of the second comparator.

[0009] Optionally, the effective edge of the first enable signal is delayed by the first time relative to the effective edge of the first comparison signal, and the effective edge of the second enable signal is synchronized with the ineffective edge of the first enable signal.

[0010] Optionally, the voltage compensation circuit includes: a bias current source, a first switch and a first capacitor connected in series between an on-chip power supply voltage and a reference ground, wherein the control end of the first switch is used to receive the first enable signal; and a first resistor, wherein the first end is connected to the first reference voltage, and the second end is connected to an intermediate node between the first switch and the first capacitor, wherein the first enable signal is used to control the conduction state of the first switch and to control the charging process of the bias current source on the first capacitor, so as to obtain the second reference voltage at the intermediate node between the first switch and the first capacitor.

[0011] Optionally, it also includes: a reference voltage generating circuit, used to generate the first reference voltage according to an off-chip power supply voltage.

[0012] Optionally, the reference voltage generating circuit includes: a second resistor and a third resistor connected in series between an off-chip power supply voltage and a reference ground, and an intermediate node between the second resistor and the third resistor is used to generate the first reference voltage.

[0013] Optionally, a resistance value of the first resistor is greater than resistance values ​​of the second resistor and the third resistor.

[0014] In summary, the short-circuit protection circuit for the power tube of the embodiment of the present invention can provide the corresponding anti-spike pulse time according to the size of the spike pulse on the external power tube, which can not only effectively avoid the false triggering caused by the load instant, but also improve the response speed of the short-circuit protection, and improve the safety and stability of the circuit. In addition, the short-circuit protection circuit of the present invention can react quickly when a large spike pulse with a long duration appears on the power tube, and can shut down the power tube in time, thereby improving the safety of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0016] Figure 1 The invention relates to a short circuit protection circuit for a power tube in the prior art.

[0017] Figure 2 The present invention provides a short circuit protection circuit for a power tube.

[0018] Figure 3a and Figure 3b They are two working waveform diagrams of the short-circuit protection circuit according to the embodiments of the present invention. DETAILED DESCRIPTION

[0019] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0020] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "coupled" to another element or an element or circuit is said to be "coupled between" two nodes, it may be directly coupled or connected to another element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0021] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0022] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0023] Figure 2 2 is a short circuit protection circuit 200 for a power switch chip according to an embodiment of the present invention, wherein the portion on the left side of the dotted line is located outside the power switch chip, and the portion on the right side of the dotted line is located inside the power switch chip. Figure 2 As shown, the short circuit protection circuit 200 of this embodiment includes a reference voltage generating circuit 210 located outside the power switch chip, and a comparator 220, a logic circuit 230, a voltage compensation circuit 240, a comparator 250 and a latch circuit 260 located inside the power switch chip.

[0024] Among them, the reference voltage generating circuit 210 is used to generate a reference voltage Vref1 representing the initial threshold value of short circuit detection. Further, the reference voltage generating circuit 210 includes resistors R2 and R3 connected in series between the external power supply voltage VDDIO and the reference ground, and the intermediate node of the resistors R2 and R3 is used to output the reference voltage Vref1. Furthermore, in practical applications, those skilled in the art can adjust the voltage division ratio of the resistors R2 and R3 as needed to adjust the voltage value of the reference voltage Vref1. For example, the external power supply voltage VDDIO is provided by the IO power supply voltage (Input / Output PowerSupply), and the IO power supply voltage refers to the voltage level used when the chip interacts with external devices for data, which is directly related to the performance and stability of the chip.

[0025] The comparator 220 is used to compare the sampled voltage Vsen representing the drain-source voltage difference of the power tube with the reference voltage Vref1, and generate a valid (e.g., high level) comparison signal SC when the sampled voltage Vsen is greater than the reference voltage Vref1. For example, the comparator 220 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal is connected to the sampled voltage Vsen, the negative input terminal is connected to the reference voltage Vref1, and the output terminal is used to provide the comparison signal SC.

[0026] The logic circuit 230 is used to generate enable signals EN1 and EN2 according to the comparison signal SC. For example, the enable signal EN1 is used to control the on and off of the voltage compensation circuit 240, and the enable signal EN2 is used to control the on and off of the comparator 250. Specifically, the logic circuit 230 is used to delay the first time t1 to generate the enable signal EN1 when the effective edge (for example, the rising edge) of the comparison signal SC changing from the low level to the high level occurs, and delay the second time t2 to generate the enable signal EN2 when the effective edge of the enable signal EN1 occurs.

[0027] The voltage compensation circuit 240 is used to generate a triangular wave signal according to the enable signal EN1, and superimpose the triangular wave signal with the reference voltage Vref1 to generate a reference voltage Vref2. Specifically, the voltage compensation circuit 240 includes a bias current source Ibias, a switch S1, a resistor R1 and a capacitor C1, wherein the bias current source Ibias, the switch S1 and the capacitor C1 are connected in series between the chip internal power supply voltage VDD and the reference ground, the control end of the switch S1 is used to receive the enable signal EN1, the first end of the resistor R1 is connected to the middle node of the resistors R2 and R3 to receive the reference voltage Vref1, and the second end of the resistor R1 is connected to the middle node of the switch S1 and the capacitor C1. The enable signal EN1 controls the charging process and the discharging process of the bias current source Ibias on the capacitor C1 by controlling the conduction state of the switch S1, so as to obtain the triangular wave signal at the first end of the capacitor C1, and superimpose the triangular wave signal with the reference voltage Vref1 to generate the reference voltage Vref2 at the first end of the capacitor C1. Furthermore, the resistance value of the resistor R1 in this embodiment is greater than the resistance values ​​of the resistors R2 and R3, thereby preventing the current output by the bias current source Ibias from entering the external resistors R2 and R3 and causing the reference voltage Vref1 to increase, which is beneficial to improving the detection accuracy and stability of the circuit.

[0028] The comparator 250 is configured to compare the sample voltage Vsen with the reference voltage Vref2 according to the enable signal EN2 , and generate a valid (eg, high level) comparison signal SCP when the sample voltage Vsen is greater than the reference voltage Vref2 .

[0029] The latch circuit 260 is used to generate a valid (e.g., high level) short-circuit fault signal Fault when the comparison signal SCP changes from a low level to a high level. For example, the latch circuit 260 can be implemented by a monostable trigger (e.g., an RS latch), which is used to set the short-circuit fault signal Fault to a high level when the comparison signal SCP changes from a low level to a high level.

[0030] Figure 3a and Figure 3b They are two working waveform diagrams of the short-circuit protection circuit of the embodiment of the present invention, wherein Figure 3a FIG. 2 shows the working waveform of the short-circuit protection circuit of this embodiment when the peak pulse on the sampling voltage Vsen is large. Figure 3b FIG. 2 shows the working waveform of the short-circuit protection circuit of this embodiment when the peak pulse on the sampling voltage Vsen is small. Figure 3a and 3b As shown, first, the sampling voltage Vsen of the drain-source voltage difference of the external power tube is compared with the reference voltage Vref1 through the comparator 220. When it is detected that the sampling voltage Vsen is greater than the reference voltage Vref1, the comparison signal SC becomes a high level. After detecting the rising edge of the comparison signal SC, the logic circuit 230 delays the first time t1 to change the enable signal EN1 to a high level, and then turns on the switch S1, charges the capacitor C1 through the bias current source Ibias, and causes the reference voltage Vref2 to gradually rise. In this embodiment, the high-level pulse width of the enable signal EN1 is equal to the second time t2. After the time t2, the enable signal EN1 becomes a low level, the switch S1 is disconnected, and the capacitor C1 is discharged to the ground through the resistors R1 and R3. During the discharge process, the reference voltage Vref2 gradually decreases. At the same time, after detecting the falling edge of the enable signal EN1, the logic circuit 230 changes the enable signal EN2 to a high level and turns on the comparator 250. Therefore, the time t1+t2 is the basic deglitch time of the short-circuit protection circuit of the embodiment of the present invention. During the discharge process of the capacitor C1, the sampling voltage Vsen is compared with the reference voltage Vref2 through the comparator 250. If the duration of the spike pulse is short, the sampling voltage Vsen is less than the reference voltage Vref2 during the capacitor discharge process, the comparison signal SCP output by the comparator 250 is low, and the latch circuit 260 sets the short-circuit fault signal Fault to a low level, so that this part of the spike pulse on the power tube can be filtered out and the circuit does not trigger the short-circuit protection; if the duration of the spike pulse is long, the sampling voltage Vsen is greater than the reference voltage Vref2 during the capacitor discharge process, the comparison signal SCP output by the comparator 250 is high, and the latch circuit 260 sets the short-circuit fault signal Fault to a high level, so that the external power tube is turned off through the control module inside the chip to play a role in short-circuit protection.

[0031] In addition, if Figure 3a As shown in FIG. 1 , when the peak pulse on the external power tube is large, the delay time from when the comparator 220 detects that the sampling voltage Vsen is over-voltage to when the short-circuit fault signal Fault is set to a high level is T1. Figure 3bAs shown, when the spike pulse on the external power tube is small, the delay time from when the comparator 220 detects that the sampling voltage Vsen is over-voltage to when the short-circuit fault signal Fault is set to a high level is T2, and time T1 is less than time T2. Therefore, the short-circuit protection circuit of the embodiment of the present invention can provide a corresponding anti-spike pulse time according to the size of the spike pulse on the external power tube, thereby effectively avoiding false triggering caused by load transients, and improving the response speed of the short-circuit protection, thereby improving the safety and stability of the circuit.

[0032] In summary, the short-circuit protection circuit for the power tube of the embodiment of the present invention can provide the corresponding anti-spike pulse time according to the size of the spike pulse on the external power tube, which can not only effectively avoid the false triggering caused by the load instant, but also improve the response speed of the short-circuit protection, and improve the safety and stability of the circuit. In addition, the short-circuit protection circuit of the present invention can react quickly when a large spike pulse with a long duration appears on the power tube, and can shut down the power tube in time, thereby improving the safety of the system.

[0033] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0034] According to the embodiments of the present invention, as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A short-circuit protection circuit for a power tube, comprising: A first comparator, used to compare a sampled voltage representing a drain-source voltage difference of the power tube with a first reference voltage, and to generate a valid first comparison signal when the sampled voltage is greater than the first reference voltage; a voltage compensation circuit, configured to generate a triangular wave signal after the first comparison signal is valid, and to superimpose the triangular wave signal with the first reference voltage to generate a second reference voltage; a second comparator, configured to compare the sampled voltage with the second reference voltage and generate a valid second comparison signal when the sampled voltage is greater than the second reference voltage; as well as The latch circuit is used to generate a short-circuit fault signal when the second comparison signal is valid.

2. The short circuit protection circuit according to claim 1, wherein: The start-up time of the voltage compensation circuit is delayed by a first time relative to the effective edge of the first comparison signal, and the start-up time of the second comparator is delayed by a second time relative to the start-up time of the voltage compensation circuit.

3. The short circuit protection circuit according to claim 2, further comprising: a logic circuit, configured to generate a first enable signal and a second enable signal according to the first comparison signal, The first enable signal is used to control the on and off of the voltage compensation circuit, and the second enable signal is used to control the on and off of the second comparator.

4. The short circuit protection circuit according to claim 3, wherein: The effective edge of the first enable signal is delayed by the first time relative to the effective edge of the first comparison signal, and the effective edge of the second enable signal is synchronized with the ineffective edge of the first enable signal.

5. The short circuit protection circuit according to claim 4, wherein: The voltage compensation circuit comprises: A bias current source, a first switch and a first capacitor are connected in series between an on-chip power supply voltage and a reference ground, wherein a control end of the first switch is used to receive the first enable signal; and a first resistor, a first end of which is connected to the first reference voltage, and a second end of which is connected to an intermediate node between the first switch and the first capacitor, The first enable signal is used to control the conduction state of the first switch, and to control the charging process of the first capacitor by the bias current source, so as to obtain the second reference voltage at the middle node between the first switch and the first capacitor.

6. The short circuit protection circuit according to claim 5, wherein: Also includes: The reference voltage generating circuit is used to generate the first reference voltage according to an off-chip power supply voltage.

7. The short circuit protection circuit according to claim 6, wherein: The reference voltage generating circuit comprises: A second resistor and a third resistor are connected in series between an off-chip power supply voltage and a reference ground, and an intermediate node between the second resistor and the third resistor is used to generate the first reference voltage.

8. The short circuit protection circuit according to claim 7, wherein: The resistance value of the first resistor is greater than the resistance values ​​of the second resistor and the third resistor.

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