Post-quantum cryptography system, method, and device integrating Kyber and SM3

Abstract

This application provides a post-quantum cryptographic encryption system, method, and device that integrates Kyber and SM3. The control logic module controls the number of rounds executed by SM3 in the hash module based on the random number length required in different NTT module modes. The interception unit intercepts the effective length of the hash value in each round. The padding unit pads the input message of each SM3 round. The hash module determines the number of rounds required for SM3 based on the length of the hash value required in different modes and intercepts the effective length of the hash value in each round. The NTT module is used to calculate polynomial multiplication in the Kyber algorithm. The NTT module includes a butterfly unit and a control unit. The butterfly unit is used for modular addition, modular subtraction, and modular reduction calculations, and the control unit determines the operating mode of the NTT module. The sampling module includes a rejection sampling unit and a central binomial distribution sampling unit. The rejection sampling unit is used to sample the public matrix, and the central binomial distribution sampling unit is used to sample the noise vector. This solution complies with my country's security standards and is secure and reliable.

Description

Technical Field

[0001] The present application relates to the field of post-quantum cryptography application technology, and in particular to a post-quantum cryptography encryption system, method, and device integrating Kyber and SM3. Background Art

[0002] With the rapid advancement of quantum computing technology, traditional cryptographic algorithms, especially those that rely on complex mathematical problems, are facing the risk of being cracked by quantum computers. The quantum algorithm proposed by Peter Shor, a professor in the Department of Mathematics at the Massachusetts Institute of Technology, can crack integer factorization and discrete logarithm problems in a short period of time, which shows that traditional cryptographic systems based on these classical number theory problems are no longer secure. The currently widely used public key cryptography system is built on these difficult problems and therefore also faces serious security challenges. PQC (Post Quantum Cryptography) is an emerging encryption method that aims to prevent the potential threat of quantum computers to existing cryptographic systems. Research on post-quantum cryptography is particularly important as it is a key measure to ensure information security and respond to the threat of quantum computers.

[0003] To date, the National Institute of Standards and Technology (NIST) has successfully completed four rounds of a rigorous selection process for post-quantum cryptographic algorithms, an initiative designed to address the potential threat posed by future quantum computing to existing cryptographic systems. As part of this process, NIST officially announced the first four standardized PQC algorithms. CRYSTALS-Kyber, distinguished by its unique advantages, became the only encryption algorithm selected in this batch. The remaining three algorithms focus on signature functionality, providing a more diverse range of options for the information security community. The Kyber algorithm is a post-quantum cryptographic algorithm whose security is based on the MLWE (Module Learning With Errors) problem.

[0004] With the in-depth research and rapid development of quantum computing technology worldwide, the transition from traditional cryptographic algorithms to PQC algorithms has become an irreversible trend in the field of information security. Against this backdrop, numerous research institutions and companies at home and abroad have plunged into this transformation, committed to developing cryptographic algorithms that meet quantum security standards while also offering high performance.

[0005] Regarding the selection of encryption algorithms, while CRYSTALS-Kyber excels in security, directly adopting it as the standard for my country's domestically produced encryption algorithms is not the best choice due to both national information security and practical application performance considerations. Therefore, in-depth research and development of domestically produced encryption algorithms with independent intellectual property rights are particularly important. This will not only enhance my country's independent innovation capabilities in the field of information security, but also better adapt to the needs of specific domestic application scenarios, providing strong support for building a more secure and reliable information environment. Summary of the Invention

[0006] This application describes a post-quantum cryptographic encryption system, method, and device that integrates Kyber and SM3.

[0007] In the first aspect, the present application shows a post-quantum cryptographic encryption system that integrates Kyber and SM3. The filling unit of the system includes: a control logic module, an interception unit, a filling unit, a hash module, an NTT module, a sampling module, a storage module and an interface module; wherein,

[0008] The control logic module is used to transmit internal instruction signals of the processor and control the reception of external data, and to determine the number of rounds of the SM3 algorithm executed in the hash module based on the length of the hash value required in different modes when generating Kyber keys;

[0009] The interception unit is used to intercept the effective length of each round of hash value;

[0010] The padding unit is used to pad the input message of each round of the SM3 algorithm, and add a count value of a set length to the front end of the input message, where the size of the count value is the number of rounds executed by the SM3 algorithm;

[0011] The hash module is configured to, under the control of the control logic module, determine the number of rounds required to execute the SM3 algorithm based on the length of the hash value required for different modes when generating Kyber keys, and the interception unit intercepts the effective length of the hash value of each round to ensure that the output hash value is a random number that meets the required length;

[0012] The NTT module is used for calculating polynomial multiplication in the Kyber algorithm; the NTT module includes a butterfly unit and a control unit, the butterfly unit is used for calculating modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module and control the butterfly unit to input the correct polynomial coefficients;

[0013] The sampling module includes a rejection sampling unit and a central binomial distribution sampling unit, wherein the rejection sampling unit is used to sample to obtain a public matrix, and the central binomial distribution sampling unit is used to sample to obtain a noise vector;

[0014] The storage module is used for data caching;

[0015] The interface module is used to provide an input and output interface.

[0016] Optionally, the hash module includes a padding grouping unit, a message expansion unit and an iterative compression unit; wherein,

[0017] The padding grouping unit is used to pad the input message so that its length becomes a multiple of 512;

[0018] The message expansion unit is used to divide the padded message into a plurality of groups of 512 bits each, expand each group to generate an expansion result with 132 32-bit words as content, and iterate the expansion result;

[0019] The iterative compression unit is used to output a hash value of a required length based on the iterative result of the message expansion unit.

[0020] Optionally, the NTT module further includes:

[0021] Modular multiplier for pipelined K 2 -RED modular reduction algorithm implements modular multiplication operation in butterfly calculation;

[0022] Ping-pong RAM structure, used to store the input and output of the butterfly unit;

[0023] A plurality of ROMs are used to store the rotation factors corresponding to the butterflies in the butterfly unit.

[0024] Optionally, the filling unit is specifically configured to use an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

[0025] Optionally, the operation mode of the filling unit includes encryption and decryption.

[0026] In a second aspect, the present application illustrates a post-quantum cryptographic encryption method that integrates Kyber and SM3, wherein a padding unit is applied to the above-mentioned system, and the method comprises:

[0027] In the key generation phase, an external random number is obtained and the random number seeds ρ and σ are obtained through the SM3 algorithm. ρ is used for rejection sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain the noise vectors s and e.

[0028] Expression-based Calculate the post-quantum cryptographic key and generate the public key and private key;

[0029] In the encryption phase, the public key, the message m, and the random vector are input. The public key is decoded to obtain the seed ρ and the vector t. The seed ρ is obtained by rejection sampling to obtain the public matrix A. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution;

[0030] Through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext based on the vectors u and v;

[0031] In the decryption phase, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptography encryption and decryption.

[0032] Optionally, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation phase, the filling unit further includes:

[0033] Pad the random number input externally to make its length a multiple of 512.

[0034] Optionally, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation phase, the filling unit further includes:

[0035] Truncate the effective length of each round of hash value.

[0036] In a third aspect, the present application provides a post-quantum cryptographic encryption device integrating Kyber and SM3, the device comprising:

[0037] The key generation unit is used to obtain the random number of external input and obtain the random number seeds ρ and σ through the SM3 algorithm during the key generation phase. ρ is used to reject sampling to obtain the public matrix A, and σ is sampled by the central binomial distribution to obtain the noise vectors s and e, and based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key;

[0038] The encryption unit is used to input the public key, message m and random vector in the encryption stage. The public key is decoded to obtain the seed ρ and vector t. The seed ρ is used to obtain the public matrix A through rejection sampling. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext based on the vectors u and v;

[0039] The decryption unit is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptography encryption and decryption.

[0040] In a fourth aspect, the present application shows an electronic device, which includes: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to execute the method described in any of the above aspects.

[0041] In a fifth aspect, the present application shows a non-temporary computer-readable storage medium, which, when the instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute the method described in any of the above aspects.

[0042] In a sixth aspect, the present application illustrates a computer program product. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the method as described in any one of the above aspects.

[0043] The technical solution provided by this application may have the following beneficial effects:

[0044] The post-quantum cryptographic encryption scheme provided in this application, which integrates the Kyber algorithm and the SM3 algorithm, can effectively avoid random number duplication by adding a count value of a preset length to the front end of the input message, and uses an interception unit to convert the random number into a one-to-one mapping of true random numbers with the same length and no duplication corresponding to different patterns. Therefore, compared with the traditional post-quantum cryptographic algorithm using a hash function based on the Keccak algorithm, while ensuring security and performance, it complies with my country's security standards, and the domestically produced SM3 is more secure and more controllable.

[0045] By adding interception units and padding units to the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the radix-4-based NTT system has better performance, higher frequency and greater throughput. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1A structural diagram of the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0047] Figure 2 Schematic diagram of the working principle of the hash module in the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0048] Figure 3 This is a structural diagram of the NTT module in the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application.

[0049] Figure 4 A flowchart of the post-quantum cryptography method that integrates Kyber and SM3 provided in this application.

[0050] Figure 5 A structural diagram of a post-quantum cryptographic encryption device that integrates Kyber and SM3 provided in this application.

[0051] Figure 6 This is a block diagram of an electronic device provided in this application.

[0052] Figure 7 This is a block diagram of another electronic device provided by this application. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0054] Post-Quantum Magic (abbreviated as "PQMagic") is the first high-performance and secure post-quantum cryptographic algorithm library in China that supports FIPS203, 204 and 205 standards. As the first high-performance and secure post-quantum cryptographic algorithm library in China that fully supports the FIPS203, 204 and 205 international standards, the PQMagic algorithm library not only demonstrates the cutting-edge nature of technological innovation, but also deeply integrates a profound understanding of localized security needs. This algorithm library is not only compatible with internationally advanced post-quantum cryptographic technology, but also exclusively supports the high-performance domestically developed algorithms-Aigis-Enc and Aigis-Sig (recognized by PKC 2020) and the latest version of SPHINCS-Alpha (debuted at the CRYPTO 2023 conference), which significantly improves the efficiency and security of cryptographic operations.

[0055] The following first describes in detail the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided by this application.

[0056] Example 1

[0057] Reference Figure 1 , is a structural diagram of a post-quantum cryptographic encryption system that integrates Kyber and SM3 provided by this application. The system includes: a control logic module 10, an interception unit 20, a padding unit 30, a hash module 40, an NTT module 50, a sampling module 60, a storage module 70 and an interface module ( Figure 1 not shown).

[0058] The control logic module 10 is used to transmit instruction signals within the processor and control the reception of external data, and to determine the number of rounds of the SM3 algorithm executed in the hash module according to the length of the hash value required in different modes when generating the Kyber key.

[0059] The interception unit 20 is used to intercept the effective length of each round of hash value.

[0060] The padding unit 30 is used to pad the input message of each round of the SM3 algorithm by adding a count value of a set length to the front end of the input message. The size of the count value is the number of rounds executed by the SM3 algorithm. In this way, the input message of each round is different and the output hash value is also different.

[0061] The hash module 40 provides data integrity verification and security authentication based on the improved SM3 algorithm. Under the control of the control logic module 10, it is used to determine the number of rounds required to execute the SM3 algorithm based on the length of the hash value required for different modes when generating Kyber keys. The interception unit 20 intercepts the effective length of the hash value in each round to ensure that the output hash value is a random number that meets the required length.

[0062] The NTT module 50 is used for the calculation of polynomial multiplication in the Kyber algorithm; the NTT module 50 includes a butterfly unit and a control unit, the butterfly unit is used for the calculation of modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module 50 and control the butterfly unit to input the correct polynomial coefficients. It should be noted that NTT (Number-Theoretic Transform) is a generalization of the classic DFT (Discrete Fourier Transform) for finite fields. Through a lot of work, NTT is basically able to perform fast convolution on integer sequences and ensure that there is no rounding error. Convolution is very useful when multiplying large numbers or long polynomials, and NTT is faster than other methods such as Karatsuba multiplication in asymptotic terms.

[0063] The sampling module 60 includes a rejection sampling unit and a central binomial distribution sampling unit. The rejection sampling unit is used to sample to obtain a public matrix, and the central binomial distribution sampling unit is used to sample to obtain a noise vector.

[0064] The storage module 70 is used for data caching.

[0065] The interface module is used to provide an input and output interface.

[0066] In one embodiment, the hash module 40 includes a padding grouping unit, a message expansion unit, and an iterative compression unit. Figure 2 As shown, it is a schematic diagram of the working principle of the hash module in the post-quantum cryptographic encryption system that integrates Kyber and SM3 provided by the present application, wherein the padding grouping unit is used to pad the input message so that its length becomes a multiple of 512; the message expansion unit is used to divide the padded message into several groups according to each group of 512 bits, expand each group to generate an expansion result with 132 32-bit words as the content, and iterate the expansion result; the iterative compression unit is used to output a hash value of the required length based on the iterative result of the message expansion unit.

[0067] In a specific implementation, the input message may be padded as follows: a "1" bit is added to the end of the message, followed by a certain number of "0" bits, and finally a 64-bit message length.

[0068] In one case, see Figure 3 , is a structural diagram of the NTT module in the post-quantum cryptographic encryption system integrating Kyber and SM3 provided by this application, wherein the NTT module 50 further includes: a modular multiplier for pipeline K 2 -RED modular reduction algorithm implements modular multiplication operation in butterfly calculation; Ping-Pong RAM structure is used to store the input and output of butterfly unit; a number of ROMs are used to store the rotation factors corresponding to the butterfly in the butterfly unit.

[0069] In one case, the filling unit 30 is specifically configured to use an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

[0070] In one embodiment, the operation mode of the padding unit 30 includes encryption and decryption.

[0071] The post-quantum cryptographic encryption system that integrates Kyber and SM3 provided in this application is based on the PQmagic design concept and proposes a modified Kyber hardware structure. This structure uses the national secret algorithm SM3 algorithm instead of the hash function SHA-3 algorithm in Kyber on the basis of the Kyber algorithm proposed by NIST, showing better performance. Ultimately, it greatly saves the resource consumption of the entire Kyber hardware structure and improves the overall performance.

[0072] The post-quantum cryptographic encryption scheme provided in this application, which integrates the Kyber algorithm and the SM3 algorithm, can effectively avoid random number repetition by supplementing a count value of a preset length at the front end of the input message, and uses a interception unit to convert the random number into a one-to-one mapping of true random numbers with the same length and no repetition corresponding to different patterns. Therefore, compared with the traditional post-quantum cryptographic algorithm that uses a hash function based on the Keccak algorithm, while ensuring security and performance, it complies with my country's security standards, and the domestically produced SM3 is safer and more controllable.

[0073] It should be noted that the SM3 algorithm in the hash module is primarily used to provide data integrity verification and security authentication. It outputs a message digest value of 256 bits (32 bytes) in length, a message block length of 512 bits, and is resistant to various known attack methods, including collision attacks and pre-image attacks. It includes a message padding unit, a message expansion module, and an iterative compression module. Compared to the original Keccak-based hash function, the SM3 algorithm processes smaller data lengths in each iteration, but requires more iterations, thus reducing hardware resource consumption. Compared to the traditional SM3 module, because its output hash value has a fixed length, Kyber requires random numbers of various lengths.

[0074] By adding interception units and padding units to the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the radix-4-based NTT system has better performance, higher frequency and greater throughput.

[0075] In order to facilitate the clear reading of this application document, the working principles of the hash module and NTT module are explained in detail here. Figure 2 and Figure 3 .

[0076] Part 1: How the hash module works, see Figure 2 .

[0077] The workflow of the SM3-based hash module mainly includes three parts: padding grouping, message expansion and iterative compression.

[0078] (1) Padding: The input message M is padded to make its length a multiple of 512. The padding method is to add a "1" bit at the end of the message, then add a certain number of "0" bits, and finally add the 64-bit message length. The padded message is called M'.

[0079] (2) Message expansion: The padded message is called M′ and is divided into several groups of 512 bits each.

[0080] M′=B (0) B (1) …B (n-1)

[0081] Each block B(i) is then expanded to generate 132 32-bit words:

[0082] W0, W1, W2, ..., W 67 ,…,W0′,W1′,…,W 63 '

[0083] Next, iterate M′ as follows:

[0084] FORj=16TO 67

[0085]

[0086] END FOR

[0087] FORj=0TO 63

[0088]

[0089] END FOR

[0090] (3) Iterative compression:

[0091] Let A, B, C, D, E, F, G, H be word registers, SS1, SS2, TT1, TT2 be intermediate variables, and the compression function be V (i+1) =CF(V (i) , B (i) ), 0≤i≤n-1.

[0092] The calculation process is described as follows:

[0093]

[0094]

[0095] The final output is a 256-bit hash value V(n).

[0096] It should be noted that the relevant operation symbols in steps (2) message expansion and (3) iterative compression can be found in existing assembly languages ​​such as microcontrollers, FPGAs and other existing technologies, and will not be repeated here.

[0097] In the aforementioned algorithm analysis, the message expansion and compression functions of the SM3 algorithm each require 64 rounds of execution. This design executes the message expansion and compression functions in parallel. Within a single round of calculation, loop unrolling is used to merge multiple single-step calculations, further improving throughput. The algorithm's operational logic is optimized to reduce logic depth, shorten critical paths, and increase the algorithm's clock frequency to optimize performance. Furthermore, by reusing logic resources, the algorithm's resource consumption is further reduced. Although this merging operation increases combinational logic delay and reduces the system's maximum operating frequency, this approach significantly reduces the number of cycles consumed and increases system throughput.

[0098] Compared to the traditional SM3 module, this design innovatively adds a truncation and padding module to address the varying lengths of random numbers required by algorithms like Kyber. While the hash value output by traditional SM3 is fixed in length, this design uses external control logic to flexibly control the number of SM3 rounds executed based on the required random number length in different modes. The truncation module extracts the valid portion of the hash value from each SM3 round, ensuring that the output random number precisely matches the required length.

[0099] The padding module adds an 8-bit count to the front of each round's input message, indicating the current round number. This innovative design ensures that each round's input message, and therefore the output hash value, is different. This mechanism avoids the duplication problem that can occur with traditional SM3 modules during multi-round execution, improving the diversity and security of random number generation.

[0100] This improvement not only enhances SM3's flexibility, enabling it to better adapt to different application scenarios, but also ensures efficient and accurate random number generation through interception and padding mechanisms, significantly reducing the waste of hardware resources. This innovative application opens up new possibilities for the widespread use of SM3 in various encryption algorithms.

[0101] Part 2: Working principle of NTT module, see Figure 3 .

[0102] The radix-4NTT based polynomial multiplier design incorporates several key components, including a novel butterfly unit, a K-based 2-RED modular multiplier, ping-pong RAM structure (used to store the input and output of the butterfly unit), five ROMs (read-only memories, used to store rotation factors), and a sophisticated control unit to generate the necessary control signals. In particular, compared with the traditional design, the butterfly unit used in this design successfully eliminates the delay of modular multiplication calculation and realizes the complete parallelization of all modular multiplication operations in the butterfly calculation. Given that the modular multiplication operation is the most time-consuming part of the calculation, reducing the number of modular multiplications in each butterfly calculation by half significantly reduces the overall delay of the butterfly unit. For K 2 -RED modular multiplier, this paper adopts the correction value selector method. These correction values ​​are pre-calculated and stored. They can be stored in a lookup table (LUT) or directly integrated into the data path, and intelligently selected according to the sign bit. Compared with traditional modular multiplication algorithms such as Montgomery modular reduction and Barrett modular reduction, K 2 The -RED modular multiplier demonstrates superior performance. The control unit's built-in address generator efficiently manages input signals and read and write addresses, ensuring smooth ping-pong memory operation. The control unit also determines the operating mode, including encryption and decryption, and furthermore, covers various modes such as NTT, INTT, and PWM.

[0103] In the radix-4NTT implementation, input data is loaded from memory for each stage of computation, and intermediate results are subsequently written back to memory. This process is repeated until the entire NTT process is complete. The control unit is responsible for generating control signals that manage all aspects of the NTT system, including address generation logic, butterfly unit control signals, and read and write signals. The address generator is responsible for generating appropriate polynomial coefficient sequence numbers to ensure a conflict-free memory mapping scheme.

[0104] After introducing the application After integrating the post-quantum cryptography encryption system of Kyber and SM3, the post-quantum cryptography encryption method integrating Kyber and SM3 applied to this system is explained.

[0105] Example 2

[0106] See Figure 4 , is a flow chart of a post-quantum cryptographic encryption method that integrates Kyber and SM3 provided by this application. This application shows a post-quantum cryptographic encryption method that integrates Kyber and SM3. The filling unit is applied to Figure 1 The system, the method comprises:

[0107] Step S101: In the key generation phase, obtain an externally input random number and obtain random number seeds ρ and σ through the SM3 algorithm. ρ is used to reject sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain noise vectors s and e.

[0108] Step S102: Based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key.

[0109] Step S103: In the encryption phase, the public key, the message m, and the random vector are input. The public key is decoded to obtain the seed ρ and the vector t. The seed ρ is rejected by sampling to obtain the public matrix A. T , the random vector r is input into the sampling module and the vectors r, e1 and e2 are obtained through central binomial distribution sampling.

[0110] Step S104: Through number theory transformation NTT and its inverse transformation INTT, and according to the expression Vectors u and v are obtained by calculation, and ciphertext is generated according to the vectors u and v.

[0111] Step S105: In the decryption phase, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed to obtain the vector s T and u, v; the number theory transformation NTT and its inverse transformation INTT are calculated to obtain Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptography encryption and decryption.

[0112] In one case, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ by the SM3 algorithm in the key generation phase in step S101, the filling unit further includes:

[0113] Pad the random number input externally to make its length a multiple of 512.

[0114] In one case, before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ by the SM3 algorithm in the key generation phase in step S101, the filling unit further includes:

[0115] Truncate the effective length of each round of hash value.

[0116] As can be seen from the above, the post - quantum cryptography implementation method that combines Kyber and SM3 shows unique advantages compared with traditional post - quantum cryptography algorithms that rely on hash functions based on the Keccak algorithm, while ensuring the same level of security and performance. In particular, the domestic SM3 hash function not only meets national security standards but also performs well in terms of security and controllability, providing a more solid and reliable guarantee for national information security. Based on the current SM3 algorithm, this design innovates on the traditional SM3 module by adding an interception and padding unit to meet the requirements of algorithms such as Kyber for random numbers of different lengths. The number of rounds of SM3 execution is determined by an external control logic. The interception unit ensures that the length of the output random number precisely matches the requirements, and the padding unit adds an 8 - bit count value before the input message to ensure the uniqueness of each round of hash value. This design improves the flexibility of SM3 and the efficiency of random number generation, reduces the consumption of hardware resources, and enhances the security and applicability of the system. The performance of the post - quantum cryptography scheme of this invention implemented on the FPGA platform significantly reduces the resource consumption compared with the Kyber scheme proposed by NIST without sacrificing speed.

[0117] It should be noted that for method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that this application is not limited by the described action sequence because, according to this application, certain steps can be carried out in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions involved are not necessarily required by this application.

[0118] Corresponding to the post - quantum cryptography encryption method that combines Kyber and SM3 of this application, this application provides a post - quantum cryptography encryption device that combines Kyber and SM3.

[0119] Example 3

[0120] As Figure 5 shown, it is a structural diagram of a post - quantum cryptography encryption device that combines Kyber and SM3 provided by this application. The device includes:

[0121] A key generation unit 310, which is used in the key generation stage to obtain externally input random numbers and obtain random number seeds ρ and σ through the SM3 algorithm. ρ is used to reject samples to obtain the public matrix A, σ samples the noise vectors s and e through the central binomial distribution, and calculates the post - quantum cryptography key based on the expression t = ⋯°仆e, generating the public key and the private key;

[0122] The encryption unit 320 is used to input the public key, message m and random vector in the encryption stage. The public key is decoded to obtain the seed ρ and vector t. The seed ρ is used to obtain the public matrix AT through rejection sampling. The random vector r is input to the sampling module and the vector r is obtained by sampling through the central binomial distribution. e1 and e2; by number theory transformation NTT and its inverse transformation INTT, and according to the expression u = stop servant e1, v = +e2 + m, vectors u and v are calculated, and ciphertext is generated according to the vectors u and v;

[0123] The decryption unit 330 is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain vectors sT and u, v; calculate su through the number theory transformation NTT and its inverse transformation INTT, then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptography encryption and decryption.

[0124] In one case, the device further includes a padding unit for padding the externally input random number to a multiple of 512 before the key generation unit 310 obtains the externally input random number and obtains the random number seeds ρ and σ through the SM3 algorithm.

[0125] In one case, the apparatus further includes a truncation unit configured to truncate the effective length of each round of hash values ​​before the key generation unit 310 obtains an externally input random number and obtains random number seeds ρ and σ through the SM3 algorithm.

[0126] From the above, it can be seen that the post-quantum cryptographic encryption scheme that integrates the Kyber algorithm and the SM3 algorithm provided by this application can effectively avoid random number repetition by adding a count value of a preset length to the front end of the input message, and uses an interception unit to convert the random number into a one-to-one mapping true random number with the same length and no repetition corresponding to different patterns. Therefore, compared with the traditional post-quantum cryptographic algorithm using a hash function based on the Keccak algorithm, while ensuring security and performance, it complies with my country's security standards, and the domestically produced SM3 is safer and more controllable.

[0127] By adding interception units and padding units to the hash module, the length of the input and output hash values ​​of the SM3 module can be flexibly controlled, ensuring that the required random numbers can be generated efficiently and accurately, greatly reducing the waste of hardware resources; the SM3 hardware implementation solution provided in this application greatly reduces resource consumption and reduces clock cycles; the radix-4-based NTT system has better performance, higher frequency and greater throughput.

[0128] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0129] Example 4

[0130] Optionally, an embodiment of the present application also provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and runnable on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0131] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the various processes of the above-described method embodiments are implemented and the same technical effects are achieved. To avoid repetition, the details are not described here. The computer-readable storage medium may be, for example, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0132] Figure 6 This application provides a block diagram of an electronic device 800. For example, the electronic device 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0133] Reference Figure 6 , the electronic device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 814 , and a communication component 816 .

[0134] The processing component 802 generally controls the overall operation of the electronic device 800, such as operations associated with display, phone calls, data communications, camera operation, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 802 may include one or more modules to facilitate interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.

[0135] The memory 804 is configured to store various types of data to support operations on the device 800. Examples of such data include instructions for any application or method operating on the electronic device 800, contact data, phone book data, messages, images, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0136] The power supply component 806 provides power to the various components of the electronic device 800. The power supply component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 800.

[0137] The multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor can not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0138] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), which is configured to receive external audio signals when the electronic device 800 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 804 or transmitted via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0139] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as a keyboard, click wheel, buttons, etc. These buttons may include but are not limited to: a home button, volume buttons, a start button, and a lock button.

[0140] The sensor assembly 814 includes one or more sensors for providing various aspects of status assessment for the electronic device 800. For example, the sensor assembly 814 can detect the open / closed state of the device 800, the relative positioning of components, such as the display and keypad of the electronic device 800. The sensor assembly 814 can also detect changes in the position of the electronic device 800 or a component of the electronic device 800, the presence or absence of user contact with the electronic device 800, the orientation or acceleration / deceleration of the electronic device 800, and temperature changes of the electronic device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0141] The communication component 816 is configured to facilitate wired or wireless communication between the electronic device 800 and other devices. The electronic device 800 can access a wireless network based on a communication standard, such as WiFi, an operator network (such as 2G, 3G, 4G or 5G), or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast operation information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0142] In an exemplary embodiment, the electronic device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0143] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by the processor 820 of the electronic device 800 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0144] Example 5

[0145] Figure 7 This is a block diagram of another electronic device 1900 provided in the present application. For example, the electronic device 1900 can be provided as a server.

[0146] Reference Figure 7 The electronic device 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute the instructions to perform the above-described method.

[0147] The electronic device 1900 may further include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or the like.

[0148] Example 6

[0149] In a sixth aspect, the present application illustrates a computer program product. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the method as described in any one of the above aspects.

[0150] It should be noted that, in this document, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0151] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0152] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

[0153] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the embodiments of this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0154] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0155] In the embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0156] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0157] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0158] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk, or an optical disk.

[0159] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A post-quantum cryptographic encryption system integrating Kyber and SM3, characterized by: The system includes: a control logic module, an interception unit, a filling unit, a hash module, an NTT module, a sampling module, a storage module and an interface module; wherein, The control logic module is used to transmit internal instruction signals of the processor and control the reception of external data, and to determine the number of rounds of the SM3 algorithm executed in the hash module based on the length of the hash value required in different modes when generating Kyber keys; The interception unit is used to intercept the effective length of each round of hash value; The padding unit is used to pad the input message of each round of the SM3 algorithm, and add a count value of a set length to the front end of the input message, where the size of the count value is the number of rounds executed by the SM3 algorithm; The hash module is configured to, under the control of the control logic module, determine the number of rounds required to execute the SM3 algorithm based on the length of the hash value required for different modes when generating Kyber keys, and the interception unit intercepts the effective length of the hash value of each round to ensure that the output hash value is a random number that meets the required length; The NTT module is used for calculating polynomial multiplication in the Kyber algorithm; the NTT module includes a butterfly unit and a control unit, the butterfly unit is used for calculating modular addition, modular subtraction and modular reduction, and the control unit is used to control the operation mode of the NTT module and control the butterfly unit to input the correct polynomial coefficients; The sampling module includes a rejection sampling unit and a central binomial distribution sampling unit, wherein the rejection sampling unit is used to sample to obtain a public matrix, and the central binomial distribution sampling unit is used to sample to obtain a noise vector; The storage module is used for data caching; The interface module is used to provide an input and output interface.

2. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The hash module includes a filling grouping unit, a message expansion unit and an iterative compression unit; wherein, The padding grouping unit is used to pad the input message so that its length becomes a multiple of 512; The message expansion unit is used to divide the padded message into a plurality of groups of 512 bits each, expand each group to generate an expansion result with 132 32-bit words as content, and iterate the expansion result; The iterative compression unit is used to output a hash value of a required length based on the iterative result of the message expansion unit.

3. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The NTT module further includes: Modular multiplier for pipelined K 2 -RED modular reduction algorithm implements modular multiplication operation in butterfly calculation; Ping-pong RAM structure, used to store the input and output of the butterfly unit; A plurality of ROMs are used to store the rotation factors corresponding to the butterflies in the butterfly unit.

4. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The filling unit is specifically used to add an 8-bit number at the front end of the input message as a count value, and the size of the count value is the number of rounds executed by the SM3 algorithm.

5. The post-quantum cryptographic encryption system integrating Kyber and SM3 according to claim 1, characterized in that: The modes of operation include encryption and decryption.

6. A post-quantum cryptographic encryption method integrating Kyber and SM3, characterized in that: Applied to the system according to any one of claims 1 to 5, the method comprises: In the key generation phase, an external random number is obtained and the random number seeds ρ and σ are obtained through the SM3 algorithm. ρ is used for rejection sampling to obtain the public matrix A, and σ is sampled through the central binomial distribution to obtain the noise vectors s and e. Expression-based Calculate the post-quantum cryptographic key and generate the public key and private key; In the encryption phase, the public key, the message m, and the random vector are input. The public key is decoded to obtain the seed ρ and the vector t. The seed ρ is obtained by rejection sampling to obtain the public matrix A. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; Through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext based on the vectors u and v; In the decryption phase, the key and ciphertext are input, and the key and ciphertext are decoded and decompressed respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations to realize post-quantum cryptography encryption and decryption.

7. The post-quantum cryptography encryption method integrating Kyber and SM3 according to claim 6, characterized in that: Before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation stage, the method further includes: Pad the random number input externally to make its length a multiple of 512.

8. The post-quantum cryptography encryption method integrating Kyber and SM3 according to claim 6, characterized in that: Before the step of obtaining an externally input random number and obtaining random number seeds ρ and σ through the SM3 algorithm in the key generation stage, the method further includes: Truncate the effective length of each round of hash value.

9. A post-quantum cryptographic encryption device integrating Kyber and SM3, characterized in that: The device comprises: The key generation unit is used to obtain the random number of external input and obtain the random number seeds ρ and σ through the SM3 algorithm during the key generation phase. ρ is used to reject sampling to obtain the public matrix A, and σ is sampled by the central binomial distribution to obtain the noise vectors s and e, and based on the expression Calculate the post-quantum cryptographic key and generate the public key and private key; The encryption unit is used to input the public key, message m and random vector in the encryption stage. The public key is decoded to obtain the seed ρ and vector t. The seed ρ is used to obtain the public matrix A through rejection sampling. T , the random vector r is input to the sampling module and the vectors r, e1 and e2 are obtained by sampling through the central binomial distribution; through the number theory transformation NTT and its inverse transformation INTT, and according to the expression Calculate vectors u and v, and generate ciphertext based on the vectors u and v; The decryption unit is used to input the key and ciphertext in the decryption stage, decode and decompress the key and ciphertext respectively to obtain the vector s T and u, v; calculated by number theory transformation NTT and its inverse transformation INTT Then subtract it from the vector v, and obtain the decrypted plaintext through compression and encoding operations, realizing post-quantum cryptography encryption and decryption; The device also includes a padding unit for padding the random number input externally before the key generation unit obtains the random number input externally and obtains the random number seeds ρ and σ through the SM3 algorithm, so that the length becomes a multiple of 512; The device further comprises an interception unit, which is used for intercepting the effective length of each round of hash value before the key generation unit obtains the random number input from the outside and obtains the random number seeds ρ and σ through the SM3 algorithm.

10. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the computer program implements the method according to any one of claims 6 to 8 when executed by the processor.

11. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which implements the method according to any one of claims 6 to 8 when executed by a processor.

12. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device implements the method according to any one of claims 6 to 8.

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