A memory pooling system and a server system

Abstract

The present invention discloses a memory pooling system and a server system, relating to the technical field of servers, including: a computing node, a memory switching node, and a memory pool node; the computing node is interconnected with the memory switching node through a first bus and is interconnected with the memory switching node through a network; the memory pool node is interconnected with the memory switching node through a first bus and is interconnected with the memory switching node through a second bus; the memory switching node includes a data center security control module; the memory switching node manages the memory pooling system through the data center security control module. This memory pooling system can reduce hardware costs and improve the maintainability of the entire server system.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and particularly to a memory pooling system and a server system. Background Art

[0002] In order to address the problem of the continuously increasing demands for memory, bandwidth, etc. in AI (Artificial Intelligence), currently, the entire server system usually provides a memory pooling system with a sufficiently large memory capacity, which is called a memory pooling system. The memory pooling system includes computing nodes, memory pool nodes, and memory exchange nodes. In related technologies, each node is equipped with a corresponding management module to maintain the normal operation of the memory pooling system. However, equipping each node with a management module results in a high hardware cost, and each node needs to be maintained separately later, and the maintainability of the entire server system is not high. Therefore, how to solve the above technical defects has become an urgent technical problem for those skilled in the art. Summary of the Invention

[0003] The purpose of the present invention is to provide a memory pooling system and a server system, which can reduce the hardware cost and improve the maintainability of the entire server system.

[0004] To solve the above technical problems, the present invention provides a memory pooling system, including:

[0005] Computing nodes, memory exchange nodes, and memory pool nodes; the computing nodes are interconnected with the memory exchange nodes through a first bus and through a network; the memory pool nodes are interconnected with the memory exchange nodes through a first bus and through a second bus; the memory exchange node includes a data center security control module; the memory exchange node manages the memory pooling system through the data center security control module.

[0006] In some embodiments, the computing node includes:

[0007] A central processing unit, a first management controller, a first Ethernet physical layer device, and a first connector; the central processing unit is connected to the first connector; the first management controller is connected to the first Ethernet physical layer device, and the first Ethernet physical layer device is connected to the first connector; the computing node is connected to the memory exchange node through the first connector.

[0008] In some embodiments, the computing node includes at least two central processing units.

[0009] In some embodiments, the central processing units are connected to each other through a third bus.

[0010] In some embodiments, the central processors are connected by a hyperpath interconnect bus.

[0011] In some embodiments, the target central processor in the computing node is connected to the first management controller through a fourth bus.

[0012] In some embodiments, the target central processor in the computing node is connected to the first management controller through an enhanced serial peripheral interface bus.

[0013] In some embodiments, the first management controller is connected to the first Ethernet physical layer device through a reduced gigabit media independent interface.

[0014] In some embodiments, the first Ethernet physical layer device is connected to the first connector through a media dependent interface.

[0015] In some embodiments, the computing node is interconnected with the memory exchange node through a high-speed interconnect bus, and the memory pool node is interconnected with the memory exchange node through a high-speed interconnect bus.

[0016] In some embodiments, the memory pool node is interconnected with the memory exchange node through an integrated circuit bus.

[0017] In some embodiments, the memory exchange node includes:

[0018] The data center security control module, a first switching device, a second switching device, a second connector, a third connector, and a fourth connector; the first switching device is respectively connected to the second connector, the third connector, and the fourth connector, the second switching device is respectively connected to the second connector and the fourth connector, the data center security control module is connected to the fourth connector, and the third connector is connected to the fourth connector; the memory exchange node is connected to the computing node through the second connector and connected to the memory pool node through the third connector.

[0019] In some embodiments, the memory exchange node includes at least two first switching devices.

[0020] In some embodiments, the memory exchange node further includes: a multiplexer; the multiplexer is connected to the first switching device and the fourth connector.

[0021] In some embodiments, the multiplexer is connected to the fourth connector through a universal asynchronous receiver / transmitter interface.

[0022] In some embodiments, the memory swapping node further includes: a third switching device; the third switching device is respectively connected to the first switching device and the fourth connector.

[0023] In some embodiments, the second switching device and the fourth connector are connected through a Serial Gigabit Media Independent Interface.

[0024] In some embodiments, the memory swapping node further includes: a network connector; the network connector is connected to the second switching device.

[0025] In some embodiments, the data center security control module includes:

[0026] a second management controller, a memory, a second Ethernet physical layer device, a gold finger; the second management controller is respectively connected to the memory, the second Ethernet physical layer device and the gold finger; the second Ethernet physical layer device is connected to the gold finger.

[0027] In some embodiments, the memory includes a Double Data Rate Synchronous Dynamic Random Access Memory, an Embedded Multimedia Memory, and a first flash memory.

[0028] In some embodiments, the memory pool node includes:

[0029] a memory controller, a memory, a fifth connector, and a second flash memory; the memory controller is respectively connected to the fifth connector, the second flash memory, and the memory; the memory pool node is connected to the memory swapping node through the fifth connector.

[0030] In some embodiments, the memory includes: a Dual In-line Memory Module.

[0031] To solve the above technical problems, the present invention also provides a server system, including the memory pooling system as described above.

[0032] The memory pooling system provided by the present invention includes: a computing node, a memory exchange node, and a memory pool node; the computing node is interconnected with the memory exchange node through a first bus and through a network; the memory pool node is interconnected with the memory exchange node through a first bus and through a second bus; the memory exchange node includes a data center security control module; the memory exchange node manages the memory pooling system through the data center security control module. It can be seen that in the memory pooling system provided by the present invention, a data center security control module is provided in the memory exchange node, and the memory exchange node manages the memory pooling system through the data center security control module. Through this data center security control module, management functions such as memory resource allocation can be realized. The management controller in the memory pool node and the management controllers in the memory exchange node and the memory resource manager in the related solutions are replaced by the data center security control module, which can reduce the hardware cost and improve the maintainability of the entire server system.

[0033] The server system provided by the present invention also has the above technical effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the prior art and the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0035] Figure 1 A schematic diagram of a memory pooling system provided in the related solution;

[0036] Figure 2 A schematic diagram of a memory pooling system provided in an embodiment of the present invention;

[0037] Figure 3 A schematic diagram of the structure of a computing node provided in an embodiment of the present invention;

[0038] Figure 4 A schematic diagram of the specific structure of a computing node provided in an embodiment of the present invention;

[0039] Figure 5 A schematic diagram of the structure of a memory exchange node provided in an embodiment of the present invention;

[0040] Figure 6 A schematic diagram of the specific structure of a memory exchange node provided in an embodiment of the present invention;

[0041] Figure 7Schematic diagram of a data center security control module board provided by an embodiment of the present invention;

[0042] Figure 8 Schematic diagram of the structure of a memory pool node provided by an embodiment of the present invention;

[0043] Figure 9 Specific structural schematic diagram of a memory pool node provided by an embodiment of the present invention;

[0044] Figure 10 Schematic diagram of the overall machine system deployment provided by an embodiment of the present invention. Specific implementation manners

[0045] The core of the present invention is to provide a memory pooling system and a server system, which can reduce the hardware cost and improve the maintainability of the overall server system.

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0047] As Figure 1 shown, in the related solutions, a first baseboard management controller is set in the computing node (i.e., the computing node module shown in Figure 1 ) of the memory pooling system (i.e., the memory resource management system shown in Figure 1 ), a second baseboard management controller and a memory resource management controller are set in the memory exchange node (i.e., the high-speed interconnect switch chip module shown in Figure 1 ), and a third baseboard management controller is set in the memory pool node (i.e., the memory resource module shown in Figure 1 ). The first baseboard management controller serves as the management module of the computing node, the second baseboard management controller and the memory resource management controller serve as the management module of the memory exchange node, and the third baseboard management controller serves as the management module of the memory pool node. In this way, each node sets its own management module, which will result in a relatively high hardware cost. Later, each node needs to be maintained separately, and the maintainability of the overall server system is not high. Therefore, the present invention provides a memory pooling system, aiming to reduce the hardware cost and improve the maintainability of the overall server system.

[0048] Please refer to Figure 2 , Figure 2 which is a schematic diagram of a memory pooling system provided by an embodiment of the present invention. Referring to Figure 2 shown, the memory pooling system includes:

[0049] A computing node 10, a memory swapping node 20, and a memory pool node 30; the computing node 10 is interconnected with the memory swapping node 20 through a first bus and is interconnected with the memory swapping node 20 through a network; the memory pool node 30 is interconnected with the memory swapping node 20 through a first bus and is interconnected with the memory swapping node 20 through a second bus; the memory swapping node 20 includes a data center security control module; the memory swapping node 20 manages the memory pooling system through the data center security control module 201.

[0050] The memory pooling system provided in this embodiment includes a plurality of computing nodes 10, memory swapping nodes 20, and memory pool nodes 30. The computing node 10 is used to execute computing tasks. The memory pool node 30 is used to provide memory resources. The memory swapping node 20 manages the memory pooling system through the data center security control module 201, which may include allocating and scheduling memory resources, managing memory pool nodes, summarizing the log information of the computing node 10, etc.

[0051] The computing node 10 is interconnected with the memory swapping node 20 through a first bus, and the memory pool node 30 is interconnected with the memory swapping node 20 through a first bus, so that the computing node 10 can obtain memory resources through the first bus.

[0052] In some embodiments, the computing node 10 is interconnected with the memory swapping node 20 through a high-speed interconnect bus, and the memory pool node 30 is interconnected with the memory swapping node 20 through a high-speed interconnect bus.

[0053] In this embodiment, the computing node 10 and the memory swapping node 20 are interconnected through a CXL (Compute Express Link, high-speed interconnect) bus. The memory pool node 30 and the memory swapping node 20 are interconnected through a CXL bus.

[0054] The computing node 10 is also interconnected with the memory swapping node 20 through a network, so that the computing node 10 and the memory swapping node 20 perform data interaction through the network. For example, the computing node 10 can transmit log information to the memory swapping node 20 through the network for summarization.

[0055] The memory pool node 30 is also interconnected with the memory swapping node 20 through a second bus, so that the memory swapping node 20 can manage the memory pool node 30 through the second bus.

[0056] In some embodiments, the memory pool node 30 is interconnected with the memory swapping node 20 through an integrated circuit bus.

[0057] In this embodiment, the memory pool nodes 30 are connected via the I2C (Inter-Integrated Circuit) bus. The memory exchange node 20 can manage the memory pool nodes 30 via the I2C bus.

[0058] Refer to Figure 3 As shown, in some embodiments, the computing node 10 includes:

[0059] A central processing unit 101, a first management controller 102, a first Ethernet physical layer device 103, and a first connector 104; the central processing unit 101 is connected to the first connector 104; the first management controller 102 is connected to the first Ethernet physical layer device 103, and the first Ethernet physical layer device 103 is connected to the first connector 104; the computing node is connected to the memory exchange node via the first connector 104.

[0060] The first connector 104 is connected to the memory exchange node 20. The central processing unit 101 in the computing node 10 is connected to the first connector 104 via a first bus to be interconnected with the memory exchange node 20 via the first connector 104. When the computing node 10 and the memory exchange node 20 are interconnected via a CXL bus, the central processing unit 101 in the computing node 10 is connected to the first connector 104 via the CXL bus.

[0061] The first management controller 102 can be a device with server management control functions such as a BMC (Baseboard Management Controller) or a remote controller ILO (Integrated Lights-Out). The first management controller 102 can be used to monitor signals such as the temperature, voltage, fan, and power supply of the computing node 10 and make corresponding adjustments to ensure that the computing node 10 is in a healthy state. In addition, the first management controller 102 can also be used to record information and logs of various hardware to prompt the user and locate subsequent problems. The first management controller 102 is connected to the first Ethernet physical layer device 103, and the first Ethernet physical layer device 103 is connected to the first connector 104. Various log information can be transmitted to the data center security control module 201 of the memory exchange node 20 for unified aggregation via the first Ethernet physical layer device 103.

[0062] In some embodiments, the computing node includes at least two central processing units 101.

[0063] Exemplarily, refer to Figure 3 As shown, the computing node 10 includes two central processing units 101. The two central processing units 101 can form a dual-channel system.

[0064] In some embodiments, the central processors 101 are connected via a third bus.

[0065] Exemplarily, referring to Figure 3 as shown, the computing node 10 includes two central processors 101, and the two central processors 101 are connected via a third bus to form a dual-processor system.

[0066] In some embodiments, the central processors 101 are connected via an Ultra Path Interconnect (UPI) bus.

[0067] Exemplarily, referring to Figure 4 as shown, the two central processors 101 (the first central processor and the second central processor) in the computing node 10 are connected via a UPI (Ultra Path Interconnect) bus.

[0068] In some embodiments, the target central processor in the computing node is connected to the first management controller 102 via a fourth bus.

[0069] One central processor 101 selected from the central processors 101 can be used as the target central processor. The target central processor is connected to the first management controller 102 via a fourth bus. The target central processor can transmit the log information of BIOS (Basic Input / Output System) startup to the first management controller 102 via the fourth bus.

[0070] In some embodiments, the target central processor in the computing node is connected to the first management controller 102 via an Enhanced Serial Peripheral Interface (eSPI) bus.

[0071] Exemplarily, referring to Figure 4 as shown, the first central processor is used as the target central processor, and the first management controller 102 is a BMC. The BMC monitors signals such as the temperature, voltage, fan, and power supply of the computing node 10 and makes corresponding adjustments. In addition, the BMC records the information and logs of various hardware components. The target central processor is connected to the BMC via an eSPI (Enhanced Serial Peripheral Interface) bus. The target central processor communicates with the BMC via the eSPI bus to transmit the log information of BIOS startup.

[0072] In some embodiments, the first management controller 102 is connected to the first Ethernet physical layer device 103 via a Reduced Gigabit Media Independent Interface.

[0073] Exemplarily, referring to Figure 4As shown, the first management controller 102 is a BMC, and the BMC is connected to the first Ethernet physical layer device 103 through RGMII (Reduced Gigabit Media Independent Interface).

[0074] In some embodiments, the first Ethernet physical layer device 103 is connected to the first connector 104 through a media - dependent interface.

[0075] Reference Figure 4 As shown, the first Ethernet physical layer device 103 is connected to the first connector 104 (which can be an MCIO connector) through MDI (Medium Dependent Interface). The BMC is connected to the first Ethernet physical layer device 103 through an RGMII interface, and the first Ethernet physical layer device 103 converts the signal into an MDI signal and connects it to the memory switching node 20.

[0076] Reference Figure 5 As shown, in some embodiments, the memory switching node 20 includes:

[0077] The data center security control module 201, the first switching device 202, the second switching device 203, the second connector 204, the third connector 205, and the fourth connector 206; the first switching device 202 is respectively connected to the second connector 204, the third connector 205, and the fourth connector 206, the second switching device 203 is respectively connected to the second connector 204 and the fourth connector 206, the data center security control module 201 is connected to the fourth connector 206, and the third connector 205 is connected to the fourth connector 206; the memory switching node 20 is connected to the computing node 10 through the second connector 204 and connected to the memory pool node 30 through the third connector 205.

[0078] The data center security control module 201, as the management center of the memory pooling system, can monitor the operating status of each computing node 10, monitor the memory resources of the memory pool node 30, allocate memory resources, and configure the port type, mapping method, bandwidth, and rate of the first switching device 202.

[0079] In some embodiments, the memory switching node 20 includes at least two first switching devices 202.

[0080] Among them, in some embodiments, the memory switching node 20 includes two first switching devices 202. When the first bus is a CXL bus, the adapted first switching device 202 is a CXL switching device.

[0081] In some embodiments, the memory switching node 20 further includes: a multiplexer 207; the multiplexer 207 is connected to the first switching device 202 and the fourth connector 206.

[0082] When the memory switching node 20 includes two or more first switching devices 202, the memory switching node 20 further includes a multiplexer 207. Each first switching device 202 is connected to the multiplexer 207, and the multiplexer 207 is also connected to the fourth connector. Multiple input signals can be selectively transmitted to one output channel through the multiplexer 207.

[0083] In some embodiments, the multiplexer 207 and the fourth connector 206 are connected through a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0084] Reference Figure 6 As shown, the multiplexer 207 and the fourth connector 206 (which can be a 4C+ connector) are connected through a UART (Universal Asynchronous Receiver / Transmitter) interface.

[0085] In some embodiments, the memory switching node 20 further includes: a third switching device 208; the third switching device 208 is respectively connected to the first switching device 202 and the fourth connector 206.

[0086] The third switching device 208 is a Peripheral Component Interconnect express (PCIe) switching device. The purpose of this embodiment is to expand the PCIe in-band control signals through the third switching device 208, so as to control the corresponding first switching device 202 through each group of PCIe in-band control signals.

[0087] In some embodiments, the second switching device 203 and the fourth connector 206 are connected through a Serial Gigabit Media Independent Interface (SGMII).

[0088] The second switching device 203 is a network switching device. The second switching device 203 and the fourth connector 206 are connected through an SGMII (Serial Gigabit Media Independent Interface) interface. The second switching device 203 can be connected to the second connector 206 through an MDI interface.

[0089] In some embodiments, the memory swapping node 20 further includes: a network connector 209; the network connector 209 is connected to the second switching device 203.

[0090] The network connector 209 can be connected to the second switching device 203 through an MDI interface. A user can obtain the operating status of each node through the network connector 209 and can also manage the memory pooling system through the network connector 209.

[0091] Exemplarily, referring to Figure 6 as shown, the network switching device is connected to the second connector 206 ( Figure 6 the uplink MCIO connector shown in Figure 6 through an MDI interface. The second switching device 203 supports multi-channel MDI signal output. For example, if the memory pooling system is provided with 8 computing nodes 10, the second switching device 203 supports 8-channel MDI signal output to realize interconnection with the 8 computing nodes 10. In addition, the second switching device 203 is connected to the network connector 209 through a group of MID interfaces so as to obtain the operating status of each node through the network connector 209 and can manage the memory pooling system through the network connector 209. When the second bus is an I2C bus, the third connector 205 (

[0092] Exemplarily, referring to Figure 6As shown, the memory swapping node 20 has two independent CXL swapping devices on board, namely the first high-speed interconnect bus swapping device (denoted as CXL switch0) and the second high-speed interconnect bus swapping device (denoted as CXL switch1). CXL switch0 and CXL switch1 are connected to the second connector 204 and the third connector 205 through the CXL bus. Among them, the second connector 204 is connected to the computing node 10, and the third connector 205 is connected to the memory pool node 30. The third swapping device 208 is a PCIe swapping device (denoted as PCIe switch). Two groups of PCIe in-band management signals are extended through the PCIe switch to manage the two CXL switches respectively. The PICe ports of all the devices attached to each CXL switch are configured as DSP (Down Stream Port), and the PCIe port connected to the data center security control module 201 is configured as USP (Upper Stream Port). The data center security control module 201 can identify each device and can enumerate and access the CXL devices in the entire memory pool. Among them, the data center security control module 201 needs to reserve sufficient areas in the address space for allocation to the CXL devices, supporting 32bit memory space and 16bit I / O space. The data center security control module 201 can also configure the port type of the CXL switch through the out-of-band UART and view the link rate.

[0093] In some embodiments, the data center security control module includes:

[0094] A second management controller, a memory, a second Ethernet physical layer device, and a gold finger; the second management controller is respectively connected to the memory, the second Ethernet physical layer device, and the gold finger; the second Ethernet physical layer device is connected to the gold finger.

[0095] The second management controller can be a device with server management control functions such as BMC and remote controller ILO. In addition, the Form Factor of the data center security control module 201 can adopt a vertical insertion method, and the interface signals of the data center security control module 201 are connected to the fourth connector 206 through the gold finger, supporting the transmission of PCIe, I2C, UART, and SGMII signals.

[0096] In some embodiments, the memory includes double data rate synchronous dynamic random access memory, embedded multimedia memory, and a first flash memory.

[0097] Exemplarily, refer to Figure 6As shown, the second management controller is the BMC. The BMC is connected to DDR4 (Double Data Rate 4th Generation Synchronous Dynamic Random Access Memory), EMMC (Embedded Multi Media Card), FLASH, and the second Ethernet physical layer device ( Figure 6 the PHY shown in

[0098] Reference Figure 7 As shown, in some embodiments, the size of the board of the data center security control module 201 can be 89 * 31.85 mm, meeting the design space of 1U height. The BMC can be selected as AST2600.

[0099] In some embodiments, the memory pool node includes:

[0100] A memory controller 301, a memory 302, a fifth connector 303, and a second flash memory 304; the memory controller 301 is respectively connected to the fifth connector 303, the second flash memory 304, and the memory 302; the memory pool node 30 is connected to the memory switching node 20 through the fifth connector 303.

[0101] Reference Figure 8 As shown, each memory controller 301 configures a corresponding FLASH. The FLASH stores the firmware. The memory controller 301 reads the firmware information to complete initialization. The memory controller 301 is connected to the memory switching node 20 through the CXL bus upward and is connected to the memory 302 downward. The data center security control module 201 can monitor the operating status of the memory controller 301 through the I2C signal.

[0102] In some embodiments, the memory 302 includes: a dual in-line memory module.

[0103] Reference Figure 9 As shown, each memory controller 301 configures a corresponding FLASH. The FLASH stores the firmware. The memory controller 301 reads the firmware information to complete initialization. The memory controller 301 is connected to the memory switching node 20 through the CXL bus upward and is connected to DIMM (Dual-Inline-Memory-Modules) downward.

[0104] The number of computing nodes 10 deployed in the memory pooling system can be set differently, and the present invention does not limit this.

[0105] Exemplarily, referring to Figure 10 As shown, 8 computing nodes 10 can be deployed. Among them, in order to facilitate the balance of the CXL routing length, 4 computing nodes 10 can be deployed above and below the cabinet respectively, and a memory switching node 20 and a memory pooling node 30 are deployed in the middle. The computing nodes and the memory switching node are interconnected through the CXL bus and the network, and the memory switching node and the memory pooling node are interconnected through the CXL bus and the I2C bus.

[0106] Among them, each computing node 10 can include two central processors, a BMC, a PHY chip, and an MCIO connector; the central processors are connected through the UPI bus, and the central processor and the MCIO connector are connected through the CXL bus. One of the central processors is connected to the BMC through the eSPI bus, the BMC and the PHY chip are connected through the RGMII interface, and the PHY chip and the MCIO connector are connected through the MDI interface.

[0107] The BMC in the computing node 10 can be used to monitor signals such as the temperature, voltage, fan, and power supply of the computing node, and perform corresponding adjustments to ensure that the computing node 10 is in a healthy state. In addition, the BMC in the computing node 10 can also be used to record the information and logs of various hardware to prompt the user and locate subsequent problems. The central processor can transmit the BIOS startup log information to the BMC through the eSPI bus. The BMC can transmit various log information to the data center security control module 201 of the memory switching node 20 through the PHY chip for unified aggregation.

[0108] The memory switching node 20 can include two CXL switches, an Eth switch, a PCIe switch, a multiplexer, a data center security control module 201, an uplink MCIO connector, a downlink MCIO connector, a 4C+ connector, and a network connector. The CXL switch is connected to the uplink MCIO connector and the downlink MCIO connector through the CXL bus. The Eth switch is connected to the uplink MCIO connector through the MDI interface. The Eth switch is connected to the 4C+ connector through the SGMII interface. The multiplexer is connected to the 4C+ connector through the UART bus. The 4C+ connector is connected to the downlink MCIO connector through the I2C bus.

[0109] Two groups of PCIe in-band management signals can be extended through the PCIe switch to manage two CXL switches respectively. The PICe ports of all the attached devices on each CXL switch are configured as DSPs, and the PCIe port connected to the data center security control module 201 is configured as a USP. The data center security control module 201 can identify each device and can enumerate and access the CXL devices in the entire memory pool. Among them, the data center security control module 201 needs to reserve enough areas in the address space for allocation to CXL devices, supporting 32-bit memory space and 16-bit I / O space.

[0110] Among them, the data center security control module 201 may include a BMC, DDR4, eMMC, FLASH, PHY chips, and a gold finger. The BMC is connected to the DDR4, eMMC, FLASH, PHY chips, and the gold finger. The PHY chip is connected to the gold finger.

[0111] In addition, the Form Factor of the data center security control module 201 can adopt a vertical plug-in method. The interface signals of the data center security control module 201 are connected to a 4C+ connector through the gold finger, supporting the transmission of PCIe, I2C, UART, and SGMII signals.

[0112] The memory pool node 30 may include: an MCIO connector, an MC (Memory Controller). Each MC has a corresponding FLASH and DIMM.

[0113] The FLASH stores the firmware. The MC reads the firmware information to complete initialization. The MC is connected to the memory switching node 20 through the CXL bus upstream and to the DIMM downstream. The data center security control module 201 can monitor the operating status of the MC through I2C signals.

[0114] In summary, for the memory pooling system provided by the present invention, a data center security control module is set in the memory switching node. The memory switching node manages the memory pooling system through the data center security control module. Through this data center security control module, management functions such as memory resource allocation can be realized. The management controllers in the memory pool nodes and the management controllers in the memory switching nodes and the memory resource manager in the related solutions are replaced by the data center security control module, which can reduce the hardware cost and improve the maintainability of the entire server system.

[0115] The present invention also provides a server system, which includes a memory pooling system, and the memory pooling system includes:

[0116] A computing node, a memory swapping node, and a memory pool node; the computing node is interconnected with the memory swapping node through a first bus and through a network; the memory pool node is interconnected with the memory swapping node through a first bus and through a second bus; the memory swapping node includes a data center security control module; the memory swapping node manages the memory pooling system through the data center security control module.

[0117] Based on the above embodiments, as a specific implementation manner, the computing node includes:

[0118] A central processing unit, a first management controller, a first Ethernet physical layer device, and a first connector; the central processing unit is connected to the first connector; the first management controller is connected to the first Ethernet physical layer device, and the first Ethernet physical layer device is connected to the first connector; the computing node is connected to the memory swapping node through the first connector.

[0119] Based on the above embodiments, as a specific implementation manner, the computing node includes at least two central processing units.

[0120] Based on the above embodiments, as a specific implementation manner, the central processing units are connected through a third bus.

[0121] Based on the above embodiments, as a specific implementation manner, the central processing units are connected through a hyperpath interconnect bus.

[0122] Based on the above embodiments, as a specific implementation manner, the target central processing unit in the computing node is connected to the first management controller through a fourth bus.

[0123] Based on the above embodiments, as a specific implementation manner, the target central processing unit in the computing node is connected to the first management controller through an enhanced serial peripheral interface bus.

[0124] Based on the above embodiments, as a specific implementation manner, the first management controller is connected to the first Ethernet physical layer device through a reduced gigabit media independent interface.

[0125] Based on the above embodiments, as a specific implementation manner, the first Ethernet physical layer device is connected to the first connector through a media dependent interface.

[0126] Based on the above embodiments, as a specific implementation manner, the computing node is interconnected with the memory exchange node through a high-speed interconnect bus, and the memory pool node is interconnected with the memory exchange node through a high-speed interconnect bus.

[0127] Based on the above embodiments, as a specific implementation manner, the memory pool node is interconnected with the memory exchange node through an integrated circuit bus.

[0128] Based on the above embodiments, as a specific implementation manner, the memory exchange node includes:

[0129] The data center security control module, a first switching device, a second switching device, a second connector, a third connector, and a fourth connector; the first switching device is respectively connected to the second connector, the third connector, and the fourth connector, the second switching device is respectively connected to the second connector and the fourth connector, the data center security control module is connected to the fourth connector, and the third connector is connected to the fourth connector; the memory exchange node is connected to the computing node through the second connector and connected to the memory pool node through the third connector.

[0130] Based on the above embodiments, as a specific implementation manner, the memory exchange node includes at least two first switching devices.

[0131] Based on the above embodiments, as a specific implementation manner, the memory exchange node further includes: a multiplexer; the multiplexer is connected to the first switching device and the fourth connector.

[0132] Based on the above embodiments, as a specific implementation manner, the multiplexer is connected to the fourth connector through a universal asynchronous receiver / transmitter interface.

[0133] Based on the above embodiments, as a specific implementation manner, the memory exchange node further includes: a third switching device; the third switching device is respectively connected to the first switching device and the fourth connector.

[0134] Based on the above embodiments, as a specific implementation manner, the second switching device is connected to the fourth connector through a serial gigabit media independent interface.

[0135] Based on the above embodiments, as a specific implementation manner, the memory exchange node further includes: a network connector; the network connector is connected to the second switching device.

[0136] Based on the above embodiments, as a specific implementation manner, the data center security control module includes:

[0137] A second management controller, a memory, a second Ethernet physical layer device, and a gold finger; the second management controller is respectively connected to the memory, the second Ethernet physical layer device, and the gold finger; the second Ethernet physical layer device is connected to the gold finger.

[0138] Based on the above embodiments, as a specific implementation manner, the memory includes a double data rate synchronous dynamic random access memory, an embedded multimedia memory, and a first flash memory.

[0139] Based on the above embodiments, as a specific implementation manner, the memory pool node includes:

[0140] A memory controller, a memory, a fifth connector, and a second flash memory; the memory controller is respectively connected to the fifth connector, the second flash memory, and the memory; the memory pool node is connected to the memory exchange node through the fifth connector.

[0141] Based on the above embodiments, as a specific implementation manner, the memory includes: a dual in-line memory module.

[0142] For the server system provided by the present invention, reference can be made to the embodiments of the above memory pooling system, which will not be elaborated here.

[0143] Because the situation is complex and it is impossible to list and elaborate one by one, those skilled in the art should be able to realize that under the basic principle of the embodiments provided by the present invention, multiple examples may exist in combination with the actual situation. Without sufficient creative labor, they should all fall within the scope of the present invention.

[0144] The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

[0145] The technical solutions provided by the present invention have been introduced in detail above. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

[0146] It should also be noted that in this specification, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

Claims

1. A memory pooling system, characterized in that: include: Compute nodes, memory exchange nodes, and memory pool nodes; The computing node is interconnected with the memory switch node via a first bus and is interconnected with the memory switch node via a network; The memory pool node is interconnected with the memory switch node via a first bus, and is interconnected with the memory switch node via a second bus; the memory switch node includes a data center security control module; The memory exchange node manages the memory pooling system through the data center security control module; the computing node obtains memory resources through the first bus; The computing node exchanges data with the memory exchange node through a network; The memory switch node manages the memory pool node through the second bus; The memory exchange node comprises: The data center security control module, the first switching device, the second switching device, the second connector, the third connector, and the fourth connector; the first switching device is connected to the second connector, the third connector, and the fourth connector respectively, the second switching device is connected to the second connector and the fourth connector respectively, the data center security control module is connected to the fourth connector, and the third connector is connected to the fourth connector; the memory switching node is connected to the computing node through the second connector, and is connected to the memory pool node through the third connector.

2. The memory pooling system according to claim 1, characterized in that: The computing node comprises: A central processing unit, a first management controller, a first Ethernet physical layer device, and a first connector; the central processing unit is connected to the first connector; the first management controller is connected to the first Ethernet physical layer device, and the first Ethernet physical layer device is connected to the first connector; the computing node is connected to the memory switching node via the first connector.

3. The memory pooling system according to claim 2, characterized in that: The computing node includes at least two central processing units.

4. The memory pooling system according to claim 3, characterized in that: The central processing units are connected via a third bus.

5. The memory pooling system according to claim 4, characterized in that: The central processing units are connected via a hyperpath interconnect bus.

6. The memory pooling system according to claim 2, characterized in that: The target central processing unit in the computing node is connected to the first management controller via a fourth bus.

7. The memory pooling system according to claim 6, characterized in that: The target central processing unit in the computing node is connected to the first management controller via an enhanced serial peripheral interface bus.

8. The memory pooling system according to claim 2, characterized in that: The first management controller is connected to the first Ethernet physical layer device via a reduced gigabit media independent interface.

9. The memory pooling system according to claim 2, characterized in that: The first Ethernet physical layer device is connected to the first connector via a medium dependent interface.

10. The memory pooling system according to claim 1, characterized in that: The computing node is interconnected with the memory switch node through a high-speed interconnect bus, and the memory pool node is interconnected with the memory switch node through a high-speed interconnect bus.

11. The memory pooling system according to claim 1, characterized in that: The memory pool node is interconnected with the memory switch node via an integrated circuit bus.

12. The memory pooling system according to claim 1, characterized in that: The memory switch node includes at least two first switch devices.

13. The memory pooling system according to claim 1, characterized in that: The memory switching node further includes: a multiplexer; the multiplexer is connected to the first switching device and the fourth connector.

14. The memory pooling system according to claim 13, characterized in that: The multiplexer is connected to the fourth connector via a universal asynchronous receiver-transmitter interface.

15. The memory pooling system according to claim 1, characterized in that: The memory switching node further includes: a third switching device; the third switching device is connected to the first switching device and the fourth connector respectively.

16. The memory pooling system according to claim 1, characterized in that: The second switching device is connected to the fourth connector via a serial Gigabit Media Independent Interface.

17. The memory pooling system according to claim 1, characterized in that: The memory switching node further includes: a network connector; the network connector is connected to the second switching device.

18. The memory pooling system according to claim 1, characterized in that: The data center security control module includes: A second management controller, a memory, a second Ethernet physical layer device, and a gold finger; the second management controller is connected to the memory, the second Ethernet physical layer device, and the gold finger respectively; the second Ethernet physical layer device is connected to the gold finger.

19. The memory pooling system according to claim 18, characterized in that: The memory includes a double data rate synchronous dynamic random access memory, an embedded multimedia memory and a first flash memory.

20. The memory pooling system according to claim 1, characterized in that: The memory pool node includes: A memory controller, a memory, a fifth connector and a second flash memory; the memory controller is connected to the fifth connector, the second flash memory and the memory respectively; the memory pool node is connected to the memory switch node via the fifth connector.

21. The memory pooling system according to claim 20, characterized in that: The memory includes: a dual in-line memory module.

22. A server system, characterized in that: Comprising a memory pooling system as described in any one of claims 1 to 21.

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