Data processing system and method based on secure real-time bus (SRB)

Abstract

The invention discloses a data processing system and method based on a secure real-time bus SRB, the data processing system comprises a main control computer node and a plurality of terminal equipment nodes, and the main control computer node comprises a main control computer and an encryption module connected with the main control computer; the plurality of terminal equipment nodes comprise a plurality of terminal equipment and a plurality of encryption modules connected with the terminal equipment, each encryption module is a pluggable encryption module with a dynamic encryption algorithm, and the main control computer is connected with the first end of the corresponding encryption module through a safe real-time bus. The second end of the encryption module corresponding to the main control computer is connected with the second ends of the encryption modules corresponding to the multiple terminal devices respectively, and the multiple terminal devices are connected with the first ends of the encryption modules corresponding to the terminal devices respectively through a safe real-time bus.

Description

Technical Field

[0001] The present application relates to the technical field of data processing of a secure real-time bus, and more specifically, to a data processing system and method based on a secure real-time bus (SRB). Background Art

[0002] The Secure Real-time Bus (SRB) uses a pair of shielded twisted-pair cables as the transmission medium. The communication protocol can ensure that the data transmission delay between devices is minimized and real-time communication can be performed. The existing real-time data transmission based on the SRB bus is to interact with multiple terminal devices at the same time through the main control computer. In order to improve the security of real-time data transmission on the SRB bus, encryption is required in the SRB bus.

[0003] The prior art is to perform software encryption in the main control computer or terminal device, and then send the data through the SRB bus after the software encryption. When the data is received, it must be decrypted by software before the complete data can be viewed.

[0004] However, encryption and decryption in the SRB bus are performed by software, and the installation and configuration of the software takes a certain amount of time, and also occupies hardware and system resources, affecting the performance of the main control computer or terminal device. In addition, encryption by software has low security and may be attacked and cracked.

[0005] Therefore, how to improve the security of data transmission in the SRB bus without affecting the performance of the main control computer or terminal equipment is an urgent problem to be solved in this application. Summary of the invention

[0006] In view of this, the present application discloses a data processing system and method based on a secure real-time bus (SRB), which aims to encrypt data in the secure real-time bus by dynamically changing the encryption algorithm through a plug-in dynamic encryption module, thereby improving the encryption efficiency and security of data in the secure real-time bus without affecting the performance of the main control computer or terminal equipment.

[0007] In order to achieve the above purpose, the disclosed technical solution is as follows:

[0008] The first aspect of the present application discloses a data processing system based on a secure real-time bus SRB, the system comprising a main control computer node and a plurality of terminal device nodes;

[0009] The main control computer node includes a main control computer and an encryption module connected thereto; the plurality of terminal device nodes include a plurality of terminal devices and a plurality of encryption modules connected thereto; wherein each encryption module is a pluggable encryption module with a dynamic encryption algorithm;

[0010] The main control computer is connected to the first end of its corresponding encryption module via a secure real-time bus;

[0011] The second end of the encryption module corresponding to the main control computer is connected to the second ends of the encryption modules corresponding to the plurality of terminal devices;

[0012] A plurality of terminal devices are respectively connected to the first ends of their corresponding encryption modules via a secure real-time bus;

[0013] Wherein, the main control computer node is used for multiple terminal device nodes, when the multiple terminal device nodes are nodes receiving data, to encrypt the data to be processed through the encryption module connected to the main control computer, convert the encrypted data into a secure real-time bus format, and send the encrypted data after the conversion format to the multiple terminal device nodes as receiving data;

[0014] The multiple terminal device nodes are used to encrypt the data to be processed by connecting the encryption modules of multiple terminal devices when the main control computer node is a node receiving data, convert the encrypted data into a secure real-time bus format, and send the encrypted data in the converted format to the main control computer node that receives the data.

[0015] Preferably, the encryption module includes a programmable gate array chip, a first external signal interface chip, a second external signal interface chip, a power chip and a USB key;

[0016] One end of the first external signal interface chip is connected to the main control computer or terminal device through a secure real-time bus; the first external signal interface chip is used to convert the data to be processed into a data interface format;

[0017] The first end of the programmable gate array chip is connected to the other end of the first external signal interface chip through a data interface bus, the second end of the programmable gate array chip is connected to the other end of the second external signal interface chip through a data interface bus, and the third end of the programmable gate array chip is connected to the USB key through a signal line; the programmable gate array chip is used to encrypt the data converted into the data interface format and read the encrypted data file in the USB key to determine the encryption algorithm;

[0018] One end of the second external signal interface chip is connected to the encryption module of other nodes through a secure real-time bus; the second external signal interface chip is used to convert the data in the data interface format encrypted by the programmable gate array chip into a secure real-time bus format;

[0019] The power chip is arranged in the power supply area of ​​the encryption module; the power chip is used to input power through an external adapter and convert it into a voltage suitable for each chip.

[0020] Preferably, the data interface is a Gigabit Medium Independent Interface.

[0021] Preferably, the signal line is a differential signal line.

[0022] Preferably, the first external signal interface chip is a bidirectional communication external signal interface chip.

[0023] Preferably, the second external signal interface chip is a bidirectional communication external signal interface chip.

[0024] The second aspect of the present application discloses a data processing method based on a secure real-time bus (SRB), the method being applied to a data processing system based on a secure real-time bus (SRB) as described in any one of the first aspects, the method comprising:

[0025] For multiple terminal device nodes, when the terminal device nodes are detected as nodes receiving data, the data to be processed are encrypted by an encryption module connected to the main control computer, the encrypted data are converted into a secure real-time bus format, and the encrypted data after the conversion format is sent to the multiple terminal device nodes as receiving data;

[0026] When it is monitored that the main control computer node is a node receiving data, the data to be processed is encrypted by connecting the encryption modules of multiple terminal devices, the encrypted data is converted into a secure real-time bus format, and the encrypted data in the converted format is sent to the main control computer node that receives the data.

[0027] Preferably, for a plurality of terminal device nodes, when the terminal device node is detected as a node receiving data, the data to be processed is encrypted by an encryption module connected to the main control computer, and the encrypted data is converted into a secure real-time bus format, including:

[0028] For multiple terminal device nodes, when it is detected that the terminal device node is a node receiving data, the format of the data to be processed is converted into a Gigabit Medium Independent Interface format by an encryption module of the terminal device node receiving the data;

[0029] Encrypting data in Gigabit Media Independent Interface format by means of an encrypted data file of an encryption module of the programmable gate array chip and a node receiving data;

[0030] The encrypted data in the Gigabit Media Independent Interface format is converted into a secure real-time bus format through the first external signal interface chip.

[0031] Preferably, when the main control computer node is detected as a node receiving data, the data to be processed is encrypted by connecting encryption modules of multiple terminal devices, and the encrypted data is converted into a secure real-time bus format, including:

[0032] When it is detected that the main control computer node is a node receiving data, the format of the data to be processed is converted into a Gigabit Medium Independent Interface format through an encryption module of the main control computer node receiving the data;

[0033] Encrypting data in Gigabit Media Independent Interface format by means of an encrypted data file of an encryption module of the programmable gate array chip and a node receiving data;

[0034] The encrypted data in the Gigabit Media Independent Interface format is converted into a secure real-time bus format through the first external signal interface chip.

[0035] Preferably, it also includes:

[0036] During the encryption process of the data to be processed, if the encryption algorithm transformation conditions are met, the encryption algorithm transformation is performed through the programmable gate array chip to generate a transformed encrypted data file.

[0037] Through the above technical scheme, it can be known that the present application discloses a data processing system and method based on a secure real-time bus SRB, the system includes a main control computer node and multiple terminal device nodes, the main control computer node includes a main control computer and an encryption module connected thereto, the multiple terminal device nodes include multiple terminal devices and multiple encryption modules connected thereto, wherein each encryption module is a plug-in encryption module with a dynamic encryption algorithm, the main control computer is connected to the first end of the encryption module corresponding to the main control computer through the secure real-time bus, the second end of the encryption module corresponding to the main control computer is connected to the second end of the encryption module corresponding to each of the multiple terminal devices, and the multiple terminal devices are connected to the secure real-time bus They are respectively connected to the first ends of their respective corresponding encryption modules, wherein the main control computer node is used to encrypt the data to be processed by connecting to the encryption module of the main control computer when the multiple terminal device nodes are nodes receiving data, convert the encrypted data into a secure real-time bus format, and send the encrypted data after the format conversion to the multiple terminal device nodes receiving data, and the multiple terminal device nodes are used to encrypt the data to be processed by connecting to the encryption modules of the multiple terminal devices when the main control computer node is a node receiving data, convert the encrypted data into a secure real-time bus format, and send the encrypted data after the format conversion to the main control computer node receiving data.

[0038] This solution uses a plug-in dynamic encryption module to encrypt and decrypt data, that is, to encrypt and decrypt data in a secure real-time bus in a hardware manner. Since hardware encryption uses a specially designed encryption module, it has strict security measures and protection mechanisms. Compared with software encryption, hardware encryption is more difficult to be cracked and attacked, providing higher security protection, and the hardware encryption module has the ability to respond instantly and can immediately process encryption requests. When a large amount of data needs to be encrypted or decrypted, hardware encryption can provide higher efficiency and real-time performance. The hardware encryption module can be operated directly at the hardware level, avoiding the cumbersome process of encryption and decryption by software through the operating system in software encryption, and through the plug-in dynamic encryption module, the encryption algorithm can be dynamically changed to encrypt data in the secure real-time bus, which improves the encryption efficiency and security of data in the secure real-time bus without affecting the performance of the main control computer or terminal equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0040] Figure 1 A schematic diagram of the structure of a data processing system based on an SRB bus disclosed in an embodiment of the present application;

[0041] Figure 2 This is an internal schematic diagram of the encryption module disclosed in the embodiment of the present application;

[0042] Figure 3 A flow chart of a data processing method based on an SRB bus disclosed in an embodiment of the present application. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0044] In this application, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0045] As can be seen from the background technology, the prior art is to perform software encryption in the main control computer or terminal device, and when sending data, the data is encrypted by software and then sent through the SRB bus. When the data is received, it must be decrypted by software before the complete data can be viewed. However, encryption and decryption by software in the SRB bus require a certain amount of time for installation and configuration of the software, and will also occupy hardware and system resources, affecting the performance of the main control computer or terminal device, and encryption by software has low security and may be attacked and cracked. Therefore, how to improve the security of data transmission in the SRB bus without affecting the performance of the main control computer or terminal device is a problem that urgently needs to be solved in this application.

[0046] In order to solve the above problems, the present application discloses a data processing system and method based on SRB bus. The scheme encrypts and decrypts data through a plug-in dynamic encryption module, that is, encrypts and decrypts data in a hardware manner in a secure real-time bus. Since hardware encryption uses a specially designed encryption module, it has strict security measures and protection mechanisms. Compared with software encryption, hardware encryption is more difficult to be cracked and attacked, providing higher security protection, and the hardware encryption module has the ability to respond immediately and can immediately process encryption requests. When a large amount of data needs to be encrypted or decrypted, hardware encryption can provide higher efficiency and real-time performance. The hardware encryption module can be operated directly at the hardware level, avoiding the cumbersome process of encryption and decryption by software through the operating system in software encryption, and through the plug-in dynamic encryption module, the encryption algorithm can be dynamically changed to encrypt data in the secure real-time bus, without affecting the performance of the main control computer or terminal equipment, improving the encryption efficiency and security of data in the secure real-time bus. The specific implementation method is specifically described by the following embodiments.

[0047] refer to Figure 1 , which is a schematic diagram of a structure of a data processing system based on an SRB bus provided in an embodiment of the present application, wherein the data processing system based on the SRB bus includes a control computer node and a plurality of terminal device nodes. The number of the terminal device nodes is not limited.

[0048] This solution implements hardware encryption by connecting an encryption module in series to the SRB bus port of the main control computer node or the terminal device node. The encryption module has two ports, the first end (end A) and the second end (end B), where end A is connected to the terminal device through the SRB bus, and end B is interconnected with encryption modules of other nodes through the SRB bus. The end A and end B of the encryption module are interchangeable, that is, the encryption module can be connected to the main control computer or terminal device in both the forward and reverse directions.

[0049] The main control computer node is used for encrypting the data to be processed by connecting to the encryption module of the main control computer for multiple terminal device nodes, converting the encrypted data into the SRB bus format, and sending the encrypted data after the conversion format to the multiple terminal device nodes as receiving data when the multiple terminal device nodes are nodes receiving data;

[0050] The main control computer node includes a main control computer and an encryption module connected thereto; the plurality of terminal device nodes include a plurality of terminal devices and a plurality of encryption modules connected thereto; wherein each encryption module is a pluggable encryption module with a dynamic encryption algorithm.

[0051] It should be noted that the advantages of the pluggable encryption module with dynamic encryption algorithm are as follows:

[0052] 1. High security: The hardware encryption module uses a specially designed encryption chip or hardware module with strict security measures and protection mechanisms. Compared with software encryption, hardware encryption is more difficult to crack and attack, providing higher security protection.

[0053] 2. Improve encryption and decryption speed: Hardware encryption uses a dedicated hardware encryption module for operation, which usually has a hardware computing unit optimized for the encryption algorithm. Therefore, the encryption module can achieve faster processing speed and provide higher performance during encryption and decryption.

[0054] 3. Instant response: Hardware encryption modules usually have the ability to respond instantly and can process encryption requests immediately. This means that when a large amount of data needs to be encrypted or decrypted, hardware encryption can provide higher efficiency and real-time performance.

[0055] 4. Low power consumption: Hardware encryption modules usually adopt special designs to optimize power consumption. Compared with software encryption, they can provide better encryption performance at lower power consumption and extend the battery life of the device.

[0056] 5. Anti-attack performance: Hardware encryption can provide higher anti-attack performance. Hardware encryption modules usually have physical protection mechanisms to prevent physical attacks and side-channel attacks. At the same time, hardware encryption implements encryption algorithms at the chip level, which is difficult to crack through software-level attacks;

[0057] 6. Prevent illegal access: Hardware encryption devices can effectively prevent illegal access on physical devices. Since the encryption process is performed at the hardware level, attackers cannot bypass encryption protection through software means, thus increasing the difficulty of illegal access;

[0058] 7. Improve encryption performance: Hardware encryption devices usually have higher performance and faster encryption speed, which can improve the overall performance of the network. Compared with software encryption, hardware encryption devices can operate directly at the hardware level, avoiding the cumbersome process of encryption and decryption by software in software encryption, thereby improving encryption efficiency;

[0059] 8. Prevent data leakage and information loss: Hardware encryption devices can also prevent data leakage and information loss. They can provide data backup and recovery functions to prevent data loss. At the same time, hardware encryption devices can provide remote locking and wiping functions to prevent data from being accessed when the device is lost or stolen.

[0060] Multiple terminal device nodes are used to encrypt the data to be processed by connecting the encryption modules of multiple terminal devices when the main control computer node is a node receiving data, convert the encrypted data into SRB bus format, and send the encrypted data in the converted format to the main control computer node that receives data.

[0061] The connection relationship between the main control computer, multiple terminal devices and each encryption module is as follows:

[0062] The main control computer is connected to the first end (end A) of its corresponding encryption module via the SRB bus;

[0063] The second end (B end) of the encryption module corresponding to the main control computer is connected to the second ends of the encryption modules corresponding to the plurality of terminal devices respectively through the SRB bus;

[0064] A plurality of terminal devices are respectively connected to the first ends of their corresponding encryption modules via the SRB bus.

[0065] It should be noted that the structure of the encryption module of the main control computer is consistent with the structure of the encryption module of the terminal device.

[0066] The encryption module has a USB interface to the outside, which can be inserted into a USB flash drive. The internal structure of the encryption module is as follows: Figure 2 shown.

[0067] Figure 2 In the invention, the encryption module includes a field programmable gate array chip (FPGA), a first external signal interface (PHY) chip, a second PHY chip, a power chip and a USB key.

[0068] The connection relationship between the FPGA chip, the first PHY chip, the second PHY chip, the power chip and the USB key is as follows:

[0069] One end of the first PHY chip is connected to the main control computer or terminal device through a secure real-time bus; the first PHY chip is used to convert the data to be processed into a data interface format; wherein the data interface format may be a bus gigabit medium independent interface (RGMII) format; the first PHY chip is used to convert the SRB bus signal into an RGMII interface format, and interconnect with the RGMII interface of the FPGA chip; the first PHY chip is a bidirectional communication PHY chip;

[0070] The first end of the FPGA chip is connected to the other end of the first PHY chip through the data interface bus, the second end of the FPGA is connected to the other end of the second PHY chip through the RGMII bus, and the third end of the FPGA chip is connected to the USB key through a signal line; the FPGA chip is used to encrypt the data converted into the RGMII format and read the encrypted data file (bit file) in the USB key to determine the encryption algorithm;

[0071] Among them, the FPGA chip is used to detect the USB key to determine the encryption algorithm. In actual use, in order to improve security, the algorithm needs to be changed after running for a period of time. The encryption algorithm generates a bit file through the FPGA chip, and this bit file is copied to a dedicated U disk. The U disk has the function of a USB key; the signal line can be a differential signal line;

[0072] It should be noted that the algorithm needs to be changed after running for a period of time. The administrator first inserts the USB key into the USB interface of the encryption module. During the initialization process of the encryption module, the FPGA chip reads the bit file in the USB key to determine the encryption algorithm. After the initialization is completed, the power supply of the encryption module can be cut off, the USB key can be unplugged, and then inserted into the USB interface of the encryption module of the next node. Repeat the above operations. After the update operation of all encryption modules on the SRB bus is completed, the encryption modules in front of all nodes on the SRB bus will use a unified algorithm to decrypt the received data and encrypt the sent data;

[0073] If you want to change the encryption algorithm, you need to change the bit file. The configuration file of the algorithm in the FPGA will be embedded in the bit file. When changing the encryption algorithm, the FPGA reads the bit file to determine the dynamic encryption algorithm. The encryption algorithm can be compiled according to the actual situation, such as adding 1 to all numbers, scrambling all data, etc. When decrypting, if it is decrypted according to the encryption method. Put the same bit file in the following way: Figure 1 The three encryption modules in the system are unified to unify the encryption algorithm, and the encryption and decryption process can be executed.

[0074] The USB key uses differential signal lines to transmit data. Differential signal means a pair of signals, one of which is the inverse of the other, and the receiving end interprets the transmitted information by measuring the voltage difference between the two signals. This design can improve the signal's anti-interference ability and ensure the accuracy of the data.

[0075] One end of the second PHY chip is connected to the encryption module of other nodes through the SRB bus; the second PHY chip is used to convert the RGMII format data encrypted by the FPGA into the SRB bus format; wherein the second PHY chip is a PHY chip for bidirectional communication;

[0076] The power chip is arranged in the power supply area of ​​the encryption module; the power chip is used to input power through an external adapter and convert it into a voltage suitable for each chip (FPGA chip, first PHY chip and second PHY chip).

[0077] It should be noted that when data is sent from any node (such as the main control computer node or the terminal device node), it will first enter the encryption module, where the PHY chip (the first PHY chip or the second PHY chip) first converts the data into the RGMII interface format, enters the FPGA chip through the RGMII bus, and the FPGA chip encrypts the data. The encrypted data is then converted by the PHY chip (the first PHY chip or the second PHY chip) into the SRB bus format through another RGMII bus.

[0078] When the encryption module in front of any node receives data, it will be converted into RGMII bus format through the PHY chip (the first PHY chip or the second PHY chip). The FPGA chip decrypts the data and then converts the decrypted data into SRB bus format through another RGMII bus.

[0079] If the node does not need data encryption, the encryption module can be removed. The node without the encryption module cannot see the encrypted data, and the nodes without the encryption module can communicate unimpeded.

[0080] This application applies hardware encryption of the SRB bus. The hardware encryption module of the SRB bus is plug-and-play. A plug-and-play module is used to implement encryption of SRB bus nodes, which is easy to deploy. The encrypted and unencrypted nodes of the SRB bus do not interfere with each other, and local encryption applications can be performed on the network. For example, there are 10 nodes such as Figure 1 In the case of a connection, only 2 of the 10 nodes need to be encrypted, and the other nodes do not need to be encrypted. Therefore, only the encryption algorithm is injected into the 2 nodes that need to be encrypted. The 2 nodes that need to be encrypted send data to each other, and the 2 nodes can see the data. The other nodes see irregular garbled characters, etc. However, although the other 8 nodes are not encrypted, they can send data to each other, which does not affect the use of these 8 nodes.

[0081] Beneficial effects of the embodiments of the present application: This solution encrypts and decrypts data through a plug-in dynamic encryption module, that is, encrypts and decrypts data in a secure real-time bus in a hardware manner. Since hardware encryption uses a specially designed encryption module, it has strict security measures and protection mechanisms. Compared with software encryption, hardware encryption is more difficult to be cracked and attacked, providing higher security protection, and the hardware encryption module has the ability to respond immediately and can immediately process encryption requests. When a large amount of data needs to be encrypted or decrypted, hardware encryption can provide higher efficiency and real-time performance. The hardware encryption module can be operated directly at the hardware level, avoiding the cumbersome process of encryption and decryption by software through the operating system in software encryption, and through the plug-in dynamic encryption module, the encryption algorithm can be dynamically changed to encrypt data in the secure real-time bus, which improves the encryption efficiency and security of data in the secure real-time bus without affecting the performance of the main control computer or terminal equipment.

[0082] refer to Figure 3 As shown, a data processing method based on an SRB bus disclosed in an embodiment of the present application is provided. The data processing method based on the SRB bus mainly includes the following steps:

[0083] S301: Monitor each node to determine the node that receives data;

[0084] S302: when it is detected that the terminal device node is a node receiving data, the data to be processed is encrypted by an encryption module connected to the main control computer, the encrypted data is converted into an SRB bus format, and the encrypted data after the conversion is sent to multiple terminal device nodes as receiving data;

[0085] S303: When it is detected that the main control computer node is a node receiving data, the data to be processed is encrypted by connecting the encryption modules of multiple terminal devices, the encrypted data is converted into the SRB bus format, and the encrypted data after the conversion is sent to the main control computer node as the receiving data.

[0086] The execution process and execution principle of S301-S303 are the same as those in the above embodiment. Figure 1 The execution process and execution principle of the data processing system based on the SRB bus are consistent, which can be referred to and will not be repeated here.

[0087] Beneficial effects of the embodiments of the present application: This solution encrypts and decrypts data through a plug-in dynamic encryption module, that is, encrypts and decrypts data in a secure real-time bus in a hardware manner. Since hardware encryption uses a specially designed encryption module, it has strict security measures and protection mechanisms. Compared with software encryption, hardware encryption is more difficult to be cracked and attacked, providing higher security protection, and the hardware encryption module has the ability to respond immediately and can immediately process encryption requests. When a large amount of data needs to be encrypted or decrypted, hardware encryption can provide higher efficiency and real-time performance. The hardware encryption module can be operated directly at the hardware level, avoiding the cumbersome process of encryption and decryption by software through the operating system in software encryption, and through the plug-in dynamic encryption module, the encryption algorithm can be dynamically changed to encrypt data in the secure real-time bus, which improves the encryption efficiency and security of data in the secure real-time bus without affecting the performance of the main control computer or terminal equipment.

[0088] For the aforementioned method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the order of the actions described, because according to the present application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0089] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0090] The steps in the methods of the embodiments of the present application can be adjusted in order, combined, and deleted according to actual needs.

[0091] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0092] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

[0093] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A data processing system based on a secure real-time bus (SRB), characterized in that: The system includes a main control computer node and a plurality of terminal device nodes; The main control computer node includes a main control computer and an encryption module connected thereto; the plurality of terminal device nodes include a plurality of terminal devices and a plurality of encryption modules connected thereto; wherein each encryption module is a pluggable encryption module with a dynamic encryption algorithm; The main control computer is connected to the first end of its corresponding encryption module via a secure real-time bus; The second end of the encryption module corresponding to the main control computer is connected to the second ends of the encryption modules corresponding to the plurality of terminal devices; A plurality of terminal devices are respectively connected to the first ends of their corresponding encryption modules via a secure real-time bus; Wherein, the main control computer node is used for multiple terminal device nodes, when the multiple terminal device nodes are nodes receiving data, to encrypt the data to be processed through the encryption module connected to the main control computer, convert the encrypted data into a secure real-time bus format, and send the encrypted data after the conversion format to the multiple terminal device nodes as receiving data; The multiple terminal device nodes are used to encrypt the data to be processed by connecting the encryption modules of multiple terminal devices when the main control computer node is a node receiving data, convert the encrypted data into a secure real-time bus format, and send the encrypted data in the converted format to the main control computer node that receives the data.

2. The system according to claim 1, characterized in that The encryption module includes a programmable gate array chip, a first external signal interface chip, a second external signal interface chip, a power chip and a USB key; One end of the first external signal interface chip is connected to the main control computer or terminal device through a secure real-time bus; the first external signal interface chip is used to convert the data to be processed into a data interface format; The first end of the programmable gate array chip is connected to the other end of the first external signal interface chip through a data interface bus, the second end of the programmable gate array chip is connected to the other end of the second external signal interface chip through a data interface bus, and the third end of the programmable gate array chip is connected to the USB key through a signal line; the programmable gate array chip is used to encrypt the data converted into the data interface format and read the encrypted data file in the USB key to determine the encryption algorithm; One end of the second external signal interface chip is connected to the encryption module of other nodes through a secure real-time bus; the second external signal interface chip is used to convert the data in the data interface format encrypted by the programmable gate array chip into a secure real-time bus format; The power chip is arranged in the power supply area of ​​the encryption module; the power chip is used to input power through an external adapter and convert it into a voltage suitable for each chip.

3. The system according to claim 2, characterized in that The data interface is a Gigabit Medium Independent Interface.

4. The system according to claim 2, characterized in that The signal line is a differential signal line.

5. The system according to claim 2, characterized in that The first external signal interface chip is a bidirectional communication external signal interface chip.

6. The system according to claim 2, characterized in that The second external signal interface chip is a bidirectional communication external signal interface chip.

7. A data processing method based on a secure real-time bus SRB, characterized in that: The method is applied to the data processing system based on the secure real-time bus (SRB) according to any one of claims 1 to 6, and the method comprises: For multiple terminal device nodes, when the terminal device nodes are detected as nodes receiving data, the data to be processed are encrypted by an encryption module connected to the main control computer, the encrypted data are converted into a secure real-time bus format, and the encrypted data after the conversion format is sent to the multiple terminal device nodes as receiving data; When it is monitored that the main control computer node is a node receiving data, the data to be processed is encrypted by connecting the encryption modules of multiple terminal devices, the encrypted data is converted into a secure real-time bus format, and the encrypted data in the converted format is sent to the main control computer node that receives the data.

8. The method according to claim 7, characterized in that For the plurality of terminal device nodes, when the terminal device node is detected as a node receiving data, the data to be processed is encrypted by an encryption module connected to the main control computer, and the encrypted data is converted into a secure real-time bus format, including: For multiple terminal device nodes, when it is detected that the terminal device node is a node receiving data, the format of the data to be processed is converted into a Gigabit Medium Independent Interface format by an encryption module of the terminal device node receiving the data; Encrypting data in Gigabit Media Independent Interface format by means of an encrypted data file of an encryption module of the programmable gate array chip and a node receiving data; The encrypted data in the Gigabit Media Independent Interface format is converted into a secure real-time bus format through the first external signal interface chip.

9. The method according to claim 7, characterized in that: When the main control computer node is detected as a node receiving data, the data to be processed is encrypted by connecting the encryption modules of multiple terminal devices, and the encrypted data is converted into a secure real-time bus format, including: When it is detected that the main control computer node is a node receiving data, the format of the data to be processed is converted into a Gigabit Medium Independent Interface format through an encryption module of the main control computer node receiving the data; Encrypting data in Gigabit Media Independent Interface format by means of an encrypted data file of an encryption module of the programmable gate array chip and a node receiving data; The encrypted data in the Gigabit Media Independent Interface format is converted into a secure real-time bus format through the first external signal interface chip.

10. The method according to claim 7, characterized in that Also includes: During the encryption process of the data to be processed, if the encryption algorithm transformation conditions are met, the encryption algorithm transformation is performed through the programmable gate array chip to generate a transformed encrypted data file.

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