Electrical system schematic diagram generation method
By building the physical architecture layer and principle design layer of the aircraft electrical system and establishing device connectors and signal interfaces, the problem of difficulty in converting electrical interface definitions in the existing technology is solved, and the rapid design of schematic diagrams and data consistency are achieved.
Patent Information
- Application Number
- CN202411915443.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-03-25
AI Technical Summary
In the digital design of aircraft electrical systems, it is difficult for the prior art to effectively convert the definition of the electrical interface as a schematic diagram, and error checking is difficult, resulting in inconsistent design data.
By building the physical architecture layer of the electrical system, defining the device connectors shared by the physical architecture layer and the principle layer, establishing signal interfaces and electrical properties, synchronizing physical architecture data to the principle design layer, and using the symbol resource library to generate schematic diagrams.
It realizes rapid design and rapid iteration of electrical system schematic diagrams, ensures consistency of design data, and simplifies the process of error checking and design change.
Smart Images
Figure CN119692289A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of digital design of aircraft electrical systems, and in particular to a method for generating a schematic diagram of an electrical system. Background Art
[0002] In the design of aircraft electrical systems, schematic diagrams are used to show the electrical working principles of equipment and the functions of various electrical components, as well as the relationship between them. They are mainly used to study and analyze the working principles of circuits. Electrical system schematics are not only a part of the design process, but also play an important role in manufacturing, testing and flight testing.
[0003] At present, the digital design of electrical systems generally uses general drawing software or single electronic and electrical drawing software to draw schematics. As an important input of the schematic, the electrical interface control file is usually expressed in the form of a file. Designers need to manually convert the text expression into the schematic drawing expression. This conversion process is a duplication of the definition of the electrical interface, and it is difficult to check the errors that occur during the conversion process, which will lead to inconsistent data definitions in the upstream and downstream of the design. Summary of the invention
[0004] The purpose of the present application is to provide a method for generating an electrical system schematic diagram to solve or alleviate at least one problem in the background technology.
[0005] The technical solution of the present application is: a method for generating a schematic diagram of an electrical system, comprising:
[0006] S10, constructing a physical architecture layer of the electrical system, and defining complete data of the physical architecture layer;
[0007] S20, constructing a device connector shared by the physical architecture layer and the principle layer, defining a mapping relationship between the physical architecture port and the device connector and device connector properties, and determining the device connector and its related harness connector models;
[0008] S30, defining the signal interface between physical devices and the electrical properties of the signal, and establishing a matching relationship between two or more pins at the slave end and the destination end of each signal;
[0009] S40. Define the electrical system principle design layer data, divide the principle design layer data organization structure and establish a structure tree, synchronize the complete data of the physical architecture layer to the principle design layer, and call the preset symbol resources in the symbol resource library based on the principle design model data to generate a schematic diagram.
[0010] Preferably, the physical architecture layer includes a physical architecture model, a physical architecture port model and a physical architecture connection relationship model of aircraft electrical products, and the physical architecture model, the physical architecture port model and the physical architecture connection relationship model are hierarchically divided according to aircraft, system, subsystem, sub-subsystem and equipment;
[0011] The physical architecture model is used to reflect the physical composition of aircraft electrical products, which is embodied by physical devices and their attributes;
[0012] The physical architecture port model represents the input and output interface of the physical device, is used to describe the interaction information and related attributes between the physical frames, and defines the physical signal transmitted through the signal type;
[0013] The physical architecture connection relationship model represents the association relationship between physical devices, which is described by corresponding connections between ports of different physical devices.
[0014] Preferably, when defining the physical architecture port model, the port types are classified, the port types include bus type ports and hard wire type ports, and the hard wire type ports include power type ports and signal type ports;
[0015] Among them, for bus ports, when the bus port is a simplex channel, the port has clear input and output directions, and half-duplex and full-duplex ports have input and output directions;
[0016] Power ports provide AC / DC stable voltage to physical devices;
[0017] Hard-wired ports are divided into analog signals, discrete signals, and pulse signals.
[0018] Preferably, the device connector is defined with the physical architecture design as input to determine the pin numbers of the device connector and the physical meanings they represent.
[0019] Preferably, in the process of determining the device connector and its related harness connector model, if the device connector model or the matching harness connector or tail accessory changes, the information is changed according to the following rules:
[0020] a) If the model of the device connector is changed, the model of the device connector, the matching pin name, and the matching wiring harness connector model and tail accessory model shall be re-determined;
[0021] b) If only the wiring harness connector model or tail accessory model that matches the device connector changes, the selection and pin assignment information of the device connector is retained, and the modified wiring harness connector model or tail accessory model is updated;
[0022] c) If the device connector model remains unchanged and only its pin assignment information changes, only the matching relationship between the pin name and the pin number will be modified.
[0023] Preferably, based on the ports in the physical architecture port model and the connection relationship between them, the signal interface definition between the physical devices of each electrical system is completed, and a matching relationship is established between two or more pins at the from-end and to-end of each signal by selecting a pre-defined device connector in the physical architecture device for the signal and giving a pin number or pin description corresponding to the signal.
[0024] Preferably, the defined signal electrical properties include data object Net redundancy, circuit function code, electromagnetic compatibility category, subsystem, line type, color, wire gauge, special wire code, and laying code.
[0025] Preferably, the structure tree hierarchy of the principle design layer data corresponds one-to-one with the physical architecture layer, and is divided into levels according to aircraft, system, subsystem, subsystem, and equipment. The principle equipment model is synchronized according to the equipment of the physical architecture layer, and the principle signal is generated according to the pin allocation information of the physical architecture equipment to obtain the organizational structure of the signal model.
[0026] Preferably, based on the principle device model and its attribute definition data of the principle design layer, the preset drawing frame and symbol resource library are called to generate the schematic diagram, and the position of the symbol is adjusted to complete the rapid design of the schematic diagram.
[0027] Preferably, when the devices, ports, connection relationships in the physical architecture layer and the allocation of pins in the electrical interface definition change, after the physical architecture layer is modified, the change information is synchronized to the schematic design layer, and the schematic design layer compares the information with the schematic diagram. If there is any inconsistency in the information, the schematic diagram update is triggered, thereby realizing rapid design of the schematic diagram.
[0028] The method of the present application has the following significant advantages:
[0029] 1) Constructed digital clues from the physical architecture to the principle design of the electrical system in accordance with the model-based systems engineering approach;
[0030] 2) The electrical interface information defined in the physical architecture is reused, and the data of the principle design layer structure tree is generated from the physical architecture data;
[0031] 3) Schematic design data is automatically updated after the physical architecture or electrical interface definition information is changed;
[0032] 4) It can realize rapid generation and update of schematic drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the technical solution provided by the present application, the following is a brief introduction to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present application.
[0034] Figure 1 This is a schematic diagram of a rapid design method for an electrical system schematic diagram of the present application.
[0035] Figure 2 A schematic diagram of digital clues established in one embodiment of the present application. DETAILED DESCRIPTION
[0036] In order to make the purpose, technical solutions and advantages of the implementation of this application clearer, the technical solutions in the embodiments of this application will be described in more detail below in conjunction with the drawings in the embodiments of this application.
[0037] The present application proposes a model-based electrical system schematic generation method and device, which integrates electrical interface control information in the physical architecture model of the aircraft electrical system, establishes an association and driving relationship between the physical architecture design and the principle design data, and realizes rapid design and rapid iteration of the electrical system schematic.
[0038] like Figure 1 As shown, the electrical system schematic diagram generation method provided by the present application includes the following steps:
[0039] S10. Build the physical architecture layer of the electrical system and define the complete data of the physical architecture layer.
[0040] The physical architecture layer includes the physical architecture model, physical architecture port model and physical architecture connection relationship model of aircraft electrical products. The physical architecture model, physical architecture port model and physical architecture connection relationship model are hierarchically divided according to aircraft, system, subsystem, subsystem and equipment, and organized in a composition form that conforms to the decomposition structure of aircraft electrical products.
[0041] The physical architecture model is used to reflect the physical composition of aircraft electrical products, which is reflected by physical devices and their properties. The physical architecture port model represents the input and output interfaces of physical devices, and is used to describe the interactive information and related properties between physical devices, and defines the transmitted physical signals through signal types. The physical architecture connection relationship model represents the association relationship between physical devices, which is described by the corresponding connections between different physical device ports.
[0042] Among them, when defining the physical architecture port model, the port types can be classified, including bus ports and hard-wire ports. Hard-wire ports include power ports and signal ports. For bus ports, when the bus port is a simplex channel, the port has a clear input / output direction, and the direction of half-duplex and full-duplex ports is input / output; power ports provide AC / DC stable voltage to physical devices, and the type can be further subdivided according to the specific parameters of the power supply; hard-wire ports can be divided into analog signals, discrete signals, pulse signals and other types. When establishing a connection relationship between ports, ports of the same type and with compatible signal directions can be connected.
[0043] S20. Construct a device connector shared by the physical architecture layer and the principle layer, define the mapping relationship between the physical architecture port and the device connector and the device connector attributes, and determine the device connector and its related wiring harness connector models.
[0044] The physical architecture design is used as input to complete the definition of the device connector, and the pin number of the device connector and its physical meaning are determined. The connector of the physical device is numbered within the physical device range, and a specific model is associated with the device connector. The model of the device connector can be selected in the electrical component library. The pin name in the device connector is assigned to the corresponding pin number and pin information, and the matching relationship between the pin name and the pin number is defined.
[0045] According to the needs of the comprehensive design of the electrical system, determine the model of the wiring harness connector and its tail accessories that match the device connector. If the model of the device connector or the matching wiring harness connector or tail accessories changes, the information will be changed according to the following situations:
[0046] a) If the model of the device connector is changed, the model of the device connector, the matching pin name, and the matching wiring harness connector model and tail accessory model shall be re-determined;
[0047] b) If only the wiring harness connector model or tail accessory model that matches the device connector changes, the selection and pin assignment information of the device connector is retained, and the modified wiring harness connector model or tail accessory model is updated;
[0048] c) If the device connector model remains unchanged and only its pin assignment information changes, only the matching relationship between the pin name and the pin number will be modified.
[0049] S30, defining the signal interface between physical devices and the electrical properties of the signal, and establishing a matching relationship between two or more pins at the slave end and the destination end of each signal.
[0050] Based on the ports in the physical architecture port model and the connection relationship between them, complete the definition of the signal interface between the physical equipment of this electrical system and other physical equipment of the electrical system or other physical equipment of this electrical system, and complete the electrical signal interface editing:
[0051] The device ports in the physical architecture are expressed as a collection of several signals, and the pins connected to them from the end and to the end are defined for each signal. That is, a pre-defined device connector in the physical architecture device is selected for the signal, and the pin number or pin description corresponding to the signal is given. At this time, a matching relationship is established between the signal pin numbers.
[0052] In this application, in order to realize the automation of subsequent processes, it is also necessary to obtain information such as the subsystem where the signal is located, steady-state current, maximum voltage, minimum operating voltage, whether it is 360-degree shielded, function code, etc.
[0053] The system designers of the systems where the physical devices at both ends of the signal (from and to) are located define the pins connected to the two ends of the signal respectively. The physical devices at both ends are from and to each other. The number, number and other properties of the signals are based on the side that is defined first. If the system designer on the other side thinks it is inappropriate, the side that is defined first can make the modification after discussion. Similarly, when the number of signals increases or decreases, the side that is defined first can also make the modification.
[0054] Electrical property definition: define the electrical property information of the signal generated after editing the electrical signal interface, and group the data object Net that carries the signal information, that is, complete the definition of the signal group data object signal group. After defining the electrical properties, the complete electrical signal interface definition information is obtained. After defining the grouping of the data object Net, more detailed schematic design data is formed.
[0055] Since the signal data object Net is managed in the schematic design structure tree, the filling and updating of the electrical properties of the data object Net is carried out in the schematic design structure tree.
[0056] The electrical property definition of the signal includes information such as data object Net redundancy, circuit function code, electromagnetic compatibility category, subsystem, line type, color, wire gauge, special wire code, laying code, etc.
[0057] S40. Define the electrical system principle design layer data, divide the principle design layer data organization structure and establish a structure tree, synchronize the complete data of the physical architecture layer to the principle design layer, and call the preset symbol resources in the symbol resource library based on the principle design model data to generate a schematic diagram.
[0058] The structure tree of the principle design layer data corresponds to the physical architecture layer one by one, and is divided into layers according to aircraft, system, subsystem, subsystem, and equipment. The principle equipment model is synchronized according to the equipment in the physical architecture layer, and the principle signal is generated according to the pin allocation information of the physical architecture equipment, and the organizational structure of the signal model is obtained.
[0059] The synchronously generated signal models are numbered and displayed in the schematic diagram. Based on this, cables / wires are selected according to design requirements and signals are grouped.
[0060] Based on the principle device model and its attribute definition data of the principle design layer, call the preset frame resources and symbol resources and other resource libraries to generate the schematic diagram, adjust the position of the symbols, and complete the rapid design of the schematic diagram.
[0061] When changes occur in the upstream design, such as devices, ports, connection relationships in the physical architecture design, and pin allocation in the electrical interface definition, after modifying the upstream design model, the change information is synchronized to the schematic design layer. The schematic design layer and the schematic diagram are compared for information. If there is any inconsistency, the schematic diagram update can be triggered, thereby achieving rapid iteration of the schematic design.
[0062] The method of the present application is used to design the electrical system schematic diagram, and the digital clues established are as follows: Figure 2 As shown, as an important component in the digital design of electrical systems, it can support the rapid design and rapid iteration of the entire electrical system design process.
[0063] Compared with the prior art method of drawing schematic diagrams using general drawing software or single electronic and electrical drawing software, the method of the present application has the following significant advantages:
[0064] 1) Constructed digital clues from the physical architecture to the principle design of the electrical system in accordance with the model-based systems engineering approach;
[0065] 2) The electrical interface information defined in the physical architecture is reused, and the data of the principle design layer structure tree is generated from the physical architecture data;
[0066] 3) Schematic design data is automatically updated after the physical architecture or electrical interface definition information is changed;
[0067] 4) It can realize rapid generation and update of schematic drawings.
[0068] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.
Claims
1. A method for generating a schematic diagram of an electrical system, characterized in that: include: S10, constructing a physical architecture layer of the electrical system, and defining complete data of the physical architecture layer; S20, constructing a device connector shared by the physical architecture layer and the principle layer, defining a mapping relationship between the physical architecture port and the device connector and device connector properties, and determining the device connector and its related harness connector models; S30, defining the signal interface between physical devices and the electrical properties of the signal, and establishing a matching relationship between two or more pins at the slave end and the destination end of each signal; S40. Define the electrical system principle design layer data, divide the principle design layer data organization structure and establish a structure tree, synchronize the complete data of the physical architecture layer to the principle design layer, and call the preset symbol resources in the symbol resource library based on the principle design model data to generate a schematic diagram.
2. The method for generating an electrical system schematic diagram according to claim 1, wherein: The physical architecture layer includes a physical architecture model, a physical architecture port model, and a physical architecture connection relationship model of aircraft electrical products, and the physical architecture model, the physical architecture port model, and the physical architecture connection relationship model are hierarchically divided according to aircraft, system, subsystem, sub-subsystem, and equipment; The physical architecture model is used to reflect the physical composition of aircraft electrical products, which is embodied by physical devices and their attributes; The physical architecture port model represents the input and output interface of the physical device, is used to describe the interaction information and related attributes between the physical equipment, and defines the physical signal transmitted by the signal type; The physical architecture connection relationship model represents the association relationship between physical devices, which is described by corresponding connections between ports of different physical devices.
3. The method for generating an electrical system schematic diagram according to claim 2, wherein: When defining the physical architecture port model, the port types are classified, the port types include bus type ports and hard line type ports, and the hard line type ports include power type ports and signal type ports; Among them, for bus ports, when the bus port is a simplex channel, the port has clear input and output directions, and half-duplex and full-duplex ports have input and output directions; Power ports provide AC / DC stable voltage to physical devices; Hard-wire ports are divided into analog signals, discrete signals, and pulse signals.
4. The method for generating an electrical system schematic diagram according to claim 3, wherein: The device connector is defined with the physical architecture design as input, and the pin numbers of the device connector and the physical meanings they represent are determined.
5. The method for generating an electrical system schematic diagram according to claim 4, characterized in that: During the process of determining the device connector and its related harness connector models, if the device connector model or the matching harness connector or rear accessory changes, the information is changed according to the following rules: a) If the model of the device connector is changed, the model of the device connector, the matching pin name, and the matching wiring harness connector model and tail accessory model shall be re-determined; b) If only the wiring harness connector model or tail accessory model that matches the device connector changes, the selection and pin assignment information of the device connector is retained, and the modified wiring harness connector model or tail accessory model is updated; c) If the device connector model remains unchanged and only its pin assignment information changes, only the matching relationship between the pin name and the pin number will be modified.
6. The method for generating an electrical system schematic diagram according to claim 5, characterized in that: Based on the ports in the physical architecture port model and the connection relationship between them, the signal interface definition between the physical devices of each electrical system is completed. By selecting the pre-defined device connector in the physical architecture device for the signal and giving the pin number or pin description corresponding to the signal, a matching relationship is established between two or more pins at the from end and the to end of each signal.
7. The method for generating an electrical system schematic diagram according to claim 6, wherein: The defined signal electrical properties include data object Net redundancy, circuit function code, electromagnetic compatibility category, subsystem, line type, color, wire gauge, special wire code, and laying code.
8. The method for generating an electrical system schematic diagram according to claim 7, wherein: The structure tree hierarchy of the principle design layer data corresponds one-to-one with the physical architecture layer, and is divided into levels according to aircraft, system, subsystem, subsystem, and equipment. The principle equipment model is synchronized according to the equipment of the physical architecture layer, and the principle signal is generated according to the pin allocation information of the physical architecture equipment to obtain the organizational structure of the signal model.
9. The method for generating an electrical system schematic diagram according to claim 8, characterized in that: Based on the principle device model and its attribute definition data of the principle design layer, the preset drawing frame and symbol resource library are called to generate the schematic diagram, and the position of the symbols is adjusted to complete the rapid design of the schematic diagram.
10. The method for generating an electrical system schematic diagram according to claim 9, wherein: When the devices, ports, connection relationships in the physical architecture layer and the pin allocation in the electrical interface definition change, after modifying the physical architecture layer, the change information is synchronized to the schematic design layer. The schematic design layer compares the information with the schematic diagram. If there is any inconsistency, the schematic diagram is updated, thereby realizing rapid schematic design.