A packaging structure and method for an integrated circuit chip

By setting interactive connection pin components between modular chips, the problem of space and interference in the existing technology of modular chip small signal connection occupying the space and improving the connection strength is achieved.

CN119695016BActive Publication Date: 2025-07-18SHENZHEN WANLIANXIN TECH CO LTD
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Patent Information

Application Number
CN202510200703.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-24
Publication Date
2025-07-18
Estimated Expiration
2045-02-24

AI Technical Summary

Technical Problem

In the prior art, signal connection between modular chiplets is mainly carried out through pins on the circuit board, resulting in the chip size being unable to shrink and there is a risk of signal interference.

Method used

The modular chip body is composed of a solder layer, a substrate layer, a conductive layer and a plastic sealing layer. By setting interactively connecting pin components between adjacent chips, including pin fasteners and card parts, signal connection is realized and locked during the plastic sealing process, avoiding chip area and reducing interference.

Benefits of technology

The compact size of the modular chip is achieved, the connection strength between chips is improved, signal interference and errors are reduced, and the use needs in different occasions are met.

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Abstract

The present invention discloses a packaging structure and method for an integrated circuit chip, belonging to the technical field of chip packaging. It includes a modular chip body, which is composed of a welding layer, a substrate layer, a conductive layer, and a plastic packaging layer. The bottom of the welding layer is densely provided with chip contact protrusions to achieve signal connection between two adjacent modular chip bodies. The conductive layer is divided into an upper conductive layer, an intermediate insulating layer, and a lower conductive layer from top to bottom. The plastic packaging layer and the substrate layer are connected by four-corner positioning packaging components. Interactive connection pin assemblies are provided on the opposite side walls of the substrate layer. The present invention designs for multiple modular chips constituting an integrated chip. By arranging interactive connection pin assemblies between adjacent modular chips, the positioning and installation of adjacent modular chips can be achieved, and the signals can be connected during the plastic packaging process through the pins arranged on both sides of the chip, which can effectively avoid occupying the chip area and ensure the miniaturization of the modular chip.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular, to a packaging structure and method for an integrated circuit chip. Background Art

[0002] Chiplet is commonly known as "chiplet" or "small chipset". By splitting the various components originally integrated in the same SoC into multiple Chiplets with specific functions, manufacturing them separately, and then interconnecting them through advanced packaging technology, they are finally integrated and packaged into a system chip. Chiplet can disassemble and design a large chip into several small chips with the same manufacturing process, or it can be disassembled and designed into several small chips with different manufacturing processes. Chiplet is a silicon wafer-level IP integration and reuse technology, and its modular integration method can effectively improve the R & D speed of chips, reduce R & D costs and the threshold of chip development.

[0003] For current modular small chips, the signal connection between adjacent small chips is mainly achieved by connecting the circuits on the circuit board and the pins at the bottom of the small chips. Although this packaging method can reduce the packaging difficulty, it is not applicable to highly integrated chips. Some of the integrated small chips themselves occupy a large amount of pin space at the bottom, and pin space between chips also needs to be reserved, making it impossible to reduce the size of the chips. Moreover, the signal connection between small chips is a necessary process for integrating two chips. The current packaging method places the connection signal and the processing signal on the same layer, which poses a risk of mutual interference. Therefore, a packaging structure and method for an integrated circuit chip are proposed herein. Summary of the Invention

[0004] The purpose of the present invention is to solve the problems existing in the prior art, and to propose a packaging structure and method for an integrated circuit chip.

[0005] To achieve the above purpose, the present invention adopts the following technical solutions:

[0006] A packaging structure and method for an integrated circuit chip, including a modular chip body, the modular chip body is composed of a welding layer, a substrate layer, a conductive layer, and a plastic encapsulation layer. Chip contact protrusions are densely arranged at the bottom of the welding layer to realize the signal connection between two adjacent modular chip bodies. The conductive layer is divided into an upper conductive layer, a middle insulating layer, and a lower conductive layer from top to bottom. The plastic encapsulation layer and the substrate layer are connected by four-corner positioning encapsulation parts. Interaction connection pin assemblies are arranged on the opposite side walls of the substrate layer, and the interaction connection pin assemblies are in signal communication with the upper conductive layer;

[0007] The interactive connection pin assembly includes a conductor embedded in the substrate layer. Pin fasteners are densely arranged on one side of the conductor, and pin clips are densely arranged on the other side of the conductor.

[0008] Preferably, the four-corner positioning encapsulation member includes a plurality of plastic sealing rings arranged around the substrate layer, and plastic sealing members are arranged at the four corners of the plastic sealing layer corresponding to the positions of the plastic sealing rings;

[0009] The plastic sealing member includes a plastic sealing column connected to the scaling layer, and two plastic sealing rings are arranged on the outer side wall of the plastic sealing column.

[0010] Preferably, a ring of plastic sealing adhesive ring is arranged at the bottom of the plastic sealing layer to achieve the sealing between the plastic sealing layer and the substrate layer.

[0011] Preferably, the pin fastener is arranged in a "bow" shape, and a buckle opening is provided at the end of the pin fastener, and the buckle opening is adapted to the pin clip;

[0012] An adaptation opening for deforming the pin fastener by extrusion is provided on the plastic sealing layer, and an internal pressure convex block is arranged on the inner wall of the adaptation opening.

[0013] Preferably, the lower conductive layer is connected to the chip contact protrusion by welding, and the conductor is connected to the upper conductive layer.

[0014] Preferably, the welding layer is located below the substrate layer, a conductive groove for installing the conductive layer is provided on the substrate layer, and the plastic sealing layer is arranged above the substrate layer.

[0015] A packaging method proposed according to the packaging structure of an integrated circuit chip includes a modular chip packaging method composed of flip-chip packaging and snap-fastening packaging, and specifically includes the following steps:

[0016] S1. Interactive connection pin buckling: Corresponding the positions of the modular chip bodies according to the requirements of the integrated packaging chip, and correspondingly buckling and connecting the pin fasteners and pin clips on adjacent modular chip bodies;

[0017] S2. Chip flip-chip packaging; Corresponding and installing the chip contact protrusions on the welding layer of the modular chip body to the chip module installation positions on the circuit board, and using the solder bumps on the chip contact protrusions to achieve packaging;

[0018] S3. Applying pressure for snap-fastening packaging: Applying a predetermined pressure to the plastic sealing layer on the modular chip body, the pressure drives the plastic sealing layer to move downward, and under the action of the four-corner positioning encapsulation member, the plastic sealing layer moves downward and contacts the four corners of the substrate layer to complete the plastic sealing snap-fastening;

[0019] S4. Press and solidify: Continuously maintain the pressure to ensure the pressure between the encapsulation layer and the substrate layer. The encapsulation sealing adhesive ring under the pressure gradually solidifies to achieve the encapsulation of the chip.

[0020] Preferably, in the S3 press-fastening encapsulation, during the press-fastening encapsulation process, the temperature in the processing area is increased to meet the melting of the encapsulation sealing adhesive ring.

[0021] Preferably, in the S3 press-fastening encapsulation, when the encapsulation layer moves downward under the pressure, the adaptation port opened on the encapsulation layer moves downward, which will squeeze the pin fastener set in a "bow" shape, causing the pin fastener to move, and making the pin clip and the buckle move relatively to achieve locking.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0023] 1. The present invention is designed for multiple modular chips that make up an integrated chip. By setting an interactive connection pin assembly between adjacent modular chips, the positioning and installation of adjacent modular chips are achieved, and the signals are connected during the encapsulation process through the pins on both sides of the chip, which can effectively avoid occupying the chip area and ensure the miniaturization of the modular chips.

[0024] 2. The present invention realizes the signal processing between modular chips through the upper conductive layer by setting mutually adapted pin fasteners and pin clips between the modular chips, which can avoid the contact between the upper conductive layer and the lower conductive layer of the chip body, and reduce the generation of interference and errors.

[0025] 3. The present invention realizes the locking of the pin fastener and the pin clip during the encapsulation process of the encapsulation layer and the substrate layer through the mutually adapted pin fastener and pin clip, thereby ensuring the connection strength between modular chips. Compared with the existing structure of each independent modular chip, it can significantly improve the forced connection between chips and meet the use in different occasions. Description of the Drawings

[0026] Figure 1 It is a schematic assembly structure diagram of an encapsulation structure of an integrated circuit chip proposed by the present invention;

[0027] Figure 2 It is a schematic structure diagram of the substrate layer and the encapsulation layer in an encapsulation structure of an integrated circuit chip proposed by the present invention;

[0028] Figure 3 It is a schematic structure diagram of the pin fastener in an encapsulation structure of an integrated circuit chip proposed by the present invention;

[0029] Figure 4Schematic cross-sectional structure diagram of a packaging structure for an integrated circuit chip proposed by the present invention;

[0030] Figure 5 Schematic docking state structure diagram of an interactive connection pin assembly in a packaging structure for an integrated circuit chip proposed by the present invention;

[0031] Figure 6 Schematic structure diagram of a four-corner positioning package in a packaging structure for an integrated circuit chip proposed by the present invention;

[0032] Figure 7 Schematic flow chart of a packaging method for an integrated circuit chip proposed by the present invention.

[0033] In the figure: 1, welding layer; 2, base material layer; 3, plastic encapsulation layer; 4, upper conductive layer; 5, intermediate insulating layer; 6, lower conductive layer; 7, conduction body; 8, pin fastener; 9, pin clip; 10, plastic encapsulation ring; 11, plastic encapsulation column; 12, plastic encapsulation snap ring; 13, plastic encapsulation sealing adhesive ring; 14, buckle; 15, adapter port; 16, internal pressure bump. Specific embodiments

[0034] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0035] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, terms such as "installation", "provided with", "sheathed / connected", "connection", etc. should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0036] Example, referring to Figures 1 to 7 , a packaging structure and method for an integrated circuit chip, including a modular chip body, the modular chip body is composed of a welding layer 1, a base material layer 2, a conductive layer, and a plastic encapsulation layer 3. Further, the welding layer 1 is located below the base material layer 2, a conductive groove for installing the conductive layer is opened on the base material layer 2, and the plastic encapsulation layer 3 is provided above the base material layer 2.

[0037] The bottom of the welding layer 1 is densely provided with chip contact protrusions to realize the signal connection between two adjacent modular chip bodies. The conductive layer is divided into an upper conductive layer 4, a middle insulating layer 5, and a lower conductive layer 6 from top to bottom. The lower conductive layer 6 is connected to the chip contact protrusions by welding, and the conducting body 7 is connected to the upper conductive layer 4.

[0038] The plastic encapsulation layer 3 and the substrate layer 2 are connected by four-corner positioning encapsulation components. The four-corner positioning encapsulation components include a plurality of plastic encapsulation rings 10 arranged around the substrate layer 2. Plastic encapsulation parts are arranged at the four corners of the plastic encapsulation layer 3 corresponding to the positions of the plastic encapsulation rings 10.

[0039] The plastic encapsulation parts include plastic encapsulation columns 11 connected to the scaling layer. Two plastic encapsulation snap rings 12 are arranged on the outer side wall of the plastic encapsulation columns 11.

[0040] It should be noted that the plastic encapsulation snap rings 12 are all set with beveled edges. When the plastic encapsulation columns 11 move downward, they can be snapped into the plastic encapsulation rings 10, and it is difficult to break away after being snapped in. The lower plastic encapsulation snap ring 12 realizes the positioning installation between the plastic encapsulation layer 3 and the substrate layer 2, and the upper plastic encapsulation snap ring 12 plays a buckling effect.

[0041] A plastic encapsulation sealing adhesive ring 13 is arranged at the bottom of the plastic encapsulation layer 3 to realize the sealing between the plastic encapsulation layer 3 and the substrate layer 2.

[0042] Interactive connection pin assemblies are arranged on the opposite side walls of the substrate layer 2, and the interactive connection pin assemblies are in signal communication with the upper conductive layer 4.

[0043] The interactive connection pin assemblies include conducting bodies 7 embedded in the substrate layer 2. Pin fasteners 8 are densely arranged on one side of the conducting body 7, and pin catchers 9 are densely arranged on the other side of the conducting body 7.

[0044] Furthermore, the pin fasteners 8 are arranged in a "bow" shape. A buckle opening 14 is opened at the end of the pin fasteners 8. The buckle opening 14 is composed of a rectangular opening and a circular opening. The buckle opening 14 is adapted to the pin catchers 9. An adaptation opening 15 for deforming the pin fasteners 8 by extrusion is opened on the plastic encapsulation layer 3. Inner pressure bumps 16 are arranged on the inner wall of the adaptation opening 15.

[0045] During the downward movement of the plastic encapsulation layer 3, its adaptation opening 15 will move downward and then squeeze the pin fasteners 8. The pin fasteners 8 will be squeezed, causing the two sides of its bottom to approach each other. When approaching, it will move the position of the buckle opening 14, causing the pin catchers 9 originally at the circular opening to move into the rectangular opening, thereby realizing the tight connection between the pin catchers and the pin fasteners 8 and achieving the effect of locking connection, which can effectively avoid the detachment of the interactive connection pin assemblies and ensure the connection effect of the interactive signals.

[0046] A packaging method proposed for the packaging structure of an integrated circuit chip, specifically including the following steps:

[0047] Interactive connection pin buckling: According to the requirements of the integrated packaging chip, the modular chip bodies are positioned correspondingly, and the pin fasteners 8 and pin holders 9 on adjacent modular chip bodies are correspondingly buckled and connected;

[0048] Chip flip-chip packaging; The chip contact protrusions on the welding layer 1 of the modular chip body are correspondingly installed with the chip module installation positions on the circuit board, and the solder bumps on the chip contact protrusions are used to achieve packaging;

[0049] Pressing and buckling sealing: Apply a predetermined pressure to the plastic encapsulation layer 3 on the modular chip body. The pressure drives the plastic encapsulation layer 3 to move downward. Under the action of the four-corner positioning encapsulation parts, the plastic encapsulation layer 3 moves downward and contacts the four corners of the substrate layer 2 to complete the plastic encapsulation and buckling sealing;

[0050] During the process of pressing and buckling sealing, the temperature in the processing area is increased to meet the melting of the plastic encapsulation sealing adhesive ring 13. The melted plastic encapsulation sealing adhesive ring 13 has adhesiveness, which can ensure the sealing effect between the plastic encapsulation layer 3 and the substrate layer 2, thereby ensuring the packaging effect of the chip core conductive layer in the conductive groove;

[0051] Pressing and buckling solidification; Continuously maintain the pressure to ensure the pressure between the plastic encapsulation layer 3 and the substrate layer 2. The plastic encapsulation sealing adhesive ring 13 under the action of the pressure gradually solidifies to achieve the packaging of the chip.

[0052] Furthermore, when the plastic encapsulation layer 3 moves downward under the action of the pressure, the adaptation port 15 opened on the plastic encapsulation layer 3 moves downward, which will squeeze the pin fastener 8 arranged in a "bow" shape, causing the pin fastener 8 to move, so that the pin holder 9 and the buckling port 14 move relatively to achieve locking.

[0053] In the present invention, by setting an interactive connection pin assembly between adjacent modular chips to achieve the positioning and installation of adjacent modular chips, and by setting pins on both sides of the chip to complete signal connection during the plastic encapsulation process, it can effectively avoid occupying the chip area and ensure the miniaturization of the modular chip. By setting mutually adapted pin fasteners and pin holders between the modular chips, the signal processing between the modular chips is carried out through the upper conductive layer 4, which can avoid the contact between the upper conductive layer 4 and the lower conductive layer 6 of the chip body, reducing the generation of interference and errors; Through the mutually adapted pin fasteners 8 and pin holders 9, during the process of plastic encapsulation of the plastic encapsulation layer 3 and the substrate layer 2, the locking of the pin fasteners 8 and pin holders 9 is achieved, thereby ensuring the connection strength between the modular chips. Compared with the existing structure of each independent modular chip, it can significantly improve the forced connection between each chip and meet the use in different occasions.

[0054] As described above, it is only the preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, making equivalent substitutions or changes should be covered within the protection scope of the present invention.

Claims

1. A packaging structure of an integrated circuit chip, including a modular chip body, characterized in that, The modular chip body is composed of a welding layer (1), a substrate layer (2), a conductive layer, and a plastic encapsulation layer (3). The bottom of the welding layer (1) is densely provided with chip contact protrusions to achieve signal connection between two adjacent modular chip bodies. The conductive layer is divided into an upper conductive layer (4), an intermediate insulating layer (5), and a lower conductive layer (6) from top to bottom. The plastic encapsulation layer (3) is connected to the substrate layer (2) through four-corner positioning encapsulation components. Interactive connection pin assemblies are provided on the opposite side walls of the substrate layer (2), and the interactive connection pin assemblies are in signal communication with the upper conductive layer (4). The interactive connection pin assembly includes a conduction body (7) buried in the substrate layer (2). Pin fasteners (8) are densely provided on the conduction body (7) on one side, and pin clamping parts (9) are densely provided on the conduction body (7) on the other side. The pin fastener (8) is arranged in a "bow" shape. A buckle opening (14) is provided at the end of the pin fastener (8). The buckle opening (14) is composed of a rectangular opening and a circular opening, and the buckle opening (14) is adapted to the pin clamping part (9). An adaptation opening (15) for squeezing and deforming the pin fastener (8) is provided on the plastic encapsulation layer (3), and inner pressing protrusions (16) are provided on the inner wall of the adaptation opening (15). During the downward movement of the plastic encapsulation layer (3), the adaptation opening (15) will move downward to squeeze the pin fastener (8). The pin fastener (8) is squeezed so that the two sides of its bottom approach each other, realizing the movement of the buckle opening (14) part, and making the pin clamping part (9) originally at the circular opening move into the rectangular opening, thereby realizing the tight connection between the pin clamping part (9) and the pin fastener (8).

2. The packaging structure of an integrated circuit chip according to claim 1, wherein, The four-corner positioning encapsulation component includes a plurality of plastic encapsulation rings (10) arranged around the substrate layer (2). Plastic encapsulation parts are provided at the four corners of the plastic encapsulation layer (3) corresponding to the positions of the plastic encapsulation rings (10). The plastic encapsulation part includes a plastic encapsulation column (11) connected to the scaling layer. Two plastic encapsulation clamping rings (12) are provided on the outer side wall of the plastic encapsulation column (11).

3. The packaging structure of an integrated circuit chip according to claim 2, characterized in that, A plastic encapsulation sealing adhesive ring (13) is provided at the bottom of the plastic encapsulation layer (3) to realize the sealing between the plastic encapsulation layer (3) and the substrate layer (2).

4. The packaging structure of an integrated circuit chip according to claim 3, characterized in that, The lower conductive layer (6) is connected to the chip contact protrusion by welding, and the conduction body (7) is connected to the upper conductive layer (4).

5. The package structure of an integrated circuit chip according to claim 4, characterized in that The welding layer (1) is located below the substrate layer (2). A conductive groove for installing the conductive layer is provided on the substrate layer (2), and the plastic encapsulation layer (3) is provided above the substrate layer (2).

6. A packaging method for an integrated circuit chip according to any one of claims 1-5, characterized in that, It includes a modular chip encapsulation method composed of flip-chip packaging and snap-fastening packaging, specifically including the following steps: S1. Interactive connection pin buckling: According to the requirements of the integrated packaged chip, the positions of the modular chip bodies are corresponded, and the pin fasteners (8) and the pin clamping parts (9) on the adjacent modular chip bodies are correspondingly buckled and connected. S2. Chip flip-chip packaging; The chip contact protrusions on the welding layer (1) of the modular chip body are correspondingly installed with the chip module installation positions on the circuit board, and encapsulation is realized by using the solder bumps on the chip contact protrusions. S3. Press and seal: Apply a predetermined pressure to the plastic encapsulation layer (3) on the modular chip body. The pressure drives the plastic encapsulation layer (3) to move downward. Under the action of the four-corner positioning encapsulation component, the plastic encapsulation layer (3) moves downward and contacts the four corners of the substrate layer (2) to complete the plastic encapsulation and sealing. S4. Press and solidify: Continuously maintain the pressure to ensure the pressure between the plastic encapsulation layer (3) and the substrate layer (2). The plastic encapsulation sealing adhesive ring (13) under the action of the pressure gradually solidifies to achieve the encapsulation of the chip.

7. A packaging method for an integrated circuit chip according to claim 6, characterized in that, In the S3 press and seal, during the press and seal process, the temperature in the processing area is raised to meet the melting of the plastic encapsulation sealing adhesive ring (13).

8. A packaging method for an integrated circuit chip according to claim 7, characterized in that, In the S3 press and seal, when the plastic encapsulation layer (3) moves downward under the action of the pressure, the fitting opening (15) opened on the plastic encapsulation layer (3) moves downward, which will squeeze the pin fastener (8) arranged in a "bow" shape, causing the pin fastener (8) to move, so that the pin clip (9) and the buckle opening (14) move relatively to achieve locking.

Citation Information

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