Memory management method and device for hardware smart contract, equipment and medium

By implementing smart contract memory management in blockchain-specific hardware, the security vulnerabilities, slow iteration and performance dependency problems of smart contract memory management in the existing technology are solved, and efficient memory management and high-throughput transaction processing are achieved.

CN119718620APending Publication Date: 2025-03-28BEIJING MICROCHIP EDGE COMPUTING RES INST
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Patent Information

Application Number
CN202411583246.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-07
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

Smart contract memory management running in existing blockchain networks relies on open source virtual machine technology, has security vulnerabilities, slow iteration, and uncontrollable performance, and heavy dependent on host hardware.

Method used

A memory management method for hardware smart contracts is proposed. By determining the target unit area of ​​the data sharing area in the blockchain dedicated hardware, writing, analyzing, computing and handling of blockchain transaction data, realizing hardware-level access rights control and autonomous controllability.

Benefits of technology

It realizes efficient smart contract memory management and high-throughput smart contract transaction processing in personalized host performance configuration scenarios, avoiding dependence on the system or third-party software.

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Abstract

The invention provides a memory management method and device for a hardware smart contract, equipment and a medium, and the method comprises the steps: determining a target unit region of a data sharing region in block chain dedicated hardware, and enabling the target unit region to comprise a target data region and a target calculation unit; writing the block chain transaction data into a target data area and performing analysis processing to obtain a target analysis result; carrying the target analysis result and the hardware smart contract to a target calculation unit for calculation to obtain a data transaction result; and carrying the data transaction result to the target data area. By implementing the method disclosed by the invention, hardware-level access authority control can be realized, and the access authority can be completely autonomously controllable, does not depend on a system or third-party software, does not depend on and basically does not consume a host machine where the access authority is located; therefore, efficient intelligent contract memory management and high-throughput intelligent contract transaction processing can be completed in a personalized host machine performance configuration scene.
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Description

Technical Field

[0001] The present disclosure relates to the field of memory management technology, and in particular to a memory management method, apparatus, device and medium for hardware smart contracts. Background Art

[0002] The memory management of smart contracts running in the current mainstream blockchain network generally relies on open source virtual machine technology, such as Docker containers and EVM containers. Their memory management generally relies on the implementation of such open source projects or the memory management mechanism of the running system. They have security vulnerabilities, slow iterations, and cannot be autonomous and controllable. At the same time, their performance is heavily dependent on the host machine's CPU, memory and other hardware infrastructure. Summary of the invention

[0003] The present disclosure aims to solve one of the technical problems in the related art at least to some extent.

[0004] To this end, the purpose of the present disclosure is to propose a memory management method, device, computer equipment and storage medium for hardware smart contracts, which can realize hardware-level access permission control and is completely autonomous and controllable, independent of the system or third-party software, independent of and basically does not consume the host machine, thereby completing efficient smart contract memory management and high-throughput smart contract transaction processing in a personalized host machine performance configuration scenario.

[0005] To achieve the above-mentioned purpose, the memory management method of hardware smart contract proposed in the first aspect of the present disclosure includes:

[0006] Determine a target unit area of ​​a data sharing area in blockchain-specific hardware, wherein the target unit area includes a target data area and a target computing unit;

[0007] Writing the blockchain transaction data into the target data area and performing parsing processing to obtain a target parsing result;

[0008] The target parsing result and the hardware smart contract are transferred to the target computing unit for calculation to obtain a data transaction result;

[0009] The data transaction result is moved to the target data area.

[0010] To achieve the above-mentioned purpose, the memory management device of the hardware smart contract proposed in the second aspect of the present disclosure includes:

[0011] A determination module, used to determine a target unit area of ​​a data sharing area in blockchain dedicated hardware, wherein the target unit area includes a target data area and a target computing unit;

[0012] A first processing module is used to write the blockchain transaction data into the target data area and perform parsing processing to obtain a target parsing result;

[0013] A second processing module is used to transfer the target parsing result and the hardware smart contract to the target computing unit for calculation to obtain a data transaction result;

[0014] The third processing module is used to move the data transaction result to the target data area.

[0015] The computer device proposed in the third aspect embodiment of the present disclosure includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the program, the memory management method of the hardware smart contract proposed in the first aspect embodiment of the present disclosure is implemented.

[0016] The fourth aspect embodiment of the present disclosure proposes a non-temporary computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it implements the memory management method of the hardware smart contract proposed in the first aspect embodiment of the present disclosure.

[0017] The fifth aspect embodiment of the present disclosure proposes a computer program product. When the instructions in the computer program product are executed by a processor, the memory management method of the hardware smart contract proposed in the first aspect embodiment of the present disclosure is executed.

[0018] The memory management method, device, computer equipment and storage medium of the hardware smart contract provided by the present disclosure determine the target unit area of ​​the data sharing area in the blockchain dedicated hardware, wherein the target unit area includes the target data area and the target computing unit; write the blockchain transaction data to the target data area and parse and process it to obtain the target parsing result; move the target parsing result and the hardware smart contract to the target computing unit for calculation to obtain the data transaction result; move the data transaction result to the target data area. Thus, hardware-level access control can be achieved, and it is completely autonomous and controllable, independent of the system or third-party software, independent of and basically does not consume the host machine, so that efficient smart contract memory management and high-throughput smart contract transaction processing can be completed in a personalized host machine performance configuration scenario.

[0019] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and / or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0021] Figure 1 It is a flowchart of a memory management method for a hardware smart contract proposed in an embodiment of the present disclosure;

[0022] Figure 2 is a flowchart of a memory management method for a hardware smart contract proposed in another embodiment of the present disclosure;

[0023] Figure 3 It is a schematic diagram of the memory management process of the hardware smart contract proposed in the present disclosure;

[0024] Figure 4 It is a schematic diagram of the memory layout of a single transaction big core proposed in the present disclosure;

[0025] Figure 5 is a schematic diagram of the memory layout of a small core for a single transaction proposed in the present disclosure;

[0026] Figure 6 It is a structural diagram of a memory management device for a hardware smart contract proposed in an embodiment of the present disclosure;

[0027] Figure 7 A block diagram of an exemplary computer device suitable for implementing embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0028] Embodiments of the present disclosure are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present disclosure, and are not to be construed as limitations of the present disclosure. On the contrary, the embodiments of the present disclosure include all changes, modifications, and equivalents that fall within the spirit and connotation of the appended claims.

[0029] Figure 1 It is a flowchart of a memory management method for a hardware smart contract proposed in an embodiment of the present disclosure.

[0030] Among them, it should be noted that the executor of the memory management method of the hardware smart contract of this embodiment is the memory management device of the hardware smart contract, which can be implemented by software and / or hardware. The device can be configured in a computer device, and the computer device can include but is not limited to a terminal, a server, etc. For example, the terminal can be a mobile phone, a PDA, etc.

[0031] like Figure 1 As shown, the memory management method of the hardware smart contract includes:

[0032] S101: Determine a target unit area of ​​a data sharing area in blockchain-specific hardware, wherein the target unit area includes a target data area and a target computing unit.

[0033] Among them, blockchain-specific hardware can refer to hardware equipment specially designed and optimized to support blockchain technology.

[0034] The data sharing area of ​​blockchain-specific hardware usually refers to the part of the hardware device that is specifically used to store and share blockchain data. These hardware devices may be specially designed for blockchain applications to provide efficient data storage and access capabilities to support the operation and interaction of blockchain networks.

[0035] The target unit area may refer to a unit area in the data sharing area for subsequent calculation of blockchain transaction data. The target unit area may be a unit area in an available state among a plurality of areas pre-divided in the data sharing area.

[0036] The target data area may refer to an area in the target unit area for writing and storing data.

[0037] The target computing unit may refer to a functional unit in the target unit area for performing data computing.

[0038] That is, in the embodiments of the present disclosure, the target unit area of ​​the data sharing area in the blockchain-specific hardware can be determined before processing the blockchain transaction data, thereby providing a reliable tool for subsequent processing of the blockchain transaction data.

[0039] S102: Write the blockchain transaction data into the target data area and perform parsing processing to obtain the target parsing result.

[0040] The target parsing result refers to the result obtained by parsing various types of information contained in the blockchain transaction data. The target parsing result can be used to indicate the attribute values ​​corresponding to different types of information in the blockchain transaction data.

[0041] Optionally, in some embodiments, the data sharing area includes multiple target unit areas, each target unit area has a corresponding priority value, and when the blockchain transaction data is written to the target data area and parsed to obtain the target parsing result, the maximum priority value among the multiple priority values ​​can be determined; the blockchain transaction data is written to the target data area corresponding to the maximum priority value and parsed to obtain the target parsing result. In this way, when there are multiple available target unit areas, the target unit area can be accurately selected to ensure the reliability of the memory management process.

[0042] The priority value can be used to describe the selection priority of different target unit areas.

[0043] In the disclosed embodiment, when the blockchain transaction data is written into the target data area and parsed to obtain the target parsing result, the parsing of various information in the blockchain transaction data can be achieved, thereby providing reliable data support for subsequent transaction calculations.

[0044] S103: The target parsing result and the hardware smart contract are transferred to the target computing unit for calculation to obtain the data transaction result.

[0045] Among them, smart contracts are automated computing codes executed on the blockchain, which are intended to manage, verify or enforce the terms and conditions in the contract. They are defined in a coded form and can automatically execute and enforce the contents of the contract without the need for a third-party intermediary. Smart contracts usually perform specific actions based on pre-agreed conditions and triggering events, which can be time, capital flow, changes in transaction status, etc. Hardware smart contracts are a special type of smart contract that directly interacts and controls hardware devices or sensors in the physical world.

[0046] The data transaction result refers to the result obtained by transferring the target parsing result and the hardware smart contract to the target computing unit for calculation. The data transaction result can be used to indicate relevant information of the corresponding blockchain transaction, such as the fees to be paid when executing the smart contract or conducting the transaction, the balance of both parties after the transaction, whether the transaction is successful, etc., without restriction.

[0047] In the disclosed embodiment, when the target parsing result and the hardware smart contract are transferred to the target computing unit for calculation to obtain the data transaction result, the accuracy of the obtained data transaction result in indicating various information of the blockchain transaction can be guaranteed.

[0048] S104: Moving the data transaction results to the target data area.

[0049] That is, in the embodiment of the present disclosure, after the data transaction result is calculated, the data transaction result can be moved back to the original target data area to achieve the purpose of reusing the memory space.

[0050] In this embodiment, by determining the target unit area of ​​the data sharing area in the blockchain dedicated hardware, wherein the target unit area includes the target data area and the target computing unit, the blockchain transaction data is written to the target data area and parsed to obtain the target parsing result, the target parsing result and the hardware smart contract are transported to the target computing unit for calculation to obtain the data transaction result, and the data transaction result is transported to the target data area. Thus, hardware-level access control can be achieved, and it is completely autonomous and controllable, independent of the system or third-party software, independent of and basically does not consume the host machine, so that efficient smart contract memory management and high-throughput smart contract transaction processing can be completed in a personalized host machine performance configuration scenario.

[0051] Figure 2 It is a flowchart of a memory management method for a hardware smart contract proposed in another embodiment of the present disclosure.

[0052] like Figure 2 As shown, the memory management method of the hardware smart contract includes:

[0053] S201: According to the interaction protocol of blockchain-specific hardware, the data sharing area is divided into multiple candidate unit areas, wherein the candidate unit area includes a candidate data area and a candidate computing unit.

[0054] Among them, the interaction protocol is a pre-configured set of rules and conventions that specify how different parts of the blockchain's dedicated hardware exchange data, communicate, and collaborate.

[0055] The candidate unit area refers to the sub-area obtained after the data sharing area is divided. In the disclosed embodiment, the data sharing area can be divided into 8 candidate unit areas according to the interactive protocol of the blockchain dedicated hardware, or any other number, which is not limited.

[0056] S202: Determine the working status of the candidate unit area.

[0057] Among them, the working status can be used to indicate whether the candidate unit area is currently available for subsequent processing of blockchain transaction data.

[0058] In the disclosed embodiment, multiple coroutines of blockchain-specific hardware can be started to concurrently read the working status of each unit, or the working status of each unit can be read in sequence according to the number of each candidate unit area, without limitation.

[0059] In the disclosed embodiment, when the working status of the candidate unit area is determined, a reliable evaluation basis can be provided for the subsequent determination of the target unit area.

[0060] S203: When the working state is an available state, the corresponding candidate unit area is used as a target unit area.

[0061] That is, in the disclosed embodiment, the data sharing area can be divided into multiple candidate unit areas according to the interactive protocol of the blockchain dedicated hardware, wherein the candidate unit area includes a candidate data area and a candidate computing unit; the working state of the candidate unit area is determined; when the working state is an available state, the corresponding candidate unit area is used as the target unit area. Thus, the target unit area can be accurately and quickly determined from multiple candidate unit areas based on the working state of the candidate unit area.

[0062] S204: Determine the data structure of blockchain transaction data.

[0063] Among them, the data structure can be used to indicate the structural information of different parameters in each blockchain transaction data.

[0064] In the disclosed embodiment, when the data structure of blockchain transaction data is determined, a reliable parsing basis can be provided for the subsequent parsing process of blockchain transaction data.

[0065] S205: Generate a data packet based on multiple blockchain transaction data.

[0066] That is to say, in the embodiments of the present disclosure, multiple blockchain transaction data can be packaged to achieve batch processing of blockchain transaction data.

[0067] S206: Write the data packet into the target data area and perform parsing based on the data structure to obtain a target parsing result, wherein the target parsing result includes a parsing result corresponding to each blockchain transaction data.

[0068] That is, after determining the target unit area, the data structure of the blockchain transaction data can be determined in the disclosed embodiment; a data packet is generated based on multiple blockchain transaction data; the data packet is written to the target data area and parsed based on the data structure to obtain a target parsing result, wherein the target parsing result includes a parsing result corresponding to each blockchain transaction data. In this way, the processing efficiency of blockchain transaction data can be effectively improved, and the reliability and practicality of the obtained parsing results can be guaranteed.

[0069] S207: The parsing results and hardware smart contracts corresponding to each blockchain transaction data are transferred to the target computing unit for parallel computing to obtain the transaction calculation results and the additional information of the hardware smart contract, wherein the transaction calculation results and the additional information of the hardware smart contract corresponding to multiple blockchain transaction data jointly constitute the data transaction result.

[0070] The transaction calculation result refers to the result obtained by calculating the parsing result in the target computing unit.

[0071] Among them, the hardware smart contract additional information refers to the result obtained by calculating the hardware smart contract in the target computing unit. For example, the hardware smart contract additional information can indicate the fees required to execute the smart contract or conduct a transaction.

[0072] That is to say, in the disclosed embodiment, after writing the data packet into the target data area and performing parsing based on the data structure to obtain the target parsing result, the parsing result and the hardware smart contract corresponding to each blockchain transaction data can be transferred to the target computing unit for parallel computing to obtain the transaction calculation result and the hardware smart contract additional information, wherein the transaction calculation results corresponding to multiple blockchain transaction data and the hardware smart contract additional information jointly constitute the data transaction result. In this way, the frequency of data transfer can be reduced, and the practicality and comprehensiveness of the indication of the obtained data transaction result can be effectively improved.

[0073] S208: Moving the data transaction results to the target data area.

[0074] The description of S208 can be specifically referred to the above embodiment, which will not be repeated here.

[0075] In this embodiment, according to the interactive protocol of blockchain dedicated hardware, the data sharing area is divided into multiple candidate unit areas, wherein the candidate unit area includes a candidate data area and a candidate computing unit; the working state of the candidate unit area is determined; when the working state is an available state, the corresponding candidate unit area is used as the target unit area. Thus, the target unit area can be accurately and quickly determined from multiple candidate unit areas based on the working state of the candidate unit area. By determining the data structure of blockchain transaction data; generating a data packet based on multiple blockchain transaction data; writing the data packet to the target data area and parsing it based on the data structure to obtain a target parsing result, wherein the target parsing result includes the parsing result corresponding to each blockchain transaction data. Thus, the processing efficiency of blockchain transaction data can be effectively improved, and the reliability and practicality of the obtained parsing results can be guaranteed. By carrying the parsing result corresponding to each blockchain transaction data and the hardware smart contract to the target computing unit for parallel calculation, the transaction calculation result and the hardware smart contract additional information are obtained, wherein the transaction calculation results corresponding to multiple blockchain transaction data and the hardware smart contract additional information jointly constitute the data transaction result. Thus, the frequency of data transportation can be reduced, and the practicality and comprehensiveness of the indication of the obtained data transaction result can be effectively improved.

[0076] Optionally, in some embodiments, the blockchain-specific hardware includes an internal self-controlled memory space, wherein the internal self-controlled memory space is used for privacy computing. Thus, the security of data in the memory management process can be effectively improved.

[0077] Based on the above embodiments, the hardware smart contract proposed in this disclosure reads and writes data from memory in four steps, namely reading the shared area status, moving transaction data, recording transaction results, and encrypting the private area. For example, its specific implementation plan can be:

[0078] (1) Read the shared zone status

[0079] According to the interactive protocol, the data sharing area is divided into 8 units, each of which is independent of each other and represents the status of the 8 computing units and data area of ​​the blockchain dedicated hardware. When the smart contract parallel programming tool attempts to use blockchain dedicated hardware to execute smart contracts to process transactions, it will start 8 coroutines to concurrently read the status of each unit. If the status of a unit area is "writable", it means that the computing unit represented by the unit is in an available state, and the host computer will use the computing power of this unit.

[0080] (2) Transferring transaction data

[0081] When a packet of transaction data is written into a data area, the blockchain-specific hardware will parse the transaction data contained in the packet according to the data structure, and move it together with the hardware smart contract to the computing unit for parallel computing.

[0082] (3) Record transaction results

[0083] After the calculation, the computing unit will record the calculation results and the additional information of the hardware smart contract to the specified field memory address of the transaction, and then move the entire batch of data transaction results to the original data area to reuse the memory space.

[0084] (4) Privacy area encryption

[0085] The internal self-controlled memory space of blockchain-specific hardware is used for privacy computing. This space is used to store core information, such as the private key used by the hardware board for encryption and decryption. In some application scenarios, it can be used to verify the identity of the host computer accessing the board. The process is as follows Figure 3 As shown, Figure 3 It is a schematic diagram of the memory management process of the hardware smart contract proposed in this disclosure.

[0086] In the disclosed embodiment, the blockchain dedicated hardware transaction identification collaborative interaction and memory layout management are used to implement the memory management of the blockchain dedicated hardware by designing the data structure and interaction protocol of the hardware transaction. Among them, the complete memory address division is detailed in the blockchain dedicated hardware unit, and this technology focuses on the memory layout of the "single transaction" involved in running the smart contract in the blockchain dedicated hardware.

[0087] The computing units of blockchain-specific hardware are divided into large cores and small cores. The characteristics of large core computing units are large memory, low main frequency, and can only be serialized, while the characteristics of small core computing units are small memory, high main frequency, and can be parallelized. Based on the characteristics of large cores and small cores, this subtask designs and implements two memory management solutions for hardware smart contracts: Figure 4 and Figure 5 As shown, Figure 4 This is a schematic diagram of the memory layout of a single transaction big core proposed in this disclosure. Figure 5 It is a schematic diagram of the memory layout of the small core for a single transaction proposed in the present disclosure.

[0088] Figure 6 It is a structural diagram of a memory management device for a hardware smart contract proposed in one embodiment of the present disclosure.

[0089] like Figure 6 As shown, the memory management device 60 of the hardware smart contract includes:

[0090] A determination module 601 is used to determine a target unit area of ​​a data sharing area in blockchain dedicated hardware, wherein the target unit area includes a target data area and a target computing unit;

[0091] The first processing module 602 is used to write the blockchain transaction data into the target data area and perform parsing processing to obtain a target parsing result;

[0092] The second processing module 603 is used to transfer the target parsing result and the hardware smart contract to the target computing unit for calculation to obtain the data transaction result;

[0093] The third processing module 604 is used to move the data transaction result to the target data area.

[0094] It should be noted that the above explanation of the memory management method of the hardware smart contract is also applicable to the memory management device of the hardware smart contract of this embodiment, and will not be repeated here.

[0095] In this embodiment, by determining the target unit area of ​​the data sharing area in the blockchain dedicated hardware, wherein the target unit area includes the target data area and the target computing unit, the blockchain transaction data is written to the target data area and parsed to obtain the target parsing result, the target parsing result and the hardware smart contract are transported to the target computing unit for calculation to obtain the data transaction result, and the data transaction result is transported to the target data area. Thus, hardware-level access control can be achieved, and it is completely autonomous and controllable, independent of the system or third-party software, independent of and basically does not consume the host machine, so that efficient smart contract memory management and high-throughput smart contract transaction processing can be completed in a personalized host machine performance configuration scenario.

[0096] Figure 7 A block diagram of an exemplary computer device suitable for implementing embodiments of the present disclosure is shown. Figure 7 The computer device 12 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0097] like Figure 7 As shown, the computer device 12 is in the form of a general-purpose computing device. The components of the computer device 12 may include, but are not limited to: one or more processors or processing units 16, a system memory 28, and a bus 18 that connects various system components (including the system memory 28 and the processing unit 16).

[0098] The bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor or a local bus using any of a variety of bus structures. For example, these architectures include but are not limited to Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MAC) bus, Enhanced ISA bus, Video Electronics Standards Association (VESA) local bus and Peripheral Component Interconnection (PCI) bus.

[0099] The computer device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the computer device 12, including volatile and non-volatile media, removable and non-removable media.

[0100] The memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. The computer device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 34 may be used to read and write non-removable, non-volatile magnetic media ( Figure 7 Not shown, often called a "hard drive").

[0101] although Figure 7 Not shown, a disk drive for reading and writing a removable non-volatile disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing a removable non-volatile optical disk (e.g., a compact disc read only memory (Compact Disc Read Only Memory; hereinafter referred to as: CD-ROM), a digital versatile disc read only memory (Digital Video Disc Read Only Memory; hereinafter referred to as: DVD-ROM) or other optical media) may be provided. In these cases, each drive may be connected to the bus 18 via one or more data medium interfaces. The memory 28 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of the various embodiments of the present disclosure.

[0102] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in the memory 28, such program modules 42 including but not limited to an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules 42 generally perform the functions and / or methods of the embodiments described in the present disclosure.

[0103] The computer device 12 may also communicate with one or more external devices 14 (e.g., keyboard, pointing device, display 24, etc.), one or more devices that enable a human body to interact with the computer device 12, and / or any device that enables the computer device 12 to communicate with one or more other computing devices (e.g., network card, modem, etc.). Such communication may be performed via an input / output (I / O) interface 22. In addition, the computer device 12 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 20. As shown, the network adapter 20 communicates with other modules of the computer device 12 via a bus 18. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the computer device 12, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0104] The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, such as implementing the memory management method of the hardware smart contract mentioned in the above embodiment.

[0105] In order to implement the above embodiments, the present disclosure also proposes a non-temporary computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, it implements the memory management method of the hardware smart contract proposed in the aforementioned embodiments of the present disclosure.

[0106] In order to implement the above embodiments, the present disclosure also proposes a computer program product. When the instruction processor in the computer program product is executed, the memory management method of the hardware smart contract proposed in the above embodiments of the present disclosure is executed.

[0107] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0108] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

[0109] It should be noted that, in the description of the present disclosure, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present disclosure, unless otherwise specified, the meaning of "plurality" is two or more.

[0110] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present disclosure includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present disclosure belong.

[0111] It should be understood that the various parts of the present disclosure can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0112] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0113] In addition, each functional unit in each embodiment of the present disclosure may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0114] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0115] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0116] Although the embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present disclosure. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present disclosure.

Claims

1. A memory management method for hardware smart contracts, characterized in that: include: Determine a target unit area of ​​a data sharing area in blockchain-specific hardware, wherein the target unit area includes a target data area and a target computing unit; Writing the blockchain transaction data into the target data area and performing parsing processing to obtain a target parsing result; The target parsing result and the hardware smart contract are transferred to the target computing unit for calculation to obtain a data transaction result; The data transaction result is moved to the target data area.

2. The method according to claim 1, characterized in that The step of determining a target unit area of ​​a data sharing area in blockchain dedicated hardware includes: According to the interaction protocol of the blockchain dedicated hardware, the data sharing area is divided into a plurality of candidate unit areas, wherein the candidate unit areas include candidate data areas and candidate computing units; Determining the working status of the candidate unit area; When the working state is an available state, the corresponding candidate unit area is used as the target unit area.

3. The method according to claim 1, characterized in that The data sharing area includes a plurality of target unit areas, each of which has a corresponding priority value; The step of writing the blockchain transaction data into the target data area and performing parsing processing to obtain a target parsing result includes: Determine a maximum priority value among the plurality of priority values; The blockchain transaction data is written into the target data area corresponding to the maximum priority value and parsed to obtain the target parsing result.

4. The method according to claim 1, characterized in that The step of writing the blockchain transaction data into the target data area and performing parsing processing to obtain a target parsing result includes: Determining the data structure of the blockchain transaction data; Generate a data packet based on the plurality of blockchain transaction data; The data packet is written into the target data area and parsed based on the data structure to obtain the target parsing result, wherein the target parsing result includes a parsing result corresponding to each piece of the blockchain transaction data.

5. The method according to claim 4, characterized in that The target parsing result and the hardware smart contract are transferred to the target computing unit for calculation to obtain the data transaction result, including: The parsing results corresponding to each of the blockchain transaction data and the hardware smart contract are transferred to the target computing unit for parallel computing to obtain transaction calculation results and additional information of the hardware smart contract, wherein the transaction calculation results corresponding to multiple blockchain transaction data and the additional information of the hardware smart contract jointly constitute the data transaction result.

6. The method according to claim 1, characterized in that The blockchain-specific hardware includes an internal self-controlled memory space, wherein the internal self-controlled memory space is used for privacy computing.

7. A memory management device for a hardware smart contract, characterized in that: include: A determination module, used to determine a target unit area of ​​a data sharing area in blockchain dedicated hardware, wherein the target unit area includes a target data area and a target computing unit; A first processing module is used to write the blockchain transaction data into the target data area and perform parsing processing to obtain a target parsing result; A second processing module is used to transfer the target parsing result and the hardware smart contract to the target computing unit for calculation to obtain a data transaction result; The third processing module is used to move the data transaction result to the target data area.

8. A computer device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 6.

9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: in, The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The invention comprises a computer program which, when executed by a processor, implements the steps of the method according to any one of claims 1 to 6.