Method and apparatus for storing or reading rotation factors in target transformation

Abstract

Embodiments of the present specification provide a method for storing or reading a rotation factor in a target transform. The target transform is a discrete transform or its inverse transform that transforms an input coefficient sequence into an output coefficient sequence based on a rotation factor. The method includes determining a target rotation factor to be stored, whose power is a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value; and storing the target rotation factor by a two-level storage manner, the two-level storage manner including storing the target rotation factor at a first address in a rotation factor storage, wherein the rotation factor storage includes a first number of first storage units, the first number being a number of different modulo multiplication results generated by the first factor of the first number of bits and the second factor of the second number of bits; and storing an index value pointing to the first address at a second address in an index storage, wherein the index storage includes a target value of second storage units, the second address corresponding to the power of the target rotation factor; and the target value is greater than the first number.

Description

TECHNICAL FIELD

[0001] One or more embodiments of the present specification relate to optimization of hardware for accelerating polynomial multiplication, and in particular to optimization of rotation factor storage. BACKGROUND

[0002] Fast Fourier Transform (FFT) and Fast Number Theoretic Transform (NTT) are the most critical steps for accelerating polynomial multiplication, which have very broad application scenarios in the fields of communication and encryption. For example, FFT realizes the conversion between time domain and frequency domain when digital signal processing, and NTT and Negative Wrapped Convolution (NWC) using NTT accelerate polynomial multiplication in the finite field in the design of fully homomorphic hardware acceleration chips.

[0003] At present, there are many implementations of FFT, NTT and their variants under different architectures, in which rotation factors need to be stored in advance, which greatly affects the memory overhead.

[0004] Therefore, it is desirable to have an improved solution to reduce the storage cost of rotation factors. SUMMARY

[0005] One or more embodiments of the present specification describe a solution for storing or reading rotation factors in a target transform, which stores rotation factors in a two-level storage manner, effectively saving the storage cost of rotation factors in the processing circuit, thereby effectively reducing the area of the processing circuit.

[0006] According to a first aspect, a method for storing rotation factors in a target transform is provided, the target transform being a discrete transform or its inverse transform based on rotation factors to transform an input coefficient sequence into an output coefficient sequence; the method comprising:

[0007] determining a target rotation factor to be stored, the power of the target rotation factor being the result of the product of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0008] storing the target rotation factor by a two-level storage manner, the two-level storage manner comprising:

[0009] storing the target rotation factor at a first address in a rotation factor storage, wherein the rotation factor storage comprises a first number of first storage units, the first number being the number of different modulo multiplication results generated by the first factor of the first number of bits and the second factor of the second number of bits;

[0010] storing an index value pointing to the first address at a second address in an index storage, wherein the index storage comprises the target value of second storage units, and the second address corresponds to the power of the target rotation factor; the target value is greater than the first number.

[0011] In one embodiment, the first storage unit has a bit width of a first number of bits required by the target rotation factor; and the second storage unit has a bit width of a second number of bits required by the index value, the second number of bits having a ratio to the first number of bits less than a preset value.

[0012] In one embodiment, the target rotation factor is a rotation factor used for performing inter-combination multiplication when a target transform of order n is decomposed into a combination of two low-order transforms of orders (n-p) and p at a decomposition point p, the first factor and the second factor are obtained based on a first and a second linear transformation of p-bit values and (n-p)-bit values respectively; and the target value is determined according to a target transform type.

[0013] Further, in one example, the target transform is a fast Fourier transform (FFT), the first and the second linear transformations are both identity transformations, and the target value is 2 raised to the power of n-2.

[0014] Further, in one example, the target transform is a fast number theory transform (NTT), the first and the second linear transformations are both identity transformations, and the target value is 2 raised to the power of n-1.

[0015] Further, in one example, the target transform is an NTT-P transform obtained by fusing a pre-processing with a fast number theory transform (NTT) in a negative wrapped convolution (NWC), the first linear transformation is an identity transformation, the second linear transformation defines the second factor as 2*(n-p)-bit values+1, and the target value is 2 raised to the power of n.

[0016] Further, in one example, the target transform is an INTT-P transform obtained by fusing an inverse fast number theory transform (INTT) with a post-processing in a negative wrapped convolution (NWC), the first linear transformation defines the first factor as 2*p-bit values+1, the second linear transformation is an identity transformation, and the target value is 2 raised to the power of n.

[0017] Further, in one example, the target rotation factor is a rotation factor of a target decomposition mode having a minimum storage cost for a K-point input coefficient sequence to be processed, and the target decomposition mode is determined by the following steps:

[0018] determining a plurality of candidate decomposition points in a k-bit coefficient index corresponding to the K-point input coefficient sequence, where K is a power of 2;

[0019] From a low bit decomposition point, in turn, for each candidate decomposition point, according to a decomposition cost evaluation function, through recursive indexing bit number decomposition for several levels, the minimum storage cost under each candidate decomposition point is determined, so as to determine the target decomposition mode with the minimum storage cost; wherein, the decomposition cost evaluation function is limited, for n order target transformation, the storage cost under the decomposition point p includes the storage cost of (n-p) order first transformation, the storage cost of p order second transformation, and the local storage cost of storing the inter-level rotation factor through the two-level storage mode, wherein the first transformation and the second transformation are the target transformation or the corresponding basic transformation respectively, and the local storage cost includes the storage cost of the rotation factor storage and the storage cost of the index storage.

[0020] Further, in one example, the target transformation is a fast Fourier transform FFT, and the first transformation and the second transformation are both target transformations; the storage cost of 1 order target transformation is initialized to 0.

[0021] Further, in one example, the target transformation is a fast number theory transform NTT, and the first transformation and the second transformation are both target transformations; the storage cost of 1 order target transformation is initialized to 0.

[0022] Further, in one example, the target transformation is an NTT pre-processing and fast number theory transform NTT fusion obtained in a negative wrap convolution NWC; the first transformation is a target transformation, and the second transformation is an NTT transform; the storage cost of 1 order target transformation is initialized to 1.

[0023] Further, in one example, the target transformation is an inverse fast number theory transform INTT and post-processing fusion obtained in a negative wrap convolution NWC; the first transformation is an INTT transform, and the second transformation is a target transformation; the storage cost of 1 order target transformation is initialized to 1.

[0024] According to a second aspect, a method for reading a rotation factor in a target transformation is provided, the target transformation being a discrete transformation or its inverse transformation based on a rotation factor for transforming an input coefficient sequence into an output coefficient sequence; the method comprises:

[0025] determining a target power of the rotation factor to be read, the target power being a result of a product of a first factor of a first bit number and a second factor of a second bit number modulo a target value;

[0026] determining a second address according to the target power; reading an index value stored in the index storage at the second address; wherein, the index storage has the target value second storage units;

[0027] determining a first address according to the index value; reading a value of a rotation factor stored at the first address in a rotation factor memory; wherein the rotation factor memory comprises a first number of first storage units, the first number being a number of different modulo multiplication results of a first number of factors and a second number of factors; and the first number is less than the target value.

[0028] According to a third aspect, there is provided an apparatus for storing a rotation factor in a target transform, the target transform being a discrete transform or an inverse transform thereof that transforms an input coefficient sequence into an output coefficient sequence based on rotation factors; the apparatus comprising:

[0029] a determining unit configured to determine a target rotation factor to be stored, the target rotation factor having a power that is a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0030] a storing unit configured to store the target rotation factor by a two-level storage manner, the two-level storage manner comprising:

[0031] storing the target rotation factor at a first address in a rotation factor memory, wherein the rotation factor memory comprises a first number of first storage units, the first number being a number of different modulo multiplication results of a first number of factors and a second number of factors;

[0032] storing an index value pointing to the first address at a second address in an index memory, wherein the index memory comprises the target value of second storage units, and the second address corresponds to the power of the target rotation factor; and the target value is greater than the first number.

[0033] According to a fourth aspect, there is provided an apparatus for reading a rotation factor in a target transform, the target transform being a discrete transform or an inverse transform thereof that transforms an input coefficient sequence into an output coefficient sequence based on rotation factors; the apparatus comprising:

[0034] a determining unit configured to determine a target power of a rotation factor to be read, the target power being a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0035] a first reading unit configured to: determine a second address according to the target power; and read an index value stored at the second address in an index memory; wherein the index memory has the target value of second storage units.

[0036] A second reading unit is configured to determine a first address according to the index value, and read a value of a rotation factor stored at the first address in a rotation factor storage; wherein the rotation factor storage comprises a first number of first storage units, the first number being a number of different modulus multiplication results generated by a first number of factors and a second number of factors; and the first number is less than the target value.

[0037] According to a fifth aspect, a computing device is provided, comprising a memory and a processor, the memory having stored therein executable code which, when executed by the processor, implements the method according to the first aspect or the second aspect.

[0038] In the embodiments of the present specification, a method and an apparatus for storing or reading rotation factors in target transformation are proposed. In the method, the rotation factors are stored by using a two-level storage mode of rotation factor storage plus index storage, which avoids unnecessary storage waste of rotation factors, thereby effectively saving the storage cost of rotation factors in the processing circuit and effectively reducing the area of the processing circuit. Further, in the method of some embodiments, an evaluation function of the storage cost of rotation factors of the target transformation under various decomposition modes is also defined, and according to the function, the target decomposition mode with the minimum total storage cost is found by recursive decomposition. Therefore, by combining the target decomposition mode with the minimum storage cost with the two-level storage mode, the storage cost of rotation factors in the processing circuit is further effectively saved, thereby further effectively reducing the area of the processing circuit. BRIEF DESCRIPTION OF DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0040] Figure 1a A schematic diagram showing CT butterfly operation of base 2;

[0041] Figure 1b A schematic diagram showing FFT by CT butterfly operation of base 2 in the case of N = 8;

[0042] Figure 2a A schematic diagram showing a general pipeline stage based on SDF;

[0043] Figure 2b A schematic diagram showing a pipeline architecture for implementing a CT FFT of order 12 according to an embodiment;

[0044] Figure 3aAn example of 2-dimensional decomposition of an n-th order FFT at a decomposition point p according to one embodiment is shown;

[0045] Figure 3b A storage cost diagram corresponding to the decomposition scheme of Figure 3a according to one embodiment is shown;

[0046] Figure 3c A storage cost diagram resulting from further decomposition of the example of Figure 3a according to one embodiment is shown;

[0047] Figure 4a Algorithm 1 in pseudo-code form for searching for the minimum storage cost for a k-th order FFT is shown;

[0048] Figure 4b An operational algorithm of NWC described in pseudo-code is shown;

[0049] Figure 4c Algorithm 2 for searching for the minimum storage cost for a k-th order NTT, NTTP and INTTP is shown;

[0050] Figure 5a A diagram of a pipelined architecture for implementing a 12-th order FFT according to one embodiment is shown;

[0051] Figure 5b A diagram of a pipelined architecture for implementing a 12-th order NTT according to one embodiment is shown;

[0052] Figure 6 A diagram of a twiddle factor memory employing a one-level storage scheme according to one embodiment is shown;

[0053] Figure 7 A diagram of a twiddle factor memory employing a two-level storage scheme according to one embodiment is shown;

[0054] Figure 8 A method flowchart of storing twiddle factors in a target transform according to one embodiment is shown;

[0055] Figure 9 A method flowchart of performing a two-level storage scheme according to one embodiment is shown;

[0056] Figure 10 A method flowchart of determining a target decomposition scheme according to one embodiment is shown;

[0057] Figure 11 A method flowchart of reading twiddle factors in a target transform according to one embodiment is shown. DETAILED DESCRIPTION

[0058] The solution provided in this specification will be described below in conjunction with the accompanying drawings.

[0059] FFT (Fast Fourier Transform) is a technique widely used in digital signal processing, which significantly accelerates the calculation of DFT (Discrete Fourier Transform). Its calculation formula is as follows:

[0060]

[0061] where x

[0069] represents the input coefficient sequence, X o represents the output coefficient sequence, i and o are the coefficient indices of the input coefficient and the output coefficient respectively, and 0 <= i, o <= N - 1.

[0062] The above N is the total number of each of the input and output coefficient sequences. Usually, N is a power of 2, such as 1024 = 2^10.

[0063] The above is called the twiddle factor, where ω N is the Nth root of unity, and the product value of io is its power. ω N is a special number, which satisfies where 1 ≤ k < N. In the complex number field, usually where j is the imaginary unit, that is, j 2 = -1.

[0064] The twiddle factor has the following attractive properties:

[0065] (i) Periodicity: Since Therefore

[0066] (ii) Semi-periodicity: Since ω^2 = -1, therefore

[0067] (iii) 1 / 4 Periodicity: Since ω^4 = j, therefore

[0068] The multiplication of <​​​​

[0071] where n is the base-2 logarithm of N rounded up. For example, if N is 1024, then n = 10.

[0072] Thus, the above equation (1) can be rewritten as the following equation (3):

[0073]

[0074] where FFT can be referred to as N-point FFT, or n-stage or n-order FFT.

[0075] Some optimization schemes of FFT have been proposed, such as Cooley-Tukey (CT) algorithm, which converts N-point FFT transform into n-stage radix-2 butterfly operation, thereby effectively reducing the number of calculations from N 2 to N / 2logN.

[0076] In the radix-2 CT algorithm, input coefficients are decimated by the least significant bit based on index i, which can be rewritten as the following equation (4):

[0077]

[0078] Instead of calculating X o and X o+N / 2 independently, the FFT of two N / 2 coefficients can be calculated: Then all N / 2 pairs of X o and X o+N / 2 (0≤o<N / 2) are recovered by N / 2 Figure 1a CT butterfly operations as shown in FIG. 1. Figure 1a The circle marked with "o" represents the multiplication with the twiddle factor .

[0079] The above analysis of equation (4) also applies to its sub-problems, i.e., the two N / 2 coefficient FFTs obtained by splitting equation (4): which can be further split by using equation (4). Based on the divide-and-conquer method, the final splitting results in logN stages of N / 2 butterfly operations, such as the one shown in FIG. 2. Figure 1b Figure 1b A radix-2 CT FFT dataflow representation is given for N = 8, which shows 3 stages of 4 CT butterfly operations each. Since a butterfly operation consumes 2 inputs and produces 2 outputs, this algorithm is referred to as radix-2 CT algorithm.

[0080] ​In order to efficiently implement various FFT algorithms, many processing circuit hardware architectures have been proposed, including pipeline architectures such as SDF (single-path delay feedback) pipeline architecture and the like. FFT implementations under pipeline architectures have the advantage of high throughput, and the SDF pipeline architecture is an implementation mode that takes into account both area and throughput.

[0081] Figure 2a A general pipeline stage based on SDF is shown, which includes a FIFO (First-In-First-Out) memory for storing data to be delayed or reordered, a basic butterfly operation unit for the current stage, a twiddle factor multiplier for inter-stage, a ROM (Read-Only Memory) for storing twiddle factors, an address generator for generating the read address of the current twiddle factor, and a register REG, etc.

[0082] The SDF general pipeline stage shown can be used to construct a processing circuit for implementing various FFT algorithms of a target point number. Figure 2a

[0083] For example, Figure 2b A SDF pipeline architecture of a processing circuit for implementing a 2 12 point (also referred to as 12 stages or 12 orders) CT FFT transform is shown, which has 12 basic butterfly operation units and 11 inter-stage twiddle factor multiplication operators. In addition, the memory above the basic butterfly operation unit corresponds to the FIFO memory in Figure 2a , and the memory below the multiplication operator represented by "*" corresponds to the ROM in Figure 2a for storing the values of the required twiddle factors calculated in advance.

[0084] For the sake of clarity and simplicity, Figure 2b the register REG and the address generator in Figure 2a are not drawn, and only the io-bit products below the memory below the multiplication operator are marked, which are the products of a number of bits in the input coefficient index i and a number of bits in the output coefficient index o, for generating the address of the corresponding twiddle factor (corresponding to the power of the twiddle factor).

[0085] As shown in Figure 2b , the power of the corresponding twiddle factor is shown below the last (11th) inter-stage twiddle factor multiplication operator, that is, the io-bit product is i0o 10:0 , that is, the twiddle factor required for this multiplication is which usually requires storing 2 12 ​= 4096 rotation factors, i.e. 4096 rotation factor storage units are to be occupied.

[0086] In the embodiments of the present specification, in order to reduce the occupied storage space, the characteristics of the aforementioned rotation factors, such as the semi-periodicity and ¼ periodicity brought by w2= -1 and w4= j, can be utilized to reduce the number of stored rotation factors. Since and Therefore, it is sufficient to store only the values of the rotation factors for k ∈ [0, N / 4). Thus, as shown in Figure 2b for the last (11th) inter-stage rotation factor multiplication operation, the actual 1024 rotation factor storage units are sufficient for Similarly, for the preceding mthinter-stage rotation factor multiplication operation, 2(m-1)rotation factor storage units are used, except for the special cases of the first and second multiplications. In the first multiplication, since w4= j, the multiplier is not actually used; and in the second multiplication, only the value of ω8needs to be stored.

[0087] Therefore, Figure 2b The pipeline CT FFT processing circuit in the above uses a total of 2045 storage units to store rotation factors, but this still requires a large storage overhead. If the storage cost of rotation factors can be further saved, the area of the processing circuit implementing the FFT can be effectively reduced.

[0088] The above discussion is not only applicable to FFT, but can also be similarly applied to other FFT-like transforms, such as NTT (Number Theoretic Transform, Fast Number Theory Transform) which is a variant of FFT in finite fields, and variants such as NTTP, INTTP, etc. in NWC (negative wrapped convolution). These transforms can be generalized as discrete transforms or their inverse transforms that transform an input coefficient sequence into an output coefficient sequence based on rotation factors. All the content discussed in the present specification for FFT can be extended to these transforms, with only adaptive modifications in some implementation details.

[0089] Therefore, in the embodiments of the present disclosure, a scheme for storing or reading a twiddle factor in a target transform is proposed, the target transform being a discrete transform or its inverse transform for transforming an input coefficient sequence into an output coefficient sequence based on a twiddle factor. The scheme stores the twiddle factor in a two-level storage manner when the actual number of multiplications required by the current multiplication is less than an upper limit value, effectively saving the storage cost of the twiddle factor in the processing circuit, thereby effectively reducing the area of the processing circuit. Further, in the embodiments of the present disclosure, a scheme for finding a target decomposition manner with minimum storage cost is also proposed, which defines an evaluation function of the storage cost of the twiddle factor of the target transform under various decomposition manners, and finds the target decomposition manner with minimum storage cost through recursive decomposition according to the function. Therefore, the storage cost of the twiddle factor in the processing circuit can be further effectively saved, thereby further effectively reducing the area of the processing circuit.

[0090] To more clearly describe the scheme of the embodiments, first, the principle and implementation steps of the scheme are described by taking FFT as an example.

[0091] The FFT represented by the foregoing formula (3) can be decomposed by the following formula (5):

[0092]

[0093] wherein, 1<=p<n. In the formula (5), three sources of the twiddle factor under this decomposition manner are also indicated.

[0094] Specifically, in the formula (5), the n-order FFT is decomposed into 2 p internal FFTs (which are (n-p)-order FFTs), 2 n-p external FFTs (which are p-order FFTs), and multiplication of 2 n points with a twiddle factor (which can also be referred to as inter-stage twiddle factor multiplication) between the internal FFT and the external FFT.

[0095] As shown in the formula (5), under this decomposition manner, the n-bit coefficient index i can be considered to be decomposed at the p-bit, into two index segments of p-bit and (n-p)-bit, and the corresponding external FFT and internal FFT are performed, respectively.

[0096] In the embodiments of the present disclosure, this decomposition manner shown in the formula (5) can be referred to as a decomposition manner obtained for the n-order FFT or the n-bit coefficient index at the decomposition point p.

[0097] Figure 3a A 2-dimensional decomposition diagram is used to intuitively represent the decomposition manner at the decomposition point p of the formula (5).

[0098] In Figure 3aIn the figure, the vertical axis sequentially from top to bottom is the n-bit of the input coefficient index i from high to low, and the horizontal axis sequentially from right to left is the n-bit of the output coefficient index o from high to low, wherein the n-bit of i is decomposed at p bits, and the n-bit of o is also decomposed at (n-p) bits accordingly.

[0099] As shown in Figure 3a , after decomposition, an internal (n-p) order FFT is performed for the highest (n-p) bit of i, i n-1:p , an external p order FFT is performed for the lowest p bit of i, i p-1:0 , and multiplication of the rotation factor of the power of i p-1:0 o n-p-1:0 is performed, that is, inter-stage rotation factor multiplication.

[0100] As shown in formula (5), the rotation factor of n order FFT at the decomposition point p has three sources: the internal (n-p) order FFT, the external p order FFT, and 2 n inter-stage rotation factor multiplications.

[0101] The storage cost of the rotation factor required by the n order FFT can be defined as C FFT (n), the local storage cost required by the inter-stage rotation factor multiplication is defined as L FFT (p, n-p). It should be understood that the “cost” or “storage cost” mentioned in the present specification refers to the storage cost of the rotation factor, which can be represented by the number of rotation factors required for storage in some examples.

[0102] Therefore, the storage cost of n order FFT at the decomposition point p can be obtained as:

[0103] C FFT (n) = C FFT (n-p) + C FFT (p) + L FFT (p, n-p), (6)

[0104] which can be referred to as a decomposition cost evaluation function.

[0105] Correspondingly, Figure 3b the decomposition manner of Figure 3a is shown.

[0106] The decomposition technique shown in the above formula (5) and Figure 3a can be applied recursively to decompose the internal and external FFTs until they are finally decomposed into 1 order FFTs (i.e. 2-point FFTs, which are basic butterfly operations). That is, the n order FFT is finally decomposed into n levels of basic butterfly operations and n-1 inter-stage rotation factor multiplication operations.

[0107] Therefore, the storage cost of the n-order FFT under various decomposition manners can be calculated by recursively applying the above decomposition cost evaluation function, so as to find the decomposition manner with the minimum storage cost.

[0108] Figure 3c The storage costs of the further decompositions of the internal and external FFTs in the decomposition manner of Figure 3a are exemplarily shown.

[0109] As shown in Figure 3c , the internal (n-p)-order FFT is similarly decomposed into an internal (n-p-q1)-order FFT, an external q1-order FFT and 2 n-p inter-stage twiddle factor multiplications at a sub-decomposition point q1, so that its storage cost C FFT (n-p) becomes C FFT (n-p-q1)+C FFT (q1)+L FFT (q1,n-p-q1). Similarly, the external p-order FFT is similarly decomposed into an internal (p-q2)-order FFT, an external q2-order FFT and 2 p inter-stage twiddle factor multiplications at a sub-decomposition point q2, so that its storage cost C FFT (p) becomes C FFT (p-q2)+C FFT (q2)+L FFT (q2,p-q2).

[0110] By recursively decomposing the index bit number for several levels, the n-order FFT is finally decomposed into 1-order FFTs, so that the final storage cost can be recursively obtained.

[0111] As shown in the above formula (5), for the n-order FFT, the value of the decomposition point p can be in the interval of 1 to n-1. That is, the n-order FFT can have n-1 alternative decomposition points, and the storage costs under the respective alternative decomposition points can be different. The cost evaluation function of the above formula (6) can be used to calculate the cost under each alternative decomposition point, and then the minimum value is found as the storage cost C FFT (n) of the n-order FFT, and the decomposition manner corresponding to the minimum value is the target decomposition manner of the n-order FFT.

[0112] Under each of the above alternative decomposition points, in the case where p or n-p is 1, since the 1-order FFT does not need to perform multiplication operation, C FFT (1)=0; and in the case where p or n-p is not 1, the storage cost can be further recursively decomposed to 1-order FFT for several levels, so that the decomposition manner with the minimum storage cost is finally found.

[0113] All minimum costs C for p∈[1,n) can be pre-searched and obtained in a bottom-up manner. FFT (p) and its corresponding decomposition methods are determined, and then the values ​​of p are iterated through, for example, p is scanned from 1 to n-1, and the cost under each candidate decomposition point is calculated, so as to find the C with the minimum cost. FFT (n) and its corresponding decomposition methods.

[0114] Figure 4a Algorithm 1, written in pseudocode, provides an example of a method to obtain the minimum storage cost for a k-order FFT search.

[0115] like Figure 4a As shown, in the example of Algorithm 1, a bottom-up approach is used, that is, starting from the lowest bit C. FFT (2) Start by gradually calculating the storage cost C of the k-th order FFT up to the target order. FFT (k), where for each n-order FFT, the cost at all decomposition points p is traversed to find the minimum value as its final storage cost C. FFT (n).

[0116] In the first line of Algorithm 1, the storage cost C of the first-order FFT is... FFT (1) Initialize to 0.

[0117] In line 5 of Algorithm 1, the aforementioned decomposition cost evaluation function (6) is used to calculate the cost TC at the current decomposition point p for each n-order FFT. FFT The minimum storage cost of each lower order, i.e., each p and np order, has already been calculated using Algorithm 1. Therefore, the calculated minimum storage costs of the p and (np) order FFTs are directly read as the storage costs C of the p and (np) order FFTs in line 5. FFT (p), C FFT (np) is sufficient.

[0118] Additionally, regarding the local storage cost L in the decomposition cost evaluation function (6) FFT (p, np), the upper limit of the number of twitch factors that need to be stored in inter-stage multiplication is usually 2. n However, as mentioned earlier, the half-periodicity and quarter-periodicity of the FFT twitch factor can be used to reduce it to one-quarter, that is, to 2. n-2 Two rotation factors. These two can be stored using traditional single-level storage. n-2 One rotation factor; that is, using a rotation factor of 2 n-2 A memory with 2 storage units to directly store these 2 n-2 The values ​​of Ltwist factors are given, where the address of each storage unit corresponds one-to-one with the power of the twist factor stored in that unit. Therefore, Ltwist can be directly...FFT (p, n-p) are both 2 n-2 .

[0119] In addition, in line 6 of Algorithm 1, the current storage cost TC FFT is compared with the first variable value C FFT (n), if less than the current first variable value, the first variable value C FFT (n) is updated to the current storage cost TC FFT ; otherwise, the first variable value C FFT (n) remains unchanged, and in line 3 of Algorithm 1, the first variable value C FFT (n) is initialized to a maximum value. Therefore, it can be guaranteed that the first variable value C FFT (n) always stores the minimum storage cost of the n-order FFT at each decomposition point p that has been traversed.

[0120] Although only the storage costs C FFT (2) to C FFT (k) of the 2 to k-order FFTs are returned in the above Algorithm 1, it should be understood that the values of the decomposition points p corresponding to these minimum storage costs can also be returned at the same time, so as to obtain the decomposition points with the minimum storage cost of each order FFT. Therefore, by using these decomposition points, the target decomposition mode with the minimum storage cost of the target k-order FFT can be obtained through several levels of decomposition by recursion.

[0121] The minimum storage costs of each order FFT when using the one-level storage mode and the values of the corresponding decomposition points obtained by using the above Algorithm 1 are given in Table 1 below.

[0122] Table 1

[0123]

[0124] “(n-p)+p” in Table 1 represents the decomposition mode at the decomposition point p or n-p (for FFT, the decomposition points p or n-p are symmetrical and have the same cost), “local cost” represents the local storage cost L FFT (p, n-p) of the inter-level rotation factor multiplication using the one-level storage mode, and “total cost” represents the storage cost C FFT (n) of the n-order FFT.

[0125] For a given n, the rotation factor storage cost of the n-order FFT designed in the traditional design is 2 n-1 . Taking n = 12 as an example, the traditional cost of the FFT is 2048, but as shown in Table 1, the cost of the scheme optimized by the embodiment of the present specification is 1060, and the storage cost is reduced by (2048-1060) / 2048*100% = 48.24%.

[0126] In addition, from Table 1, the target decomposition mode with the minimum storage cost of each order FFT when using the one-level storage mode can be obtained.

[0127] For example, for a 12-order FFT, a decomposition point of 6 can be used to obtain a 6-order FFT + a 6-order FFT, and then a sub-decomposition point of 3 is used for each of the 6-order FFTs to obtain a 3-order FFT + a 3-order FFT, and then a sub-decomposition point of 1 or 2 is used for each of the 3-order FFTs to obtain a 1-order FFT + a 2-order FFT, and then the 2-order FFT is decomposed to obtain a 1-order FFT + a 1-order FFT.

[0128] The entire FFT processing circuit can be designed according to the target decomposition mode obtained above, for example, the corresponding memory is allocated to the twiddle factor.

[0129] For example, the SDF pipeline architecture of the 12-order FFT in the foregoing Figure 2b can be changed to the SDF pipeline architecture of the 12-order FFT in the foregoing Figure 5a The SDF pipeline architecture example is shown in the following table.

[0130] As shown in the following table, Figure 5a compared with Figure 2b , with the change of the decomposition mode, the number of twiddle factors required to be stored by the multiplier between each stage also changes, and the number of storage spaces occupied by the memory below each multiplier also changes. It can be seen that Figure 5a the number of required twiddle factors is significantly reduced, from 2045 in Figure 2b to only 1060. Figure 5a Each twiddle factor memory in uses a one-level storage mode.

[0131] Figure 5a In , only the change of the memory allocated to the twiddle factor is shown for the sake of clarity and simplicity, but actually the data flow of the entire 12-stage basic butterfly operation and the inter-stage twiddle factor multiplication has changed, and therefore some connection modes and the like also change accordingly.

[0132] As mentioned above, the principles and schemes proposed above for FFT can be extended to other FFT-like transforms, such as NTT, NTTP, INTTP, etc. The application of the schemes of the embodiments of the present specification to NTT, NTTP, and INTTP will be discussed below.

[0133] NTT is a FFT variant in a finite field, and its calculation formula is as follows:

[0134]

[0135] where 0 <= i, o <= N-1.

[0136] Compared with FFT, NTT has a modulo operation. Accordingly, the rotation factor ω N To satisfy where 1≤k<N. The rotation factor of NTT has the periodicity and half-periodicity of the aforementioned rotation factor of FFT, but does not have the 1 / 4 periodicity because w4is no longer a special number.

[0137] Similar to FFT, the NTT represented by the aforementioned formula (7) can be decomposed by the following formula (8):

[0138]

[0139] where 1<=p<n. In formula (8), three sources of rotation factors under this decomposition are also indicated.

[0140] Similar to FFT, in formula (8), an n-order NTT is decomposed into 2 p internal NTTs (which are (n-p)-order NTTs), 2 n-p external NTTs (which are p-order NTTs), and inter-stage rotation factor multiplications between the internal NTTs and the external NTTs.

[0141] Similarly, the storage cost of the rotation factors required by an n-order NTT can be defined as C NTT (n), the local storage cost required by the inter-stage rotation factor multiplications can be defined as L NTT (p,n-p). Therefore, the storage cost of an n-order NTT at the decomposition point p can be obtained as:

[0142] C NTT (n)=C NTT (n-p)+C NTT (p)+L NTT (p,n-p)(9)

[0143] Because the NTT rotation factor no longer has the 1 / 4 periodicity, the upper limit of the number of rotation factors that need to be stored by the inter-stage multiplications can only be reduced to 2 n-1 . Therefore, in the case of using the conventional one-level storage mode to store the rotation factors, L NTT (p,n-p) can all take the value of 2 n-1 . C NTT (1) is still 0.

[0144] Similar to the FFT, the above equation (8) can be applied recursively to index bit decomposition of several levels for the n-order NTT until it is finally decomposed into 1-order NTT. Therefore, the above decomposition cost evaluation function (9) can be applied recursively to calculate the storage cost of the n-order NTT in various decomposition manners, so as to find the decomposition manner with the minimum storage cost.

[0145] In addition to changing the subscript of each parameter from FFT to NTT, the aforementioned algorithm 1 for FFT can also be applied to NTT, and L NTT (p, n-p) are both 2 n-1 .

[0146] The following refers to Figure 4b , which introduces the operation of NWC with pseudo code, which provides an effective method for calculating the polynomial product c(x).

[0147] In Figure 4b the calculation process shown, a(x) and b(x) are polynomials in, whose coefficients are a N-1 to a0and b N-1 to b0, where a i ,b i ∈[0,q). The polynomial multiplication of a(x) and b(x) needs to find a polynomial c(x) with N coefficients, so that where 0≤o<N.

[0148] In addition to the standard operation in the 3rd line, NWC also needs an additional preprocessing step, in which a(x) and b(x) need to be multiplied with . In addition, after the inverse NTT (INTT), there is a similar post-processing step, which involves multiplying with .

[0149] In order to speed up the operation, the preprocessing step can be integrated into the NTT, and the post-processing step can be integrated into the INTT.

[0150] For the sake of simplicity, the embodiments of the present specification introduce NTTP to represent the transformation obtained by integrating the preprocessing into the NTT in NWC, and introduce INTTP to represent the transformation obtained by integrating the INTT into the post-processing in NWC, as follows:

[0151]

[0152] Substituting the calculation formulas of NTT and INTT respectively, the NTTP and INTTP transformations can be changed into the following formulas:

[0153]

[0154] where 0 <= i, o <= N-1.

[0155] The computational framework of the NTTP and the INTTP transformations, without considering the constant 1 / N, is similar to that of the FFT and the NTT described above.

[0156] Therefore, similar to the FFT and the NTT described above, the NTTP represented by the aforementioned equation (10) can be decomposed by the following equation (12):

[0157]

[0158] and the INTTP represented by the aforementioned equation (11) can be decomposed by the following equation (13) (where the constant 1 / N is omitted):

[0159]

[0160] where 1 <= p < n.

[0161] In equation (12), an n-order NTTP is decomposed into 2 p internal NTTPs (which are (n-p)-order NTTPs), 2 n-p external NTTs (which are p-order NTTs), and inter-stage twiddle factor multiplications between the internal NTTPs and the external NTTs.

[0162] In equation (13), an n-order INTTP is decomposed into 2 p internal INTTs (which are (n-p)-order INTTs), 2 n-p external INTTPs (which are p-order INTTPs), and inter-stage twiddle factor multiplications between the internal INTTs and the external INTTPs.

[0163] The storage cost of the twiddle factors required for an n-order INTT, an n-order NTTP, and an n-order INTTP can be defined as C INTT (n), C NTTP (n), and C INTTP (n), respectively, and the local storage cost of the inter-stage twiddle factor multiplications required for an n-order NTTP and an n-order INTTP can be defined as L NTTP (p, n-p) and L INTTP (p, n-p), respectively.

[0164] Therefore, the storage cost of an n-order NTTP and an n-order INTTP at the decomposition point p can be obtained as:

[0165] C NTTP (n) = C NTTP (n-p) + C NTT(p)+L NTTP (p,np)(14)

[0166] C INTTP (n)=C INTT (np)+C INTTP (p)+L INTTP (p,np)(15)

[0167] Since the base of the twiddle factor is 2 in both NTTP and INTTP transformations. n+1 Instead of the 2 in NTT previously n Therefore, the upper limit of the number of twitch factors that need to be stored for inter-level multiplication becomes 2. n Therefore, when using the traditional single-level storage method to store the rotation factor, L can be... NTTP (p,np) and L INTTP (p, np) all take values ​​of 2 n Moreover, C NTTP (1) and C INTTP (1) also becomes 1 accordingly, that is, a rotation factor needs to be stored in the first-order NTTP and INTTP transformations.

[0168] Similar to FFT, formulas (12) and (13) above can be recursively applied to perform several levels of index bit decomposition on n-order NTTP and n-order INTTP respectively, until they are all decomposed into first-order transformations. Therefore, the decomposition cost evaluation functions (14) and (15) above can be recursively applied to calculate the storage cost of n-order NTTP and n-order INTTP under various decomposition methods, thereby finding the decomposition method with the minimum storage cost.

[0169] However, as shown in equations (14) and (15) above, the decomposition cost functions of n-order NTTP and n-order INTTP also involve the costs of lower-order NTT or INTT. It can be proven that the costs of NTT and INTT are the same, i.e., C NTT (n)=C INTT (n), therefore, it is also necessary to use the previous algorithm for NTT to pre-calculate the storage cost of each low-order NTT.

[0170] Therefore, it can be Figure 4a The algorithm 1 for FFT shown is modified in some ways to obtain... Figure 4c Algorithm 2 shown is used to search for the minimum storage cost for k-order NTT, NTTP and INTTP respectively.

[0171] Similar to Algorithm 1, the method example of Algorithm 2 adopts a bottom-up approach, that is, starting from the least significant bit C. NTT (2) C NTTP (2) and C INTTP(2) Start, gradually calculate the storage cost C of k-th NTT, NTTP and INTTP to the target order NTT (k), C NTTP (k) and C INTTP (k), wherein for each n-th NTT, NTTP and INTTP, all the costs under all the decomposition points p are traversed respectively to find the minimum value as its final storage cost C NTT (n), C NTTP (n) and C INTTP (n).

[0172] The specific steps of algorithm 2 are similar to the foregoing algorithm 1, and only the initialization value of the 1st order transformation, the decomposition cost evaluation function, and the value of the local cost are adaptively modified according to the foregoing relevant discussion.

[0173] Similarly, the minimum storage cost of each order NTT, NTTP and INTTP obtained by algorithm 2 when adopting the first-level storage mode and the value of the corresponding decomposition point are listed in Table 2 below.

[0174] Table 2

[0175]

[0176] “(n-p)+p” in Table 2 represents the decomposition mode of each n-th transformation under the decomposition point p (but for NTT, the decomposition points p or n-p are symmetrical, and the cost is the same), “local cost” represents the local storage cost of the inter-stage rotation factor multiplication of each n-th transformation adopting the first-level storage mode, and “total cost” represents the total storage cost of each n-th transformation.

[0177] For a given n, the storage cost of each n-th transformation under the conventional design is respectively: (1) NTT needs to store 2 n storage factors; (2) NTTP and INTTP both need to store 2 n+1 storage factors.

[0178] Taking n = 12 as an example,

[0179] (1) The conventional cost of NTT is 4096, but as shown in Table 2, the cost after optimization of the scheme of the embodiment of the present specification is 2132, and the storage cost is reduced by (4096-2132) / 4096*100% = 47.95%;

[0180] (2) The conventional cost of NTTP and INTTP is 8192, but as shown in Table 2, the cost after optimization of the scheme of the embodiment of the present specification is 4217, and the storage cost is reduced by (8192-4217) / 8192*100% = 48.52%.

[0181] In addition, from Table 2, the target decomposition manner of each order NTT in which the storage cost is minimum when using the one-level storage manner can be obtained.

[0182] For example, for a 12-order NTT, the same decomposition manner as the aforementioned 12-order FFT can be used. Similarly, the entire NTT processing circuit can be designed according to the obtained target decomposition manner, for example, assigning corresponding memories to the twiddle factors therein, etc.

[0183] For example, compared with the aforementioned Figure 5a , the SDF FFT pipeline architecture shown in Figure 5b can be constructed.

[0184] As shown in Figure 5b , compared with Figure 5a , the number of twiddle factors stored by the multiplier between each stage changes from 2 n-2 to 2 n-1 , and the number of storage spaces occupied by the memory below the corresponding multiplier also substantially doubles accordingly. It can be seen that Figure 5b the architecture as a whole requires 2132 storage units to store twiddle factors, still occupying a large storage area.

[0185] Taking the memory that occupies the largest storage space in Figure 5b , i.e., the memory used to store the twiddle factor (the memory labeled with “2048” in FIG. 5) as an example, how to further reduce the required storage cost is discussed.

[0186] Figure 6 The structure of this twiddle factor memory using the one-level storage manner is shown.

[0187] i 5:0 *o 5:0 has 12 bits, but as mentioned previously, since the 2-point unit root w2 is a special value -1, based on this semi-periodicity, only half the powers (i.e., 2 11 ) of the twiddle factors need to be stored.

[0188] Since i 5:0 *o 5:0 mod 2 11 may range from [0, 2 11 ), all 2 11 powers of the twiddle factors can be enumerated and stored in the storage units at the addresses corresponding to their powers.

[0189] As shown in Figure 6 , the depth of this twiddle factor memory, i.e., the number of storage units B is 211 =2048, the bit width of each storage unit, i.e., the number of bits T required to store the rotation factor, is 128. Each storage unit at each address stores the value of the rotation factor to the same power as that address. For example, the rotation factor is stored at address 2047.

[0190] When it is necessary to read the required rotation factor, i can be used. 5:0 *o 5:0 The highest bit of the product is used to determine the semi-periodicity of w2, and the remaining 11 bits are used as an address to read the value of the rotation factor stored at that address in the rotation factor memory. This value has the same power as the address, i.e., i.e., i.e., i.e. 5:0 *o 5:0 mod 2 11 .

[0191] therefore, Figure 6 The first-level storage method requires a total of B*T = 2048*128 = 262144 bits. On average, this is equivalent to storing B*T / T = 262144 / 128 = 2048 data points (i.e., rotation factor values).

[0192] However, research has found that i 5:0 *o 5:0 mod 2 11 The actual product has only P = 1073 possible outcomes, far below the upper limit of 2048. In other words, in... Figure 6 Of the 2048 rotation factor values ​​stored, only 1073 are actually used, while the remaining nearly 1000 storage units are wasted.

[0193] To address this inefficient storage allocation problem, a two-level storage approach is proposed to store the rotation factor. For example... Figure 7 As shown, two memories can be set up: a rotation factor memory and an index memory. The rotation factor memory only needs to have P storage units to store all valid rotation factor values, while the index memory has an upper limit of B, and stores the address of the rotation factor corresponding to each valid modular multiplication value in the rotation factor memory at the address of each valid modular multiplication value.

[0194] When storing rotation factors, all rotation factors raised to the power of the effective modular multiplication value can be stored in the rotation factor memory first. Then, the corresponding index value is stored at the address of each effective modular multiplication value in the index memory. This index value points to the address of the rotation factor raised to the power of that effective modular multiplication value in the rotation factor memory.

[0195] Thus, when reading the rotation factor, the modulo multiplication value of i can be calculated first, which is the power of the rotation factor to be read. The modulo multiplication value is used as the address to read the index memory, i.e. the index value stored at the address of the modulo multiplication value in the index memory. Then, the index value is used as the address to read the rotation factor memory, i.e. the value of the rotation factor stored at the address of the index value in the rotation factor memory.

[0196] Taking i 5:0 = 33 and o 5:0 = 62 as an example, i 5:0 o 5:0 mod 2 11 = 2046. The index value 1072 is stored at the address 2046 of the index memory, which indicates that the rotation factor is stored at the address 1072 of the rotation factor memory. For the convenience of understanding, Figure 7 the values shown in the storage units of the rotation factor memory in Figure 7 are not the actual rotation factor values, but the power values thereof. Thus in the two-level storage mode shown in 5:0 o 5:0 mod 2 11 , the corresponding rotation factor value can be directly generated by the address.

[0197] Figure 7 In addition, as shown in , since 2047 cannot be generated by i 5:0 o 5:0 mod 2 11 , the value at the address 2047 of the index memory can be any value, such as 0.

[0198] In the two-level storage mode described above, although the cost of the index memory is increased, the increased cost is less than the storage cost saved by the rotation factor memory, so the total storage cost is reduced.

[0199] Specifically, the bit width of the index memory only depends on the depth P of the rotation factor memory, which is Figure 7 i.e. the ceiling of log2P. For example, in , P is 1073, so the bit width of the index memory is only 11 bits.

[0200] Figure 7 Thus, the two-level storage mode of

[0201] requires a total of bits of storage.

[0202] On average, it is equivalent to storing data (i.e. rotation factor values).

[0203] Therefore, compared with the first storage mode Figure 6 , the second storage mode is adopted, i 5:0 o 5:0 mod 2 11 The required local storage cost is reduced from 2048 to 1249.

[0204] The above-mentioned second storage mode can be applied to the memory used by the inter-stage multiplier in Figure 5b , as long as the number of effective rotation factors actually used in the inter-stage multiplier is less than the upper limit of the number of rotation factors, or a certain relationship is satisfied, such as the ratio of the bit width of the index memory to the bit width of the rotation factor memory is less than a preset value, so as to achieve the effect of reducing the storage cost.

[0205] Generally speaking, when the following formula (16) is satisfied, the number of bits required by the second storage mode is equal to or less than that of the first storage mode, and therefore the second storage mode can be adopted:

[0206]

[0207] The following formula (17) shows the storage cost saving ratio of the second storage mode compared with the first storage mode:

[0208]

[0209] It can be seen that when the bit width T of the rotation factor becomes larger, more storage cost can be saved. In addition, when the number P of effective modulo multiplications is much smaller than the upper limit B, more storage cost can also be saved.

[0210] A certain condition can be preset according to the above formula (17), and the second storage mode is adopted only when the condition is satisfied, so as to better balance the efficiency and area of rotation factor storage. For example, the condition can be that the ratio of the bit width of the index memory to the bit width of the rotation factor memory is less than a preset value. The preset value can be determined as needed.

[0211] The minimum storage cost of each order of FFT, NTT, NTTP and INTTP obtained by using Algorithm 1 and Algorithm 2 when the second storage mode is adopted and the corresponding decomposition point values are listed in Table 3 below.

[0212] Table 3

[0213]

[0214] "(n-p)+p" in Table 3 represents the decomposition mode of each n-order transform at the decomposition point p (but for the FFT and NTT, the decomposition point p or n-p is symmetrical, and the cost is the same), "products" represents the number of corresponding io effective modular multiplications under the decomposition mode, "local cost" represents the local storage cost of the inter-stage rotation factor multiplication of each n-order transform using the two-level storage mode, and "total cost" represents the total storage cost of each n-order transform.

[0215] As described previously, for a given n, the storage costs of each n-order transform under the conventional design are respectively: (1) the FFT needs to store 2048 storage factors; (2) the NTT needs to store 4096 storage factors; and (3) the NTTP and the INTTP both need to store 8192 storage factors. n-1 n n+1

[0216] Taking n = 12 as an example,

[0217] (1) The conventional cost of the FFT is 2048, but as shown in Table 3, the cost of the scheme optimized by the embodiment of the present specification is 908, and the storage cost is reduced by (2048-908) / 2048*100% = 55.66%;

[0218] (2) The conventional cost of the NTT is 4096, but as shown in Table 3, the cost of the scheme optimized by the embodiment of the present specification is 1317.5, and the storage cost is reduced by (4096-1317.5) / 4096*100% = 67.83%;

[0219] (3) The conventional cost of the NTTP and the INTTP is 8192, but as shown in Table 3, the cost of the scheme optimized by the embodiment of the present specification is 2527.625, and the storage cost is reduced by (8192-2527.625) / 8192*100% = 69.15%.

[0220] In addition, compared Table 3 with the data of Table 1 and Table 2:

[0221] For the FFT, the cost is further reduced from 1060 to 908;

[0222] For the NTT, the cost is further reduced from 2132 to 1317.5;

[0223] For the NTTP and the INTTP, the cost is further reduced from 4217 to 2527.625.

[0224] It can be seen that, compared with the one-level storage mode, the two-level storage mode greatly reduces the storage cost, especially in the application scenarios of the NTT, the NTTP and the INTTP. ​​​

[0225] Based on the basic principles and inventive concepts of the specific schemes of the embodiments of the present specification described above for FFT, NTT, NTTP and INTTP transformations, a general scheme can be obtained, which is generally applicable to similar application scenarios, effectively saving the storage cost of rotation factors.

[0226] Figure 8 A method flowchart for storing rotation factors in a target transformation according to an embodiment is shown. The target transformation is a discrete transformation or its inverse transformation that transforms an input coefficient sequence into an output coefficient sequence based on rotation factors. Figure 8 The method shown includes the following steps:

[0227] Step S81, determine the target rotation factor to be stored, the power of the target rotation factor is the result of the product of the first factor of the first number of bits and the second factor of the second number of bits modulo the target value;

[0228] Step S82, store the target rotation factor by a two-level storage method.

[0229] Figure 9 A method flowchart for performing the two-level storage method in step S82 according to an embodiment is shown, Figure 9 The two-level storage method shown includes the following steps:

[0230] Step S821, store the target rotation factor at a first address in a rotation factor storage, wherein the rotation factor storage includes a first number of first storage units, the first number being the number of different modulo multiplication results of the factors of the first number of bits and the factors of the second number of bits;

[0231] Step S822, store an index value pointing to the first address at a second address in an index storage, wherein the index storage includes the target value of second storage units, and the second address corresponds to the power of the target rotation factor; the target value is greater than the first number.

[0232] The execution of the above steps will be described in detail below in conjunction with specific examples.

[0233] In step S81, in some examples, the target rotation factor to be stored can be a rotation factor used for inter-combination multiplication when the n-order target transformation is decomposed into the combination of (n-p) order and p order low-order transformations at the decomposition point p as shown in the above formulas (5), (8), (12) or (13); the first factor and the second factor are obtained based on the first and second linear processing of the coefficient indexes of p bits and (n-p) bits, respectively; and the target value is determined according to the target transformation type. It should be understood that the scheme of the embodiments of the present specification is not limited to this application scenario, but can be applied to any scenario with similar rotation factor storage requirements.

[0234] Accordingly, as indicated by the foregoing equation (5) and its associated discussion, in the case where the target transform is an FFT, the power of the target twiddle factor can be i p-1:0 n-p-1:0 mod 2 n-2 ; thus the first factor is i p-1:0 and the second factor is o n-p-1:0 , which have first and second bit counts of p bits and (n-p) bits, respectively, and the first and second linear processes are both identity transforms, with the target value being 2 raised to the power of n-2.

[0235] As indicated by the foregoing equation (8) and its associated discussion, in the case where the target transform is an NTT, the power of the target twiddle factor can be i p-1:0 n-p-1:0 mod 2 n-1 ; thus the first factor is i p-1:0 and the second factor is o n-p-1:0 , which have first and second bit counts of p bits and (n-p) bits, respectively, and the first and second linear processes are both identity transforms, with the target value being 2 raised to the power of n-1.

[0236] As indicated by the foregoing equation (12) and its associated discussion, in the case where the target transform is an NTTP, the power of the target twiddle factor can be i p-1:0 *(2*o n-p-1:0 +1) mod 2 n ; thus the first factor is i p-1:0 and the second factor is (2*o n-p-1:0 +1), which have first and second bit counts of p bits and (n-p+1) bits, respectively. This means that the first linear process is an identity transform, the second linear process defines the second factor as 2*x+1, where x is a coefficient index of (n-p) bits, and the target value is 2 raised to the power of n.

[0237] As indicated by the foregoing equation (13) and its associated discussion, in the case where the target transform is an INTTP, the power of the target twiddle factor can be (2*i p-1:0 +1)*o n-p-1:0 mod 2 n ; thus the first factor is (2*i p-1:0 +1) and the second factor is o n-p-1:0 , which have first and second bit counts of (p+1) bits and (n-p) bits, respectively. This means that the first linear process defines the first factor as 2*x+1, where x is a coefficient index of p bits, the second linear process is an identity transform, and the target value is 2 raised to the power of n.

[0238] ​​In some examples, the target rotation factor to be stored can be a rotation factor under a target decomposition manner with minimum storage cost for a K-point input coefficient sequence to be processed. The target decomposition manner can be determined by the method shown in Figure 10 Thus, the target decomposition manner aiming to minimize the storage cost of the entire layout can be combined with the two-level storage manner, greatly reducing the storage cost.

[0239] Figure 10 A flow chart of a method for determining a target decomposition manner according to an embodiment is shown in Figure 10 The method shown in

[0240] In step S101, a plurality of candidate decomposition points in the k-bit coefficient index corresponding to the K-point input coefficient sequence are determined, where K is the k-th power of 2; thus the target transform can also be referred to as a k-order target transform;

[0241] In step S102, starting from the low-bit decomposition point, the minimum storage cost under each candidate decomposition point is determined by recursively decomposing a number of index bits according to a decomposition cost evaluation function, and the target decomposition manner with minimum storage cost is determined; wherein the decomposition cost evaluation function defines that, for an n-order target transform, the storage cost under a decomposition point p includes the storage cost of an (n-p) order first transform, the storage cost of a p order second transform, and the local storage cost of the inter-level rotation factor under the two-level storage manner shown in Figure 9 The local storage cost of the inter-level rotation factor under the two-level storage manner shown in, wherein the first transform and the second transform are each the target transform or the corresponding base transform thereof, and the local storage cost includes the storage cost of the rotation factor memory and the storage cost of the index memory.

[0242] In some examples, in step S101, for a k-order target transform, any number of values in the interval [1, k-1] can be selected as candidate decomposition points. For example, as shown in the aforementioned algorithm 1 and algorithm 2, the interval [1, k-1] can be traversed, i.e. all integer values from 1 to k-1 are included as candidate decomposition points. However, in some examples, due to the symmetry of the decomposition cost of FFT and NTT, i.e. the cost under decomposition point p and k-p is equal, therefore all integer values between 1 and k / 2 can be selected as candidate decomposition points. In other examples, the values of the candidate decomposition points can also be selected according to other considerations.

[0243] Then, in step S102, the minimum cost under each candidate decomposition point can be calculated in ascending order according to the decomposition cost evaluation function, and then the minimum value among them is obtained as the minimum cost of the k-order target transform, and the decomposition manner corresponding to the minimum cost is the target decomposition manner.

[0244] For example, the decomposition cost evaluation function defines the current cost as the sum of the cost of decomposing the corresponding (k-n)th first transform, the cost of the n-th second transform, and the local cost for the k-th target transform.

[0245] As shown in Table 3, for some lower order target transforms, such as 2nd to 5th order FFTs and 2nd to 3rd order NTTs, since the number of rotation factors actually needed is equal to the upper limit value, there is no need to use the two-level storage method, and the local cost is still the corresponding upper limit value. For higher order FFTs and NTTs, as well as each order of NTTP and INTTP, the two-level storage method can be used to store the inter-stage rotation factors, and the local cost is the sum of the storage costs of the rotation factor memory and the index memory used by the corresponding two-level storage method. The right side of the above formula (16) can be used, i.e. The values of these local costs are calculated in advance.

[0246] Therefore, the local cost can be a pre-calculated numerical value, and to determine the minimum value of the current cost, the minimum values of the costs of the (k-n)th first transform and the n-th second transform need to be determined.

[0247] In the case of FFT or NTT target transforms, the first and second transforms are both the target transform itself. In the case of (k-n) or n being 1, the initialized value can be directly obtained, i.e., C FFT (1) or C NTT (1) = 0; and in the case of (k-n) or n not being 1, since the minimum cost value is not yet known, the minimum storage cost can be determined by recursively decomposing several levels of index bits until the 1st order FFT or NTT is decomposed.

[0248] For example, for the n-th target transform corresponding to the current candidate decomposition point, similar to the above k-th target transform, each candidate sub-decomposition point is traversed from the low bit, and the storage cost at each sub-decomposition point is determined according to the decomposition cost evaluation function, and the minimum value is taken as the minimum storage cost of the n-th target transform; if the minimum value of the cost of the first or second transform corresponding to the current sub-decomposition is still unknown, the first or second transform is further decomposed until the 1st order transform is decomposed. It should be understood that in other examples, more order target transform storage cost values can also be initialized as needed, such as pre-setting the minimum cost values of 2nd or 3rd order FFTs or NTTs, and the termination point of the recursive decomposition of higher order FFTs or NTTs can also include 2nd or 3rd order FFTs or NTTs, etc.

[0249] In some examples, as described in the foregoing Algorithm 1 and Algorithm 2, for each n-order target transform, the current storage cost TC can be determined according to the decomposition cost evaluation function for the current sub-decomposition point p of the n-order target transform; the current storage cost TC is compared with the first variable value C, and if the current storage cost TC is smaller than the first variable value C, the first variable value C is updated as the current storage cost, i.e., C = min(TC, C), so that the minimum storage cost of the n-order target transform is obtained after all the sub-decomposition points are traversed.

[0250] In some examples, for each n-order target transform, the minimum cost of each low-order target transform can be determined in advance by the foregoing method, and then the minimum cost of the current n-order target transform is determined. For example, as described in the foregoing Algorithm 1 and Algorithm 2, the minimum cost C of all p ∈ [1, n) can be obtained by using the step S102 from bottom to top. FFT (p) and the corresponding decomposition mode, and then the value of p is traversed, for example, p is scanned from 1 to n-1, the cost of the n-order target transform at each sub-decomposition point p is calculated, and thus the minimum cost C of the n-order target transform is found. FFT (n) and the corresponding decomposition mode.

[0251] In the case where the minimum cost of each low-order target transform has been calculated in advance, when the storage cost of the current sub-decomposition point p is determined, the minimum storage cost of the (n-p) -order target transform can be read as the storage cost of the (n-p) -order first transform, and the minimum storage cost of the p-order target transform can be read as the storage cost of the p-order second transform.

[0252] In the case where the target transform is an NTTP transform, the first transform is the target transform itself and the second transform is an NTT; in the case where the target transform is an INTTP transform, the first transform is an INTT and the second transform is the target transform itself. Therefore, in addition to calculating the minimum cost value of each low-order target transform similarly to the foregoing FFT or NTT case, the minimum cost value of each low-order NTT also needs to be obtained. The minimum cost value of each low-order NTT can be calculated in advance by using the foregoing example methods, and the value of each-order NTT calculated in advance can be directly read when the cost of the NTTP transform or the INTTP transform is calculated.

[0253] The execution of each step of the two-level decomposition mode will be described in detail below with reference to specific examples.

[0254] In step S821, in some examples, the number of the first storage units included in the rotation factor memory, i.e., the first number, is the depth P, which is the number of all different modulus multiplication results (which can also be referred to as all effective modulus multiplication results) generated by all possible values of the first factor and all possible values of the second factor with each other.

[0255] When the target transformation is FFT, P can be i p-1:0 *o n-p-1:0 mod 2 n-2 The number of all distinct results; in the case of NTT, P can be i p-1:0 *o n-p-1:0 mod 2 n-1 The number of all distinct results; in the case of NTTP, P can be i p-1:0 *(2*o n-p-1:0 +1)mod 2 n The number of all distinct results; in the case of INTTP, P can be (2*i p-1:0 +1)*o n-p-1:0 mod 2 n The number of all different results.

[0256] The values ​​of each twitch factor can be stored sequentially in the first memory location at each address from low to high, in ascending order of power. For example... Figure 7 As shown, this allows us to determine the first address where the target rotation factor will be stored. It should be understood that the storage location of each rotation factor in the rotation factor memory is not limited to this, but can be determined using various suitable methods. The bit width of the first storage unit is the first number of bits required for the target rotation factor, such as the number of bits T of the rotation factor value.

[0257] Then, in step S822, in some examples, the number of second storage units included in the index memory, i.e., the target value is depth B, is the modulus in the modular multiplication of the first factor and the second factor. Using the power of the target twiddle factor determined in step S81 as the second address, an index value pointing to the first address is stored at the second address in the index memory. Therefore, in the index memory, index values ​​pointing to the addresses of the corresponding twiddle factors in the twiddle factor memory can be stored in each second storage unit, with the power of each twiddle factor stored in the twiddle factor memory as the address. The bit width of the second storage unit is the second number of bits required for the index value, for example... In some examples, the second bit number The two-level storage method is only used when the ratio of the first bit number T to the first bit number T is less than a preset value.

[0258] After storing the rotation factor in a two-level storage method, the rotation factor can be read using a corresponding two-level reading method. Figure 11 A flowchart illustrating a method for reading a rotation factor in a target transformation according to one embodiment is shown. Figure 11 The method shown includes the following steps:

[0259] Step S111, determining a target power of a rotation factor to be read, the target power being a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0260] Step S112, determining a second address according to the target power; reading an index value stored at the second address in an index memory; wherein the index memory has the target value of second storage units;

[0261] Step S113, determining a first address according to the index value; reading a value of a rotation factor stored at the first address in a rotation factor memory; wherein the rotation factor memory includes a first number of first storage units, the first number being a number of different modulo multiplication results generated by the first factor of the first number of bits and the second factor of the second number of bits; and the first number is less than the target value.

[0262] These steps correspond to the steps in the foregoing Figure 8 and Figure 9 respectively, and thus the specific details and examples are not repeated.

[0263] Thus, the embodiments of the present specification avoid unnecessary storage by a two-level storage manner, greatly reducing the storage cost. Further, the embodiments of the present specification can further reduce the storage cost by finding a target decomposition manner with the minimum storage cost.

[0264] According to another aspect, embodiments also provide a device for storing a rotation factor in a target transform, wherein the target transform is a discrete transform or its inverse transform that transforms an input coefficient sequence into an output coefficient sequence based on a rotation factor. The above-mentioned storage device includes:

[0265] A determining unit configured to determine a target rotation factor to be stored, a power of the target rotation factor being a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0266] A storage unit configured to store the target rotation factor by a two-level storage manner, the two-level storage manner including:

[0267] storing the target rotation factor at a first address in a rotation factor memory, wherein the rotation factor memory includes a first number of first storage units, the first number being a number of different modulo multiplication results generated by the first factor of the first number of bits and the second factor of the second number of bits;

[0268] storing an index value pointing to the first address at a second address in an index memory, wherein the index memory includes the target value of second storage units, the second address corresponding to the power of the target rotation factor; and the target value is greater than the first number.

[0269] According to an embodiment of yet another aspect, a device for reading a rotation factor in a target transform is provided, wherein the target transform is a discrete transform or its inverse transform that transforms an input coefficient sequence into an output coefficient sequence based on the rotation factor. The reading device comprises:

[0270] a determining unit configured to determine a target power of the rotation factor to be read, the target power being a result of a multiplication of a first factor of a first number of bits and a second factor of a second number of bits modulo a target value;

[0271] a first reading unit configured to determine a second address according to the target power, and read an index value stored at the second address in an index memory, wherein the index memory has the target value of second storage units;

[0272] a second reading unit configured to determine a first address according to the index value, and read a value of the rotation factor stored at the first address in a rotation factor memory, wherein the rotation factor memory comprises a first number of first storage units, the first number being a number of different modulo multiplication results of the first factor of the first number of bits and the second factor of the second number of bits, and the first number is less than the target value.

[0273] The above device can be implemented in a software form, a hardware form or a combination of software and hardware.

[0274] In addition, according to an embodiment of another aspect, a computing device is also provided, which comprises a memory and a processor, the memory stores executable code, and the processor executes the executable code to implement the above-mentioned rotation factor storage method and / or rotation factor reading method.

[0275] Those skilled in the art should be aware that the functions described in the above one or more examples can be implemented in hardware, software, firmware or any combination thereof. When implemented in software, the functions can be stored in a computer readable medium or transmitted as one or more instructions or codes on a computer readable medium.

[0276] The above detailed description further illustrates the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above detailed description is only a specific embodiment of the present application and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made on the basis of the technical solutions of the present application shall be included in the protection scope of the present application.

Claims

1. A method for storing a rotation factor in a target transformation, wherein the target transformation is a discrete transformation or its inverse transformation that transforms an input coefficient sequence into an output coefficient sequence based on the rotation factor; The method includes: Determine the target rotation factor to be stored, wherein the power of the target rotation factor is the result of the product of the first factor of the first digit and the second factor of the second digit modulo the target value; The target rotation factor is stored using a two-level storage method, which includes: The target rotation factor is stored at a first address in the rotation factor memory, wherein the rotation factor memory includes a first number of first storage units, the first number being the number of different modular multiplication results generated by the first-digit factor and the second-digit factor; An index value pointing to the first address is stored at a second address in the index memory, wherein the index memory includes the target value and a second storage unit, the second address corresponding to a power of the target twitch factor; the target value is greater than the first number.

2. The method according to claim 1, wherein, The bit width of the first storage unit is the first number of bits required for the target rotation factor; the bit width of the second storage unit is the second number of bits required for the index value, and the ratio of the second number of bits to the first number of bits is less than a preset value.

3. The method according to claim 1, wherein, The target rotation factor is a rotation factor used for multiplication between combinations when an n-order target transformation is decomposed at decomposition point p into a combination of two lower-order transformations of order (np) and order p. The first factor and the second factor are obtained by performing first and second linear processing based on the coefficient indices of p-bit and (np)-bit, respectively. The target value is determined based on the target transformation type.

4. The method according to claim 3, wherein, The target transformation is a Fast Fourier Transform (FFT), the first and second linear processes are both identity transformations, and the target value is 2 raised to the power of n-2.

5. The method according to claim 3, wherein, The target transformation is the Fast Number Theory Transformation (NTT), the first and second linear processes are both identity transformations, and the target value is 2 raised to the power of n-1.

6. The method according to claim 3, wherein, The target transformation is the NTTP transformation obtained by fusing preprocessing and fast number theory transformation (NTT) in negative wrapping convolution (NWC). The first linear processing is the identity transformation, and the second linear processing defines the second factor as 2*x+1, where x represents the (np)-bit coefficient index. The target value is 2 raised to the power of n.

7. The method according to claim 3, wherein, The target transformation is the INTTP transformation obtained by fusing the inverse fast number theory transformation (INTT) with post-processing in negative wrapping convolution (NWC). The first linear processing defines the first factor as 2*x+1, where x represents the index of the p-bit coefficient. The second linear processing is the identity transformation, and the target value is 2 raised to the power of n.

8. The method according to claim 3, wherein, The target rotation factor is the rotation factor under the target decomposition method with the minimum storage cost for the K-point input coefficient sequence to be processed. The target decomposition method is determined through the following steps: Determine multiple candidate decomposition points in the k-bit coefficient index corresponding to the K-point input coefficient sequence, where K is a power of 2; Starting from the lowest decomposition point, for each candidate decomposition point, the minimum storage cost is determined through a recursive decomposition of several levels of index bits based on the decomposition cost evaluation function, thereby determining the target decomposition method with the minimum storage cost. The decomposition cost evaluation function specifies that, for an n-order target transformation, the storage cost at decomposition point p includes the storage cost of the (np)-order first transformation, the storage cost of the p-order second transformation, and the local storage cost of storing the inter-level rotation factor through the two-level storage method. The first and second transformations are each the target transformation or its corresponding basic transformation, and the local storage cost includes the storage cost of the rotation factor memory and the storage cost of the index memory.

9. The method according to claim 8, wherein, The target transformation is a Fast Fourier Transform (FFT), and both the first and second transformations are target transformations; the storage cost of the first-order target transformation is initialized to 0.

10. The method according to claim 8, wherein, The target transformation is the Fast Number Theory Transform (NTT), and both the first and second transformations are target transformations; the storage cost of the first-order target transformation is initialized to 0.

11. The method according to claim 8, wherein, The target transform is the NTTP transform obtained by fusing preprocessing and the fast number-theoretic transform (NTT) in negative wrapping convolution (NWC); the first transform is the target transform, and the second transform is the NTT transform; the storage cost of the first-order target transform is initialized to 1.

12. The method according to claim 8, wherein, The target transform is the INTTP transform obtained by fusing the inverse fast number theory transform (INTT) with post-processing in negative wrapping convolution (NWC); the first transform is the INTT transform, and the second transform is the target transform; the storage cost of the first-order target transform is initialized to 1.

13. A method for reading a rotation factor in a target transformation, wherein the target transformation is a discrete transformation or its inverse transformation that transforms an input coefficient sequence into an output coefficient sequence based on a rotation factor; The method includes: Determine the target power of the rotation factor to be read, wherein the target power is the result of the modulus of the product of the first factor of the first digit and the second factor of the second digit; Based on the target power, determine the second address; read the index value stored at the second address in the index memory; wherein, the index memory has the target value number of second storage units; The first address is determined according to the index value, and the value of the rotation factor stored at the first address in the rotation factor memory is read; wherein, the rotation factor memory includes a first number of first storage units, the first number being the number of different modular multiplication results generated by the first-digit factor and the second-digit factor; the first number is less than the target value.

14. An apparatus for storing a rotation factor in a target transformation, said target transformation being a discrete transformation or its inverse transformation that transforms an input coefficient sequence into an output coefficient sequence based on the rotation factor; The device includes: The determining unit is configured to determine the target rotation factor to be stored, wherein the power of the target rotation factor is the result of the product of the first factor of the first digit and the second factor of the second digit modulo the target value. The storage unit is configured to store the target rotation factor using a two-level storage method, wherein the two-level storage method includes: The target rotation factor is stored at a first address in the rotation factor memory, wherein the rotation factor memory includes a first number of first storage units, the first number being the number of different modular multiplication results generated by the first-digit factor and the second-digit factor; An index value pointing to the first address is stored at a second address in the index memory, wherein the index memory includes the target value and a second storage unit, the second address corresponding to a power of the target twitch factor; the target value is greater than the first number.

15. An apparatus for reading a rotation factor in a target transformation, said target transformation being a discrete transformation or its inverse transformation that transforms an input coefficient sequence into an output coefficient sequence based on a rotation factor; The device includes: The determining unit is configured to determine the target power of the rotation factor to be read, wherein the target power is the result of the product of the first factor of the first digit and the second factor of the second digit modulo the target value; The first reading unit is configured to: determine a second address based on the target power; and read the index value stored at the second address in the index memory; wherein the index memory has the target value number of second storage units; The second reading unit is configured to: determine a first address based on the index value, and read the value of the rotation factor stored at the first address in the rotation factor memory; wherein the rotation factor memory includes a first number of first storage units, the first number being the number of different modular multiplication results generated by the first-digit factor and the second-digit factor; the first number is less than the target value.

16. A computing device, comprising a memory and a processor, characterized in that, The memory stores executable code, and when the processor executes the executable code, it implements the method of any one of claims 1-13.

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