Parallel Power Module Transient Current Sharing Method and System

Abstract

The present invention relates to the field of power electronics technology, and specifically discloses a transient current sharing method and system for parallel power modules. The method samples the currents of N parallel power modules and converts them into induced voltages; performs integral reduction on the sampled induced voltages to obtain corresponding integral voltages; takes the largest of the N integral voltages as the reference current equivalent value, and takes the N integral voltages as the comparison current equivalent values; calculates the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; generates corresponding additional drive currents according to the N current equivalent differences and injects them into the gates of the corresponding power modules. The system sets up a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit, and a drive current injection unit to implement each step in the method, and these units are built from basic electronic components such as comparators, resistors, diodes, and filters. The invention has good current sharing effect, low cost, compact size, and fast response.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to a transient current sharing method and system for parallel power modules. Background Art

[0002] Power devices currently widely used in industrial applications, such as insulated-gate bipolar transistors (IGBTs) and silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs), play a core role in power conversion in fields such as power transmission, rail transit, electric vehicles, and renewable energy power generation. To improve the power capacity of converters, multiple power modules are usually connected in parallel. However, current imbalance is very likely to occur in multi-module parallel connections. This current imbalance leads to power losses and differences in voltage and current stresses within the converter system. The imbalance of electrothermal stress accelerates module degradation, reduces system reliability, and increases the probability of failures. Therefore, solving the problem of uneven current distribution between parallel power modules and improving the consistency of electrical stress and losses are crucial for optimizing the parallel output performance and reliability of power modules.

[0003] In terms of suppressing uneven transient currents, existing methods mainly include passive techniques and active gate drive methods. Passive methods achieve current sharing quickly by adding additional coupling inductors, resistors, or combinations thereof. However, these methods always change the original layout of the device and the overall electrical and thermal characteristics of the parallel modules. As the number of parallel devices increases, the number of passive components also increases, so it is difficult to reduce their size and weight. When the current level and frequency change, passive methods are difficult to make corresponding adjustments, resulting in poor adaptability. These limitations hinder the scalability and flexibility of passive current balancing techniques. Currently, active drive methods still have deficiencies such as an increase in the scale and complexity of the system and difficulty in achieving current balance within a single switching cycle. Summary of the Invention

[0004] The present invention provides a transient current sharing method and system for parallel power modules, and the technical problem to be solved is: how to quickly and simply achieve current balance among multiple parallel power modules within a single switching cycle.

[0005] To solve the above technical problems, the present invention provides a transient current sharing method for parallel power modules, including the steps of:

[0006] S1. Sampling the currents of N parallel power modules and converting them into induced voltages, where N≥2;

[0007] S2. Integrate and restore the induced voltage of each sampled power module to obtain the corresponding integrated voltage;

[0008] S3. Use the largest integrated voltage among the N integrated voltages as the equivalent value of the reference current, and use the N integrated voltages as the equivalent values of the comparison currents;

[0009] S4. Calculate the current equivalent difference between the equivalent value of the reference current and the equivalent values of the N comparison currents;

[0010] S5. Generate corresponding additional drive currents according to the N current equivalent differences and inject them into the gates of the corresponding power modules.

[0011] Further, the step S5 specifically includes the steps of:

[0012] Compare each current equivalent difference with the corresponding set reference value through a high-speed hysteresis comparator to output the corresponding control pulses;

[0013] Only retain the control pulses at the turn-on moment through a signal gating tri-state gate, and then isolate the control pulses through a high-bandwidth digital isolator and input them into a Schmitt buffer for buffering;

[0014] Use the buffered control pulses as the control signals of the current mirror circuit, and the current mirror circuit outputs drive currents to the gates of the corresponding power modules.

[0015] Further, the current mirror circuit includes an N MOSFET M1, a PMOSFET M2 complementary to the N MOSFET, a P MOSFET M3 identical to M2, an anti-backflow diode D1, a pull-down resistor R of M1 cm1 , an input branch shunt resistor R cm2 , an output branch shunt resistor R cm3 and the drive power supply of the corresponding power module as the current mirror power supply V DD ; where R cm1 is coupled between the pre-stage Schmitt buffer of the current mirror circuit and the drive ground GND, R cm2 is coupled between the source of M1 and the drive ground GND, the gate of M1 is connected to the pre-stage Schmitt buffer of the current mirror circuit, the drain is connected to the drain of M2, the drain of M2 is shorted to its own gate and connected to the gate of M3, the source of M2 is connected to the source of M3 and connected to V DD , the drain of M3 is connected to the anode of D1, and R cm3 is coupled between the cathode of D1 and the gate of the corresponding power module.

[0016] Further, V gp is the Miller platform voltage of the corresponding controlled power module, V D1 is the conduction voltage drop of the D1 diode, iLM is the current of the input side branch of the current mirror circuit, R dsonm3 is the on-voltage drop of MOSFET M3, R gint is the gate drive internal resistance corresponding to the controlled power module, Δv ge (t) is the required compensation drive voltage value.

[0017] Further, in the step S1, N printed circuit board Rogowski coil current sensors, i.e., PCB RCCS, are respectively sleeved on the current branches of N power modules to sample the currents of the N power modules, and the sampled currents are converted into induced voltages.

[0018] Further, each PCB RCCS is equivalent to including a voltage source e(t), a coil self-inductance L s , a distributed capacitance C in the coil s , a coil internal resistance R s and a terminal resistance R d , where the voltage source e(t), the self-inductance L s and the internal resistance R s are connected in series and then in parallel with the distributed capacitance C s , and the distributed capacitance C s is also in parallel with the terminal resistance R d , and the two ends of the terminal resistance R d are connected to the subsequent circuit.

[0019] Further, the value of the terminal resistance R d is:

[0020] Further, in the step S2, N active integrators are used for integral restoration; each of the active integrators includes: an integration resistor, an integration capacitor, a high-bandwidth operational amplifier, an integration capacitor auxiliary reset circuit, i.e., an Aux circuit, a debiasing and zero-adjusting circuit, and a high-bandwidth follower; the integration resistor is coupled between the output of the sampling unit and the inverting input terminal of the high-bandwidth operational amplifier, and is connected to the integration capacitor and the Aux circuit, the integration capacitor is coupled between the inverting input terminal and the output terminal of the high-bandwidth operational amplifier, and is in parallel with the Aux circuit, the debiasing and zero-adjusting circuit is coupled between the non-inverting input terminal of the high-bandwidth operational amplifier and the ground GND, and the high-bandwidth follower is coupled between the output of the high-bandwidth operational amplifier and the maximum value selection unit; the output of the high-bandwidth operational amplifier is equivalent to the current of the corresponding power module, and the output impedance is increased through the high-bandwidth follower.

[0021] Further, in the step S4, N differential followers are used to calculate the current equivalent difference; the calculation process of each differential follower is as follows: taking an integral voltage and a maximum voltage as a group of input voltages, the differential follower calculates the difference between the integral voltage and the maximum voltage in this group of input voltages to obtain the corresponding current equivalent difference.

[0022] The present invention also provides a parallel power module transient current sharing system, which is characterized in that it includes a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit, and a driving current injection unit. The sampling unit, the active integration unit, the maximum value selection unit, the current difference calculation unit, and the driving current injection unit are respectively used to execute steps S1 to S5 in the parallel power module transient current sharing method described above.

[0023] The parallel power module transient current sharing method and system provided by the present invention. The method first samples the currents of N parallel power modules and converts them into induced voltages, where N≥2; then integrates and restores the induced voltages of each sampled power module to obtain the corresponding integral voltages; then takes the largest integral voltage among the N integral voltages as the reference current equivalent value, and takes the N integral voltages as the comparison current equivalent values; then calculates the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; then generates corresponding additional driving currents according to the N current equivalent differences and injects them into the gates of the corresponding power modules. The system respectively sets a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit, and a driving current injection unit to implement each step in the method. These units are built by basic electronic components such as comparators, resistors, diodes, and filters. Compared with the existing active driving method, the invention provides an efficient and practical solution for current balance in industrial applications involving multiple parallel modules with low cost, compact size, and fast response characteristics. Description of the Drawings

[0024] Figure 1 is a flowchart of the parallel power module transient current sharing method provided by an embodiment of the present invention;

[0025] Figure 2 is a circuit diagram of the parallel power module transient current sharing system provided by an embodiment of the present invention;

[0026] Figure 3 is an equivalent circuit diagram of the PCB RCCS and the active integrator provided by an embodiment of the present invention;

[0027] Figure 4 is a measurement effect diagram of the PCB RCCS and the active integrator provided by an embodiment of the present invention;

[0028] Figure 5It is the circuit diagram of the first driving current injection circuit provided by the embodiment of the present invention;

[0029] Figure 6 It is the current difference calculation unit, driving current injection unit and test result diagram of the effect of injecting driving current provided by the embodiment of the present invention;

[0030] Figure 7 It is the effect diagram of suppressing transient current non-uniformity of the present invention when the DC voltage is 270V provided by the embodiment of the present invention. Detailed implementation manners

[0031] The following specifically illustrates the implementation manners of the present invention in conjunction with the drawings. The given embodiments are only for illustrative purposes and should not be construed as limiting the present invention. The drawings are only for reference and explanation and do not constitute a limitation on the protection scope of the present invention. Because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0032] The transient current sharing method for parallel power modules provided by the embodiment of the present invention is as Figure 1 shown, and includes the steps:

[0033] S1. Sample the currents of N parallel power modules and convert them into induced voltages, where N≥2;

[0034] S2. Integrate and restore the induced voltage of each sampled power module to obtain the corresponding integrated voltage;

[0035] S3. Take the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and take the N integrated voltages as the comparison current equivalent values;

[0036] S4. Calculate the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values;

[0037] S5. Generate corresponding additional driving currents according to the N current equivalent differences and inject them into the gates of the corresponding power modules.

[0038] This embodiment also provides a transient current sharing system for parallel power modules to specifically apply the above method. The system includes a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit and a driving current injection unit, which are respectively used to execute steps S1 to S5 in the above method.

[0039] (1) Step S1

[0040] Figure 2It is the circuit structure of a parallel power module transient current sharing system that applies the parallel power module transient current sharing method. To reliably sample the currents of N parallel power modules without contact, in this embodiment, N PCBRCCS (printed circuit board Rogowski coil current sensors) are respectively sleeved into the current branches of the N power modules to sample the currents of the N power modules and convert the sampled currents into induced voltages. The N PCB RCCS form a sampling unit.

[0041] As Figure 2 shown, the N PCB RCCS are arranged in sequence, including PCB RCCS1 to PCB RCCSN, and the currents of the corresponding current branches of the N power modules are represented as device currents i1 to i N .

[0042] The equivalent model of the PCB RCCS is as shown in the left part of Figure 3 , which includes an equivalent voltage source e(t), a coil self-inductance L s , a distributed capacitance C s in the coil, a coil internal resistance R s , and a terminal resistance R d . Among them, the equivalent voltage source e(t), the self-inductance L s and the internal resistance R s are connected in series and then in parallel with the distributed capacitance C s . The distributed capacitance C s is also in parallel with the terminal resistance R d . The two ends of the terminal resistance R d are connected to the subsequent circuit.

[0043] The self-inductance L of the entire coil in the PCB RCCS s is determined by the number of turns N1 / N2 of the forward / reverse coils. The inner diameter / outer diameter of the forward / reverse coils is represented as r1 / r2, the self-resonant frequencies of the forward / reverse coils are represented as ω1 / ω2, and the effective height of the PCB coil is represented as h. Then the coil self-inductance L s can be expressed as:

[0044]

[0045] Among them, μ n is the vacuum permeability, and μ r is the relative permeability of the PCB material.

[0046] The mutual inductance M between the PCB RCCS and the current branch of the corresponding power module affects the amplification factor of the collected signal. A higher M makes it easier for the subsequent integration circuit or analog-to-digital converter (ADC) to process the RCCS output signal. However, M is limited by the number of coil turns N and the required bandwidth. A lower M will result in a decrease in the signal-to-noise ratio (SNR) of the coil output. M can be expressed as:

[0047]

[0048] In addition, the distributed capacitance C in the coil s and the self-inductance L of the coil s form a low-pass filter, which significantly affects the high-frequency performance. Its influence on the dynamic characteristics of the coil cannot be ignored. The distributed capacitance along the average perimeter of the coil can be expressed as:

[0049]

[0050] where ε0 is the vacuum permittivity, and ε r is the relative permittivity of the PCB material.

[0051] In addition, considering the dynamic performance and steady-state error of the RCCS, the best method to determine the terminal resistance R d is as follows:

[0052]

[0053] It should be noted that in other embodiments, other non-contact, highly reliable current sampling sensors can be used to implement step S1, such as commercial current Hall sensors and current transformers with magnetic cores. The PCB RCCS used in this embodiment has the following advantages compared with other feasible solutions: wide current measurement range, no current saturation phenomenon; small size of the measurement device, easy to use under more parallel-connected modules.

[0054] (2) Step S2

[0055] In order to integrate and restore the weak induced voltage signal output by step S1 into a suitable voltage signal to ensure that it meets the effects of proportional matching with the actual current amplitude and phase following, this embodiment uses N active integrators (active integrator 1 to active integrator N) to be connected to N PCB RCCSs one by one, as Figure 2 shown. The N active integrators form an active integration unit.

[0056] The equivalent model of each active integrator is as shown in the right part of Figure 3 . As Figure 3As shown, the equivalent model of the active integrator includes: an integrating resistor R1, an integrating capacitor C1, a high-bandwidth operational amplifier, an integrating capacitor auxiliary reset circuit (Aux), and a high-bandwidth follower. R1, C1, and the high-bandwidth operational amplifier form an active integrating circuit. By adjusting R1 and C1 to match the amplitude and phase requirements for sampling, the weak induced voltage collected is integrated to restore the power module current equivalent voltage value. The Aux circuit discharges the integrating capacitor periodically to avoid measurement errors caused by capacitor saturation. Finally, the integrating voltage of the active integrating circuit is output through the high-bandwidth follower to avoid the influence of the subsequent circuit on the integrating voltage. The output of the active integrator can be simply expressed as:

[0057]

[0058] The measurement effects of a group of PCB RCCS and the active integrator proposed by the present invention are as Figure 4 shown. Figure 4 Among them, i1 and i2 respectively represent the original currents of power modules 1 and 2, and v rog1 、v rog2 respectively represent the integrating voltages of power module 1 and power module 2 after passing through the sampling unit and the integrating unit. Figure 4 (a) of is an overview diagram of the integration signal restoration with the time horizontal axis at 20 us per grid. The details of the power device turn-on and turn-off are shown in Figure 4 (b) of Figure 4 (c) of Figure 4 It shows that the PCB RCCS and its active integrator meet the current measurement requirements of the power device, with a stable amplitude and a phase that meets the requirements, providing a reliable current sampling input for the subsequent current balance control.

[0059] It should be noted that in other embodiments, other integrators can be used to implement step S2, such as RC passive integrators, digital integrators, etc. The advantage of the active integrator used in this embodiment compared to other feasible solutions is that the active integrator has a large amplitude gain, can be adjusted at any time, has a high signal-to-noise ratio, and does not require a complex logic processing chip for calculation.

[0060] (3) Step S3

[0061] To implement step S3, as Figure 2As shown, in this embodiment, a maximum value selection unit is connected to the output ends of N active integrators to compare the N integral voltages output by the N active integrators, determine the maximum value among them, and output the N integral voltages and the maximum voltage to their corresponding N subsequent circuits. The maximum value selection unit includes N high-bandwidth operational amplifiers and N clamping diodes. By connecting the outputs of the N high-bandwidth operational amplifiers and utilizing the voltage clamping function of the clamping diodes, the N inputs of the high-bandwidth operational amplifiers are screened to obtain the maximum input voltage among the N high-bandwidth operational amplifiers.

[0062] It should be noted that in other embodiments, other maximum value selection units can be used to implement step S3, such as a maximum value selection circuit based on diode clamping. The advantage of the maximum value selection unit adopted in this embodiment compared with other feasible solutions is that by following with a high-bandwidth operational amplifier, the influence on the pre-stage circuit is avoided, and the weakening of the input signal by the diode voltage drop is eliminated, realizing lossless and high-speed maximum value selection.

[0063] (4) Step S4

[0064] To implement step S4, in this embodiment, a current difference calculation unit performs a subtraction operation through a high-speed and high-bandwidth differential operational amplifier, and follows and outputs the current equivalent difference result through a high-speed and high-bandwidth operational amplifier. As Figure 2 shown, the current difference calculation unit includes N differential followers. The process of calculating the current equivalent difference is as follows: taking an integral voltage and the maximum voltage as a group of input voltages and inputting them into a differential follower, so as to obtain N groups of input voltages input into the corresponding differential followers. The differential follower calculates the difference between the integral voltage and the maximum voltage in this group of input voltages to obtain the current equivalent difference and inputs it into the subsequent circuit. As Figure 2 shown, the differential follower specifically includes: a high-speed and high-bandwidth differential operational amplifier and a high-bandwidth voltage follower. The algebraic subtraction of two input signals is realized through the high-speed and high-bandwidth differential operational amplifier to obtain the current equivalent difference, and it is output through the high-bandwidth voltage follower to improve the circuit output ability.

[0065] It should be noted that in other embodiments, other current difference calculation units can be used to implement step S4, such as an instrumentation amplifier circuit. The advantage of the current difference calculation unit composed of N differential followers adopted in this embodiment compared with other feasible solutions is that the number of operational amplifiers required is less, it is simple to use, and it is convenient for multi-channel signal processing.

[0066] (5) Step S5

[0067] To implement step S5, in this embodiment, a drive current injection unit is used to generate corresponding additional drive currents according to the N current equivalent difference signals output by the current difference calculation unit. As Figure 2, the drive current injection unit includes N drive current injection circuits where the front stage is connected to N differential followers one-to-one, and the rear stage is connected to N power modules one-to-one. The input of each drive current injection circuit is the current equivalent difference output by the differential follower of the front stage. The N drive current injection circuits compare the current equivalent differences with their respective set reference values (v ref1 、v ref2 、···、v refN . Theoretically, the reference values are all 0. As long as they are not 0, it means there is a difference and adjustment is needed. However, in reality, each front-stage circuit will generate a voltage bias, and the biases are different and irregular, related to the device manufacturing process. Therefore, the reference values need to be corrected according to the actual situation), and through a high-speed hysteresis comparator (U1), the control pulse of the equivalent active drive circuit of the power module is output; then, through a signal gating tri-state gate (U2), only the control pulse at the turn-on moment is retained, and the control pulse referenced to GND is isolated to the drive ground of the corresponding power module through a high-bandwidth digital isolator (U3), and then buffered through a Schmitt buffer (U4, to improve the output current capacity); finally, the control pulse is used as the control signal of the current mirror circuit, and the current mirror circuit outputs a drive current to inject an additional drive current into the gate of the corresponding power module.

[0068] Figure 5 is the circuit diagram of the first drive current injection circuit, and the remaining drive current injection circuits adopt the same circuit structure as Figure 5 . As shown in Figure 5 , the current mirror circuit includes: an N MOSFET M1, a P MOSFET M2 complementary to the N MOSFET, a P MOSFET M3 identical to M2, an anti-backflow diode D1, an M1 pull-down resistor R cm1 , an input branch shunt resistor R cm2 , an output branch shunt resistor R cm3 , and the drive power supply of the corresponding power module as the current mirror power supply V DD . Among them, R cm1 is coupled between the front-stage Schmitt buffer of the current mirror circuit and the drive ground GND, R cm2 is coupled between the source of M1 and the drive ground GND, the gate of M1 is connected to the front-stage Schmitt buffer of the current mirror circuit, the drain is connected to the drain of M2, the drain of M2 is shorted to its own gate and connected to the gate of M3, the source of M2 is connected to the source of M3 and connected to V DD , the drain of M3 is connected to the anode of D1, and R cm3 is coupled between the cathode of D1 and the gate of the corresponding power module.

[0069] In the Figure 5 shown current mirror circuit, it is necessary to pre-design and adjust the output branch shunt current resistor Rcm3 value to control the intensity of the injected gate current. Among them, the following relationship exists for the value range of the sink current resistor:

[0070]

[0071] Among them, R cm3 is the sink current resistor of the output branch of the current mirror, V DD_1 is the drive power supply of power module 1, V gp is the Miller plateau voltage of the corresponding controlled power module, V D1 is the conduction voltage drop of D1 diode, i LM is the current of the input side branch of the current mirror circuit, R dsonm3 is the conduction voltage drop of the current mirror MOSFET M3, R gint is the gate drive internal resistance of the corresponding controlled power module, Δv ge (t) is the required compensation drive voltage value.

[0072] Through the above steps, the present invention can inject additional current into the gate using the current mirror circuit during the conduction transient to significantly suppress the change of the gate voltage, thereby greatly reducing the transient current imbalance of the power module.

[0073] Figure 6 are the current difference calculation unit, the drive current injection unit, and the test result diagram of the effect of injecting the drive current. In Figure 6 , i1 and i2 respectively represent the original currents of power module 1 and 2, v rog1 -v rog2 represents the current equivalent difference value of power module 1 and power module 2 output by the current difference calculation unit, and PULSE represents the pulse output result after passing through the U1 high-speed hysteresis comparator. Figure 6 (a) is the overall view of the integral signal restoration with the time horizontal axis of 40 us per grid. The details of the power device turn-on and turn-off are respectively shown in Figure 6 (b) of Figure 6 (c) of Figure 6 indicates that the signal gating tri-state gate U2 is correctly gated at the turn-on moment, and the v rog1 -v rog2 after passing through U1 is correctly converted into the current mirror control pulse, verifying that the logic signal processing circuit part works correctly.

[0074] Figure 7 is the effect diagram of the present invention's suppression of transient current unevenness when the DC voltage is 270V. Figure 7 In it, i1 and i2 respectively represent the original currents of power module 1 and 2, v1 and v2 respectively represent the working voltages of power module 1 and 2, v g1 , v g2Are respectively represented as the drive voltages of power modules 1 and 2, t res Represents the time required to restore the equal current state, Δi max Represents the maximum current difference, t0 represents the moment when the current starts to rise, t1 represents the moment when the drive voltage reaches the Miller plateau without the effect of this invention, and t1’ represents the moment when the drive voltage reaches the Miller plateau under the effect of this invention. From Figure 7 It can be seen that when operating at a DC voltage V dc = 270V and a parasitic inductance difference ΔL en = 8 nH, the transient current imbalance between parallel devices is serious, and the maximum current difference Δi max is 17.5 A, and it takes about 40 us to restore the current balance state. However, after the transient equal current method for parallel power modules proposed in this invention, the maximum current difference Δi max is reduced to 12.1 A, and only 1.3 us is required to suppress the current imbalance. (t1 - t0) is reduced from 1270 ns to 1072 ns, and the switching speed of the controlled power device increases. After repeated tests at multiple voltage levels, the test results are shown in Table 1 as follows.

[0075] Table 1 Experimental verification results

[0076]

[0077] The data in Table 1 show that as the operating voltage gradually increases, the operating current of the device increases, and the average value of current imbalance also increases. However, the increase in operating voltage and current has a very limited impact on the imbalance, and the transient equal current method for parallel power modules keeps the current imbalance below 4%. In addition, due to the significant and rapid suppression of current imbalance, the loss difference between parallel devices is greatly reduced, and the consistency of the operating states of parallel devices is strengthened.

[0078] In summary, for the transient current sharing method and system of the parallel power module provided by the embodiments of the present invention, the method first samples the currents of N parallel power modules and converts them into induced voltages, where N≥2; then integrates and restores the induced voltage of each sampled power module to obtain the corresponding integrated voltage; then uses the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and the N integrated voltages as the comparison current equivalent values; then calculates the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; and then generates corresponding additional drive currents according to the N current equivalent differences and injects them into the gates of the corresponding power modules. The system respectively sets a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit, and a drive current injection unit to implement each step in the method, and these units are built from basic electronic components such as comparators, resistors, diodes, and filters. Compared with the existing active drive method, the invention provides an efficient and practical solution for current balance in industrial applications involving multiple parallel modules with low cost, compact size, and fast response characteristics.

[0079] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present invention shall be equivalent substitution methods and are all included in the protection scope of the present invention.

Claims

1. Transient current sharing method for parallel power modules, characterized in that, Including the steps: S1. Sampling the currents of N power modules connected in parallel and converting them into induced voltages, where N≥2; S2. Integrating and restoring the induced voltages of each sampled power module to obtain corresponding integrated voltages; S3. Taking the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and taking the N integrated voltages as the comparison current equivalent values; S4. Calculating the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; In step S4, N differential followers are used to calculate the current equivalent difference; the calculation process of each differential follower is: taking an integrated voltage and the maximum voltage as a group of input voltages, and the differential follower calculates the difference between the integrated voltage and the maximum voltage in this group of input voltages to obtain the corresponding current equivalent difference; S5. Generating corresponding additional drive currents according to the N current equivalent differences and injecting them into the gates of the corresponding power modules; Step S5 specifically includes the steps: Comparing each current equivalent difference with the corresponding set reference value through a high-speed hysteresis comparator to output corresponding control pulses; Only retaining the control pulses at the turn-on moment through a signal gating tri-state gate, and then isolating the control pulses through a high-bandwidth digital isolator and inputting them into a Schmitt buffer for buffering; Taking the buffered control pulses as the control signals of the current mirror circuit, and the current mirror circuit outputs drive currents to the gates of the corresponding power modules.

2. The transient current sharing method for the parallel power module according to claim 1, wherein: The current mirror circuit includes an N MOSFET M 1, a P MOSFET complementary to the N MOSFET M 2, and M a P MOSFET identical to M 2, an anti-backflow diode D 1, M a pull-down resistor R cm1 , an input branch shunt resistor R cm2 , an output branch shunt resistor R cm3 and the drive power supply corresponding to the power module as the power supply of the current mirror circuit V DD ; where R cm1 is coupled between the Schmidt buffer at the front stage of the current mirror circuit and the drive ground GND, R cm2 is coupled to M the source of 1 and the drive ground GND, M the gate of 1 is connected to the Schmidt buffer at the front stage of the current mirror circuit, and the drain is connected to M the drain of 2, M the drain of 2 is shorted to its own gate and is connected to M the gate of 3, M the source of 2 is connected to M the source of 3 and is connected to V DD , M the drain of 3 is connected to D the anode of 1, R cm3 is coupled to D between the cathode of 1 and the gate of the corresponding power module.

3. The transient current sharing method for the parallel power module according to claim 2, wherein: , V gp corresponds to the Miller platform voltage of the controlled power module, V D1 is D the on-voltage drop of Diode 1, i LM is the branch current on the input side of the current mirror circuit, R dsonm3 is the on-voltage drop of MOSFET M 3, R gint corresponds to the gate drive internal resistance of the controlled power module, Δ v ge ( t ) is the required compensated drive voltage value.

4. The transient current sharing method for parallel power modules according to claim 1, characterized in that: In step S1, N printed circuit board Rogowski coil current sensors, i.e., PCB RCCS, are respectively sleeved on the current branches of the N power modules to sample the currents of the N power modules and convert the sampled currents into induced voltages.

5. The transient current sharing method for the parallel power module according to claim 4, wherein: Each PCB RCCS is equivalent to including a voltage source e ( t ), the self-inductance of the coil L s , the distributed capacitance in the coil C s , the internal resistance of the coil R s and the terminal resistance R d . Among them, the voltage source e ( t ), the self-inductance L s and the internal resistance R s are connected in series and then in parallel with the distributed capacitance C s . The distributed capacitance C s is also in parallel with the terminal resistance R d . The two ends of the terminal resistance R d are connected to the subsequent circuit.

6. The transient current sharing method for parallel power modules according to claim 5, characterized in that Terminal resistance R d The value is: .

7. The transient current sharing method for the parallel power module according to claim 1, wherein: In step S2, N active integrators are used for integration and restoration; each active integrator includes an integration resistor, an integration capacitor, a high-bandwidth operational amplifier, an integration capacitor auxiliary reset circuit, i.e., Aux circuit, a debiasing and zero-adjusting circuit, and a high-bandwidth follower; the integration resistor is coupled between the output of the sampling unit and the inverting input terminal of the high-bandwidth operational amplifier and is connected to the integration capacitor and the Aux circuit, the integration capacitor is coupled between the inverting input terminal and the output terminal of the high-bandwidth operational amplifier and is connected in parallel with the Aux circuit, the debiasing and zero-adjusting circuit is coupled between the non-inverting input terminal of the high-bandwidth operational amplifier and the ground GND, and the high-bandwidth follower is coupled between the output of the high-bandwidth operational amplifier and the maximum value selection unit; the output of the high-bandwidth operational amplifier is equivalent to the current of the corresponding power module, and the output impedance is increased through the high-bandwidth follower.

8. Parallel power module transient current sharing system, characterized in that: Including a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit, and a drive current injection unit, where the sampling unit, the active integration unit, the maximum value selection unit, the current difference calculation unit, and the drive current injection unit are respectively used to execute steps S1 to S5 in the parallel power module transient current sharing method according to any one of claims 1 to 7.

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