Half-bridge driven bidirectional current detection circuit and three-phase motor driving circuit

By employing a bidirectional current detection circuit with half-bridge drive in three-phase motor driver IC products, the problem of discontinuous current detection is solved, achieving high-precision current detection, simplifying the circuit structure, and reducing chip area.

CN121008078APending Publication Date: 2025-11-25晶艺半导体有限公司

Patent Information

Application Number
CN202511221738.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-29
Publication Date
2025-11-25

AI Technical Summary

Technical Problem

In existing technologies, the current detection in three-phase motor drive IC products is discontinuous, resulting in low control accuracy. Furthermore, sampling the current of both the high-side and low-side power transistors simultaneously increases the chip area.

Method used

A bidirectional current detection circuit using a half-bridge drive connects the high-side power transistor and the low-side power transistor in series. Combined with a reference current generation circuit, an isolation unit, and a sampling circuit, it enables bidirectional current detection between the common node and the load.

Benefits of technology

It achieves bidirectional detection of load current, with a simple circuit and high detection accuracy, while reducing the chip area occupied.

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Abstract

The invention relates to the technical field of current detection, and provides a half-bridge driven bidirectional current detection circuit and a three-phase motor driving circuit. The bidirectional current detection circuit comprises a reference current generation circuit, an isolation unit and a sampling circuit. The reference current generating circuit works in a low-voltage domain and is used for generating a reference current signal. The isolation unit transmits the reference current signal to a high-voltage domain. The sampling circuit works in a high-voltage domain, receives a reference current signal, and is coupled to a common node between a high-side power tube and a low-side power tube in the half-bridge driving circuit to sample current flowing between the common node and a load so as to generate a current sampling signal. According to the current detection scheme, bidirectional detection of the load current can be realized, the circuit is simple, and the detection precision is high.
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Description

Technical Field

[0001] This invention relates to the field of current detection technology, specifically to a bidirectional current detection circuit and a three-phase motor drive circuit. Background Technology

[0002] With advancements in manufacturing technology, more power-stage switching transistors are being integrated into integrated circuits (ICs). Therefore, power switch current sensing technology is frequently required within ICs to detect the current in these transistors. Current sensing is not only used for overcurrent and short-circuit protection but also for load control. For example, in motor drive ICs, continuous instantaneous phase current information is often fed back to a microcontroller unit (MCU) or the IC's internal controller. The MCU calculates the motor's back electromotive force based on this continuous instantaneous phase current information, bus voltage, and motor parameters, thereby determining the rotor position and motor speed. Therefore, both the accuracy and response speed of the current sensing are critical.

[0003] Typically, in motor driver IC products, three-phase motors carry both forward and reverse currents. In existing technologies, current sampling is often performed at the source of the low-side power transistor or the drain of the high-side power transistor in the half-bridge driver, or simultaneously at the source of the low-side power transistor or the drain of the high-side power transistor. Figure 1 The three-phase motor system shown typically uses a sampling resistor connected between the high-side power transistor HS and the input voltage VIN, or between the low-side power transistor LS and the reference ground GND, or both. However, sampling only the current of the high-side power transistor HS or the low-side power transistor LS only allows for half-cycle sampling, resulting in discontinuous current sampling. The current for the other half of the cycle needs to be fitted by the MCU, which is detrimental to improving control accuracy. On the other hand, sampling the current of both the high-side and low-side power transistors simultaneously adds additional sampling devices and increases the chip area. Summary of the Invention

[0004] The purpose of this invention is to provide a bidirectional current detection circuit for half-bridge drive and a three-phase motor drive circuit to solve the problems in related technologies.

[0005] To achieve the above objectives, the present invention provides a bidirectional current detection circuit with a half-bridge drive. This half-bridge drive circuit includes a high-side power transistor and a low-side power transistor, which are connected in series between an input voltage and a reference ground. The common node of the high-side and low-side power transistors is coupled to a load. The bidirectional current detection circuit includes: a reference current generation circuit, operating in a low-voltage domain, wherein the low-voltage domain is a voltage domain between a first supply voltage and a reference ground, used to generate a reference current signal; an isolation unit, transmitting the reference current signal to a high-voltage domain, wherein the high-voltage domain is a voltage domain between a second supply voltage and a voltage at the common node, the second supply voltage being greater than the first supply voltage; and a sampling circuit, operating in the high-voltage domain, receiving the reference current signal and coupled to the common node to sample the current flowing between the common node and the load, thereby generating a current sampling signal, wherein the current sampling signal is used to characterize the current flowing between the common node and the load.

[0006] Another aspect of the present invention provides a three-phase motor drive circuit, comprising: three half-bridge drive circuits, each half-bridge drive circuit including a high-side power transistor and a low-side power transistor, wherein the high-side power transistor and the low-side power transistor in each half-bridge drive circuit are connected in series between an input voltage and a reference ground, and the common node of the high-side power transistor and the low-side power transistor in each half-bridge drive circuit is coupled to a terminal of the three-phase motor; and at least two bidirectional current detection circuits as described above, each bidirectional current detection circuit being used to detect the current between the common node of one of the half-bridge drive circuits and the terminal of the three-phase motor.

[0007] The above technical solution enables bidirectional detection of load current, with a simple circuit and high detection accuracy. Other features and advantages of the present invention will be described in detail in the following detailed embodiments section. Attached Figure Description

[0008] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the following detailed description to explain the invention, but do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of current detection in a half-bridge drive in the prior art.

[0009] Figure 2 This is a schematic diagram of a bidirectional current detection circuit driven by a half-bridge according to an embodiment of the present invention.

[0010] Figure 3 This is a circuit schematic diagram of a bidirectional current detection circuit driven by a half-bridge according to an embodiment of the present invention.

[0011] Figure 4 This is a schematic diagram of a three-phase motor drive circuit according to an embodiment of the present invention. Detailed Implementation

[0012] The following is a non-limiting description of specific embodiments of the invention with reference to the accompanying drawings. Throughout this specification, references to “one embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. Therefore, the phrases “in one embodiment” or “in an embodiment” appearing throughout this specification do not necessarily refer to the same embodiment. The verbs “comprising” and “having” are used herein as open-ended limitations, neither excluding nor requiring the presence of any unrecited features. Unless expressly stated otherwise, the features recited in the dependent claims can be freely combined with each other. The use of “a” or “an” (i.e., the singular form) to define an element throughout the document does not exclude the possibility of a plurality of such elements. Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Unless otherwise specified, the term “connected” is used to specify a direct electrical connection between circuit elements, while the term “coupled” is used to specify an electrical connection between circuit elements that may be direct or may be via one or more other elements. Conversely, when an element is referred to as “directly connected to” or “directly coupled to” another element, no intermediate element is present. The words “first” and “second” are used only to distinguish the purpose of description and should not be interpreted as indicating or implying relative importance or order.

[0013] Figure 2 The diagram shows a bidirectional current detection circuit for a half-bridge drive according to an embodiment of the present invention. This bidirectional current detection circuit is used to detect the current between the half-bridge drive circuit and the load. Figure 2 In the illustrated embodiment, the half-bridge drive circuit is schematically represented as including a high-side power transistor HS and a low-side power transistor LS, which are connected in series between the input voltage VIN and the reference ground GND. The common node SW of the high-side power transistor HS and the low-side power transistor LS is coupled to the load. In one embodiment, the load includes a three-phase motor, and the common node SW of each half-bridge drive circuit is coupled to the terminal of one phase of the three-phase motor, schematically labeled here as the U-phase terminal.

[0014] In one embodiment, the bidirectional current detection circuit includes a reference current generation circuit 11, an isolation unit 12, and a sampling circuit 13.

[0015] The reference current generation circuit 11 operates in the low-voltage domain between the first supply voltage VDD and the reference ground GND, and is used to generate the reference current signal Iref.

[0016] Isolation unit 12 transmits the reference current signal Iref to the high-voltage domain, where the high-voltage domain is the voltage domain between the second supply voltage BST and the voltage on the common node SW, and the second supply voltage BST is greater than the first supply voltage VDD.

[0017] The sampling circuit 13 operates in the high-voltage domain, receives the reference current signal, and is coupled to the common node SW to sample the current flowing between the common node SW and the load, thereby generating a current sampling signal Isen, wherein the current sampling signal Isen is used to characterize the current Io flowing between the common node SW and the load.

[0018] exist Figure 2 In the illustrated embodiment, for distinction, the reference current signal Iref in the high-voltage domain is represented as Iref-H, and the reference current signal Iref in the low-voltage domain is represented as Iref-L. It is understood that the value of the reference current signal Iref-H in the high-voltage domain is equal to the value of the reference current signal Iref-L in the low-voltage domain, and the isolation unit 12 is only used for isolation between the high-voltage and low-voltage domains. Similarly, the current sampling signal Isen generated by the sampling circuit 13 in the high-voltage domain is represented as Isen-H. In some embodiments, the current sampling signal Isen-H in the high-voltage domain is also sent to the low-voltage domain through the isolation unit for further use by the control circuit; in this case, the current sampling signal Isen in the low-voltage domain is represented as Isen-L. Again, it is understood that the value of the current sampling signal Isen-H in the high-voltage domain is equal to the value of the current sampling signal Isen-L in the low-voltage domain.

[0019] exist Figure 2 In the illustrated embodiment, by directly placing the sampling circuit 13 in the high-voltage domain and coupling it to the common node SW, and simultaneously receiving the reference current signal Iref from the low-voltage domain through the isolation unit, the bidirectional current between the common node SW and the load U can be sampled. This eliminates the need for separate sampling circuits on the high-side power transistor HS and the low-side power transistor LS to sample the bidirectional current between the common node SW and the load, resulting in a simple circuit structure and high current detection accuracy.

[0020] Figure 3 The diagram shown is a circuit schematic of a bidirectional current detection circuit driven by a half-bridge according to an embodiment of the present invention. Figure 3 In the embodiment shown, a circuit diagram of the reference current generation circuit 11, the isolation unit 12 and the sampling circuit 13 in the bidirectional current detection circuit is illustrated in detail according to one embodiment.

[0021] like Figure 3 As shown, the reference current generating circuit 11 includes a first resistor R1, a first operational amplifier OP1, a first transistor M1, a first current mirror 111, and a second current mirror 112.

[0022] The first operational amplifier OP1 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the first operational amplifier OP1 receives a reference voltage Vbias, and the second input terminal of the first operational amplifier OP1 is connected to reference ground GND through a first resistor R1. The first transistor M1 has a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor M1 is coupled to the second input terminal of the first operational amplifier OP1, and the control terminal of the first transistor M1 is coupled to the output terminal of the first operational amplifier OP1. At this time, a first reference current Iref1 will be generated flowing from the second terminal to the first terminal of the first transistor M1. The formula for calculating the reference current Iref1 is:

[0023] The first current mirror 111 has a common terminal, a first current terminal, and a second current terminal. The common terminal of the first current mirror 111 receives a first supply voltage VDD, and the first current terminal of the first current mirror 111 is coupled to the second terminal of the first transistor M1. The first current mirror 111 mirrors the first reference current Iref1 flowing through its first current terminal and provides a second reference current Iref2 at its second terminal. In this embodiment, the first current mirror 111 is a pull-up current mirror composed of two PMOS transistors M11 and M12. In one embodiment, the first current mirror 111 mirrors the first reference current Iref1 1:1, that is, the first reference current Iref1 is equal to the second reference current Iref2.

[0024] The second current mirror 112 has a common terminal, a first current terminal, and a second current terminal. The common terminal of the second current mirror 112 is connected to the reference ground GND, and the first current terminal of the second current mirror 112 is coupled to the second current terminal of the first current mirror 111. The second current mirror 112 mirrors the second reference current Iref2 flowing through its first current terminal and provides a low-voltage domain reference current signal Iref_L at its second terminal. At this time, the second current terminal of the second current mirror 112 serves as the output terminal of the reference current generation circuit 11. In this embodiment, the second current mirror 112 is a pull-down current mirror composed of two NMOS transistors M21 and M22. In one embodiment, the second current mirror 112 mirrors the second reference current Iref2 1:1, that is, the second reference current Iref2 is equal to the reference current signal Iref_L.

[0025] The isolation unit 12 is used to transmit the reference current signal Iref_L from the low-voltage domain to the high-voltage domain. In one embodiment, the isolation unit 12 includes a third transistor M3. The third transistor M3 has a first terminal, a second terminal, and a control terminal. The first terminal of the third transistor M3 is coupled to the output terminal of the reference current generation circuit 11 in the low-voltage domain to receive the reference current signal Iref_L from the low-voltage domain. The second terminal of the third transistor M3 is coupled to the sampling circuit 13 in the high-voltage domain. The control terminal of the third transistor M3 is coupled to the first supply voltage VDD. At this time, the second terminal of the third transistor M3 will provide the reference current signal Iref_H from the high-voltage domain, that is, transmit the reference current signal Iref from the low-voltage domain to the high-voltage domain.

[0026] In one embodiment, isolation unit 12 is also used to send the current sampling signal Isen from the high-voltage domain to the low-voltage domain. In this case, isolation unit 12 further includes a fourth transistor M4. The fourth transistor M4 has a first terminal, a second terminal, and a control terminal, wherein the second terminal of the fourth transistor M4 is coupled to the sampling circuit 13 of the high-voltage domain to receive the current sampling signal Isen_H from the high-voltage domain, and the control terminal of the fourth transistor is coupled to the first supply voltage VDD. In this case, the first terminal of the fourth transistor M4 will provide the current sampling signal Isen_L from the low-voltage domain, that is, to transmit the current sampling signal Isen from the high-voltage domain to the low-voltage domain.

[0027] exist Figure 3 In the illustrated embodiment, the third transistor M3 and the fourth transistor M4 are high-voltage NMOS transistors. The first terminal of the third transistor M3 and the fourth transistor M4 is the source of the NMOS transistor, and the second terminal of the third transistor M3 and the fourth transistor M4 is the drain of the NMOS transistor. The control terminal of the third transistor M3 and the fourth transistor M4 is the gate of the NMOS transistor.

[0028] See also Figure 3 The sampling circuit 13 includes a sampling resistor Rsen, a second resistor R2, a third resistor R3, a third current mirror 131, a second operational amplifier OP2, a second transistor M2, and a third current mirror 132. A sampling resistor Rsen is coupled between the common node SW and the load. The third current mirror 131 has a common terminal, a first current terminal, and a second current terminal. The common terminal of the third current mirror 131 receives the second supply voltage BST. The first current terminal of the third current mirror 131 is coupled to the isolation unit 12 to receive the reference current signal Iref_H from the high-voltage domain. The second current terminal of the third current mirror 131 is coupled to the load through the second resistor R2. The third current mirror 131 mirrors the reference current signal Iref_H flowing through its first current terminal and provides a third reference current signal Iref3 at its second terminal. The third reference current signal Iref3 flows through the second resistor R2, generating a voltage drop across it. The voltage at the non-grounded end of the second resistor R2 is represented as the reference voltage signal Vref. In this embodiment, the third current mirror 131 is a pull-up current mirror composed of two PMOS transistors M31 and M32. In one embodiment, the third current mirror 131 mirrors the reference current signal Iref_H 1:1, meaning the reference current signal Iref_H is equal to the third reference current signal Iref3.

[0029] The second operational amplifier OP2 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the second operational amplifier OP2 is coupled to the second current terminal of the third current mirror 131, and the second input terminal of the second operational amplifier OP2 is coupled to the common node SW through the third resistor R3.

[0030] The second transistor M2 has a first terminal, a second terminal, and a control terminal. The first terminal of the second transistor M2 is coupled to the second input terminal of the second operational amplifier OP2, and the control terminal of the second transistor M2 is coupled to the output terminal of the second operational amplifier OP2. At this time, a first current sampling signal Isen1 will be generated, flowing from the second terminal of the second transistor M2 to the first terminal. The value of the first current sampling signal Isen1 is related to the flow direction of the load current Io.

[0031] Because the voltages at the first and second input terminals of the second operational amplifier OP2 are equal, i.e., Vsen = Vref. When the load current Io flows from the common node SW to the load (assuming it is a forward current), the first current sampling signal Isen1 satisfies the expression:

[0032] When the load current Io flows from the load to the common node (assuming it is a negative current), the first current sampling signal Isen1 satisfies the expression:

[0033] Therefore, the formula for calculating the first current sampling signal Isen1 is derived as follows: ( (Forward current) ( (Forward current) The fourth current mirror 132 has a common terminal, a first current terminal, and a second current terminal. The common terminal of the fourth current mirror 132 receives the second supply voltage BST. The first current terminal of the fourth current mirror 132 is coupled to the second terminal of the second transistor M2. The fourth current mirror 132 mirrors the first current sampling signal Isen1 flowing through its first current terminal and provides a high-voltage domain current sampling signal Isen_H at its second terminal. In this embodiment, the fourth current mirror 132 is a pull-up current mirror composed of two PMOS transistors M41 and M42. In one embodiment, the fourth current mirror 132 mirrors the first current sampling signal Isen1 1:1, that is, the first current sampling signal Isen1 is equal to the current sampling signal Isen_H.

[0034] Figure 4 The diagram shown is a schematic of a three-phase motor drive circuit according to an embodiment of the present invention. Figure 4 As shown, the three-phase motor drive circuit includes three half-bridge drive circuits. Each half-bridge drive circuit includes a high-side power transistor and a low-side power transistor. In each half-bridge drive circuit, the high-side power transistor and the low-side power transistor are connected in series between the input voltage VIN and the reference ground GND. The common node of the high-side power transistor and the low-side power transistor in each half-bridge drive circuit is coupled to one terminal of the three-phase motor.

[0035] The three-phase motor drive circuit includes at least two bidirectional current detection circuits (such as...). Figure 4 The system includes a first bidirectional current detection circuit and a second bidirectional current detection circuit. Each bidirectional current detection circuit is used to detect the current between the common node of one of the half-bridge drive circuits and the three-phase motor terminals. In this embodiment, based on Kirchhoff's current law that the sum of the instantaneous values ​​of the three-phase currents is zero, the current in the remaining undetected phase circuits can be calculated using a computing unit. In one embodiment, this computing unit is included in the MCU.

[0036] In other embodiments, the three-phase motor drive circuit can also employ three bidirectional current detection circuits to detect the current between the common node in each half-bridge drive circuit and the terminals of the three-phase motor, respectively. In the application scheme where all three-phase currents are detected, each phase current is measured independently, without error accumulation, thus obtaining the most accurate and true three-phase current information. Furthermore, this scheme provides built-in redundancy verification; the system can verify in real time whether the three-phase currents are equal to zero. If they are not equal, a fault can be immediately identified, and a protection mechanism can be triggered, improving system reliability. The bidirectional current detection scheme provided in this application has a simple circuit structure, reduces design costs, and is beneficial for implementing a scheme where all three-phase circuit currents are detected.

[0037] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, and these simple modifications all fall within the protection scope of the present invention. It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the present invention will not describe the various possible combinations separately. Furthermore, various different embodiments of the present invention can also be arbitrarily combined, as long as they do not violate the spirit of the present invention, they should also be considered as the content disclosed by the present invention.

Claims

1. A bidirectional current detection circuit driven by a half-bridge, characterized in that, The half-bridge drive circuit includes a high-side power transistor and a low-side power transistor, which are connected in series between the input voltage and a reference ground. The common node of the high-side power transistor and the low-side power transistor is coupled to the load. The bidirectional current detection circuit includes: The reference current generation circuit operates in the low-voltage domain and is used to generate a reference current signal. The low-voltage domain is the voltage domain between the first supply voltage and the reference ground. The isolation unit transmits the reference current signal to the high-voltage domain, where the high-voltage domain is the voltage domain between the second supply voltage and the voltage on the common node, and the second supply voltage is greater than the first supply voltage. The sampling circuit operates in the high-voltage domain, receives a reference current signal, and is coupled to the common node to sample the current flowing between the common node and the load, thereby generating a current sampling signal, wherein the current sampling signal is used to characterize the current flowing between the common node and the load.

2. The bidirectional current detection circuit according to claim 1, characterized in that, The reference current generating circuit includes: First resistor; A first operational amplifier has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the first operational amplifier receives a reference voltage, and the second input terminal of the first operational amplifier is connected to a reference ground through a first resistor. A first transistor has a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor is coupled to the second input terminal of an operational amplifier, and the control terminal of the first transistor is coupled to the output terminal of the first operational amplifier. The first current mirror has a common terminal, a first current terminal and a second current terminal. The common terminal of the first current mirror receives a first supply voltage, and the first current terminal of the first current mirror is coupled to the second terminal of the first transistor. The second current mirror has a common terminal, a first current terminal, and a second current terminal. The common terminal of the second current mirror is connected to the reference ground. The first current terminal of the second current mirror is coupled to the second current terminal of the first current mirror. The second current terminal of the second current mirror serves as the output terminal of the reference current generation circuit to provide a reference current signal.

3. The bidirectional current detection circuit according to claim 1, characterized in that, The sampling circuit includes: The sampling resistor is coupled between the common node and the load; Second resistor; Third resistor; The third current mirror has a common terminal, a first current terminal and a second current terminal. The common terminal of the third current mirror receives a second supply voltage. The first current terminal of the third current mirror is coupled to an isolation unit to receive a reference current signal. The second current terminal of the third current mirror is coupled to a load through a second resistor. The second operational amplifier has a first input terminal, a second input terminal and an output terminal. The first input terminal of the second operational amplifier is coupled to the second current terminal of the three current mirrors, and the second input terminal of the second operational amplifier is coupled to a common node through a third resistor. The second transistor has a first terminal, a second terminal and a control terminal. The first terminal of the second transistor is coupled to the second input terminal of the second operational amplifier, and the control terminal of the second transistor is coupled to the output terminal of the second operational amplifier. The fourth current mirror has a common terminal, a first current terminal, and a second current terminal. The common terminal of the fourth current mirror receives a second supply voltage. The first current terminal of the fourth current mirror is coupled to the second terminal of the second transistor. The second current terminal of the fourth current mirror provides a current sampling signal.

4. The bidirectional current detection circuit according to claim 1, characterized in that, The isolation unit includes: The third transistor has a first terminal, a second terminal, and a control terminal. The first terminal of the third transistor is coupled to a reference current generating circuit to receive a reference current signal in the low-voltage domain. The second terminal of the third transistor is coupled to a sampling circuit to provide a reference current signal in the high-voltage domain. The control terminal of the third transistor is coupled to a first supply voltage.

5. The bidirectional current detection circuit according to claim 4, characterized in that, The current sampling signal will also be sent to the low-voltage domain through an isolation unit, which further includes: The fourth transistor has a first terminal, a second terminal, and a control terminal. The second terminal of the fourth transistor is coupled to a sampling circuit to receive a current sampling signal from the high-voltage domain. The first terminal of the fourth transistor outputs a current sampling signal to the low-voltage domain. The control terminal of the fourth transistor is coupled to a first supply voltage.

6. The bidirectional current detection circuit according to claim 5, characterized in that, The third and fourth transistors are high-voltage NMOS transistors. The first terminal of the third and fourth transistors is the source of the NMOS transistor, the second terminal of the third and fourth transistors is the drain of the NMOS transistor, and the control terminal of the third and fourth transistors is the gate of the NMOS transistor.

7. The bidirectional current detection circuit according to claim 1, characterized in that, The second supply voltage is equal to the voltage at the common node plus the first supply voltage.

8. The bidirectional current detection circuit according to claim 1, characterized in that, The load includes a three-phase motor.

9. A three-phase motor drive circuit, characterized in that, include: Three half-bridge drive circuits, each half-bridge drive circuit includes a high-side power transistor and a low-side power transistor. In each half-bridge drive circuit, the high-side power transistor and the low-side power transistor are connected in series between the input voltage and the reference ground. In each half-bridge drive circuit, the common node of the high-side power transistor and the low-side power transistor is coupled to a terminal of the three-phase motor. At least two bidirectional current detection circuits as described in any one of claims 1-7, each bidirectional current detection circuit being used to detect the current between a common node in one of the half-bridge drive circuits and the three-phase motor terminals.

10. The bidirectional current detection circuit according to claim 9, characterized in that, When the three-phase motor drive circuit includes two bidirectional current detection circuits, the three-phase motor drive circuit further includes: The calculation unit receives two current sampling signals generated by two bidirectional current detection circuits and calculates the current flowing through the other unsampled half-bridge drive circuit based on the two current sampling signals.

Citation Information

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