Low-cost high-integration active motherboard based on 5G application

Abstract

The application carries out systematic analysis on air-to-ground mobile communication antenna, and proposes a low-cost active comprehensive motherboard based on 5G application, which can perform self adjustment and self-checking, has high instantaneous channel signal-to-noise ratio and vector error. Through reasonable design, the modules such as transceiver link, feeder network and antenna unit are integrated in limited size, vertical polarization and horizontal polarization bidirectional operation are realized, and a pure receiving path is integrated, which can be used for adjacent area measurement. The motherboard adopts high-low frequency mixed voltage form, realizes reasonable transmission of C-band signal, and reduces the radio frequency path loss. The active comprehensive motherboard is based on low-cost design, and the mobile communication antenna is installed in the belly of the civil aviation machine, which meets the demand of civil aviation cost control.

Description

Technical Field

[0001] This invention belongs to the field of radio technology, specifically relating to a low-cost, highly integrated active motherboard based on 5G applications. Background Technology

[0002] 5G mobile communication relies on and is based on the 5G network era and standards. 5G refers to the fifth-generation mobile communication standard, which primarily brings us fifth-generation mobile communication. In a sense, compared to 4G, 5G networks have stronger scalability, providing a more comfortable user experience. Moreover, due to its high reliability, 5G communication effectively improves user satisfaction and security, and meets the high-speed transmission requirements of some users. 5G technology not only provides a completely new experience but also effectively improves the efficiency and performance of infrastructure, laying the foundation for the development of various industries. Furthermore, it can drive the development of information technology in my country, accelerate equipment upgrades, and boost the country's economy. Currently, 5G network communication technology has received significant attention from the nation and society. Not only my country, but other countries are also increasing their investment of human, material, and financial resources to strengthen research and development of this technology to promote economic development.

[0003] In recent years, with the advent of the information age, people have increasingly higher demands for wireless communication technology. Mobile phones are the most typical representative of this information age, and their frequent use makes the wide coverage of mobile phone signals increasingly important. Currently, mobile phone communication can only transmit signals through terrestrial base stations and cannot achieve air-to-ground mobile communication signal transmission. Summary of the Invention

[0004] To this end, this invention systematically analyzes air-to-ground mobile communication antennas and proposes a low-cost active integrated motherboard based on 5G applications, which can perform self-adjustment and self-testing, and has high adjacent channel signal-to-noise ratio and vector error.

[0005] The specific technical solution of the active motherboard of the present invention is as follows:

[0006] 1) Achieve single-channel transmit and receive self-test through an integrated coupling network.

[0007] 2) By integrating a multi-functional chip, amplitude and phase adjustment can be performed on multiple vertical polarization channels, horizontal polarization channels and pure receiving channels of the active array, and array-level adjustment compensation can be achieved.

[0008] 3) By using power back-off design, the RF link of the active motherboard is operated in the linear region, which effectively reduces the leakage of the transmission channel to nearby newly arrived signals and achieves better network performance indicators.

[0009] This invention, through rational design, integrates transceiver links, feeder networks, and antenna units within a limited size, achieving bidirectional operation with both vertical and horizontal polarization. It also integrates a pure receiver path for use in neighboring cell measurements. The motherboard employs a high-low frequency mixed-voltage design, enabling efficient C-band signal transmission and reducing RF path loss. Based on a low-cost design, the active integrated motherboard allows the mobile communication antenna to be mounted entirely within the fuselage of civil aircraft, meeting the cost control requirements of civil aviation.

[0010] The beneficial effects of this invention are as follows:

[0011] 1. Possess self-testing ability.

[0012] 2. Possesses amplitude and phase adjustment capabilities.

[0013] 3. High adjacent signal-to-noise ratio and low vector error enable better carrier signal transmission.

[0014] 4. Compared with traditional C-band active antenna arrays, the array has higher integration and lower cost. Based on communication requirements, it can be widely used in various civil aircraft. The entire antenna unit can realize 5G network communication for civil aircraft and has broad application prospects. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the active motherboard installation.

[0016] Figure 2 This is a schematic diagram of an active motherboard link.

[0017] Figure 3 This is a block diagram of a multi-functional chip circuit.

[0018] Figure 4 This is a schematic diagram of the monitoring network. Detailed Implementation

[0019] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] The active motherboard of this invention is mainly used to amplify transmit and receive signals. It adopts a modular design, combining four vertically polarized channels, four horizontally polarized channels, and four pure receive channels. For vertical polarization, during reception, the signal is fed into the antenna, passes through a coupler direct path, then through a C-band ultra-narrowband bandpass filter, and finally into a shared transmit / receive multifunction chip. After amplification, the signal is combined and output after passing through a 1-to-4 power divider network within the printed circuit board. During transmission, the signal is fed into the printed circuit board via an SMA, passes through a 1-to-4 power divider network within the printed circuit board, and then into the shared transmit / receive multifunction chip. After amplification, the signal passes through a C-band ultra-narrowband bandpass filter and a coupler direct path before being fed to the antenna for external radiation. The horizontally polarized link is identical to the vertically polarized link except for the antenna portion. For the pure receive channels, the multifunction chip's transmit enable is grounded, and the multifunction chip only operates in receive mode. Simultaneously, a low-noise amplifier chip is added to the link to amplify the signal, ensuring the overall gain of the receive link.

[0021] 1) Coupled network implementation and self-checking fault diagnosis

[0022] Coupled network implementation such as Figure 4 As shown, the coupler adopts a stripline architecture design. Each transceiver multifunction chip corresponds to one coupler, and every four couplers are interconnected to form a coupling network. The coupler isolation terminal is connected to a matching resistor, and the coupled terminal is output from the printed circuit board and sent to the signal synthesis module. The signal synthesis module can detect the coupled signal and determine the channel operating status. The coupler can achieve 20dBc coupling. During transmission, the host computer controls the activation of a certain channel, and the signal is fed into the corresponding polarization port by the host computer, sent to the corresponding channel of the corresponding array via the transmit link. The signal returns to the signal synthesis module via the coupling monitoring loop. The signal synthesis module switches to the sampling link for sampling by the path selection switch, and sends the result back to the host computer via OOK. During reception, the host computer controls the activation of a certain channel, and the signal enters the corresponding receive RF link through the antenna, and is finally sent to the host computer for corresponding detection.

[0023] 2) Amplitude and phase adjustment implementation and capability

[0024] The multi-functional chip integrated into the active motherboard enables both transmission and reception amplification. It integrates a phase shifter, attenuator, switch, power amplifier, and modulation circuitry. During transmission, the excitation signal is fed into the multi-functional chip, passes through a six-digit digitally controlled attenuator and a six-digit digitally controlled phase shifter, and then is output after passing through a power amplifier and a transceiver switch. During reception, the echo signal is received by the antenna radiating element and enters the chip, then passes through a transceiver switch, a low-noise amplifier, a six-digit digitally controlled phase shifter, and a six-digit digitally controlled attenuator before being output. A schematic diagram and block diagram of the multi-functional chip are shown below. Figure 4As shown. The multi-functional chip can achieve a maximum transmit / receive attenuation control of 31.5dB in 0.5dB steps; and a maximum phase control of 354.375° in 5.625° steps. The amplitude and phase of different channels can be adjusted according to the usage to achieve better RF performance.

[0025] 3) Achieved with high proximity signal-to-noise ratio and low vector error.

[0026] The adjacent channel leakage ratio of any general-purpose RF device, whether it be a mixer, amplifier, isolator, or other device, is affected by the device's third-order intermodulation distortion. The relationship between the device's third-order intermodulation component and its third-order intermodulation cutoff point is as follows: IMD3 = (3*P) m )-(2*OIP3)(1);

[0027] Where Pm = power of each single tone in a two-tone test; IMD3 = third-order IM3, in dBm, representing absolute power; OIP3 = third-order intermodulation intercept, representing absolute power.

[0028] For convenience, the formula can be rewritten as relative IMD3, that is, IM3 performance related to power level (P):

[0029] IMD3 = 2*(P) m -OIP3) (2);

[0030] The ACLR of a wideband carrier is related to the IMD3 performance of a two-tone carrier through a correction factor. This correction exists because the IMD3 performance degrades ACLR performance. This degradation stems from the influence of various intermodulation components, which constitute the spectral density of the spread spectrum carrier.

[0031] ACLR n =IMD3+C n (3)

[0032] ACLR n =(2*(P-3)-OIP3))+C n (4)

[0033] Where, Ptot = total output power of all carriers, in dBm; OIP3 = device OIP3, in dBm; ACLRn = ACLR of "n" carriers, in dBc; Cn can be found in the table below:

[0034] Table 1 Relationship between Carrier Quantity and Weighting Value

[0035] Number of carriers Cn 1 2 3 4 9 Weighted values +3 +9 +11 +12 +13

[0036] As the formula shows, with a fixed carrier power, the larger the absolute value of ACLR (negative value), the larger the OIP3. Therefore, to achieve better ACLR performance, the amplifier's OIP3 needs to be as large as possible. Meanwhile, EVM is related to amplifier nonlinearity; EVM decreases as the power of nonlinear products decreases. Therefore, in active motherboard design, the selected multi-functional chip should have a high OIP3. Furthermore, using the multi-functional chip back to the linear region achieves better adjacent channel signal-to-noise ratio and vector error.

[0037] This invention is not limited to the specific embodiments described above, and various modifications and variations are possible. Any modifications, equivalent substitutions, or improvements made to the above embodiments based on the technical essence of this invention should be included within the scope of protection of this invention.

Claims

1. A low-cost, highly integrated active motherboard for 5G applications, characterized in that: Includes a multi-functional chip, coupler, C-band ultra-narrowband bandpass filter, and a 1-to-4 power splitter network. The multi-functional chip integrates four vertical polarization channels, four horizontal polarization channels, and four pure receiver channels. For vertical polarization, during reception, the signal is fed into the antenna, passes through a coupler direct path, then through a C-band ultra-narrowband bandpass filter, and finally into a shared transceiver multifunction chip. After amplification, the signal is combined and output after passing through a 1-to-4 power divider network inside the printed circuit board. During transmission, the signal is fed into the printed circuit board via an SMA, passes through a 1-to-4 power divider network inside the printed circuit board, and then into a shared transceiver multifunction chip. After amplification, the signal passes through a C-band ultra-narrowband bandpass filter and a coupler direct path before being fed to the antenna for external radiation. The horizontal polarization link is consistent with the vertical polarization link. For the pure reception channel, the multifunction chip's transmit enable is grounded, and the multifunction chip only operates in receive mode. At the same time, a low-noise amplifier chip is added to the link to amplify the signal to ensure the overall gain of the reception link. The coupler adopts a stripline architecture, with each multi-functional chip corresponding to one coupler, and every four couplers interconnected to form a coupling network; the isolation terminal of the coupler is connected to a resistor for matching, and the coupling terminal is output through the printed circuit board and sent to the signal synthesis module. The signal synthesis module detects the coupling signal and determines the channel working status. During transmission, the host computer controls and commands a specific channel to be opened. The signal is fed into the corresponding polarization port by the host computer, sent through the transmission link to the corresponding channel of the corresponding array, and then returned to the signal synthesis module via the coupling monitoring loop. The signal synthesis module uses a path selection switch to switch to the sampling link for sampling, and sends the result back to the host computer via OOK. During reception, the host computer controls and commands a specific channel to be opened. The signal enters the corresponding receiving RF link through the antenna and is finally sent to the host computer for corresponding detection. The multi-functional chip integrated into the active motherboard is capable of transmitting and receiving signals, and integrates phase shifter, attenuator, switch, power amplifier and modulation circuit functions. During transmission, the excitation signal is fed into the multi-functional chip, passes through the digitally controlled attenuator and digitally controlled phase shifter, and is then output after passing through the power amplifier and transceiver switch. During reception, the echo signal is received by the antenna radiating unit and enters the multi-functional chip, and is then output after passing through the transceiver switch, low noise amplifier, digitally controlled phase shifter and digitally controlled attenuator. The multi-functional chip has a high OIP3. By reverting the multi-functional chip to the linear region, good adjacent signal-to-noise ratio and vector error are achieved.

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