Back contact type solar cell and preparation method thereof

Abstract

The invention provides a back contact type solar cell and a preparation method thereof, and relates to the technical field of solar cell manufacturing, the preparation method provides a mask layer preparation mode, the preparation and removal difficulty of mask layers is reduced, the transverse undercutting problem existing in mask layer wet etching is avoided, and the production efficiency is improved. According to the back contact type solar cell, the PN isolation region is further arranged between the N region and the P region, transverse physical isolation is formed in the two alternate mask processing processes, effective isolation between the P region and the N region is guaranteed, and therefore the back contact type solar cell manufactured through the manufacturing method has high conversion efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of solar cell manufacturing, and in particular to a back-contact solar cell and a method for preparing the same. Background Art

[0002] In the field of solar photovoltaic technology, back contact cells require multiple introductions of photoresist or ink or mask layers such as SiNx, SiOx, etc. during their preparation, and some mask layers are removed through photolithography, chemical corrosion, etc., which inevitably increases the number of steps in their preparation process. The multiple steps and complexity of the process cause the stability of the preparation process to deteriorate, and the difficulty of controlling the preparation process increases, which in turn leads to uneven conversion efficiency between the prepared back contact solar cells, seriously affecting the overall quality of the battery products. Summary of the invention

[0003] The present application provides a back-contact solar cell and a method for preparing the same. In the preparation process, the patterning of the P region, the N region, and the PN isolation region is alternately achieved by means of a thin film mask, so that the entire preparation process is simple and easy to operate, and provides convenience for subsequent process treatments, and the resulting back-contact solar cell has a high conversion efficiency.

[0004] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0005] In one aspect of an embodiment of the present application, a method for preparing a back-contact solar cell is provided, comprising: providing a pre-treated N-type silicon wafer substrate, the N-type silicon wafer substrate comprising an N region and a P region intersecting each other, and further comprising a PN isolation region between the N region and the P region; depositing a first passivation layer on the back side of the N-type silicon wafer substrate; laminating and forming a first mask pattern layer on the first passivation layer, the first mask pattern layer being formed by patterning the first mask layer using a laser, the first mask pattern layer comprising a first region preset pattern formed in the first region, a layer formed by retaining a material in the PN isolation region, and a hollowing out formed by removing a material in the second region; cleaning with a solution so that the first passivation layer in the first region forms a first region preset pattern, and the hollowing out portion in the first region preset pattern exposes the N-type silicon wafer substrate; depositing a first amorphous silicon composite layer, mechanically removing the first mask pattern layer to make the first The first amorphous silicon composite layer in the second region forms an inverse pattern of the first mask pattern layer; the second mask pattern layer is formed by laminating the first passivation layer, the second mask pattern layer is formed by patterning the second mask layer with a laser, and the second mask pattern layer includes a second region preset pattern formed in the second region, a layer formed by retaining materials in the PN isolation region, and a hollowing formed by removing materials in the first region; solution cleaning is performed to form the second region preset pattern of the first passivation layer in the second region, and the hollowing part in the second region preset pattern exposes the N-type silicon wafer substrate; the second amorphous silicon composite layer is deposited, and the second mask pattern layer is removed mechanically, so that the second amorphous silicon composite layer in the second region forms an inverse pattern of the second mask pattern layer; annealing treatment is performed at a temperature of 800°C-950°C; the back side of the N-type silicon wafer substrate is metallized with positive and negative electrodes to obtain a back-contact solar cell.

[0006] Another aspect of the embodiments of the present application provides a back-contact solar cell, which is prepared by any of the aforementioned methods for preparing a back-contact solar cell.

[0007] In another aspect of the embodiments of the present application, another method for preparing a back-contact solar cell is provided, comprising: providing a pre-treated P-type silicon wafer substrate, the P-type silicon wafer substrate comprising an N region and a P region intersecting each other, and a PN isolation region between the N region and the P region; depositing a second passivation layer on the back side of the P-type silicon wafer substrate; forming a third mask pattern layer on the second passivation layer, the third mask pattern layer being formed by patterning the third mask layer using a laser, the third mask pattern layer comprising an N region preset pattern formed in the N region, a layer formed by retaining material in the PN isolation region, and a hollowing out formed by removing material in the P region; cleaning with a solution so that the second passivation layer in the N region forms an N region preset pattern, and the hollowing out portion in the N region preset pattern exposes the P-type silicon wafer substrate; using an in-situ doping method The method comprises the following steps: depositing a tunneling oxide layer and a second amorphous silicon layer in sequence, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer among an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer; removing the third mask pattern layer mechanically so that the tunneling oxide layer and the second amorphous silicon layer in the N region form an inverse pattern of the third mask pattern layer; annealing so that the second amorphous silicon layer forms an N+ polycrystalline silicon layer; depositing a first anti-reflection layer on the front side of a P-type silicon wafer substrate, wherein the first anti-reflection layer is formed of at least one layer of aluminum oxide, silicon nitride or silicon oxide material; depositing a second anti-reflection layer on the back side of the P-type silicon wafer substrate, wherein the second anti-reflection layer is formed of at least one layer of silicon oxide, silicon nitride or silicon oxynitride material; and performing positive and negative electrode metallization treatment on the back side of the P-type silicon wafer substrate to obtain a back-contact solar cell.

[0008] According to another aspect of the embodiments of the present application, another back-contact solar cell is provided, which is prepared by the aforementioned method for preparing a back-contact solar cell.

[0009] The beneficial effects of the embodiments of the present application include:

[0010] The embodiment of the present application provides a method for preparing a back-contact solar cell, comprising: providing a pre-treated N-type silicon wafer substrate, the N-type silicon wafer substrate comprising an N region and a P region intersecting each other, and a PN isolation region between the N region and the P region; depositing a first passivation layer on the back side of the N-type silicon wafer substrate; laminating and forming a first mask pattern layer on the first passivation layer, the first mask pattern layer being formed by patterning the first mask layer using a laser, the first mask pattern layer comprising a first region preset pattern formed in the first region, a layer formed by retaining a material in the PN isolation region, and a hollowing out formed by removing a material in the second region; cleaning with a solution so that the first passivation layer in the first region forms a first region preset pattern, and the hollowing out portion in the first region preset pattern exposes the N-type silicon wafer substrate; depositing a first amorphous silicon composite layer, mechanically removing the first mask pattern layer to form a first region preset pattern in the first region. An amorphous silicon composite layer forms a reverse pattern of a first mask pattern layer; a second mask pattern layer is formed on the first passivation layer by laminating, the second mask pattern layer is formed by patterning the second mask layer with a laser, and the second mask pattern layer includes a second area preset pattern formed in the second area, a layer formed by retaining materials in the PN isolation area, and a hollowing formed by removing materials in the first area; solution cleaning is performed to form the second area preset pattern of the first passivation layer in the second area, and the hollowing part in the second area preset pattern exposes the N-type silicon wafer substrate; a second amorphous silicon composite layer is deposited, and the second mask pattern layer is removed mechanically, so that the second amorphous silicon composite layer in the second area forms a reverse pattern of the second mask pattern layer; annealing treatment is performed, and the annealing temperature is 800°C-950°C; the back side of the N-type silicon wafer substrate is metallized with positive and negative electrodes to obtain a back contact solar cell. The preparation method of the present application provides a mask layer preparation method, which reduces the difficulty of mask layer preparation and removal, and avoids the lateral drilling problem existing in the wet etching of the mask layer. The PN isolation region also included between the N region and the P region forms a lateral physical isolation in the two alternating mask processing processes, thereby ensuring effective isolation between the P region and the N region. In this way, the back-contact solar cell prepared by the preparation method of the present application has a higher conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0012] Figure 1 One of the flow charts of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0013] Figure 2A second flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0014] Figure 3 One of the schematic diagrams of the preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0015] Figure 4 A second schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0016] Figure 5 A third schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0017] Figure 6 A fourth schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0018] Figure 7 A fifth schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0019] Figure 8 A sixth schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0020] Fig. 9 The seventh schematic diagram of the preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0021] Fig.10 The eighth schematic diagram of the preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0022] Fig.11 A ninth schematic diagram of a preparation process of a back-contact solar cell provided in an embodiment of the present application;

[0023] Fig.12 A third flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0024] Fig.13 A fourth flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0025] Fig.14 A fifth flow chart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0026] Fig.15 Flow chart six of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0027] Fig.16Flow chart seven of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0028] Fig.17 Flow chart eight of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0029] Fig.18 A ninth flowchart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0030] Fig.19 A tenth flowchart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0031] Fig. 20 Flow chart eleven of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0032] Fig.21 A twelfth flowchart of a method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0033] Fig. 22 A flow chart of another method for preparing a back-contact solar cell provided in an embodiment of the present application;

[0034] Fig.23 A schematic diagram of the structure of a laser mask patterning device provided in an embodiment of the present application;

[0035] Fig.24 A schematic diagram of a surface grid line pattern of a back-contact solar cell provided in an embodiment of the present application.

[0036] Icon: 100-N-type silicon wafer substrate; 110-first passivation layer; 120-P-type amorphous silicon composite layer; 130-N-type amorphous silicon composite layer; 1-1-laser; 1-2-reflector; 1-3-beam expander; 1-4-galvanometer scanning module; 1-5-thin film layer; 1-6-table; 200-first mask pattern layer; 300-second mask pattern layer; second passivation layer; third mask layer. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. It should be noted that, in the absence of conflict, the various features in the embodiments of the present application can be combined with each other, and the combined embodiments are still within the scope of protection of the present application.

[0038] In the description of the present application, it should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0039] In one aspect of the present application, a method for preparing a back-contact solar cell is provided. Figure 1 As shown, the method for preparing the back-contact solar cell of the embodiment of the present application includes:

[0040] S001. Provide a pre-processed N-type silicon wafer substrate, wherein the N-type silicon wafer substrate includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region.

[0041] S002, depositing a first passivation layer on the back side of the N-type silicon wafer substrate;

[0042] S003. Form a first mask pattern layer on the first passivation layer, wherein the first mask pattern layer is formed by patterning the first mask layer with a laser, and the first mask pattern layer includes a first area preset pattern formed in the first area, a layer formed by retaining material in the PN isolation area, and a hollowing out formed by removing material in the second area.

[0043] S004, cleaning with a solution so that the first passivation layer in the first area forms a first area preset pattern, and the hollowed-out portion in the first area preset pattern exposes the N-type silicon wafer substrate.

[0044] S005 , depositing a first amorphous silicon composite layer, and mechanically removing the first mask pattern layer so that the first amorphous silicon composite layer in the first region forms a reverse pattern of the first mask pattern layer.

[0045] S006. Form a second mask pattern layer on the first passivation layer. The second mask pattern layer is formed by patterning the second mask layer with a laser. The second mask pattern layer includes a second area preset pattern formed in the second area, a layer formed by retaining material in the PN isolation area, and a hollowing out formed by removing material in the first area.

[0046] S007, cleaning with a solution so that the first passivation layer in the second area forms a second area preset pattern, and the hollowed-out portion in the second area preset pattern exposes the N-type silicon wafer substrate.

[0047] S008 , depositing a second amorphous silicon composite layer, and mechanically removing the second mask pattern layer so that the second amorphous silicon composite layer in the second region forms a reverse pattern of the second mask pattern layer.

[0048] S009: Annealing treatment, the annealing temperature is 800°C-950°C.

[0049] S010, performing positive and negative electrode metallization treatment on the back side of the N-type silicon wafer substrate to obtain a back-contact solar cell.

[0050] Among them, steps S003 to S005, and steps S006 to S008 are respectively used to prepare mask patterns for the P region and the N region intersecting each other on the N-type silicon wafer substrate. The first region in step S003 can be the P region. When the first region is the P region, the first region preset pattern is the P region preset pattern, and the first amorphous silicon composite layer deposited in step S005 is the P-type amorphous silicon composite layer. Conversely, the first region can also be the N region, which will not be repeated here.

[0051] In order to clearly describe the method steps, a specific description is given below by taking the first region as a P region and the second region as an N region as an example.

[0052] like Figure 2 As shown, the method for preparing the back-contact solar cell of the embodiment of the present application includes:

[0053] S101 , providing a pre-processed N-type silicon wafer substrate 100 , wherein the N-type silicon wafer substrate 100 includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region.

[0054] First, the N-type silicon wafer substrate 100 is pre-processed, such as texturing, polishing and other processes, so that the surface of the N-type silicon wafer substrate 100 is more conducive to the effective formation of subsequent process steps. Among them, the N-type silicon wafer substrate 100 includes mutually intersecting N regions and P regions, and also includes a PN isolation region between the N region and the P region. It should be noted that the N region, the P region and the PN isolation region are preset divisions of the N-type silicon wafer substrate 100 according to the specific layout of the solar cell, so that in the subsequent steps, when the N region and the P region are prepared on the N-type silicon wafer substrate 100, and the main grid and the auxiliary grid are patterned, they are prepared according to the preset divisions. Among them, for example, Fig.24 As shown, the N region and the P region are preset divisions at different positions on the N-type silicon wafer substrate 100, and the PN isolation region is located in the adjacent area of ​​the N region and the P region, and is used to achieve the function of mutual isolation between the N region and the P region during the process, that is, in the specific preparation process, when the N region is patterned, the PN isolation region is retained to perform the isolation function, and when the P region is patterned, the PN isolation region is still retained to ensure the isolation function.

[0055] S102, such as Figure 3 As shown, a first passivation layer 110 is deposited on the back side of the N-type silicon wafer substrate 100 .

[0056] A first passivation layer 110 is deposited on the back side of the N-type silicon wafer substrate 100, thereby protecting the entire layer of the N-type silicon wafer substrate 100. In this way, when it is necessary to mechanically remove the layer above the first passivation layer 110 in the subsequent steps, even if the torn layer is adhered to the first passivation layer 110, the existence of the first passivation layer 110 can effectively protect the N-type silicon wafer substrate 100 from being destroyed or damaged during the tearing process.

[0057] Similarly, in the subsequent steps, before the layer to be torn off is formed, in order to protect the lower layer, a passivation layer can be pre-set to protect the adverse effects that may be caused by the tearing action. The material of the passivation layer can be the same as that of the first passivation layer 110, or it can be different, and the thickness can also be set as needed, as long as the passivation layer can protect the lower layer when the upper layer is torn off.

[0058] S103, forming a first mask pattern layer 200 on the first passivation layer 110, wherein the first mask pattern layer 200 is formed by patterning the first mask layer with a laser, and the first mask pattern layer 200 includes a P region preset pattern formed in the P region, a layer formed by retaining material in the PN isolation region, and a hollowing out formed by removing material in the N region.

[0059] like Figure 4 As shown, the first mask pattern layer 200 is laminated on the first passivation layer 110. The first mask pattern layer 200 is formed by patterning the first mask layer by laser. The first mask pattern layer 200 includes a P region preset pattern formed in the P region and a layer formed by retaining materials in the PN isolation region. During the laser patterning process, the material of the first mask layer corresponding to the N region is removed to appear hollow in the N region.

[0060] Those skilled in the art should understand that the fitting size of the first mask pattern layer 200 on the first passivation layer 110 should generally be substantially the same as the size of the N-type silicon wafer substrate 100. After the first mask pattern layer 200 is fitted, the pattern of the first mask pattern layer 200 in the P region matches to cover the preset pattern of the P region, and the material of the first mask layer is retained in the PN isolation region to form isolation from the N region, thereby forming isolation from the hollowing out of the N region.

[0061] For example, Fig.24 As shown, taking the case where the preset patterns of the P region and the N region are both cross-finger shaped as an example, the PN isolation region is located between the cross-finger shaped P region and the N region.

[0062] It should be noted that, for the lamination of the first mask pattern layer 200 on the first passivation layer 110, those skilled in the art may choose to first laminat the first mask layer on the first passivation layer 110 and then pattern the first mask layer to obtain the first mask pattern layer 200, or may choose to first pattern the first mask layer to form the first mask pattern layer 200 and then laminat the first passivation layer 110, according to actual work needs. In the embodiment of the present application, for example, the first mask layer is first patterned to form the first mask pattern layer 200, and then the first mask pattern layer 200 is laminatd on the first passivation layer 110. In this way, on the one hand, the first mask layer is patterned on an external device, so as to avoid possible damage to the first passivation layer 110 or the N-type silicon wafer substrate 100 under the first passivation layer 110 during the patterning process; on the other hand, the special patterning process on the external device is also conducive to the accuracy of the pattern formation on the first mask pattern layer 200.

[0063] It should also be noted that in the embodiment of the present application, the first mask layer is patterned by laser to obtain the first mask pattern layer 200. For example, the laser used for patterning in the embodiment of the present application uses a laser beam with a wavelength of 0.3μm-12μm. The pulse mode, quasi-continuous mode or continuous mode is selected as needed. The laser pulse width is ps (picoseconds), ns (nanoseconds), and the light energy distribution is Gaussian distribution or flat-top distribution. A circular spot or a square spot is selected, and the spot size is usually between 10-500μm.

[0064] Among them, a laser mask patterning device can be selected for use, such as Fig.23 As shown, the laser mask patterning device includes an optical module and a stage module. The optical module includes a laser 1-1, and the laser beam emitted by the laser 1-1 is reflected by a reflector 1-2, expanded by a beam expander 1-3, and then enters a galvanometer scanning module 1-4, where the galvanometer scanning module 1-4 forms a scanning beam and then emits the beam.

[0065] The thin film layer 1-5 to be patterned (such as the first passivation layer 110 or the N-type silicon wafer substrate 100 after the first passivation layer 110 is bonded) is adsorbed and set on the table 1-6, wherein, when the step method of first patterning the first mask layer and then bonding it with the N-type silicon wafer substrate 100 formed with the first passivation layer 110 is adopted, the bonding can be achieved by adding an adhesive layer, wherein the side where the adhesive layer is set is facing upward, and the other side is adsorbed on the table 1-6. Then the laser 1-1 is started to form an emitted scanning beam to scan the thin film layer 1-5. When the patterned pattern includes a crossed main grid and auxiliary grid structure, the table 1-6 can be preset with a groove body corresponding to the main grid and the auxiliary grid, so that when the scanning beam is scanned according to the preset pattern, it corresponds to the main grid groove body and the auxiliary grid groove body on the table 1-6. In this way, it is more conducive to the accuracy of the patterned graphics. Similarly, in the process of patterning other layers by laser, a laser mask patterning device may also be used, which will not be described in detail here.

[0066] S104 , cleaning with a solution to form a P-region preset pattern in the first passivation layer 110 of the P-region, wherein the hollowed-out portion of the P-region preset pattern exposes the N-type silicon wafer substrate 100 .

[0067] like Figure 5 As shown, for example, an N-type silicon wafer substrate 100 having a first mask pattern layer 200 is cleaned using an HF solution, and the first passivation layer 110 exposed in the hollow portion of the pattern in the P region in the first mask pattern layer 200 is removed by reacting with the HF solution, so that the first passivation layer 110 in the P region is formed into a P region preset pattern corresponding to the first passivation layer 110. After the HF solution reacts to remove the first passivation layer 110 exposed in the first mask pattern layer 200, the hollow portion in the P region preset pattern directly exposes the N-type silicon wafer substrate 100.

[0068] S105 , depositing a P-type amorphous silicon composite layer 120 , and removing the first mask pattern layer 200 mechanically, so that the P-type amorphous silicon composite layer 120 in the P region forms a reverse pattern of the first mask pattern layer.

[0069] like Figure 6 As shown, a P-type amorphous silicon composite layer 120 is deposited on the N-type silicon wafer substrate 100 after solution cleaning, wherein the P-type amorphous silicon composite layer 120 includes at least one layer. For example, the P-type amorphous silicon composite layer 120 may be as follows: Figure 6 The 3 layers shown in .

[0070] Then, if Figure 7As shown, the first mask pattern layer 200 is removed mechanically. Since the physical material of the first mask pattern layer 200 is located in the P region and the PN isolation region, after removing the first mask pattern layer 200, the portion of the P-type amorphous silicon composite layer 120 in the P region that is located on the first mask pattern layer 200 is removed accordingly, so that the P-type amorphous silicon composite layer 120 in the P region is formed as an inverse pattern of the first mask pattern layer 200. In this way, the mask patterning process of the P region has been completed. Among them, due to the design of the first mask pattern layer 200, the PN isolation region always exists between the P region and the N region before the first mask pattern layer 200 is torn off, so that the P region and the N region will not be conductive, which solves the problem that the P region and the N region are prone to lateral drilling in the wet etching process.

[0071] It should be noted that, for example, after depositing the P-type amorphous silicon composite layer 120, in order to facilitate the integrity and convenience of mechanical removal of the first mask pattern layer 200, a passivation layer can be deposited again. The passivation layer and the first passivation layer 110 use the same material. In this way, the deposited passivation layer can protect the P-type amorphous silicon composite layer 120 thereunder, and can prevent the mechanical removal of the first mask pattern layer 200 from leaving substances such as colloids on the P-type amorphous silicon composite layer 120, thereby being more conducive to the thoroughness and integrity of the formed pattern. At the same time, the re-deposited passivation layer can increase the thickness of the PN isolation region and achieve a better electrical isolation effect.

[0072] S106, forming a second mask pattern layer 300 on the first passivation layer 110, wherein the second mask pattern layer 300 is formed by patterning the second mask layer with a laser, and the second mask pattern layer 300 includes a preset pattern of the N region formed in the N region, a layer formed by retaining material in the PN isolation region, and a hollowing out formed by removing material in the P region.

[0073] like Figure 8 As shown, after the mask patterning of the P region is completed, the second mask pattern layer 300 is attached again, and the second mask pattern layer 300 includes a preset N region pattern formed in the N region and a layer formed by retaining materials in the PN isolation region, and through laser patterning, the material corresponding to the P region of the second mask pattern layer 300 is removed to present a hollow in the P region. In this way, during the mask patterning process of the N region, the PN isolation region still plays an isolation and protection role between the P region and the N region.

[0074] Similarly, those skilled in the art may select the order of lamination of the second mask pattern layer 300 on the first passivation layer 110 and laser patterning of the second mask pattern layer 300 according to actual work requirements.

[0075] It should also be noted that the order of mask patterning of the P region through the first mask pattern layer 200 and the mask patterning of the N region through the second mask pattern layer 300 is not limited to the order shown in the embodiment of the present application. The P region and the N region need to be prepared separately in sequence and are not limited to the order.

[0076] S107 , cleaning with a solution to form the first passivation layer 110 of the N region into an N region preset pattern, wherein the hollowed-out portion of the N region preset pattern exposes the N-type silicon wafer substrate 100 .

[0077] like Fig. 9 As shown, for example, an N-type silicon wafer substrate 100 formed with a second mask pattern layer 300 is cleaned with an HF solution, and the first passivation layer 110 in the hollowed-out portion of the pattern exposed in the N region in the second mask pattern layer 300 is removed by reaction with the HF solution, so that the first passivation layer 110 in the N region is formed into a corresponding N region preset pattern. After the HF solution reacts to remove the first passivation layer 110 exposed in the second mask pattern layer 300, the hollowed-out portion in the N region preset pattern directly exposes the N-type silicon wafer substrate 100.

[0078] S108 , depositing an N-type amorphous silicon composite layer 130 , and mechanically removing the second mask pattern layer 300 , so that the N-type amorphous silicon composite layer 130 in the N region forms a reverse pattern of the second mask pattern layer 300 .

[0079] like Fig.10 As shown, an N-type amorphous silicon composite layer 130 is deposited on the N-type silicon wafer substrate 100 after solution cleaning, wherein the N-type amorphous silicon composite layer 130 includes at least one layer. For example, the N-type amorphous silicon composite layer 130 may be as follows Fig.10 The 3 layers shown in .

[0080] Then, if Fig.11 As shown, the second mask pattern layer 300 is removed mechanically. Since the physical material of the second mask pattern layer 300 is located in the N region and the PN isolation region, after removing the second mask pattern layer 300, the portion of the N-type amorphous silicon composite layer 130 in the N region that is located on the second mask pattern layer 300 is removed accordingly, so that the N-type amorphous silicon composite layer 130 in the N region is formed into a reverse pattern of the second mask pattern layer 300. In this way, the mask patterning process of the N region has been completed. During the entire mask patterning process, the PN isolation region is always located between the P region and the N region to ensure the isolation effect.

[0081] Similarly, after depositing the N-type amorphous silicon composite layer 130, in order to facilitate the integrity and convenience of mechanical removal of the second mask pattern layer 300, a passivation layer may be further deposited. The passivation layer and the first passivation layer 110 are made of the same material. In this way, the deposited passivation layer can protect the N-type amorphous silicon composite layer 130 thereunder, protecting the N-type amorphous silicon composite layer 130 from being contaminated or damaged during the preparation process, and preventing substances such as colloids from remaining on the N-type amorphous silicon composite layer 130 when the second mask pattern layer 300 is mechanically removed, thereby being more conducive to the thoroughness and completeness of the formed pattern.

[0082] S109: annealing treatment at a temperature of 800°C-950°C.

[0083] The samples after the above preparation steps are sent into a furnace tube for annealing treatment. The annealing temperature is set between 800° C. and 950° C. After the annealing treatment, the P-type amorphous silicon composite layer 120 and the N-type amorphous silicon composite layer 130 undergo corresponding annealing reactions.

[0084] S110 , performing positive and negative electrode metallization processing on the back side of the N-type silicon wafer substrate 100 to obtain a back-contact solar cell.

[0085] Specifically, the positive and negative electrodes are printed in contact or non-contact manner and then dried and sintered to achieve metallization of the positive and negative electrodes on the back side.

[0086] It should also be noted that the method for preparing the back-contact solar cell of the embodiment of the present application may also include other steps such as cleaning, polishing, and flattening. For example, after the annealing step, a cleaning step of the formed sample may also be included. The HF solution may also be used for cleaning so as to remove the material of the first passivation layer 110 still remaining on the surface of the sample, thereby being more conducive to the realization of the subsequent process effects of the positive and negative electrode metallization.

[0087] The present application provides a method for preparing a back-contact solar cell, comprising: providing a pre-treated N-type silicon wafer substrate 100, wherein the N-type silicon wafer substrate 100 includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region; depositing a first passivation layer 110 on the back side of the N-type silicon wafer substrate 100; forming a first mask pattern layer 200 on the first passivation layer 110, wherein the first mask pattern layer 200 is formed by patterning the first mask layer using a laser, and the first mask pattern layer 200 includes a P region preset pattern formed in the P region, a layer formed by retaining a material in the PN isolation region, and a hollowing formed by removing a material in the N region; cleaning with a solution so that the first passivation layer 110 in the P region forms a P region preset pattern, and the hollowing portion in the P region preset pattern exposes the N-type silicon wafer substrate 100; depositing a P-type amorphous silicon composite layer 120, and mechanically removing the first mask pattern layer 200 so that The P-type amorphous silicon composite layer 120 in the P region forms a reverse pattern of the first mask pattern layer 200; the second mask pattern layer 300 is formed by laminating, and the second mask pattern layer 300 is formed by patterning the second mask layer with a laser, and the second mask pattern layer 300 includes an N-region preset pattern formed in the N region, a layer formed by retaining materials in the PN isolation region, and a hollowing formed by removing materials in the P region; solution cleaning is performed to form the N-region preset pattern in the first passivation layer 110 in the N region, and the hollowing part in the N-region preset pattern exposes the N-type silicon wafer substrate 100; the N-type amorphous silicon composite layer 130 is deposited, and the second mask pattern layer 300 is mechanically removed so that the N-type amorphous silicon composite layer 130 in the N region forms a reverse pattern of the second mask pattern layer 300; annealing treatment is performed, and the annealing temperature is 800°C-950°C; the back side of the N-type silicon wafer substrate 100 is metallized with positive and negative electrodes to obtain a back-contact solar cell. The preparation method of the present application provides a mask layer preparation method, which reduces the difficulty of preparing and removing the mask layer, and avoids the lateral drilling problem existing in the wet etching of the mask layer. The PN isolation region also included between the N region and the P region forms a lateral physical isolation in the two alternating mask processing processes, ensuring effective isolation between the P region and the N region, so that the back-contact solar cell prepared by the preparation method of the embodiment of the present application has a higher conversion efficiency.

[0088] Optional, such as Fig.12 As shown, S102, depositing a first passivation layer 110 on the back side of the N-type silicon wafer substrate 100 includes:

[0089] S1021 . The first passivation layer 110 is a silicon nitride layer or a silicon oxide layer. The thickness of the first passivation layer 110 is between 20 nm and 80 nm.

[0090] The first passivation layer 110 is formed by depositing silicon nitride material (SiNx) or silicon oxide material (SiOx), and the thickness of the first passivation layer 110 is controlled to be between 20-80 nm.

[0091] It should be noted that when a passivation layer is deposited after depositing the P-type amorphous silicon composite layer 120 and after depositing the N-type amorphous silicon composite layer 130, the deposited passivation layer uses the same material as the first passivation layer 110, and the deposition thickness can also be consistent with the first passivation layer 110. The deposited passivation layer can, on the one hand, act as a protective layer to buffer the film layer, and on the other hand, can also avoid damage to the underlying amorphous silicon layer (the P-type amorphous silicon composite layer 120 or the N-type amorphous silicon composite layer 130) during mechanical tearing or causing colloid residue to contaminate the functional layer.

[0092] Optional, such as Fig.13 As shown, S103, forming a first mask pattern layer 200 on the first passivation layer 110 includes:

[0093] S1031 , the first mask pattern layer 200 includes a polymer film layer and an adhesive layer laminated to each other, and the polymer film layer is laminated to the first passivation layer 110 through the adhesive layer.

[0094] In order to make the first mask pattern layer 200 better adhere to the first passivation layer 110, the first mask pattern layer 200 includes a polymer film layer and an adhesive layer adhered to each other, and the polymer film layer is adhered to the first passivation layer 110 through the adhesive layer, which is equivalent to adding an adhesive layer to ensure that the effective structure layer of the first mask pattern layer 200 is closely adhered to the first passivation layer 110. Moreover, the effective structure layer of the first mask pattern layer 200 is selected as a polymer material film layer.

[0095] Optionally, the polymer film layer is made of a material with a temperature resistance greater than 350° C., the thickness of the polymer film layer is between 5-100 μm, preferably between 5-50 μm, and the thickness of the adhesive layer is between 3-10 μm.

[0096] The polymer film layer is prepared from a material with a temperature resistance greater than 350°C to ensure that the film material will not be adversely affected during the laser processing patterning process, and to effectively improve the accuracy of patterning the first mask pattern layer 200. Specifically, the temperature resistance usually refers to the glass transition temperature of the polymer film layer. The thickness of the polymer film layer is set between 5-100μm, preferably between 5-50μm, and the thickness of the adhesive layer is between 3-10μm to ensure that the polymer film layer has sufficient thickness to form a mask pattern, to ensure the adhesion of the adhesive layer and to avoid the adverse effects of excessive thickness of the adhesive layer on the accuracy of the mask pattern. At the same time, the polymer film is made of a material with a temperature resistance greater than 350°C, which is also more friendly to the process of depositing the back amorphous silicon layer.

[0097] Similarly, the second mask pattern layer 300 and the first mask pattern layer 200 are mask materials patterned twice on the P region and the N region respectively. The two act on different areas but have the same function. Therefore, the second mask pattern layer 300 can also adopt the same material and layer thickness setting as mentioned above.

[0098] Optional, such as Fig.14 As shown, S103, the first mask pattern layer 200 is formed by patterning the first mask layer using a laser, and the first mask pattern layer 200 includes a P region preset pattern formed in the P region, a layer formed by retaining materials in the PN isolation region, and a hollowing formed by removing materials in the N region, including:

[0099] S1032 , the preset pattern of the P region includes a projection pattern of the main gate electrode and the auxiliary gate electrode cross-arranged in the P region on the N-type silicon wafer substrate 100 .

[0100] The P-region preset pattern should generally have characteristic points related to the mask pattern. For example, for the cross-finger main gate electrode and the sub-gate electrode, the P-region preset pattern includes the projection pattern of the main gate electrode and the sub-gate electrode cross-set in the P region on the N-type silicon wafer substrate 100. In addition, the P-region preset pattern may also include characteristic shapes such as solder joints and harpoons.

[0101] It should be noted that the PN isolation region is located between the P region and the N region. Those skilled in the art should know that, in order to make the effective area of ​​the P region and the N region as large as possible, the PN isolation region should occupy as small an area as possible while ensuring the isolation effect, thereby ensuring the electrical performance of the battery. Using the method of the present application, the width of the PN isolation region is set between 20-60μm, preferably 20-40μm, and more preferably, the width of the PN isolation region can be set between 20-30μm.

[0102] Similarly, the N region preset pattern of the second mask pattern layer 300 also includes the projection pattern of the relevant structure of the N region, which will not be described in detail here.

[0103] Optional, such as Fig.15 As shown, S101, providing a pre-treated N-type silicon wafer substrate 100 includes:

[0104] S1011. Provide N-type silicon wafer.

[0105] S1012 , performing texturing treatment and backside polishing treatment on the N-type silicon wafer to obtain a pre-treated N-type silicon wafer substrate 100 .

[0106] The N-type silicon wafer is subjected to relevant pre-processing steps, such as cutting, edge passivation, texturing, backside polishing, etc. The processed N-type silicon wafer can be used as the N-type silicon wafer substrate 100 .

[0107] Optional, such as Fig.16 As shown, S105, depositing the P-type amorphous silicon composite layer 120 includes:

[0108] S1051. Depositing a tunneling oxide layer and a first amorphous silicon layer in sequence by in-situ doping, wherein the first amorphous silicon layer includes at least one boron-containing layer selected from an intrinsic amorphous silicon layer, a boron-containing amorphous silicon layer and a boron-containing silicon oxide layer.

[0109] Taking the TBC cell as an example, the deposition of the P-type amorphous silicon composite layer 120 includes the use of an in-situ doping method, such as LPCVD, PECVD, HWCVD and other related equipment and technologies to sequentially deposit a tunneling oxide layer and a first amorphous silicon layer, wherein the first amorphous silicon layer includes at least one boron-containing layer among an intrinsic amorphous silicon layer, a boron-containing amorphous silicon layer and a boron-containing silicon oxide layer. For example, the tunneling oxide layer and the boron-containing amorphous silicon layer may be deposited sequentially, or the tunneling oxide layer, the intrinsic amorphous silicon layer, and the boron-containing amorphous silicon layer may be deposited sequentially, or the tunneling oxide layer, the intrinsic amorphous silicon layer, and the boron-containing silicon oxide layer may be deposited sequentially.

[0110] Optional, such as Fig.17 As shown, S108, depositing the N-type amorphous silicon composite layer 130 includes:

[0111] S1081. Deposit a tunneling oxide layer and a second amorphous silicon layer in sequence by in-situ doping, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer selected from an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer.

[0112] Still taking the TBC cell as an example, the deposition of the N-type amorphous silicon composite layer 130 includes using an in-situ doping method, such as LPCVD, PECVD, HWCVD and other related equipment and technology to sequentially deposit a tunneling oxide layer and a second amorphous silicon layer, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer among an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer. For example, the tunneling oxide layer and the phosphorus-containing amorphous silicon layer may be deposited sequentially, or the tunneling oxide layer, the intrinsic amorphous silicon layer, the phosphorus-containing amorphous silicon layer may be deposited sequentially, or the tunneling oxide layer, the intrinsic amorphous silicon layer, the phosphorus-containing silicon oxide layer may be deposited sequentially.

[0113] Optional, such as Fig.18 As shown, S109, annealing treatment, annealing temperature is 800℃-950℃ including:

[0114] S1091 , annealing to form the P-type amorphous silicon composite layer 120 and the N-type amorphous silicon composite layer 130 into a P+ polycrystalline silicon layer and an N+ polycrystalline silicon layer, respectively.

[0115] Still taking the TBC battery as an example, when the P-type amorphous silicon composite layer 120 includes a boron-doped amorphous silicon layer, and when the N-type amorphous silicon composite layer 130 includes a phosphorus-doped amorphous silicon layer, the P-type amorphous silicon composite layer 120 and the N-type amorphous silicon composite layer 130 are annealed in a temperature range of 800°C-950°C to form a P+ polycrystalline silicon layer and an N+ polycrystalline silicon layer, respectively.

[0116] Optional, such as Fig.19 As shown, S105, depositing the P-type amorphous silicon composite layer 120 includes:

[0117] S1052, using chemical vapor deposition to sequentially deposit an intrinsic amorphous silicon ia Si layer, and a P-type amorphous silicon Pa-Si layer or a microcrystalline silicon Pμ-Si layer.

[0118] Taking the preparation of HBC batteries as an example, when depositing the P-type amorphous silicon composite layer 120 in the back P region, chemical vapor deposition is used to sequentially deposit an intrinsic amorphous silicon ia Si layer and a P-type amorphous silicon Pa-Si layer, or to sequentially deposit an intrinsic amorphous silicon ia Si layer and a microcrystalline silicon Pμ-Si layer.

[0119] Among them, the chemical vapor deposition method can be plasma enhanced chemical vapor deposition (PECVD), hot wire chemical vapor deposition (HWCVD), etc., which is not specifically limited in the embodiments of the present application.

[0120] Optional, such as Fig. 20 As shown, S108, depositing the N-type amorphous silicon composite layer 130 includes:

[0121] S1082. Deposit an intrinsic amorphous silicon ia Si layer, and an N-type amorphous silicon Na-Si layer or a microcrystalline silicon Nμ-Si layer in sequence by chemical vapor deposition.

[0122] Still taking the preparation of HBC batteries as an example, when depositing the N-type amorphous silicon composite layer 130 in the back N region, the intrinsic amorphous silicon ia Si layer and the N-type amorphous silicon Na-Si layer are deposited in sequence by chemical vapor deposition, or the intrinsic amorphous silicon ia Si layer and the microcrystalline silicon Nμ-Si layer are deposited in sequence.

[0123] Likewise, chemical vapor deposition methods such as plasma enhanced chemical vapor deposition (PECVD), hot wire chemical vapor deposition (HWCVD), etc. may also be used.

[0124] Optional, such as Fig.21 As shown, after the annealing treatment, the preparation method further comprises:

[0125] S201 , depositing a first anti-reflection layer on the front side of the N-type silicon wafer substrate 100 , wherein the first anti-reflection layer is formed of at least one layer of aluminum oxide, silicon nitride or silicon oxide material.

[0126] S202 , depositing a second anti-reflection layer on the back side of the N-type silicon wafer substrate 100 , wherein the second anti-reflection layer is formed of at least one layer of silicon oxide, silicon nitride, or silicon oxynitride.

[0127] After the annealing treatment, a passivation anti-reflection layer may be further deposited, and a first anti-reflection layer may be deposited on the front side of the N-type silicon wafer substrate 100, or a second anti-reflection layer may be deposited on the back side of the N-type silicon wafer substrate 100. The first anti-reflection layer is formed of at least one or more layers of a composite anti-reflection layer using aluminum oxide, silicon nitride or silicon oxide materials, and the second anti-reflection layer is formed of at least one or more layers of a composite anti-reflection layer using silicon oxide, silicon nitride or silicon oxynitride materials.

[0128] Another aspect of the embodiments of the present application provides a back-contact solar cell, which is prepared by any of the aforementioned methods for preparing a back-contact solar cell.

[0129] The above descriptions are all based on the N-type silicon wafer substrate 100 as an example, but the embodiments of the present application are not limited thereto, and the use of a P-type silicon wafer substrate is also equally applicable to the technical solution of the present application.

[0130] The back-contact solar cells provided in the embodiments of the present application include but are not limited to the aforementioned TBC cells and HBC cells, which are prepared by any of the aforementioned methods for preparing back-contact solar cells. Since the unique mask layer preparation process of the present application is adopted in the preparation method, the difficulty of preparing and removing the mask layer is reduced, and the lateral drilling problem that occurs when the mask layer is wet-etched is avoided, thereby ensuring effective isolation between the P region and the N region during the preparation process, so that the prepared back-contact solar cell has a higher conversion efficiency. In another aspect of the embodiments of the present application, another method for preparing a back-contact solar cell is provided, which is applied to the preparation of HPBC cells. Fig. 22 As shown, the method includes:

[0131] S301, providing a pre-processed P-type silicon wafer substrate, the P-type silicon wafer substrate comprising an N region and a P region intersecting each other, and a PN isolation region between the N region and the P region.

[0132] When preparing HPBC batteries, a P-type silicon wafer substrate is used, and the P-type silicon wafer substrate is pre-treated, such as texturing, polishing and other processes, so that the surface of the P-type silicon wafer substrate is more conducive to the effective formation of subsequent process steps.

[0133] S302 , depositing a second passivation layer on the back side of the P-type silicon wafer substrate.

[0134] S303, forming a third mask pattern layer on the second passivation layer, wherein the third mask pattern layer is formed by patterning the third mask layer with a laser, and the third mask pattern layer includes a preset pattern of the N region formed in the N region, a layer formed by retaining materials in the PN isolation region, and a hollowing out formed by removing materials in the P region.

[0135] The third mask pattern layer is laminated on the second passivation layer. The third mask pattern layer is a pattern layer patterned by laser. The third mask pattern layer includes a preset pattern of the N region formed in the N region, a layer formed by retaining material in the PN isolation region, and the material corresponding to the P region is removed to appear hollow in the P region.

[0136] S304, cleaning with a solution so that the second passivation layer of the N region forms an N region preset pattern, and the hollowed-out portion of the N region preset pattern exposes the P-type silicon wafer substrate.

[0137] The P-type silicon wafer substrate formed with the third mask pattern layer is cleaned with an HF solution. In the third mask pattern layer, the second passivation layer exposed in the hollowed-out portion of the pattern in the N region is removed by reacting with the HF solution, so that the second passivation layer in the N region is formed into a corresponding preset pattern of the N region. After the second passivation layer exposed in the third mask pattern layer is removed by reacting with the HF solution, the P-type silicon wafer substrate is directly exposed in the hollowed-out portion of the preset pattern of the N region.

[0138] S305 , depositing a tunneling oxide layer and a second amorphous silicon layer in sequence by in-situ doping, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer among an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer.

[0139] The tunnel oxide layer and the second amorphous silicon layer are sequentially deposited by in-situ doping, such as LPCVD, PECVD, HWCVD and other related equipment and technology, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer among an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer. The tunnel oxide layer and the phosphorus-containing amorphous silicon layer may be sequentially deposited, or the tunnel oxide layer, the intrinsic amorphous silicon layer and the phosphorus-containing amorphous silicon layer may be sequentially deposited, or the tunnel oxide layer, the intrinsic amorphous silicon layer and the phosphorus-containing silicon oxide layer may be sequentially deposited.

[0140] S306 , mechanically removing the third mask pattern layer so that the tunneling oxide layer and the second amorphous silicon layer in the N region form a reverse pattern of the third mask pattern layer.

[0141] The third mask pattern layer is removed mechanically, for example, by tearing off. After the third mask pattern layer is removed, the tunnel oxide layer and the second amorphous silicon layer in the N region, the portion located on the third mask pattern layer is removed, thereby forming a reverse pattern of the third mask pattern layer on the tunnel oxide layer and the second amorphous silicon layer in the N region. In particular, due to the design of the third mask pattern layer, the hierarchical material of the PN isolation region is retained, so that there is no conduction between the P region and the N region during the mask preparation process, which solves the problem of lateral drilling of the P region and the N region in the wet etching process.

[0142] S307 , annealing to form an N+ polysilicon layer from the second amorphous silicon layer.

[0143] Annealing treatment, usually the annealing temperature is set between 800° C. and 950° C., and the phosphorus-containing amorphous silicon layer included in the second amorphous silicon layer forms an N+ polysilicon layer during the annealing treatment.

[0144] S308. Deposit a first anti-reflection layer on the front side of the P-type silicon wafer substrate. The first anti-reflection layer is formed of at least one layer of aluminum oxide, silicon nitride or silicon oxide material. Deposit a second anti-reflection layer on the back side of the P-type silicon wafer substrate. The second anti-reflection layer is formed of at least one layer of silicon oxide, silicon nitride or silicon oxynitride material.

[0145] After the annealing treatment, a passivation anti-reflection layer is further deposited, including depositing a first anti-reflection layer on the front side of the P-type silicon wafer substrate, or a second anti-reflection layer can also be deposited on the back side of the P-type silicon wafer substrate. The first anti-reflection layer is formed of at least one or more layers of a composite anti-reflection layer using aluminum oxide, silicon nitride or silicon oxide materials, and the second anti-reflection layer is formed of at least one or more layers of a composite anti-reflection layer using silicon oxide, silicon nitride or silicon oxynitride materials.

[0146] S309, performing positive and negative electrode metallization treatment on the back side of the P-type silicon wafer substrate to obtain a back-contact solar cell.

[0147] Similar to the preparation method of the aforementioned back-contact solar cell, the above method steps may also include other steps such as cleaning, polishing, and flattening. For example, after the annealing step, a cleaning step of the formed sample may also be included. The HF solution may also be used for cleaning so as to remove the material of the first passivation layer 110 still remaining on the surface of the sample, thereby being more conducive to the realization of the subsequent positive and negative electrode metallization process effects.

[0148] According to another aspect of the embodiments of the present application, another back-contact solar cell is provided, which is prepared by the aforementioned method for preparing a back-contact solar cell.

[0149] The back-contact solar cell provided in the embodiments of the present application, including but not limited to the HPBC cell exemplified above, is prepared by any of the methods for preparing a back-contact solar cell described above. Since the unique mask layer preparation process of the present application is adopted in the preparation method, the difficulty of preparing and removing the mask layer is reduced, and the lateral drilling problem that occurs when the mask layer is wet-etched is avoided, thereby ensuring effective isolation between the P region and the N region during the preparation process, so that the prepared back-contact solar cell has a higher conversion efficiency.

[0150] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a back-contact solar cell, characterized in that: include: Providing a pre-processed N-type silicon wafer substrate, wherein the N-type silicon wafer substrate includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region; Depositing a first passivation layer on the back side of the N-type silicon wafer substrate; Forming a first mask pattern layer on the first passivation layer, wherein the first mask pattern layer is formed by patterning the first mask layer using a laser, and the first mask pattern layer includes a first region preset pattern formed in the first region, a layer formed by retaining material in the PN isolation region, and a hollowing formed by removing material in the second region; Cleaning with a solution so that the first passivation layer in the first region forms a first region preset pattern, wherein a hollow portion in the first region preset pattern exposes the N-type silicon wafer substrate; Depositing a first amorphous silicon composite layer, and mechanically removing the first mask pattern layer so that the first amorphous silicon composite layer in the first region forms a reverse pattern of the first mask pattern layer; Forming a second mask pattern layer on the first passivation layer, wherein the second mask pattern layer is formed by patterning the second mask layer with a laser, and the second mask pattern layer includes a second region preset pattern formed in the second region, a layer formed by retaining material in the PN isolation region, and a hollowing formed by removing material in the first region; Cleaning with a solution so that the first passivation layer in the second area forms a preset pattern in the second area, and the hollowed-out portion in the preset pattern in the second area exposes the N-type silicon wafer substrate; Depositing a second amorphous silicon composite layer, and mechanically removing the second mask pattern layer so that the second amorphous silicon composite layer in the second region forms a reverse pattern of the second mask pattern layer; Annealing treatment, the annealing temperature is 800℃-950℃; The back side of the N-type silicon wafer substrate is subjected to positive and negative electrode metallization treatment to obtain a back-contact solar cell.

2. The method for preparing a back-contact solar cell according to claim 1, characterized in that: The first region is a P region, the first region preset pattern is a P region preset pattern, the first amorphous silicon composite layer is a P-type amorphous silicon composite layer, the second region is an N region, the second region preset pattern is an N region preset pattern, and the second amorphous silicon composite layer is an N-type amorphous silicon composite layer; The method comprises: Providing a pre-processed N-type silicon wafer substrate, wherein the N-type silicon wafer substrate includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region; Depositing a first passivation layer on the back side of the N-type silicon wafer substrate; Forming a first mask pattern layer on the first passivation layer, wherein the first mask pattern layer is formed by patterning the first mask layer using a laser, and the first mask pattern layer includes a P region preset pattern formed in the P region, a layer formed by retaining material in the PN isolation region, and a hollowing formed by removing material in the N region; Cleaning with a solution so that the first passivation layer of the P region forms the P region preset pattern, and the hollowed-out portion in the P region preset pattern exposes the N-type silicon wafer substrate; Depositing a P-type amorphous silicon composite layer, and mechanically removing the first mask pattern layer so that the P-type amorphous silicon composite layer in the P region forms a reverse pattern of the first mask pattern layer; Forming a second mask pattern layer on the first passivation layer, wherein the second mask pattern layer is formed by patterning the second mask layer using a laser, and the second mask pattern layer includes a preset pattern in the N region, a layer formed by retaining material in the PN isolation region, and a hollowing formed by removing material in the P region; Cleaning with a solution so that the first passivation layer of the N region forms the N region preset pattern, and the hollowed-out portion in the N region preset pattern exposes the N-type silicon wafer substrate; Depositing an N-type amorphous silicon composite layer, and mechanically removing the second mask pattern layer so that the N-type amorphous silicon composite layer in the N region forms a reverse pattern of the second mask pattern layer; Annealing treatment, the annealing temperature is 800℃-950℃; The back side of the N-type silicon wafer substrate is subjected to positive and negative electrode metallization treatment to obtain a back-contact solar cell.

3. The method for preparing a back-contact solar cell according to claim 2, characterized in that: Depositing a first passivation layer on the back side of the N-type silicon wafer substrate comprises: The first passivation layer is a silicon nitride layer or a silicon oxide layer, and the thickness of the first passivation layer is between 20-80 nm.

4. The method for preparing a back-contact solar cell according to claim 2 or 3, characterized in that: The step of laminating and forming a first mask pattern layer on the first passivation layer comprises: The first mask pattern layer includes a polymer film layer and an adhesive layer that are bonded to each other, and the polymer film layer is bonded to the first passivation layer through the adhesive layer.

5. The method for preparing a back-contact solar cell according to claim 4, characterized in that: The polymer film layer is made of a material with a temperature resistance greater than 350° C. The thickness of the polymer film layer is between 5 and 100 μm, and the thickness of the adhesive layer is between 3 and 10 μm.

6. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The first mask pattern layer is formed by patterning the first mask layer using a laser, and the first mask pattern layer includes a P region preset pattern formed in the P region, a layer formed by retaining materials in the PN isolation region, and a hollowing formed by removing materials in the N region, including: The preset pattern of the P region includes a projection pattern of a main gate electrode and a sub-gate electrode cross-arranged in the P region on the N-type silicon wafer substrate; And / or, the second mask pattern layer is formed by patterning the second mask layer using a laser, and the second mask pattern layer includes a preset N region pattern formed in the N region, a layer formed by retaining material in the PN isolation region, and a hollowing formed by removing material in the P region, including: The N-region preset pattern includes a projection pattern of a main gate electrode and a sub-gate electrode cross-arranged in the N-region on the N-type silicon wafer substrate.

7. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The step of depositing a P-type amorphous silicon composite layer and mechanically removing the first mask pattern layer so that the P-type amorphous silicon composite layer in the P region forms a reverse pattern of the first mask pattern layer comprises: depositing a P-type amorphous silicon composite layer; Depositing a passivation layer; The first mask pattern layer is removed mechanically so that the P-type amorphous silicon composite layer in the P region forms a reverse pattern of the first mask pattern layer.

8. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The width of the PN isolation region is between 20 μm and 60 μm.

9. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The provision of a pre-treated N-type silicon wafer substrate comprises: Provide N-type silicon wafers; The N-type silicon wafer is subjected to texturing treatment and backside polishing treatment to obtain a pre-treated N-type silicon wafer substrate.

10. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The depositing of the P-type amorphous silicon composite layer comprises: A tunneling oxide layer and a first amorphous silicon layer are sequentially deposited by in-situ doping, wherein the first amorphous silicon layer comprises at least one boron-containing layer of an intrinsic amorphous silicon layer, a boron-containing amorphous silicon layer and a boron-containing silicon oxide layer.

11. The method for preparing a back-contact solar cell according to claim 10, characterized in that: The depositing of the N-type amorphous silicon composite layer comprises: The tunneling oxide layer and the second amorphous silicon layer are sequentially deposited by in-situ doping, wherein the second amorphous silicon layer comprises at least one phosphorus-containing layer of an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer.

12. The method for preparing a back-contact solar cell according to claim 10 or 11, characterized in that: The annealing treatment, at a temperature of 800°C-950°C, includes: Annealing is performed to form the P-type amorphous silicon composite layer and the N-type amorphous silicon composite layer into a P+ polycrystalline silicon layer and an N+ polycrystalline silicon layer, respectively.

13. The method for preparing a back-contact solar cell according to claim 2, characterized in that: The depositing of the P-type amorphous silicon composite layer comprises: The intrinsic amorphous silicon ia Si layer and the P-type amorphous silicon Pa-Si layer or the microcrystalline silicon Pμ-Si layer are sequentially deposited by chemical vapor deposition.

14. The method for preparing a back-contact solar cell according to claim 13, characterized in that: The depositing of the N-type amorphous silicon composite layer comprises: An intrinsic amorphous silicon ia Si layer and an N-type amorphous silicon Na-Si layer or a microcrystalline silicon Nμ-Si layer are sequentially deposited by chemical vapor deposition.

15. The method for preparing a back-contact solar cell according to claim 2, characterized in that: After the annealing process, the method further comprises: Depositing a first anti-reflection layer on the front side of the N-type silicon wafer substrate, wherein the first anti-reflection layer is formed of at least one layer of aluminum oxide, silicon nitride or silicon oxide material; A second anti-reflection layer is deposited on the back side of the N-type silicon wafer substrate, wherein the second anti-reflection layer is formed of at least one layer of silicon oxide, silicon nitride, or silicon oxynitride.

16. A back-contact solar cell, characterized in that: The back-contact solar cell is prepared by the method for preparing the back-contact solar cell according to any one of claims 1 to 15.

17. A method for preparing a back-contact solar cell, characterized in that: include: Providing a pre-processed P-type silicon wafer substrate, wherein the P-type silicon wafer substrate includes an N region and a P region intersecting each other, and also includes a PN isolation region between the N region and the P region; Depositing a second passivation layer on the back side of the P-type silicon wafer substrate; Forming a third mask pattern layer on the second passivation layer, wherein the third mask pattern layer is formed by patterning the third mask layer using a laser, and the third mask pattern layer includes a preset pattern of the N region formed in the N region, a layer formed by retaining materials in the PN isolation region, and a hollowing formed by removing materials in the P region; Cleaning with a solution so that the second passivation layer of the N region forms the N region preset pattern, and the hollowed-out portion in the N region preset pattern exposes the P-type silicon wafer substrate; Depositing a tunneling oxide layer and a second amorphous silicon layer in sequence by in-situ doping, wherein the second amorphous silicon layer includes at least one phosphorus-containing layer selected from an intrinsic amorphous silicon layer, a phosphorus-containing amorphous silicon layer and a phosphorus-containing silicon oxide layer; Mechanically removing the third mask pattern layer so that the tunneling oxide layer and the second amorphous silicon layer in the N region form a reverse pattern of the third mask pattern layer; Annealing to form the second amorphous silicon layer into an N+ polycrystalline silicon layer; A first anti-reflection layer is deposited on the front side of the P-type silicon wafer substrate, wherein the first anti-reflection layer is formed of at least one layer of aluminum oxide, silicon nitride or silicon oxide material; and a second anti-reflection layer is deposited on the back side of the P-type silicon wafer substrate, wherein the second anti-reflection layer is formed of at least one layer of silicon oxide, silicon nitride or silicon oxynitride material; The back side of the P-type silicon wafer substrate is subjected to positive and negative electrode metallization treatment to obtain a back-contact solar cell.

18. A back-contact solar cell, characterized in that: The back-contact solar cell is prepared by the method for preparing the back-contact solar cell as claimed in claim 17.

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