Signal processing circuit for electron multiplier and mass spectrometer

Abstract

The present invention discloses a signal processing circuit and mass spectrometer for an electron multiplier, wherein the circuit comprises: a current-voltage converter, which is connected to the electron multiplier and is used to convert the current signal output by the electron multiplier into a voltage differential signal; a radio frequency transformer, which is connected to the current-voltage converter and is used to convert the voltage differential signal into a single-ended voltage signal; a comparator, which is connected to the radio frequency transformer and is used to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold; a shaping subcircuit, which is connected to the comparator and is used to shape the level differential signal and generate a pulse signal of a preset pulse width. The circuit adopts a differential signal transmission mode to amplify and filter the current signal output by the electron multiplier, shapes the level differential signal generated after filtering to generate a pulse signal of a preset pulse width, reduces the influence of noise, improves the signal-to-noise ratio, and reduces the statistical error of the ion signal.

Description

Technical Field

[0001] The present invention relates to the technical field of mass spectrometers, and in particular to a signal processing circuit for an electron multiplier and a mass spectrometer. Background Art

[0002] Triple quadrupole mass spectrometers generally use electron multipliers to detect the intensity of ion signals, and their output signal processing generally includes steps such as signal amplification, filtering, sampling, and analog-to-digital conversion. The output signal of the electron multiplier is generally weak and needs to be amplified by a preamplifier to improve the signal-to-noise ratio and processing accuracy. The selection of the preamplifier needs to consider the bandwidth, noise characteristics, and gain range to ensure effective signal enhancement. These requirements bring great challenges to the design of the circuit. Summary of the invention

[0003] The present invention aims to solve one of the technical problems in the related art at least to a certain extent. To this end, one object of the present invention is to provide a signal processing circuit for an electron multiplier, which reduces the influence of noise, improves the signal-to-noise ratio, and reduces the statistical error of the ion signal.

[0004] The second object of the present invention is to provide a mass spectrometer.

[0005] To achieve the above-mentioned purpose, the first aspect of the present invention proposes a signal processing circuit for an electron multiplier, wherein the signal processing circuit includes: a current-voltage converter, which is connected to the electron multiplier and is used to convert the current signal output by the electron multiplier into a voltage differential signal; a radio frequency transformer, which is connected to the current-voltage converter and is used to convert the voltage differential signal into a single-ended voltage signal; a comparator, which is connected to the radio frequency transformer and is used to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold; a shaping subcircuit, which is connected to the comparator and is used to shape the level differential signal to generate a pulse signal with a preset pulse width. According to the signal processing circuit for the electron multiplier of the embodiment of the present invention, the weak current signal output by the electron multiplier is amplified and filtered by using a differential signal transmission method, thereby reducing the influence of noise and improving the signal-to-noise ratio. At the same time, the level differential signal generated after filtering is shaped to generate a pulse signal with a preset pulse width, thereby reducing the statistical error of the ion signal.

[0006] In addition, the signal processing circuit for the electron multiplier according to the above embodiment of the present invention may also have the following additional technical features: According to one embodiment of the present invention, the non-inverting input terminal of the current-voltage converter is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter is grounded, the non-inverting output terminal of the current-voltage converter is connected to the first input terminal of the RF transformer, the inverting output terminal of the current-voltage converter is connected to the second input terminal of the RF transformer, the first output terminal of the RF transformer is connected to the non-inverting input terminal of the comparator, the second output terminal of the RF transformer is grounded, the inverting input terminal of the comparator receives the preset voltage threshold, the non-inverting output terminal of the comparator is connected to the first input terminal of the shaping sub-circuit, and the inverting output terminal of the comparator is connected to the second input terminal of the shaping sub-circuit.

[0007] According to one embodiment of the present invention, the level differential signal includes a positive-phase level signal and an inverted-phase level signal, and the comparator is used for: if the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal of the comparator is a positive-phase high-level signal, and the inverted-phase level signal output by the inverted output terminal of the comparator is an inverted high-level signal; if the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal of the comparator is a positive-phase low-level signal, and the inverted-phase level signal output by the inverted output terminal of the comparator is an inverted low-level signal.

[0008] According to one embodiment of the present invention, the shaping subcircuit includes a D flip-flop, a delay line and a differential-to-single-ended converter, the positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping subcircuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping subcircuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is also connected to the reset terminal of the D flip-flop through the delay line, the inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the reset terminal of the D flip-flop. Connected to the output end of the shaping subcircuit; wherein, the D flip-flop is used to, when a rising edge of a clock is detected, the in-phase output end of the D flip-flop outputs a positive high-level signal, and the inverting output end of the D flip-flop outputs an inverted high-level signal, and when the output high-level signal reaches a preset time, the in-phase output end of the D flip-flop outputs a positive low-level signal, and the inverting output end of the D flip-flop outputs an inverted low-level signal, and the preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width; the differential to single-ended converter is used to convert the differential level signal of the preset width output by the D flip-flop into a pulse signal of a preset pulse width.

[0009] According to one embodiment of the present invention, the shaping subcircuit includes a D trigger, a first resistor, a first capacitor and a differential-to-single-ended converter, the positive clock terminal of the D trigger is connected to the first input terminal of the shaping subcircuit, the negative clock terminal of the D trigger is connected to the second input terminal of the shaping subcircuit, the data terminal of the D trigger receives a high-level signal, the in-phase output terminal of the D trigger is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D trigger is connected to the first end of the first resistor, the second end of the first resistor is connected to the reset terminal of the D trigger, the second end of the first resistor is also grounded through the first capacitor, the inverting output terminal of the D trigger is connected to the inverting input terminal of the differential-to-single-ended converter, and the differential The output end of the differential-to-single-ended converter is connected to the output end of the shaping subcircuit; wherein, the D flip-flop is used to, when a rising edge of a clock is detected, the in-phase output end of the D flip-flop outputs a positive high-level signal, and the inverting output end of the D flip-flop outputs an inverted high-level signal, and when the output high-level signal reaches a preset time, the in-phase output end of the D flip-flop outputs a positive low-level signal, and the inverting output end of the D flip-flop outputs an inverted low-level signal, and the preset time is determined by the time constant of the first resistor and the first capacitor, and the time constant of the first resistor and the first capacitor is determined by the preset pulse width; the differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

[0010] According to an embodiment of the present invention, the shaping subcircuit is a monostable trigger subcircuit, and the monostable trigger subcircuit includes a timer, a resistor and a capacitor, or includes an operational amplifier, a resistor and a capacitor.

[0011] According to an embodiment of the present invention, the signal processing circuit further includes a threshold value adjustment circuit, the output end of the threshold value adjustment circuit is connected to the inverting input end of the comparator, and is used to provide a preset voltage threshold.

[0012] According to an embodiment of the present invention, the current-to-voltage converter is a cross-group amplifier with differential output.

[0013] According to an embodiment of the present invention, the turns ratio of the primary winding and the secondary winding of the radio frequency transformer is determined by the output impedance of the current-to-voltage converter and the input impedance of the comparator.

[0014] To achieve the above-mentioned purpose, the second aspect of the present invention proposes a mass spectrometer, including an electron multiplier, a main control system and a signal processing circuit for the electron multiplier as proposed in the first aspect of the present invention, wherein the output end of the electron multiplier is connected to the in-phase input end of the current-to-voltage converter in the signal processing circuit, and the output end of the shaping subcircuit in the signal processing circuit is connected to the input end of the main control system.

[0015] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic diagram of a signal processing circuit according to an embodiment of the present invention; Figure 2 is a circuit schematic diagram of a signal processing circuit according to an embodiment of the present invention; Figure 3 is a waveform diagram of the input and output of a comparator and a trigger according to an embodiment of the present invention; Figure 4 is a circuit schematic diagram of a signal processing circuit of a specific embodiment of the present invention; Figure 5 is a circuit schematic diagram of a signal processing circuit of another specific embodiment of the present invention; Figure 6 is a schematic diagram of a mass spectrometer according to an embodiment of the present invention.

[0017] Description of Figure Numbers: 10. Current-to-voltage converter; 20. RF transformer; 30. Comparator; 40. Shaping subcircuit; 1000. Mass spectrometer; 100. Electron multiplier; 200. Signal processing circuit; 300. Main control system. DETAILED DESCRIPTION

[0018] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0019] The signal processing circuit for an electron multiplier and a mass spectrometer according to an embodiment of the present invention will be described in detail below in conjunction with the accompanying drawings and specific implementation modes.

[0020] Figure 1 FIG. 1 is a schematic diagram of a signal processing circuit according to an embodiment of the present invention. Figure 1 As shown, the signal processing circuit for the electron multiplier may include: A current-to-voltage converter 10, which is connected to the electron multiplier and is used to convert the current signal output by the electron multiplier into a voltage differential signal; A radio frequency transformer 20, which is connected to the current-voltage converter 10 and is used to convert a voltage differential signal into a single-ended voltage signal; A comparator 30, which is connected to the RF transformer 20 and is used to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold; The shaping subcircuit 40 is connected to the comparator 30 and is used to shape the level difference signal to generate a pulse signal with a preset pulse width.

[0021] In order to reduce the influence of noise and improve the signal-to-noise ratio, the signal processing circuit of the embodiment of the present invention adopts the transmission mode of differential signal for filtering to reduce the influence of noise and improve the signal-to-noise ratio. In addition, the statistical error of counting the ion signal collected by the electron multiplier in the mass spectrometer is large. In order to reduce the statistical error of the ion signal, the embodiment of the present invention uses the shaping subcircuit 40 to shape the level differential signal generated after filtering to generate a pulse signal with a preset pulse width.

[0022] Specifically, a current-to-voltage converter (I / V converter) 10 is used to amplify the weak current signal output by the electron multiplier, and the weak current signal output by the electron multiplier is converted into a voltage differential signal. In order to filter out noise, a radio frequency transformer 20 is used to convert the voltage differential signal output by the current-to-voltage converter 10 into a single-ended voltage signal, and a comparator 30 filters the single-ended voltage signal according to a preset voltage threshold to generate a level differential signal. In order to reduce the statistical error of the ion signal, a shaping subcircuit 40 is used to shape the level differential signal to generate a pulse signal with a preset pulse width. The shaping subcircuit 40 outputs a pulse signal with a fixed pulse width so that the main control system of the mass spectrometer can count the pulse signal.

[0023] The signal processing circuit for the electron multiplier of the embodiment of the present invention adopts the differential signal transmission mode to amplify and filter the weak current signal output by the electron multiplier, thereby reducing the influence of noise and improving the signal-to-noise ratio. At the same time, the level differential signal generated after filtering is shaped to generate a pulse signal with a preset pulse width, thereby reducing the statistical error of the ion signal.

[0024] In one embodiment of the present invention, Figure 2As shown, the non-inverting input terminal of the current-voltage converter 10 is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter 10 is grounded, the non-inverting output terminal of the current-voltage converter 10 is connected to the first input terminal of the RF transformer 20, the inverting output terminal of the current-voltage converter 10 is connected to the second input terminal of the RF transformer 20, the first output terminal of the RF transformer 20 is connected to the non-inverting input terminal of the comparator 30, the second output terminal of the RF transformer 20 is grounded, the inverting input terminal of the comparator 30 receives a preset voltage threshold, the non-inverting output terminal of the comparator 30 is connected to the first input terminal of the shaping sub-circuit 40, and the inverting output terminal of the comparator 30 is connected to the second input terminal of the shaping sub-circuit 40.

[0025] In this embodiment, the current-to-voltage converter 10 may be a differential output cross-group amplifier. The comparator 30 may be a high-speed comparator.

[0026] Specifically, the transimpedance amplifier converts the weak current signal output by the electron multiplier into a voltage signal. In order to reduce the influence of circuit noise, differential signal transmission is adopted, and a transimpedance amplifier with differential output is selected. When filtering for threshold discrimination, since the transimpedance amplifier outputs a voltage differential signal, the embodiment of the present invention selects a radio frequency transformer 20 to convert the voltage differential signal output by the transimpedance amplifier into a single-ended voltage signal. Impedance matching can be completed, and the conversion of single-ended voltage signals can be completed. The insertion loss of the radio frequency transformer 20 is relatively small, which reduces the signal transmission loss. The single-ended voltage signal output by the radio frequency transformer 20 is input to the in-phase input terminal of the high-speed comparator 30, and the preset voltage threshold is connected to the inverting input terminal. The high-speed comparator 30 has a wide bandwidth, a small transmission delay, and can receive an input pulse width of 700ps (picoseconds), which meets the requirements of low pulse width of ion signals. Since the main control system of the mass spectrometer uses pulse counting technology to count ion intensity, it is necessary to count ion signals. If the output signal pulse width changes arbitrarily, the statistical error will become larger. The embodiment of the present invention uses a shaping subcircuit 40 to convert the ion change signal into a pulse signal with a fixed pulse width.

[0027] In one embodiment of the present invention, the signal processing circuit further includes a threshold value adjustment circuit, the output terminal of the threshold value adjustment circuit is connected to the inverting input terminal of the comparator, and is used to provide a preset voltage threshold.

[0028] Specifically, the output end of the threshold adjustment circuit and the inverting input end of the comparator can provide a preset voltage threshold and adjust the preset voltage threshold according to the actual signal size, which has the advantage of good flexibility of the preset voltage threshold.

[0029] In one embodiment of the present invention, the turns ratio of the primary winding and the secondary winding of the RF transformer 20 is determined by the output impedance of the current-to-voltage converter and the input impedance of the comparator.

[0030] To achieve impedance matching, the turns ratio of the primary winding and the secondary winding of the RF transformer 20 may be determined according to the output impedance of the current-to-voltage converter and the input impedance of the comparator.

[0031] In one embodiment of the present invention, the level differential signal includes a positive phase level signal and a negative phase level signal, and the comparator 30 is used to: If the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal outputted by the in-phase output terminal of the comparator is a positive-phase high-level signal, and the negative-phase level signal outputted by the negative-phase output terminal of the comparator is a negative-phase high-level signal; If the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal outputted by the in-phase output terminal of the comparator is a positive-phase low-level signal, and the negative-phase level signal outputted by the negative-phase output terminal of the comparator is a negative-phase low-level signal.

[0032] Specifically, Figure 3 As shown, when the comparator 30 filters the single-ended voltage signal according to the preset voltage threshold to generate a level differential signal, if the single-ended voltage signal output by the RF transformer 20 is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal Vout+ of the comparator is a positive-phase high-level signal, and the negative-phase level signal output by the negative-phase output terminal Vout- of the comparator is a negative-phase high-level signal. If the single-ended voltage signal output by the RF transformer 20 is less than the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal Vout+ of the comparator is a positive-phase low-level signal, and the negative-phase level signal output by the negative-phase output terminal Vout- of the comparator is a negative-phase low-level signal.

[0033] In order to reduce the number of ion signal statistics, the embodiment of the present invention analyzes the reasons for the large error in ion signal counting statistics. After analysis, it is found that the reason is that the pulse width of the ion signal output by the electron multiplier has a large difference.

[0034] Large differences in pulse width increase the likelihood of overlap. When pulses overlap, the master control system may not be able to correctly distinguish these pulses, resulting in counting errors. For example, two overlapping pulses may be mistaken for one pulse, or one pulse may be mistaken for two pulses. Large differences in pulse width lead to a corresponding increase in dead time. The dead time effect will be exacerbated as the pulse width increases, resulting in count loss, which will increase the statistical error. With larger pulse widths, the time resolution will decrease, making it difficult for the master control system to distinguish closely adjacent pulses. This will lead to counting errors, especially at high ion flow rates. Large differences in pulse widths increase the complexity of the data processing algorithm and make data processing difficult, resulting in greater statistical errors. Moreover, the pulse amplitudes generated by different ions are different, and changes in pulse width will affect the measurement of pulse amplitude. Even if the amplitude is the same, if the pulse width is inconsistent, the actual measured signal intensity may be different. This will make it difficult to set the threshold of the counting system, which in turn affects the accuracy of the count.

[0035] The embodiment of the present invention utilizes a shaping subcircuit to shape the pulse width of the amplified and filtered ion signal into a fixed pulse width.

[0036] In one embodiment of the present invention, Figure 4 As shown, the shaping subcircuit 40 includes a D flip-flop, a delay line and a differential to single-ended converter. The positive clock terminal of the D flip-flop Connected to the first input of the shaping subcircuit, the negative clock terminal of the D flip-flop Connected to the second input of the shaping subcircuit, the data terminal of the D flip-flop Receive high level signal, the in-phase output terminal of D flip-flop Connect to the non-inverting input of the differential to single-ended converter and the non-inverting output of the D flip-flop It is also connected to the reset terminal Reset of the D flip-flop through a delay line. connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping subcircuit; Wherein, the D flip-flop is used for, when a rising edge of a clock is detected, the in-phase output terminal of the D flip-flop outputs a positive phase high level signal, and the in-phase output terminal of the D flip-flop outputs an inverted high level signal, and when the output high level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive phase low level signal, and the inverted output terminal of the D flip-flop outputs an inverted low level signal, and the preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

[0037] Specifically, the positive clock terminal of the D flip-flop When the rising edge of the clock is detected, a high-level signal is output. This high-level signal passes through the delay line and enters the reset terminal Reset of the D flip-flop to generate a pulse signal with a fixed pulse width.

[0038] It should be noted that the delay time of the delay line determines the width of the output pulse. The delay time of the delay line can be determined according to the preset pulse width, and the length of the delay line can be further determined.

[0039] The shaped pulse signal enters the main control system for detection. The corresponding logic code is written in the FPGA or CPLD in the main control system. When the rising edge or falling edge of the input signal is detected, counting is performed.

[0040] The shaping subcircuit 40 in this embodiment has high pulse width accuracy and flexible programming, and can accurately control the pulse width and adapt to the triggering edges of different signals.

[0041] In another embodiment of the present invention, Figure 5 As shown, the shaping subcircuit 40 includes a D trigger, a first resistor, a first capacitor and a differential to single-ended converter. The positive clock terminal of the D flip-flop Connected to the first input of the shaping subcircuit, the negative clock terminal of the D flip-flop Connected to the second input of the shaping subcircuit, the data terminal of the D flip-flop Receive high level signal, the in-phase output terminal of D flip-flop Connect to the non-inverting input of the differential to single-ended converter and the non-inverting output of the D flip-flop The first end of the first resistor R1 is connected to the reset end Reset of the D flip-flop, the second end of the first resistor R1 is also grounded through the first capacitor C1, and the inverting output end of the D flip-flop is connected to the first end of the first resistor R1. connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping subcircuit; Among them, the D flip-flop is used to detect the rising edge of the clock, and the in-phase output terminal of the D flip-flop Output positive high level signal, inverting output terminal of D flip-flop Outputs an inverted high-level signal, and when the output high-level signal reaches the preset time, the inverted output terminal of the D flip-flop Output positive phase low level signal, inverting output terminal of D flip-flop Outputting an inverted low-level signal, the preset time is determined by the time constant of the first resistor R1 and the first capacitor C1, and the time constant of the first resistor R1 and the first capacitor C1 is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

[0042] Specifically, the positive clock terminal of the D flip-flop When the rising edge of the clock is detected, a high-level signal is output. The high-level signal is delayed for a certain time under the action of the first resistor R1 and the first capacitor C1 and then enters the reset terminal Reset of the D flip-flop to generate a pulse signal with a fixed pulse width. The delay time is determined by the first resistor R1 and the first capacitor C1.

[0043] It is feasible to determine the delay time of the first resistor R1 and the first capacitor C1 according to the preset pulse width, and determine the resistance value of the first resistor R1 and the capacity of the first capacitor C1 according to the delay time.

[0044] The shaped pulse signal enters the main control system for detection. The corresponding logic code is written in the FPGA or CPLD in the main control system. When the rising edge or falling edge of the input signal is detected, counting is performed.

[0045] The shaping subcircuit 40 in this embodiment has a simple structure and can easily achieve output of a fixed pulse width.

[0046] In another embodiment of the present invention, the shaping subcircuit 40 is a monostable trigger subcircuit, which includes a timer, a resistor and a capacitor, or an operational amplifier, a resistor and a capacitor.

[0047] The monostable trigger subcircuit in this embodiment may be a monostable trigger subcircuit including a timer, a resistor and a capacitor, or may be a monostable trigger subcircuit including an operational amplifier, a resistor and a capacitor.

[0048] Specifically, the monostable trigger subcircuit generates an output pulse with a fixed width when triggered by an input pulse, and the pulse width is determined by the RC time constant of the monostable trigger subcircuit.

[0049] The shaping subcircuit 40 in this embodiment is simple and easy to implement, and is suitable for generating a fixed pulse width.

[0050] The signal processing circuit in the embodiment of the present invention adopts a wide bandwidth, low noise single-power supply transimpedance amplifier, a radio frequency transformer, a single-power supply differential output high-speed comparator, a differential clock D flip-flop with a reset function, and a differential-to-single-ended operational amplifier to reduce noise, improve the signal-to-noise ratio, and reduce the statistical error of the ion signal.

[0051] The signal processing circuit for an electron multiplier in the embodiment of the present invention can reduce noise influence and improve signal-to-noise ratio. At the same time, digital trigger technology is used to shape the amplified and filtered ion signal and standardize the ion signal to a fixed pulse width, thereby reducing statistical errors.

[0052] The signal processing circuit for the electron multiplier in the embodiment of the present invention improves the signal-to-noise ratio of the signal, can effectively remove burrs, has high pulse width precision control, and can effectively improve the detection accuracy of ion intensity.

[0053] The invention provides a mass spectrometer.

[0054] Figure 6 Schematic diagram of a mass spectrometer according to an embodiment of the present invention. Figure 6 As shown, the mass spectrometer 1000 may include an electron multiplier 100, a main control system 300 and a signal processing circuit 200 for the electron multiplier as described above, wherein the output end of the electron multiplier 100 is connected to the in-phase input end of the current-to-voltage converter 10 in the signal processing circuit 200, and the output end of the shaping subcircuit 40 in the signal processing circuit 200 is connected to the input end of the main control system 300.

[0055] The mass spectrometer 1000 in the embodiment of the present invention improves the signal-to-noise ratio of the signal, can effectively remove burrs, has high pulse width precision control, and can effectively improve the detection accuracy of ion intensity.

[0056] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0057] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0058] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0059] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0060] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0061] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A signal processing circuit for an electron multiplier, characterized in that: The signal processing circuit comprises: A current-to-voltage converter, connected to the electron multiplier, for converting the current signal output by the electron multiplier into a voltage differential signal; A radio frequency transformer, the radio frequency transformer is connected to the current-to-voltage converter and is used to convert the voltage differential signal into a single-ended voltage signal; A comparator, the comparator being connected to the radio frequency transformer and configured to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold; A shaping subcircuit, the shaping subcircuit is connected to the comparator and is used to shape the level difference signal to generate a pulse signal with a preset pulse width.

2. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The non-inverting input terminal of the current-voltage converter is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter is grounded, the non-inverting output terminal of the current-voltage converter is connected to the first input terminal of the RF transformer, the inverting output terminal of the current-voltage converter is connected to the second input terminal of the RF transformer, the first output terminal of the RF transformer is connected to the non-inverting input terminal of the comparator, the second output terminal of the RF transformer is grounded, the inverting input terminal of the comparator receives the preset voltage threshold, the non-inverting output terminal of the comparator is connected to the first input terminal of the shaping sub-circuit, and the inverting output terminal of the comparator is connected to the second input terminal of the shaping sub-circuit.

3. The signal processing circuit for an electron multiplier according to claim 2, characterized in that: The level differential signal includes a positive phase level signal and a negative phase level signal, and the comparator is used for: If the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal of the comparator is a positive-phase high-level signal, and the negative-phase level signal output by the negative-phase output terminal of the comparator is a negative-phase high-level signal; If the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal outputted by the in-phase output terminal of the comparator is a positive-phase low-level signal, and the negative-phase level signal outputted by the negative-phase output terminal of the comparator is a negative-phase low-level signal.

4. The signal processing circuit for an electron multiplier according to claim 2, characterized in that: The shaping subcircuit includes a D flip-flop, a delay line and a differential to single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is also connected to the reset terminal of the D flip-flop through the delay line, the inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit; Wherein, the D flip-flop is used for, when a rising edge of a clock is detected, the in-phase output terminal of the D flip-flop outputs a positive phase high level signal, and the in-phase output terminal of the D flip-flop outputs an inverted high level signal, and when the output high level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive phase low level signal, and the inverted output terminal of the D flip-flop outputs an inverted low level signal, and the preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

5. The signal processing circuit for an electron multiplier according to claim 2, characterized in that: The shaping subcircuit includes a D trigger, a first resistor, a first capacitor and a differential to single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is connected to the first end of the first resistor, the second end of the first resistor is connected to the reset terminal of the D flip-flop, the second end of the first resistor is also grounded through the first capacitor, the inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit; Wherein, the D flip-flop is used for, when a rising edge of a clock is detected, the in-phase output terminal of the D flip-flop outputs a positive phase high level signal, and the in-phase output terminal of the D flip-flop outputs an inverted high level signal, and when the output high level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive phase low level signal, and the inverted output terminal of the D flip-flop outputs an inverted low level signal, and the preset time is determined by the time constant of the first resistor and the first capacitor, and the time constant of the first resistor and the first capacitor is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

6. The signal processing circuit for an electron multiplier according to claim 2, characterized in that: The shaping subcircuit is a monostable trigger subcircuit, and the monostable trigger subcircuit includes a timer, a resistor and a capacitor, or includes an operational amplifier, a resistor and a capacitor.

7. The signal processing circuit for an electron multiplier according to claim 2, characterized in that: The signal processing circuit further includes a threshold value adjustment circuit, the output end of the threshold value adjustment circuit is connected to the inverting input end of the comparator, and is used to provide a preset voltage threshold.

8. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The current-to-voltage converter is a cross-group amplifier with differential output.

9. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The turns ratio of the primary winding and the secondary winding of the RF transformer is determined by the output impedance of the current-to-voltage converter and the input impedance of the comparator.

10. A mass spectrometer, characterized in that: It comprises an electron multiplier, a main control system and a signal processing circuit for the electron multiplier as described in any one of claims 1 to 9, wherein the output end of the electron multiplier is connected to the in-phase input end of the current-to-voltage converter in the signal processing circuit, and the output end of the shaping subcircuit in the signal processing circuit is connected to the input end of the main control system.

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