Signal Processing Circuit for Electron Multiplier and Mass Spectrometer

Abstract

The present invention discloses a signal processing circuit for an electron multiplier and a mass spectrometer. The circuit includes: a current-voltage converter connected to the electron multiplier for converting the current signal output by the electron multiplier into a voltage differential signal; a radio frequency transformer connected to the current-voltage converter for converting the voltage differential signal into a single-ended voltage signal; a comparator connected to the radio frequency transformer for generating a level differential signal according to the single-ended voltage signal and a preset voltage threshold; and a shaping sub-circuit connected to the comparator for shaping the level differential signal to generate a pulse signal with a preset pulse width. This circuit uses a differential signal transmission method to amplify and filter the current signal output by the electron multiplier, and shapes the generated level differential signal after filtering to generate a pulse signal with a preset pulse width, reducing the influence of noise, improving the signal-to-noise ratio, and reducing the statistical error of ion signals.

Description

Technical Field

[0001] The present invention relates to the technical field of mass spectrometers, and particularly to a signal processing circuit for an electron multiplier and a mass spectrometer. Background Art

[0002] A triple quadrupole mass spectrometer generally uses an electron multiplier to detect the intensity of ion signals, and the processing of its output signal generally includes steps such as signal amplification, filtering, sampling, and analog-to-digital conversion. The output signal of the electron multiplier is generally weak and needs to be amplified by a preamplifier to improve the signal-to-noise ratio and processing accuracy. The selection of the preamplifier needs to consider bandwidth, noise characteristics, and gain range to ensure the effective improvement of the signal, and these requirements pose great challenges to the circuit design. Summary of the Invention

[0003] The present invention aims to at least solve one of the technical problems in the related art to some extent. For this purpose, an object of the present invention is to provide a signal processing circuit for an electron multiplier, which reduces the influence of noise, improves the signal-to-noise ratio, and reduces the statistical error of ion signals.

[0004] A second object of the present invention is to provide a mass spectrometer.

[0005] To achieve the above object, an embodiment of the first aspect of the present invention provides a signal processing circuit for an electron multiplier, where the signal processing circuit includes: a current-voltage converter connected to the electron multiplier for converting the current signal output by the electron multiplier into a voltage differential signal; a radio frequency transformer connected to the current-voltage converter for converting the voltage differential signal into a single-ended voltage signal; a comparator connected to the radio frequency transformer for generating a level differential signal according to the single-ended voltage signal and a preset voltage threshold; and a shaping sub-circuit connected to the comparator for shaping the level differential signal to generate a pulse signal with a preset pulse width.

[0006] According to the signal processing circuit for an electron multiplier of the embodiment of the present invention, the differential signal transmission method is adopted to amplify and filter the weak current signal output by the electron multiplier, reduce the influence of noise, and improve the signal-to-noise ratio. At the same time, the level differential signal generated after filtering is shaped to generate a pulse signal with a preset pulse width, reducing the statistical error of ion signals.

[0007] In addition, the signal processing circuit for an electron multiplier proposed according to the above embodiment of the present invention may further have the following additional technical features:

[0008] According to an embodiment of the present invention, the non-inverting input terminal of the current-voltage converter is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter is grounded, the non-inverting output terminal of the current-voltage converter is connected to the first input terminal of the radio frequency transformer, the inverting output terminal of the current-voltage converter is connected to the second input terminal of the radio frequency transformer, the first output terminal of the radio frequency transformer is connected to the non-inverting input terminal of the comparator, the second output terminal of the radio frequency transformer is grounded, the inverting input terminal of the comparator receives the preset voltage threshold, the non-inverting output terminal of the comparator is connected to the first input terminal of the shaping sub-circuit, and the inverting output terminal of the comparator is connected to the second input terminal of the shaping sub-circuit.

[0009] According to an embodiment of the present invention, the level differential signal includes a positive-phase level signal and a negative-phase level signal. The comparator is configured to: if the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal of the comparator is a positive-phase high level signal, and the negative-phase level signal output by the inverting output terminal of the comparator is a negative-phase high level signal; if the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal of the comparator is a positive-phase low level signal, and the negative-phase level signal output by the inverting output terminal of the comparator is a negative-phase low level signal.

[0010] According to an embodiment of the present invention, the shaping sub-circuit includes a D flip-flop, a delay line, and a differential-to-single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high level signal, the non-inverting output terminal of the D flip-flop is connected to the non-inverting input terminal of the differential-to-single-ended converter, and the non-inverting output terminal of the D flip-flop is also connected to the reset terminal of the D flip-flop through the delay line. The inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit; wherein, the D flip-flop is configured to output a positive-phase high level signal at the non-inverting output terminal and a negative-phase high level signal at the inverting output terminal when detecting a rising edge of the clock, and when the output high level signal reaches a preset time, output a positive-phase low level signal at the non-inverting output terminal of the D flip-flop and a negative-phase low level signal at the inverting output terminal of the D flip-flop. The preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width; the differential-to-single-ended converter is configured to convert the differential level signal with a preset width output by the D flip-flop into a pulse signal with a preset pulse width.

[0011] According to an embodiment of the present invention, the shaping sub-circuit includes a D flip-flop, a first resistor, a first capacitor, and a differential-to-single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is connected to the first end of the first resistor. The second end of the first resistor is connected to the reset terminal of the D flip-flop, and the second end of the first resistor is also grounded through the first capacitor. The anti-phase output terminal of the D flip-flop is connected to the anti-phase input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit. Wherein, the D flip-flop is configured to output a positive-phase high-level signal at the in-phase output terminal and an anti-phase high-level signal at the anti-phase output terminal when a clock rising edge is detected, and when the output high-level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive-phase low-level signal, and the anti-phase output terminal of the D flip-flop outputs an anti-phase low-level signal. The preset time is determined by the time constant of the first resistor and the first capacitor, and the time constant of the first resistor and the first capacitor is determined by the preset pulse width. The differential-to-single-ended converter is configured to convert the differential-level signal with a preset width output by the D flip-flop into a pulse signal with a preset pulse width.

[0012] According to an embodiment of the present invention, the shaping sub-circuit is a monostable trigger sub-circuit. The monostable trigger sub-circuit includes a timer, a resistor, and a capacitor, or includes an operational amplifier, a resistor, and a capacitor.

[0013] According to an embodiment of the present invention, the signal processing circuit further includes a threshold adjustment circuit. The output terminal of the threshold adjustment circuit is connected to the anti-phase input terminal of the comparator for providing a preset voltage threshold.

[0014] According to an embodiment of the present invention, the current-voltage converter is a differential-output cross-group amplifier.

[0015] According to an embodiment of the present invention, the turn ratio of the primary winding and the secondary winding of the radio frequency transformer is determined by the output impedance of the current-voltage converter and the input impedance of the comparator.

[0016] To achieve the above object, an embodiment of the second aspect of the present invention provides a mass spectrometer, which includes an electron multiplier, a main control system, and a signal processing circuit for the electron multiplier as proposed in the embodiment of the first aspect of the present invention. The output end of the electron multiplier is connected to the in-phase input end of the current-voltage converter in the signal processing circuit, and the output end of the shaping sub-circuit in the signal processing circuit is connected to the input end of the main control system.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be understood through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a schematic diagram of the signal processing circuit according to an embodiment of the present invention;

[0019] Figure 2 is a circuit schematic diagram of the signal processing circuit according to an embodiment of the present invention;

[0020] Figure 3 is a waveform diagram of the input and output of the comparator and trigger according to an embodiment of the present invention;

[0021] Figure 4 is a circuit schematic diagram of the signal processing circuit according to a specific embodiment of the present invention;

[0022] Figure 5 is a circuit schematic diagram of the signal processing circuit according to another specific embodiment of the present invention;

[0023] Figure 6 is a schematic diagram of the mass spectrometer according to an embodiment of the present invention.

[0024] DESCRIPTION OF THE REFERENCE NUMERALS IN THE DRAWINGS:

[0025] 10. Current-voltage converter; 20. RF transformer; 30. Comparator; 40. Shaping sub-circuit; 1000. Mass spectrometer; 100. Electron multiplier; 200. Signal processing circuit; 300. Main control system. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The embodiments of the present invention will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present invention, and should not be construed as limiting the present invention.

[0027] The signal processing circuit for the electron multiplier and the mass spectrometer according to the embodiments of the present invention will be described in detail below in conjunction with the drawings of the specification and specific embodiments.

[0028] Figure 1 is a schematic diagram of a signal processing circuit according to an embodiment of the present invention. As Figure 1 shown, the signal processing circuit for an electron multiplier may include:

[0029] a current-voltage converter 10, which is connected to the electron multiplier and is used to convert the current signal output by the electron multiplier into a voltage differential signal;

[0030] a radio frequency transformer 20, which is connected to the current-voltage converter 10 and is used to convert the voltage differential signal into a single-ended voltage signal;

[0031] a comparator 30, which is connected to the radio frequency transformer 20 and is used to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold;

[0032] a shaping sub-circuit 40, which is connected to the comparator 30 and is used to shape the level differential signal to generate a pulse signal with a preset pulse width.

[0033] To reduce the influence of noise and improve the signal-to-noise ratio, the signal processing circuit according to the embodiment of the present invention uses a differential signal transmission method for filtering to reduce the influence of noise and improve the signal-to-noise ratio. In addition, the statistical error of counting the ion signals collected by the electron multiplier in the mass spectrometer is relatively large. To reduce the statistical error of the ion signals, the embodiment of the present invention uses the shaping sub-circuit 40 to shape the level differential signal generated after filtering to generate a pulse signal with a preset pulse width.

[0034] Specifically, the current-voltage converter (I / V converter) 10 is used to amplify the weak current signal output by the electron multiplier and convert the weak current signal output by the electron multiplier into a voltage differential signal. To filter out noise, the radio frequency transformer 20 is used to convert the voltage differential signal output by the current-voltage converter 10 into a single-ended voltage signal, and the comparator 30 filters the single-ended voltage signal according to the preset voltage threshold to generate a level differential signal. To reduce the statistical error of the ion signals, the shaping sub-circuit 40 is used to shape the level differential signal to generate a pulse signal with a preset pulse width. The shaping sub-circuit 40 outputs a pulse signal with a fixed pulse width, which is convenient for the main control system of the mass spectrometer to count the pulse signal.

[0035] The signal processing circuit for an electron multiplier according to the embodiment of the present invention uses a differential signal transmission method to amplify and filter the weak current signal output by the electron multiplier, reduces the influence of noise, and improves the signal-to-noise ratio. At the same time, the level differential signal generated after filtering is shaped to generate a pulse signal with a preset pulse width, reducing the statistical error of the ion signals.

[0036] In an embodiment of the present invention, as Figure 2As shown, the non-inverting input terminal of the current-voltage converter 10 is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter 10 is grounded, the non-inverting output terminal of the current-voltage converter 10 is connected to the first input terminal of the radio frequency transformer 20, the inverting output terminal of the current-voltage converter 10 is connected to the second input terminal of the radio frequency transformer 20, the first output terminal of the radio frequency transformer 20 is connected to the non-inverting input terminal of the comparator 30, the second output terminal of the radio frequency transformer 20 is grounded, the inverting input terminal of the comparator 30 receives a preset voltage threshold, the non-inverting output terminal of the comparator 30 is connected to the first input terminal of the shaping sub-circuit 40, and the inverting output terminal of the comparator 30 is connected to the second input terminal of the shaping sub-circuit 40.

[0037] In this embodiment, the current-voltage converter 10 can be a transimpedance amplifier with differential output. The comparator 30 can be a high-speed comparator.

[0038] Specifically, the transimpedance amplifier converts the weak current signal output by the electron multiplier into a voltage signal. To reduce the influence of circuit noise, differential signal transmission is adopted, and a transimpedance amplifier with differential output is selected. When filtering for threshold discrimination, since the transimpedance amplifier outputs a voltage differential signal, in the embodiment of the present invention, the radio frequency transformer 20 is selected to convert the voltage differential signal output by the transimpedance amplifier into a single-ended voltage signal. It can not only complete impedance matching but also complete the conversion of the single-ended voltage signal. The insertion loss of this radio frequency transformer 20 is relatively small, reducing signal transmission loss. The single-ended voltage signal output by the radio frequency transformer 20 is input to the non-inverting input terminal of the high-speed comparator 30, and the preset voltage threshold is connected to the inverting input terminal. This high-speed comparator 30 has a wide bandwidth, small transmission delay, and can receive an input pulse width of 700 ps (picoseconds), meeting the requirements of low pulse width of ion signals. Since the main control system of the mass spectrometer uses pulse counting technology to count ion intensity and needs to count ion signals, if the pulse width of the output signal changes arbitrarily, it will cause the statistical error to become larger. In the embodiment of the present invention, the shaping sub-circuit 40 is used to convert the ion-changing signal into a pulse signal with a fixed pulse width.

[0039] In an embodiment of the present invention, the signal processing circuit further includes a threshold adjustment circuit, and the output terminal of the threshold adjustment circuit is connected to the inverting input terminal of the comparator for providing a preset voltage threshold.

[0040] Specifically, while the output terminal of the threshold adjustment circuit is connected to the inverting input terminal of the comparator to provide a preset voltage threshold, it can also adjust the preset voltage threshold according to the actual signal size, having the advantage of good flexibility of the preset voltage threshold.

[0041] In an embodiment of the present invention, the turn ratio of the primary winding and the secondary winding of the radio frequency transformer 20 is determined by the output impedance of the current-voltage converter and the input impedance of the comparator.

[0042] To achieve impedance matching, the turns ratio of the primary winding and the secondary winding of the RF transformer 20 can be determined according to the output impedance of the current-voltage converter and the input impedance of the comparator.

[0043] In an embodiment of the present invention, the level differential signal includes a positive-phase level signal and an inverted-phase level signal, and the comparator 30 is configured to:

[0044] If the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal of the comparator is a positive-phase high-level signal, and the inverted-phase level signal output by the inverting output terminal of the comparator is an inverted-phase high-level signal;

[0045] If the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal of the comparator is a positive-phase low-level signal, and the inverted-phase level signal output by the inverting output terminal of the comparator is an inverted-phase low-level signal.

[0046] Specifically, as Figure 3 shown, when the comparator 30 filters the single-ended voltage signal according to the preset voltage threshold to generate a level differential signal, if the single-ended voltage signal output by the RF transformer 20 is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal Vout+ of the comparator is a positive-phase high-level signal, and the inverted-phase level signal output by the inverting output terminal Vout- of the comparator is an inverted-phase high-level signal. If the single-ended voltage signal output by the RF transformer 20 is less than the preset voltage threshold, the positive-phase level signal output by the non-inverting output terminal Vout+ of the comparator is a positive-phase low-level signal, and the inverted-phase level signal output by the inverting output terminal Vout- of the comparator is an inverted-phase low-level signal.

[0047] In the embodiment of the present invention, to reduce the statistical number of ion signals, the reasons for the large counting statistical error of the ion signals are analyzed. After analysis, it is found that the reason is that the pulse widths of the ion signals output by the electron multiplier are quite different.

[0048] A large difference in pulse width increases the possibility of overlap. When pulses overlap, the main control system may not be able to correctly distinguish these pulses, resulting in counting errors. For example, two overlapping pulses may be mistaken for one pulse, or one pulse may be mistaken for two pulses. A large difference in pulse width leads to a corresponding increase in dead time. The dead time effect intensifies with the increase in pulse width, resulting in lost counts and thus larger statistical errors. With a larger pulse width, the time resolution decreases, making it difficult for the main control system to distinguish closely adjacent pulses. This leads to counting errors, especially in the case of high ion flow rates. A large difference in pulse width results in a high complexity of the data processing algorithm and great difficulty in data processing, leading to larger statistical errors. Moreover, the pulse amplitudes generated by different ions are different, and the change in pulse width affects the measurement of pulse amplitude. Even if the amplitudes are the same, if the pulse widths are inconsistent, the actually measured signal intensities may be different. This makes it difficult to set the threshold of the counting system, thereby affecting the accuracy of counting.

[0049] In an embodiment of the present invention, a shaping sub-circuit is used to shape the pulse width of the amplified and filtered ion signal into a fixed pulse width.

[0050] In one embodiment of the present invention, as Figure 4 shown, the shaping sub-circuit 40 includes a D flip-flop, a delay line, and a differential-to-single-ended converter.

[0051] The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, and the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit. The data terminal of the D flip-flop receives a high-level signal. The in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is also connected to the reset terminal Reset of the D flip-flop through the delay line. The anti-phase output terminal of the D flip-flop is connected to the anti-phase input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit.

[0052] Among them, the D flip-flop is used to output a positive-phase high-level signal at the in-phase output terminal of the D flip-flop and an anti-phase high-level signal at the anti-phase output terminal of the D flip-flop when detecting a clock rising edge, and output a positive-phase low-level signal at the in-phase output terminal of the D flip-flop and an anti-phase low-level signal at the anti-phase output terminal of the D flip-flop when the output high-level signal reaches a preset time. The preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width.

[0053] A differential-to-single-ended converter is used to convert a differential level signal with a preset width output by a D flip-flop into a pulse signal with a preset pulse width.

[0054] Specifically, when the positive clock terminal of the D flip-flop detects a rising edge of the clock, a high-level signal is output. This high-level signal enters the reset terminal Reset of the D flip-flop through a delay line, generating a pulse signal with a fixed pulse width.

[0055] It should be noted that the delay time of the delay line determines the width of the output pulse width. The delay time of the delay line can be determined according to the preset pulse width, and further the length of the delay line can be determined.

[0056] The shaped pulse signal enters the main control system for detection. Corresponding logic codes are written in the FPGA or CPLD in the main control system. When the rising edge or falling edge of the input signal is detected, counting is performed.

[0057] The shaping sub-circuit 40 in this embodiment has high pulse width accuracy, flexible programming, can accurately control the pulse width and adapt to the trigger edges of different signals.

[0058] In another embodiment of the present invention, as Figure 5 shown, the shaping sub-circuit 40 includes a D flip-flop, a first resistor, a first capacitor and a differential-to-single-ended converter.

[0059] The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, and the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit. The data terminal of the D flip-flop receives a high-level signal. The in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is also connected to the first end of the first resistor R1. The second end of the first resistor R1 is connected to the reset terminal Reset of the D flip-flop, and the second end of the first resistor R1 is also grounded through the first capacitor C1. The anti-phase output terminal of the D flip-flop is connected to the anti-phase input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit.

[0060] Among them, the D flip-flop is used to output a positive-phase high-level signal at the in-phase output terminal when detecting a rising edge of the clock, and output an anti-phase high-level signal at the anti-phase output terminal of the D flip-flop. When the high-level signal output reaches the preset time, a positive-phase low-level signal is output at the in-phase output terminal of the D flip-flop, and an anti-phase low-level signal is output at the anti-phase output terminal Output an inverted low-level signal. The preset time is determined by the time constant of the first resistor R1 and the first capacitor C1, and the time constant of the first resistor R1 and the first capacitor C1 is determined by the preset pulse width.

[0061] A differential-to-single-ended converter is used to convert the differential-level signal with a preset width output by the D flip-flop into a pulse signal with a preset pulse width.

[0062] Specifically, when the positive clock terminal of the D flip-flop detects the rising edge of the clock, a high-level signal is output. This high-level signal is delayed for a certain time under the action of the first resistor R1 and the first capacitor C1 and then enters the reset terminal Reset of the D flip-flop to generate a pulse signal with a fixed pulse width. The delay time is determined by the first resistor R1 and the first capacitor C1.

[0063] Implementable. The delay time of the first resistor R1 and the first capacitor C1 can be determined according to the preset pulse width, and the resistance value of the first resistor R1 and the capacitance of the first capacitor C1 can be determined according to the delay time.

[0064] The shaped pulse signal enters the main control system for detection. Corresponding logic codes are written in the FPGA or CPLD in the main control system. When the rising edge or falling edge of the input signal is detected, counting is performed.

[0065] The shaping sub-circuit 40 in this embodiment has a simple structure and is relatively easy to achieve a fixed pulse width output.

[0066] In another embodiment of the present invention, the shaping sub-circuit 40 is a monostable trigger sub-circuit. The monostable trigger sub-circuit includes a timer, a resistor and a capacitor, or includes an operational amplifier, a resistor and a capacitor.

[0067] The monostable trigger sub-circuit in this embodiment can be a monostable trigger sub-circuit including a timer, a resistor and a capacitor, or a monostable trigger sub-circuit including an operational amplifier, a resistor and a capacitor.

[0068] Specifically, the monostable trigger sub-circuit generates an output pulse with a fixed width when triggered by an input pulse, and the pulse width is determined by the RC time constant of the monostable trigger sub-circuit.

[0069] The shaping sub-circuit 40 in this embodiment is simple and easy to implement and is suitable for generating a fixed pulse width.

[0070] The signal processing circuit in the embodiment of the present invention uses a wide-bandwidth, low-noise single-supply transimpedance amplifier, a radio frequency transformer, a single-supply differential output high-speed comparator, a differential clock D flip-flop with a reset function, and a differential-to-single-ended operational amplifier to reduce noise, improve the signal-to-noise ratio, and reduce the statistical error of ion signals.

[0071] The signal processing circuit for an electron multiplier in the embodiments of the present invention can reduce the influence of noise, improve the signal-to-noise ratio, and at the same time use digital triggering technology to shape the amplified and filtered ion signal, standardize the ion signal into a fixed pulse width, thereby reducing the statistical error.

[0072] The signal processing circuit for an electron multiplier in the embodiments of the present invention improves the signal-to-noise ratio of the signal, can effectively remove the burrs, has high pulse width precision control, and can effectively improve the detection accuracy of ion intensity.

[0073] The present invention provides a mass spectrometer.

[0074] Figure 6 It is a schematic diagram of a mass spectrometer according to an embodiment of the present invention. As Figure 6 shown, the mass spectrometer 1000 may include an electron multiplier 100, a main control system 300, and the signal processing circuit 200 for an electron multiplier as described above. The output end of the electron multiplier 100 is connected to the in-phase input end of the current-voltage converter 10 in the signal processing circuit 200, and the output end of the shaping sub-circuit 40 in the signal processing circuit 200 is connected to the input end of the main control system 300.

[0075] The mass spectrometer 1000 in the embodiments of the present invention improves the signal-to-noise ratio of the signal, can effectively remove the burrs, has high pulse width precision control, and can effectively improve the detection accuracy of ion intensity.

[0076] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0077] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

[0078] In addition, the terms "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0079] In the present invention, unless otherwise clearly specified and defined, terms such as "mounted", "connected", "coupled", "fixed", etc. shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0080] In the present invention, unless otherwise clearly specified and defined, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.

[0081] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A signal processing circuit for an electron multiplier, characterized in that: The signal processing circuit comprises: A current-to-voltage converter, connected to the electron multiplier, for converting the current signal output by the electron multiplier into a voltage differential signal; A radio frequency transformer, the radio frequency transformer is connected to the current-to-voltage converter and is used to convert the voltage differential signal into a single-ended voltage signal; A comparator, the comparator being connected to the radio frequency transformer and configured to generate a level differential signal according to the single-ended voltage signal and a preset voltage threshold; A shaping subcircuit, the shaping subcircuit is connected to the comparator, and is used to shape the level differential signal to generate a pulse signal with a preset pulse width; the non-phase input terminal of the current-voltage converter is connected to the output terminal of the electron multiplier, the inverting input terminal of the current-voltage converter is grounded, the non-phase output terminal of the current-voltage converter is connected to the first input terminal of the radio frequency transformer, the inverting output terminal of the current-voltage converter is connected to the second input terminal of the radio frequency transformer, the first output terminal of the radio frequency transformer is connected to the non-phase input terminal of the comparator, the second output terminal of the radio frequency transformer is grounded, the inverting input terminal of the comparator receives the preset voltage threshold, the non-phase output terminal of the comparator is connected to the first input terminal of the shaping subcircuit, and the inverting output terminal of the comparator is connected to the second input terminal of the shaping subcircuit.

2. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The level differential signal includes a positive phase level signal and a negative phase level signal, and the comparator is used for: If the single-ended voltage signal is greater than or equal to the preset voltage threshold, the positive-phase level signal output by the in-phase output terminal of the comparator is a positive-phase high-level signal, and the negative-phase level signal output by the negative-phase output terminal of the comparator is a negative-phase high-level signal; If the single-ended voltage signal is less than the preset voltage threshold, the positive-phase level signal outputted by the in-phase output terminal of the comparator is a positive-phase low-level signal, and the negative-phase level signal outputted by the negative-phase output terminal of the comparator is a negative-phase low-level signal.

3. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The shaping subcircuit includes a D flip-flop, a delay line and a differential to single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is also connected to the reset terminal of the D flip-flop through the delay line, the inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit; Wherein, the D flip-flop is used for, when a rising edge of a clock is detected, the in-phase output terminal of the D flip-flop outputs a positive phase high level signal, and the in-phase output terminal of the D flip-flop outputs an inverted high level signal, and when the output high level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive phase low level signal, and the inverted output terminal of the D flip-flop outputs an inverted low level signal, and the preset time is determined by the length of the delay line, and the length of the delay line is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

4. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The shaping subcircuit includes a D trigger, a first resistor, a first capacitor and a differential to single-ended converter. The positive clock terminal of the D flip-flop is connected to the first input terminal of the shaping sub-circuit, the negative clock terminal of the D flip-flop is connected to the second input terminal of the shaping sub-circuit, the data terminal of the D flip-flop receives a high-level signal, the in-phase output terminal of the D flip-flop is connected to the in-phase input terminal of the differential-to-single-ended converter, and the in-phase output terminal of the D flip-flop is connected to the first end of the first resistor, the second end of the first resistor is connected to the reset terminal of the D flip-flop, the second end of the first resistor is also grounded through the first capacitor, the inverting output terminal of the D flip-flop is connected to the inverting input terminal of the differential-to-single-ended converter, and the output terminal of the differential-to-single-ended converter is connected to the output terminal of the shaping sub-circuit; Wherein, the D flip-flop is used for, when a rising edge of a clock is detected, the in-phase output terminal of the D flip-flop outputs a positive phase high level signal, and the in-phase output terminal of the D flip-flop outputs an inverted high level signal, and when the output high level signal reaches a preset time, the in-phase output terminal of the D flip-flop outputs a positive phase low level signal, and the inverted output terminal of the D flip-flop outputs an inverted low level signal, and the preset time is determined by the time constant of the first resistor and the first capacitor, and the time constant of the first resistor and the first capacitor is determined by the preset pulse width; The differential-to-single-ended converter is used to convert the differential level signal of a preset width output by the D flip-flop into a pulse signal of a preset pulse width.

5. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The shaping subcircuit is a monostable trigger subcircuit, and the monostable trigger subcircuit includes a timer, a resistor and a capacitor, or includes an operational amplifier, a resistor and a capacitor.

6. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The signal processing circuit further includes a threshold value adjustment circuit, the output end of the threshold value adjustment circuit is connected to the inverting input end of the comparator, and is used to provide a preset voltage threshold.

7. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The current-to-voltage converter is a cross-group amplifier with differential output.

8. The signal processing circuit for an electron multiplier according to claim 1, characterized in that: The turns ratio of the primary winding and the secondary winding of the RF transformer is determined by the output impedance of the current-to-voltage converter and the input impedance of the comparator.

9. A mass spectrometer, characterized in that It comprises an electron multiplier, a main control system and a signal processing circuit for the electron multiplier as described in any one of claims 1 to 8, wherein the output end of the electron multiplier is connected to the in-phase input end of the current-to-voltage converter in the signal processing circuit, and the output end of the shaping subcircuit in the signal processing circuit is connected to the input end of the main control system.

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