Membrane filter isolation coupler and method of manufacture
By designing a MEMS filter isolation coupler, utilizing MEMS three-dimensional multilayer silicon-based technology and silicon-based stripline structure, the problem of signal crosstalk in radio frequency devices was solved, achieving high power capacity, full electromagnetic shielding, and miniaturization.
Patent Information
- Application Number
- CN202510183082.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-19
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-02-19
AI Technical Summary
After traditional RF devices are assembled, signal crosstalk is likely to occur between the devices, interfering with signal transmission quality. Furthermore, assembly efficiency is low and consistency is poor.
A MEMS filter isolation coupler is adopted, utilizing the unique three-dimensional multilayer silicon-based process of MEMS to design a silicon-based stripline and multilayer substrate integrated waveguide structure. The metal circuit is formed by connecting the lower silicon wafer and the upper silicon wafer, realizing the circuit cascading optimization between devices, and adopting a full electromagnetic shielding design.
It improves the miniaturization, high power capacity, and full electromagnetic shielding anti-interference capability of the RF system, reduces overall loss, and achieves electrical performance optimization and miniaturization between devices.
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Figure CN119742558B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of radio frequency MEMS passive devices, and more particularly to a MEMS filter isolation coupler and a processing method. BACKGROUND
[0002] Current communication equipment is developing towards miniaturization, high efficiency, anti-interference, energy saving and efficiency improvement, etc., and the radio frequency devices in the transceiver assembly are urgently required to be integrated, high power, high performance and fully electromagnetic shielded. The miniaturization and integration of radio frequency devices can effectively reduce the complexity and volume of communication equipment and improve the integration and portability of the equipment. The high power and high performance of radio frequency devices directly improve the power and efficiency of the transceiver assembly, which helps to improve the coverage range and communication quality of the communication equipment. The full electromagnetic shielding of radio frequency devices can reduce signal leakage and external noise interference, protect the communication equipment from external interference, ensure the stability of radio frequency signal transmission, and thus improve the reliability of the entire radio frequency system.
[0003] The isolator is used in the transmitting assembly of the communication equipment, and plays a role of one-way transmission, absorbing reflected protection power amplifier, and improving the output characteristics of the latter stage. The coupler couples the transmitting power in the transmitting assembly, and plays a role of power monitoring and signal analysis. The filter retains signals within a specific frequency band and filters out unnecessary signals outside the specific frequency, thereby improving the signal-to-noise ratio of the communication system.
[0004] In the traditional case, the transceiver assembly is assembled by micro-assembly processes such as gold wire bonding, chip bonding and welding, etc. The advantages are simple process, and the disadvantages are low assembly efficiency, easy to produce assembly error, poor consistency, especially no special electromagnetic shielding treatment between devices, which is very easy to cause signal mutual crosstalk in high power operation, interfere with signal transmission quality, and even seriously deteriorate the electrical performance of the assembly. SUMMARY
[0005] The purpose of the present application is to provide a MEMS filter isolation coupler and a processing method, which aims to solve the problem that after the assembly of the traditional radio frequency devices, signal mutual crosstalk easily occurs between the devices, which interferes with the signal transmission quality.
[0006] To achieve the above object, the technical scheme adopted by the present application is: a MEMS filter isolation coupler is provided, comprising a metal carrier, a silicon chip and a magnetic steel; the silicon chip comprises a lower silicon wafer and an upper silicon wafer which are superimposed, the lower surface of the lower silicon wafer is connected with the metal carrier, the lower end of the lower silicon wafer is provided with a downward-opening mounting groove, and the mounting groove is used for accommodating a spin magnetic ferrite; the lower silicon wafer and the upper silicon wafer are longitudinally connected and a metal circuit is formed between the two; the metal circuit comprises a filter functional circuit, an isolator functional circuit and a coupler functional circuit; the lower silicon wafer and the upper silicon wafer both have a metallized via along the thickness direction, and the metallized via is used for connecting the metal circuit; and the magnetic steel is bonded to the upper end surface of the upper silicon wafer.
[0007] As another embodiment of the present application, the lower surface of the lower silicon wafer has a lower end metal ground pattern, and the metal ground pattern is used for connecting the metal carrier.
[0008] The upper surface of the lower silicon wafer has a lower end circuit metal pattern, the lower surface of the upper silicon wafer has an upper end circuit metal pattern, and the lower end circuit metal pattern and the upper end circuit metal pattern are bonded and connected to form the metal circuit.
[0009] The upper surface of the upper silicon wafer has an upper end metal ground pattern.
[0010] As another embodiment of the present application, the metal circuit is connected with a thin film resistor, and the thin film resistor is located between the lower silicon wafer and the upper silicon wafer.
[0011] As another embodiment of the present application, the metallized via comprises a lower end through hole penetrating through the lower silicon wafer and an upper end through hole penetrating through the upper silicon wafer, the lower end through hole is connected with the lower end metal ground pattern and the metal circuit, and the upper end through hole is connected with the upper end metal ground pattern and the metal circuit.
[0012] As another embodiment of the present application, the lower end through hole comprises a first lower end through hole and a second lower end through hole, the upper end of the first lower end through hole is connected with the upper end through hole, and the upper end of the second lower end through hole is connected with the metal circuit.
[0013] As another embodiment of the present application, the cross section of the metallized via is circular, and the inner diameter of the metallized via gradually decreases in the direction towards the metal circuit.
[0014] As another embodiment of the present application, the depth of the mounting groove is 0.6-0.85 times the thickness of the lower silicon wafer.
[0015] The MEMS filter isolation coupler has the advantages that, compared with the prior art, the MEMS filter isolation coupler utilizes the three-dimensional multilayer silicon-based process of MEMS, adopts the silicon-based strip line and multilayer substrate integrated waveguide structure, and has higher power capacity and full electromagnetic shielding effect, effectively solves the problems of complex communication equipment and serious electromagnetic environment interference, improves the miniaturization, high power capacity and full electromagnetic shielding anti-interference ability of the radio frequency system, realizes the circuit cascade optimization between devices, reduces the overall size while improving the electrical performance and reducing the overall loss, and realizes the miniaturization of the MEMS filter isolation coupler.
[0016] A MEMS filter isolation coupler processing method is also provided, comprising the following steps:
[0017] S1, preparing a lower silicon wafer:
[0018] etching a mounting groove and a lower end through hole on the lower silicon wafer, preparing a lower end circuit metal pattern, a metal ground and a thin film resistor of a filter function / isolator function / coupler function on the upper surface of the lower silicon wafer, and preparing a lower end metal ground pattern on the lower surface;
[0019] S2, preparing an upper silicon wafer:
[0020] etching an upper end through hole on the upper silicon wafer, preparing an upper end circuit metal pattern and a metal ground of a filter function / isolator function / coupler function on the lower surface of the upper silicon wafer, and preparing an upper end metal ground pattern on the upper surface;
[0021] S3, preparing a silicon chip:
[0022] stacking the upper silicon wafer on the upper end of the lower silicon wafer and performing wafer-level bonding;
[0023] S4, assembling the silicon chip:
[0024] mounting the gyromagnetic ferrite in the mounting groove, connecting the lower surface of the lower silicon wafer with the metal carrier, and pasting the upper surface of the upper silicon wafer with the magnetic steel.
[0025] As another embodiment of the application, the sidewalls of the lower end through hole and the upper end through hole are both treated by metallization to form metallized through holes.
[0026] As another embodiment of the application, in step S3, the bonded double-layer silicon wafer needs to be scribed to obtain a single filter isolation coupling chip.
[0027] The MEMS filter isolation coupler processing method has the advantages that: compared with the prior art, the MEMS filter isolation coupler processing method can conveniently prepare a stripline and a multilayer substrate integrated waveguide structure through cooperation of the lower silicon wafer and the upper silicon wafer, and the process is mature, simple and stable, and conducive to batch production of the MEMS filter isolation coupler. BRIEF DESCRIPTION OF DRAWINGS
[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.
[0029] Figure 1 The internal circuit principle diagram of the MEMS filter isolation coupler provided by the embodiments of the present application is shown in the figure.
[0030] Figure 2 The cross-sectional structure schematic diagram of the MEMS filter isolation coupler provided by the embodiments of the present application is shown in the figure.
[0031] Figure 3 The production process flow schematic diagram of the MEMS filter isolation coupler provided by the embodiments of the present application is shown in the figure.
[0032] Figure 4 The assembly flow schematic diagram of the MEMS filter isolation coupler provided by the embodiments of the present application is shown in the figure.
[0033] In the figure: 1, upper silicon wafer; 2, lower silicon wafer; 3, metal carrier; 4, gyromagnetic ferrite; 5, magnetic steel; 6, first lower end through hole; 7, second lower end through hole; 8, upper end through hole; 9, metal circuit; 10, upper end metal ground pattern; 11, lower end metal ground pattern; 12, mounting groove; 13, lower end circuit metal pattern; 14, upper end circuit metal pattern; 15, filter function circuit; 16, thin film resistor; 17, isolator function circuit; 18, coupler function circuit. DETAILED DESCRIPTION
[0034] In order to make the technical problems to be solved by the present application, the technical solutions and the beneficial effects more clear and explicit, the present application will be further described in detail in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.
[0035] Please refer to Figures 1 to 4The application provides a MEMS filter isolation coupler and a processing method thereof.
[0036] Compared with the prior art, the MEMS filter isolation coupler has higher power capacity, full electromagnetic shielding effect, and effectively solves the problems of complex communication equipment and serious electromagnetic environment interference, improves the miniaturization, high power capacity, full electromagnetic shielding and anti-interference ability of a radio frequency system, realizes the circuit cascade optimization between devices, improves the electrical performance, reduces the overall loss, and realizes the miniaturization of the MEMS filter isolation coupler.
[0037] Optionally, the metal carrier 3 is made of iron-nickel alloy, and functions as a magnetic matching and thermal stress matching ground carrier of the spin magnetic ferrite 4 and the filter isolation coupler silicon chip.
[0038] The lower surface of the lower silicon wafer 2 has a lower end metal ground pattern 11, and the upper surface of the lower silicon wafer 2 has a lower end circuit metal pattern 13; the lower surface of the upper silicon wafer 1 has an upper end circuit metal pattern 14, and the lower end circuit metal pattern 13 and the upper end circuit metal pattern 14 are bonded to form the metal circuit 9; and the upper surface of the upper silicon wafer 1 has an upper end metal ground pattern 10.
[0039] The upper surface of the lower silicon wafer 2 and the lower surface of the upper silicon wafer 1 are both provided with circuit metal patterns, and the two circuit metal patterns are longitudinally bonded to form the metal circuit 9.
[0040] The traditional radio frequency device process installation method is a micro assembly process, including welding, bonding and gold wire bonding interconnection of multiple chips, and has low assembly efficiency and millimeter-level or larger assembly error, which leads to poor index consistency. The MEMS filter isolation coupling chip, i.e., the above-mentioned silicon chip, is a compact cascade of three kinds of radio frequency circuit through the connection of the lower silicon wafer 2 and the upper silicon wafer 1, and the electrical performance is optimized in the silicon chip. The MEMS filter isolation coupling chip does not need to be debugged in the later stage, has high performance while reducing the volume, and has the characteristics of micron-level high precision, good index consistency and easy batch production.
[0041] The MEMS filter isolation coupling chip is based on a double-layer silicon wafer. The thermal conductivity of the silicon wafer is 140 W / (m*K). Common filters and couplers are based on ceramics or gallium arsenide, and the thermal conductivity is usually in the range of 20-50 W / (m*K). Compared with common ceramic or gallium arsenide radio frequency devices, the heat dissipation effect of the silicon wafer is better under power heat consumption. In addition, the radio frequency device adopts a silicon-based stripline and a multilayer substrate integrated waveguide structure, which has smaller electric field and magnetic field density compared with a microstrip structure. In particular, the maximum magnetic field strength of the multilayer substrate integrated waveguide structure is reduced by more than 50%, which significantly improves the power bearing capacity of the radio frequency device. Therefore, the MEMS filter isolation coupling chip has high power capacity.
[0042] In addition, the outermost surface of the MEMS filter isolation coupling chip is all metal, which has electromagnetic shielding characteristics, can significantly reduce signal leakage and external noise interference. The stripline and multilayer substrate integrated waveguide structure can be easily prepared by using the MEMS three-dimensional silicon process, which is mature, simple and stable.
[0043] Optionally, the MEMS filter isolation coupling chip is composed of a lower silicon wafer 2 and an upper silicon wafer 1. The thickness of the lower silicon wafer 2 and the upper silicon wafer 1 is 0.4mm-0.65mm, and the resistivity of the two silicon wafers is required to be greater than 3000Ω•cm.
[0044] In some possible embodiments, please refer to Figure 1 The metal circuit 9 is connected with a thin film resistor 16, and the thin film resistor 16 is located between the lower silicon wafer 2 and the upper silicon wafer 1. The thin film resistor 16 is a NiCr thin film or a TaN thin film.
[0045] The above-mentioned metal circuit 9 plays the function of an isolator, adopts a multilayer substrate integrated waveguide structure, magnetizes the gyromagnetic ferrite 4 by using an external magnetic steel 5, realizes non-reciprocal one-way transmission between the input port and the output port, outputs a working signal, and the third port is connected with a thin film resistor 16 to absorb the reverse signal.
[0046] The input port of the isolator structure is cascaded with a filter circuit, the filter circuit adopts a silicon-based stripline transmission line, and a selectable lambda / 4 or lambda / 2 resonator is used to realize the function of a band-pass filter through an interdigital or combline topology structure, so that the in-band working signal is normally transmitted and the out-of-band noise signal is suppressed.
[0047] The output port of the isolator structure is cascaded with a coupler circuit, the coupler circuit adopts a silicon-based stripline transmission line, and a narrow-side coupled transmission line topology structure is used to realize the function of a coupler, so that the working signal is transmitted through the through port and the coupled signal is output through the coupled port, and the coupled signal is used for monitoring the working signal power and signal analysis.
[0048] The three radio frequency devices are closely cascaded, the internal direct matching optimizes the telecommunication index, the high performance is achieved while the size is reduced, the micro-assembly debugging in the later stage is reduced, and the full electromagnetic shielding effect and high power capacity effect of the MEMS filter isolator coupler are achieved.
[0049] In some possible embodiments, referring to Figure 2 , the metallized via includes a lower end via penetrating through the lower silicon wafer 2 and an upper end via 8 penetrating through the upper silicon wafer 1, the lower end via is in communication with the lower end metal ground pattern 11 and the metal circuit 9, and the upper end via 8 is in communication with the upper end metal ground pattern 10 and the metal circuit 9. The shape of the metallized via is not limited and can be a circular hole, a square hole or a polygonal hole.
[0050] The lower end via penetrating through the lower silicon wafer 2 is used to connect the metal circuit 9 on the lower surface and the upper surface of the lower silicon wafer 2, and the upper end via 8 penetrating through the upper silicon wafer 1 is used to connect the metal circuit 9 on the lower surface and the upper surface of the upper silicon wafer 1.
[0051] The lower end via includes a first lower end via 6 and a second lower end via 7, the upper end of the first lower end via 6 is connected to the upper end via 8, and the upper end of the second lower end via 7 is connected to the metal circuit 9.
[0052] The upper end via 8 of the region of the stripline structure of the upper silicon wafer 1 is aligned with and in communication with the first lower end via 6.
[0053] When the cross section of the metallized via is circular, the inner diameter of the metallized via gradually decreases in the direction towards the metal circuit 9. The change in the inner diameter of the metallized via not only facilitates the manufacturing process, but also is conducive to adapting to the wiring density of the metal circuit 9. Since the wiring density of the metal circuit 9 is greater than the wiring density of the upper surface of the upper silicon wafer 1 and the wiring density of the lower surface of the lower silicon wafer 2, the metallized via is arranged as a variable-diameter hole to further adapt to the wiring of the two connected circuits, thereby improving the connection stability.
[0054] The depth of the mounting groove 12 is 0.6-0.85 times the thickness of the lower silicon wafer 2. The depth of the mounting groove 12 can be adjusted according to the design, and is generally between 0.6-0.85 times the thickness of the silicon wafer. The shape of the mounting groove 12 can be circular, square or polygonal. The sidewall of the mounting groove 12 is not metallized.
[0055] The application also provides a MEMS filter-isolator-coupler processing method, comprising the following steps:
[0056] S1, preparing a lower silicon wafer 2:
[0057] etching the mounting groove 12 and the metallized via on the lower silicon wafer 2, preparing the lower end circuit metal pattern 13, the metal ground and the thin film resistor 16 on the upper surface of the lower silicon wafer 2, and preparing the lower end metal ground pattern 11 on the lower surface;
[0058] S2, preparing an upper silicon wafer 1:
[0059] etching the metallized via on the upper silicon wafer 1, preparing the upper end circuit metal pattern 14 and the metal ground on the lower surface of the upper silicon wafer 1, and preparing the upper end metal ground pattern 10 on the upper surface;
[0060] S3, preparing a silicon chip:
[0061] stacking the upper silicon wafer 1 on the upper end of the lower silicon wafer 2 and performing wafer-level bonding;
[0062] S4, assembling the silicon chip:
[0063] mounting the gyromagnetic ferrite 4 in the mounting groove 12, connecting the lower surface of the lower silicon wafer 2 with the metal carrier 3, and pasting the upper surface of the upper silicon wafer 1 with the magnetic steel 5.
[0064] First, the lower silicon wafer 2 and the upper silicon wafer 1 are prepared, the circuit metal patterns of the lower silicon wafer 2 and the upper silicon wafer 1 are used to form a metal circuit 9 between them, the metal circuit 9 comprises a filter function circuit 15, an isolator function circuit 17 and a coupler function circuit 18 connected in sequence, and the metallized via is used to realize the connection of the metal circuit 9 with the circuits outside the upper silicon wafer 1 and the lower silicon wafer 2, thereby forming a silicon chip; and then the assembly of the silicon chip is used to realize the assembly of the filter-isolator-coupler.
[0065] Compared with the prior art, the MEMS filter-isolator-coupler processing method provided by the application can very conveniently prepare a stripline and a multilayer substrate integrated waveguide structure through the cooperation of the lower silicon wafer 2 and the upper silicon wafer 1, and the process is mature, simple and stable, and is beneficial to the batch production of the MEMS filter-isolator-coupler.
[0066] In steps S1 and S2, the side walls of the lower end through hole and the upper end through hole 8 are both treated by metallization to form a metallized via.
[0067] For step S1, the preparation steps of the lower silicon wafer 2 are as follows:
[0068] First, a mounting groove 12 of a specific depth is etched on the lower surface of the lower silicon wafer 2, and the groove opening of the mounting groove 12 faces downward. A plurality of silicon vias are etched in the thickness direction of the lower silicon wafer 2, which are generally circular holes or square holes.
[0069] Then, the metal circuit 9, metal ground, thin film resistor 16, etc. of the filter function / isolator function / coupler function are prepared on the upper surface of the lower silicon wafer 2; and the metal ground pattern is prepared on the lower surface of the lower silicon wafer 2.
[0070] Next, the side wall of the lower end through hole of the lower silicon wafer 2 is treated by metallization, and the lower end through hole realizes the electrical connection of the upper and lower surface metal circuits 9 of the lower silicon wafer 2. The inner side wall of the mounting groove 12 does not need to be treated during the metallization process.
[0071] For step S2, the preparation steps of the upper silicon wafer 1 are as follows:
[0072] First, a plurality of silicon vias are etched in the thickness direction of the upper silicon wafer 1, which are generally circular holes or square holes. The silicon vias of the stripline structure region are aligned with the positions of the first lower end through hole 6 of the lower silicon wafer 2.
[0073] Then, the metal circuit 9, metal ground, etc. of the filter function / isolator function / coupler function are prepared on the lower surface of the upper silicon wafer 1; and the metal ground pattern is prepared on the upper surface of the upper silicon wafer 1.
[0074] Next, the side wall of the upper end through hole 8 of the upper silicon wafer 1 is treated by metallization, and the upper end through hole 8 realizes the electrical connection of the upper and lower surface metal circuits 9 of the upper silicon wafer 1.
[0075] In step S3, the bonded double-layer silicon wafer needs to be scribed to obtain a single filter isolation coupling chip.
[0076] For step S3, the upper silicon wafer 1 and the lower silicon wafer 2 are wafer-level bonded to form a silicon-based MEMS filter isolation coupling chip structure wafer. The double-layer silicon wafer is scribed to obtain a single silicon-based MEMS filter isolation coupling chip.
[0077] For step S4, the single silicon-based MEMS filter-isolator-coupler chip obtained in step S3 is assembled. The spin-magnetic ferrite 4 is placed in the mounting groove 12 and is heterogeneously integrated with the lower silicon wafer 2. The magnetic steel 5 is bonded to the upper surface of the upper silicon wafer 1 above the isolator functional circuit 17, and the assembly of the silicon-based MEMS filter-isolator-coupler is completed.
[0078] The above description is merely preferred embodiments of the present application, and is not used to limit the present application. Any modification, equivalent replacement and improvement made in the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. MEMS filter isolation coupler, characterized in that, The invention comprises a metal carrier (3), a silicon chip and a magnetic steel (5); the silicon chip comprises a stacked lower silicon wafer (2) and an upper silicon wafer (1); the lower surface of the lower silicon wafer (2) is connected to the metal carrier (3); the lower end of the lower silicon wafer (2) is provided with a mounting groove (12) with an opening facing downwards, the mounting groove (12) is used to accommodate a rotating magnetic ferrite (4), and the side wall of the mounting groove is not metallized; the lower silicon wafer (2) and the upper silicon wafer (1) are longitudinally connected and a metal circuit (9) is formed therebetween, the metal circuit (9) comprises a filter function circuit (15), an isolator function circuit (17) and a coupler function circuit (18); the lower silicon wafer (2) and the upper silicon wafer (1) both have metallized vias along the thickness direction, the metallized vias are used to connect the metal circuit (9); the magnetic steel (5) is bonded to the upper end surface of the upper silicon wafer (1); The lower surface of the lower silicon wafer (2) has a lower metal ground pattern (11), and the metal ground pattern is used to connect the metal carrier (3); the upper surface of the lower silicon wafer (2) has a lower circuit metal pattern (13), and the lower surface of the upper silicon wafer (1) has an upper circuit metal pattern (14), and the lower circuit metal pattern (13) and the upper circuit metal pattern (14) are bonded to form the metal circuit (9); the upper surface of the upper silicon wafer (1) has an upper metal ground pattern (10); The metallized via comprises a lower through hole penetrating the lower silicon wafer (2) and an upper through hole (8) penetrating the upper silicon wafer (1); the lower through hole connects the lower metal ground pattern (11) and the metal circuit (9); the upper through hole (8) connects the upper metal ground pattern (10) and the metal circuit (9); the cross section of the metallized via is circular, and the inner diameter of the metallized via gradually decreases toward the metal circuit (9).
2. The MEMS filter isolation coupler according to claim 1, wherein: The metal circuit (9) is connected to a thin film resistor (16), and the thin film resistor (16) is located between the lower silicon wafer (2) and the upper silicon wafer (1).
3. The MEMS filtering isolation coupler according to claim 1, wherein: The lower end through hole comprises a first lower end through hole (6) and a second lower end through hole (7), the upper end of the first lower end through hole (6) is connected to the upper end through hole (8), and the upper end of the second lower end through hole (7) is connected to the metal circuit (9).
4. The MEMS filtering isolation coupler according to claim 1, wherein: The depth of the mounting groove (12) is 0.6-0.85 times the thickness of the lower silicon wafer (2).
5. A method for processing a MEMS filter isolation coupler, characterized in that: The following steps are involved: S1. Prepare the lower silicon wafer (2): Etching a mounting groove (12) and a lower through hole on the lower silicon wafer (2), preparing a lower circuit metal pattern (13), a metal ground, and a thin film resistor (16) for filter function / isolator function / coupler function on the upper surface of the lower silicon wafer (2), and preparing a lower metal ground pattern (11) on the lower surface; S2. Preparing an upper silicon wafer (1): Etching an upper through hole (8) on the upper silicon wafer (1), preparing an upper circuit metal pattern (14) and a metal ground for a filter function / isolator function / coupler function on the lower surface of the upper silicon wafer (1), and preparing an upper metal ground pattern (10) on the upper surface; S3. Preparation of silicon chip: Overlaying an upper silicon wafer (1) on the upper end of a lower silicon wafer (2) and performing wafer-level bonding; S4. Assembling silicon chip: The rotating magnetic ferrite (4) is installed in the above-mentioned installation groove (12), the lower surface of the lower silicon wafer (2) is connected to the metal carrier (3), and the upper surface of the upper silicon wafer (1) is adhered to the magnetic steel (5); The lower surface of the lower silicon wafer (2) has a lower metal ground pattern (11), and the metal ground pattern is used to connect to the metal carrier (3); The upper surface of the lower silicon wafer (2) has a lower circuit metal pattern (13), the lower surface of the upper silicon wafer (1) has an upper circuit metal pattern (14), and the lower circuit metal pattern (13) and the upper circuit metal pattern (14) are bonded to form a metal circuit (9); The upper surface of the upper silicon wafer (1) has an upper metal ground pattern (10); The metallized vias include a lower through hole penetrating the lower silicon wafer (2) and an upper through hole (8) penetrating the upper silicon wafer (1), wherein the lower through hole connects the lower metal ground pattern (11) and the metal circuit (9), and the upper through hole (8) connects the upper metal ground pattern (10) and the metal circuit (9); The cross section of the metallized via is circular, and the inner diameter of the metallized via gradually decreases toward the metal circuit.
6. The method for manufacturing a MEMS filter isolation coupler according to claim 5, wherein: The side walls of the lower through hole and the upper through hole (8) are both metallized to form metallized vias.
7. The method for manufacturing a MEMS filter isolation coupler according to claim 5, wherein: In step S3, the bonded double-layer silicon wafer needs to be diced to obtain individual filter isolation coupling chips.
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