A printed circuit board and a method of manufacturing the same

By employing sidewall metallized blind slots and vias in printed circuit boards to isolate signal and power layers, the problem of wasted resources in signal layer wiring density and power efficiency is solved, achieving cost reduction and signal transmission integrity, and meeting ESG sustainability goals.

CN119743892BActive Publication Date: 2026-03-27DELTON TECH (GUANGZHOU) INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing technologies, while increasing the wiring density and effective power supply of signal layers on server printed circuit boards, suffer from resource waste, high operating costs, and environmental problems, making it difficult to meet ESG sustainability goals.

Method used

The design employs blind slots and through-holes with sidewall metallization to isolate the signal layer and power layer. The signal layer and power layer are on the same layer but spaced apart, with the power layer being thicker than the signal layer. The use of copper material is optimized through local acid etching and copper reduction processes.

Benefits of technology

It reduces costs, ensures the integrity of signal transmission, avoids crosstalk, reflection and electromagnetic interference between the power layer and the signal layer, and achieves stability of high-density wiring and high-current power supply.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a printed circuit board and a preparation method thereof. The printed circuit board comprises a core plate including a shielding layer, a first prepreg, a signal layer and a power supply layer; the first prepreg is located on the side of the shielding layer away from the first combined plate, and the signal layer and the power supply layer are arranged in the same layer and are spaced apart; in the first direction, the thickness of the power supply layer is greater than the thickness of the signal layer; the signal layer is located in the central region of the core plate, and the power supply layer is located on both sides of the signal layer; a sidewall metallized blind groove is arranged between the signal layer and the power supply layer, and the sidewall metallized blind groove is used for isolating the signal layer and the power supply layer; a sidewall metallized through hole is arranged at the middle position of the central region of the core plate, and the through hole penetrates the first combined plate, the second combined plate and at least one core plate. The application can reduce the cost and ensure the integrity of signal transmission.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a printed circuit board and a preparation method thereof. BACKGROUND

[0002] In order to improve the wiring density of the server printed circuit board (PCB) signal layer and effectively supply power to the components, the signal layer and the power layer circuit are usually realized by adopting local acid etching and copper reduction on the basis of the pattern transfer of a 2OZ thick copper core board, which brings about resource waste, operation cost and environmental protection problems, and is contrary to the sustainable development goal of Environmental, Social and Governance (ESG). SUMMARY

[0003] The present application provides a printed circuit board and a preparation method thereof, which can reduce the cost and ensure the integrity of signal transmission.

[0004] According to an aspect of the present application, a printed circuit board is provided, comprising:

[0005] a first combination board, a second combination board and at least one core board; the at least one core board is located between the first combination board and the second combination board;

[0006] The core board comprises a shielding layer, a first prepreg, a signal layer and a power layer; the first prepreg is located on a side of the shielding layer away from the first combination board; the signal layer is located on a side of the first prepreg away from the shielding layer, the signal layer and the power layer are in the same layer and are arranged in a spaced manner, and along a first direction, the thickness of the power layer is greater than the thickness of the signal layer; the signal layer is located in a central region of the core board, and the power layer is located on both sides of the signal layer; wherein the first direction is a direction in which the first combination board points to the second combination board;

[0007] A sidewall-metallized blind groove is arranged between the signal layer and the power layer, and the sidewall-metallized blind groove is used for isolating the signal layer and the power layer;

[0008] A sidewall-metallized through hole is arranged at a middle position of the central region of the core board, and the through hole penetrates the first combination board, the second combination board and the at least one core board.

[0009] Optionally, the at least one core board comprises a first core board and a second core board; the second core board is located on a side of the first core board away from the first combination board;

[0010] A second prepreg is arranged between the first core board and the second core board, the second prepreg covers the signal layer and the power layer of the first core board and part of the first prepreg, and is in contact with the shielding layer of the second core board;

[0011] The sidewall metallized blind groove comprises a first blind groove and a second blind groove; the first blind groove is located between a signal layer and a power supply layer of the first core plate, and the first blind groove penetrates through a surface of the first combination plate away from the second combination plate to be flush with the power supply layer of the first core plate away from the surface of the first combination plate; the second blind groove is located between a signal layer and a power supply layer of the second core plate, and the second blind groove penetrates through a surface of the second combination plate away from the first combination plate to be flush with the signal layer of the second core plate away from the surface of the second combination plate.

[0012] Optionally, the first combination plate comprises a plurality of first sub-plates stacked, each first sub-plate comprising a first metal layer and a third prepreg, the first metal layer being located on a side of the third prepreg away from the core plate;

[0013] The second combination plate comprises a plurality of second sub-plates stacked, each second sub-plate comprising a second metal layer and a fourth prepreg, the second metal layer being located on a side of the fourth prepreg away from the core plate;

[0014] Along the first direction, the odd-numbered metal layers are signal layers, and the even-numbered metal layers are shielding layers.

[0015] Optionally, along the first direction, the thickness of the signal layer is less than the thickness of the shielding layer.

[0016] Optionally, the printed circuit board further comprises:

[0017] The metal block is located in the interior of the blind groove.

[0018] Optionally, the power supply layer comprises a third metal layer and a fourth metal layer, the fourth metal layer being located on a side of the third metal layer away from the first prepreg; the third metal layer has the same thickness as the signal layer of the core plate.

[0019] Optionally, along the second direction, the distance between the power supply layer of the core plate and the signal layer of the core plate is greater than or equal to 3 mil; wherein the second direction intersects the first direction. Optionally, along the first direction, the thickness of the power supply layer is greater than or equal to 40Z;

[0020] Along the first direction, the thickness of the first prepreg is greater than or equal to 4 mil.

[0021] According to another aspect of the present application, a method for manufacturing a printed circuit board is provided, comprising:

[0022] forming at least one core plate; the core plate comprises a shielding layer, a first prepreg, a signal layer and a power supply layer; the signal layer is located on a side of the first prepreg away from the shielding layer, the signal layer and the power supply layer are co-layered and spaced apart, along the first direction, the thickness of the power supply layer is greater than the thickness of the signal layer; the signal layer is located in a central region of the core plate, and the power supply layer is located on both sides of the signal layer;

[0023] forming a first combination plate and a second combination plate; the first prepreg is located on a side of the shielding layer away from the first combination plate; wherein the first direction is a direction in which the first combination plate points to the second combination plate;

[0024] pressing the first combination plate, the second combination plate and the at least one core plate;

[0025] forming a through hole; the through hole is located at a middle position of the central region of the core plate, and the through hole penetrates the first combination plate, the second combination plate and the at least one core plate;

[0026] forming a blind slot; the blind slot is located between the signal layer and the power supply layer;

[0027] forming a side wall metallized through hole;

[0028] forming a side wall metallized blind slot; the side wall metallized blind slot is used for isolating the signal layer and the power supply layer.

[0029] Optionally, forming the at least one core plate comprises:

[0030] forming the shielding layer, the first prepreg and the signal metal layer which are sequentially stacked;

[0031] forming a first dry film on a side of the signal metal layer away from the first prepreg;

[0032] patterning the first dry film;

[0033] etching the signal metal layer through the patterned first dry film to form the signal layer and a third metal layer; the third metal layer has the same thickness as the signal layer of the core plate;

[0034] removing the first dry film;

[0035] forming a second dry film on a side of the signal layer away from the first prepreg;

[0036] patterning the second dry film, and the second dry film exposes the third metal layer;

[0037] forming a fourth metal layer on a side of the third metal layer away from the first prepreg; the third metal layer and the fourth metal layer are the power supply layer.

[0038] The printed circuit board provided by the technical scheme of the embodiment of the present application comprises: a first combined board, a second combined board and at least one core board; the at least one core board is located between the first combined board and the second combined board; the core board comprises a shielding layer, a first prepreg, a signal layer and a power supply layer; the first prepreg is located on a side of the shielding layer away from the first combined board; the signal layer is located on a side of the first prepreg away from the shielding layer, the signal layer and the power supply layer are arranged in the same layer and are spaced apart, and along a first direction, the thickness of the power supply layer is greater than the thickness of the signal layer; the signal layer is located in a central region of the core board, and the power supply layer is located on both sides of the signal layer; wherein the first direction is a direction in which the first combined board points to the second combined board; a side-wall-metallized blind groove is arranged between the signal layer and the power supply layer, and the side-wall-metallized blind groove is used for isolating the signal layer and the power supply layer; a side-wall-metallized through hole is arranged at a middle position of the central region of the core board, and the through hole penetrates through the first combined board, the second combined board and the at least one core board.

[0039] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0041] Figure 1 It is a structure schematic diagram of a printed circuit board provided by the embodiment of the present application.

[0042] Figure 2 It is a structure schematic diagram of a core board provided by the embodiment of the present application.

[0043] Figure 3 It is a flow chart of a preparation method of a printed circuit board provided by the embodiment of the present application.

[0044] Figure 4 It is an intermediate structure schematic diagram of a printed circuit board provided by the embodiment of the present application.

[0045] Figure 5 is Figure 3 A refinement of the flow chart included in S110. DETAILED DESCRIPTION

[0046] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme in the embodiments of the present application will be clearly and completely described below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present application.

[0047] It should be noted that the terms "first", "second", and the like in the present application are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0048] The present application provides a printed circuit board, Figure 1 is a structural schematic diagram of a printed circuit board provided by the embodiments of the present application, Figure 2 is a structural schematic diagram of a core board provided by the embodiments of the present application, referring to Figure 1 and Figure 2 The printed circuit board comprises:

[0049] The first combination board 100, the second combination board 200 and at least one core board 300; the at least one core board 300 is located between the first combination board 100 and the second combination board 200;

[0050] The core board 300 comprises a shielding layer 31, a first prepreg 32, a signal layer 33 and a power supply layer 34; the first prepreg 32 is located on a side of the shielding layer 31 away from the first combination board 100; the signal layer 33 is located on a side of the first prepreg 32 away from the shielding layer 31, the signal layer 33 and the power supply layer 34 are co-layered and spaced apart, along a first direction X, the thickness of the power supply layer 34 is greater than the thickness of the signal layer 33; the signal layer 33 is located in a central region of the core board 300, and the power supply layer 34 is located on both sides of the signal layer 33; wherein the first direction X is a direction in which the first combination board 100 points to the second combination board 200;

[0051] A sidewall-metallized blind groove 35 is arranged between the signal layer 33 and the power supply layer 34, and the sidewall-metallized blind groove 35 is used to isolate the signal layer 33 and the power supply layer 34; a sidewall-metallized via hole 36 is arranged at the middle position of the central region of the core plate 300, and the via hole 36 penetrates the first combined plate 100, the second combined plate 200 and the at least one core plate 300.

[0052] The first combined plate 100 and the second combined plate 200 are both multilayer plates, and the first combined plate 100 and the second combined plate 200 can transmit signals and perform crosstalk shielding; the signal layer 33 is used to transmit signals, and the shielding layer 31 is a ground layer and is used to shield interference; the thicknesses of the signal layer 33 and the shielding layer 31 are different, the thickness of the shielding layer 31 can be greater than the thickness of the signal layer 33, and the shielding effect of the shielding layer 31 can be better, and the integrity of signal transmission can be ensured.

[0053] The signal layer 33 and the power supply layer 34 are arranged in the same layer, the wiring density of the printed circuit board can be improved, and effective power supply can be performed, along the first direction X, the thickness of the power supply layer 34 is greater than the thickness of the signal layer 33, and the thickness of the power supply layer 34 can be greater than 40Z, so that large-current power supply can be ensured; the material of the signal layer 33 and the power supply layer 34 can be a copper layer; the process design can be performed by forming a thin signal layer on the first prepreg 32, performing local acid etching to make dense signal lines, and then using a semi-additive method to make a thick power supply layer 34 at the position of the power supply layer 34 in the same layer, the copper material can be avoided to be wasted, the cost can be reduced, and the overall pattern etching factor can be controlled to meet the standard while ensuring that the large-current power supply function of the PCB is not affected.

[0054] Based on the signal integrity problems such as crosstalk, reflection and electromagnetic interference between the power layer 34 and the signal layer 33 in the same layer when the signal is transmitted at high speed, a sidewall metallized blind groove 35 is arranged between the signal layer 33 and the power layer 34. Exemplarily, along the second direction Y, the sidewall metallized blind groove 35 penetrating through the first combined plate 100 can penetrate from the surface of the first combined plate 100 away from the second combined plate 200 to the surface of the power layer 34 away from the first combined plate 100; the sidewall metallized blind groove 35 penetrating through the second combined plate 200 can penetrate from the surface of the second combined plate 200 away from the first combined plate 100 to the surface of the signal layer 33 away from the second combined plate 200; so that the sidewall metallized blind groove 35 completely isolates the power layer 34 and the signal layer 33, avoids the signal integrity problems such as crosstalk, reflection and electromagnetic interference between the power layer 34 and the signal layer 33 in the same layer, and ensures the integrity of signal transmission. The sidewall metallized via hole 36 is arranged at the middle position of the center area of the core plate 300, and the via hole 36 penetrates through the first combined plate 100, the second combined plate 200 and at least one core plate 300, so that the signals of the first combined plate 100, the second combined plate 200 and at least one core plate 300 can be electrically interconnected through the sidewall metallized via hole 36.

[0055] The printed circuit board provided by the technical scheme of the embodiment of the application comprises: a first combined board 100, a second combined board 200 and at least one core board 300; the at least one core board 300 is located between the first combined board 100 and the second combined board 200; the core board 300 comprises a shielding layer 31, a first prepreg 32, a signal layer 33 and a power supply layer 34; the first prepreg 32 is located on a side of the shielding layer 31 away from the first combined board 100; the signal layer 33 is located on a side of the first prepreg 32 away from the shielding layer 31, the signal layer 33 and the power supply layer 34 are arranged in the same layer and are spaced apart, the thickness of the power supply layer 34 is greater than the thickness of the signal layer 33 along a first direction X; the signal layer 33 is located in a central region of the core board 300, and the power supply layer 34 is located on both sides of the signal layer 33; wherein the first direction X is a direction in which the first combined board 100 points to the second combined board 200; a sidewall-metallized blind groove 35 is arranged between the signal layer 33 and the power supply layer 34, and the sidewall-metallized blind groove 35 is used for isolating the signal layer 33 and the power supply layer 34; a sidewall-metallized through hole 36 is arranged at a middle position of the central region of the core board 300, and the through hole 36 penetrates through the first combined board 100, the second combined board 200 and the at least one core board 300. The signal layer 33 and the power supply layer 34 are arranged in the same layer and are spaced apart, the thickness of the power supply layer 34 is greater than the thickness of the signal layer 33 along the first direction X; the cost can be reduced, and the PCB large-current power supply function can be ensured to be unaffected; the sidewall-metallized blind groove 35 is arranged between the signal layer 33 and the power supply layer 34, so that the sidewall-metallized blind groove 35 completely isolates the power supply layer 34 and the signal layer 33, signal integrity problems such as crosstalk, reflection and electromagnetic interference between the power supply layer 34 and the signal layer 33 in the same layer are avoided, and the integrity of signal transmission is ensured.

[0056] Optionally, with reference to Figure 1 , the at least one core board 300 comprises a first core board 301 and a second core board 302; the second core board 302 is located on a side of the first core board 301 away from the first combined board 100; a second prepreg 40 is arranged between the first core board 301 and the second core board 302, the second prepreg 40 covers the signal layer 33, the power supply layer 34 and part of the first prepreg 32 of the first core board 301, and is in contact with the shielding layer 31 of the second core board 302; the sidewall-metallized blind groove 35 comprises a first blind groove 351 and a second blind groove 352; the first blind groove 351 is located between the signal layer 33 and the power supply layer 34 of the first core board 301, and the first blind groove 351 penetrates through a surface of the first combined board 100 away from the second combined board 200 to be flush with a surface of the power supply layer 34 of the first core board 301 away from the first combined board 100; the second blind groove 352 is located between the signal layer 33 and the power supply layer 34 of the second core board 302, and the second blind groove 352 penetrates through a surface of the second combined board 200 away from the first combined board 100 to be flush with a surface of the signal layer 33 of the second core board 302 away from the second combined board 200.

[0057] Wherein, the first core plate 301 and the second core plate 302 are fixed by PIN-LAM alternately pre-laminated and then pressed, the first core plate 301 and the second core plate 302 can be fixed by PIN first, and then pressed, the pressed laminated structure is as shown in Figure 1 The second core plate 302 is located on the side of the first core plate 301 away from the first combination plate 100; the printed circuit board includes the first core plate 301 and the second core plate 302, and the two core plates can provide better signal isolation and reduce signal crosstalk; it can also accommodate more wiring lines, improve wiring density and signal layer number. The first blind groove 351 is through the surface of the first combination plate 100 away from the second combination plate 200 to the surface of the power layer 34 of the first core plate 301 away from the first combination plate 100; the second blind groove 352 is through the surface of the second combination plate 200 away from the first combination plate 100 to the surface of the signal layer 33 of the second core plate 302 away from the second combination plate 200, so that the sidewall metallized blind groove 35 completely isolates the power layer 34 and the signal layer 33, avoids the existence of crosstalk, reflection and electromagnetic interference between the power layer 34 and the same layer signal layer 33, and ensures the integrity of signal transmission.

[0058] Optionally, referring to Figure 1 The first combination plate 100 includes a plurality of first sub-plates 10 stacked, each first sub-plate 10 includes a first metal layer 11 and a third prepreg 12, the first metal layer 11 is located on the side of the third prepreg 12 away from the core plate 300; the second combination plate 200 includes a plurality of second sub-plates 20 stacked, each second sub-plate 20 includes a second metal layer 21 and a fourth prepreg 22, the second metal layer 21 is located on the side of the fourth prepreg 22 away from the core plate 300; along the first direction X, the odd metal layer is the signal layer, and the even metal layer is the shielding layer.

[0059] Wherein, Figure 1 There are L1-L20 total 20 layers in the The odd metal layer is the signal layer, and the even metal layer is the shielding layer, for example, L1, L3, L5, L7, L9, L11, L13, L15, L17 and L19 are signal layers, and L2, L4, L6, L8, L10, L12, L14, L16, L18 and L20 are shielding layers, which are used to shield other signal layer crosstalk and electromagnetic interference to ensure the integrity of signal transmission; L1 and L20 can use 17μm reverse treatment electrolytic copper foil (RTF), RTF is a copper foil with roughening treatment on both sides to different degrees, which can simultaneously strengthen the anti-peeling strength of both sides of the copper foil, making it easier to be attached as an intermediate layer with prepreg (Pre-Preg, PP) and dry film.

[0060] Optionally, along the first direction, the thickness of the signal layer is less than the thickness of the shielding layer.

[0061] The thickness of the signal layer is less than the thickness of the shielding layer, and the thickness of the shielding layer is relatively thick, which can better avoid crosstalk, reflection and electromagnetic interference between signals; the thickness of the signal layer is relatively thin, which can effectively control the impedance and insertion loss for signal transmission. For example, the thickness of the signal layer can be 10Z, and the thickness of the shielding layer can be 20Z.

[0062] Optionally, the printed circuit board further comprises: a metal block, the metal block being located inside the blind groove.

[0063] The metal block can be a copper block, and the blind groove with a side wall metalized can tightly fit the metal block to achieve a local heat dissipation effect, thereby effectively controlling the process heat dissipation and the working temperature of the PCB.

[0064] Optionally, with reference to Figure 2 The power supply layer 34 comprises a third metal layer 01 and a fourth metal layer 02, the fourth metal layer 02 being located on the side of the third metal layer 01 away from the first prepreg 32, and the third metal layer 01 has the same thickness as the signal layer 33 of the core plate 300.

[0065] The third metal layer 01 and the signal layer 33 of the core plate 300 are formed at the same time by the same preparation method and have the same material, so the third metal layer 01 and the signal layer 33 of the core plate 300 have the same thickness, and the fourth metal layer 02 is formed by an electroplating process. For example, the thickness of the signal layer 33 can be 10Z, and the thickness of the power supply layer 34 can be 40Z.

[0066] Optionally, along the second direction, the distance between the power supply layer of the core plate and the signal layer of the core plate is greater than or equal to 3 mil; the second direction intersects the first direction.

[0067] The distance between the power supply layer of the core plate and the signal layer of the core plate is greater than or equal to 3 mil, which can reduce the crosstalk, reflection and electromagnetic interference between the power supply layer of the core plate and the signal layer of the core plate, and facilitate the subsequent formation of the blind groove with a side wall metalized to ensure the integrity of signal transmission.

[0068] Optionally, along the first direction, the thickness of the power supply layer is greater than or equal to 40Z; along the first direction, the thickness of the first prepreg is greater than or equal to 4 mil.

[0069] The thickness of the power supply layer is greater than or equal to 40Z; for example, the thickness of the power supply layer is equal to 40Z, which can ensure large-current power supply; the thickness of the first prepreg is greater than or equal to 4 mil, which can provide better support and bonding effect to prevent delamination.

[0070] The embodiment of the present application provides a preparation method of a printed circuit board based on the above-mentioned embodiment, which is used for preparing the printed circuit board in any embodiment of the present application, Figure 3 It is a flow chart of the preparation method of the printed circuit board provided by the embodiment of the present application, Figure 4 It is a schematic diagram of an intermediate structure of the printed circuit board provided by the embodiment of the present application, referring to Figure 3 And Figure 4 The preparation method comprises the following steps:

[0071] S110, forming at least one core plate; the core plate comprises a shielding layer, a first prepreg, a signal layer and a power supply layer; the signal layer is located on the side of the first prepreg away from the shielding layer, the signal layer and the power supply layer are in the same layer and are arranged at intervals, along a first direction, the thickness of the power supply layer is greater than the thickness of the signal layer; the signal layer is located in the central region of the core plate, and the power supply layer is located on both sides of the signal layer.

[0072] Wherein, the first combination plate comprises a plurality of first sub-plates stacked, each first sub-plate comprises a first metal layer and a third prepreg, and the first metal layer is located on the side of the third prepreg away from the core plate; the second combination plate comprises a plurality of second sub-plates stacked, each second sub-plate comprises a second metal layer and a fourth prepreg, and the second metal layer is located on the side of the fourth prepreg away from the core plate; along the first direction, the odd metal layer is the signal layer, and the even metal layer is the shielding layer.

[0073] S120, forming the first combination plate and the second combination plate; the first prepreg is located on the side of the shielding layer away from the first combination plate; wherein the first direction is the direction in which the first combination plate points to the second combination plate.

[0074] S130, pressing the first combination plate, the second combination plate and the at least one core plate.

[0075] S140, forming a through hole; the through hole is located at the middle position of the central region of the core plate, and the through hole penetrates the first combination plate, the second combination plate and the at least one core plate.

[0076] S150, forming a blind slot; the blind slot is located between the signal layer and the power supply layer.

[0077] The at least one core plate can include a first core plate and a second core plate; the second core plate is located on a side of the first core plate away from the first combination plate; a second prepreg is arranged between the first core plate and the second core plate, the second prepreg covers the signal layer and the power supply layer of the first core plate and part of the first prepreg, and is in contact with the shielding layer of the second core plate; the side wall metallized blind groove includes a first blind groove and a second blind groove; the first blind groove is located between the signal layer and the power supply layer of the first core plate, and the first blind groove is penetrated from the surface of the first combination plate away from the second combination plate to the surface of the power supply layer of the first core plate away from the first combination plate; the second blind groove is located between the signal layer and the power supply layer of the second core plate, and the second blind groove is penetrated from the surface of the second combination plate away from the first combination plate to the surface of the signal layer of the second core plate away from the second combination plate.

[0078] S160, a side wall metallized via hole is formed.

[0079] S170, a side wall metallized blind groove is formed; the side wall metallized blind groove is used for isolating the signal layer and the power supply layer.

[0080] In the embodiment of the application, after the first combination plate, the second combination plate and the at least one core plate are formed, the first combination plate, the second combination plate and the at least one core plate are pressed, the copper is controlled by the copper reduction process to ensure that the etching factor of the outer layer circuit meets the standard, and after the structure in the step S140 is formed, Figure 4 After the structure in the step S140 is formed, the via hole is formed by mechanical drilling, and the blind groove is formed by depth control milling; the third dry film is used to cover the blind groove, the side wall metallized via hole is formed by first pattern electroplating, the side wall metal thickness of the via hole is 0.8 mil-1.0 mil; the third dry film is removed, and then the via hole is detected to detect the quality of the side wall metal of the via hole; the fourth dry film is used to cover the via hole, the side wall metallized blind groove is formed by second pattern electroplating, the side wall metal thickness of the blind groove is 4.8 mil-5 mil; the fourth dry film is removed, and then the blind groove is detected to detect the quality of the side wall metal of the blind groove; the fifth dry film is used to cover the required outer layer circuit pattern, the outer layer circuit is formed, and then automatic optical detection and artificial repair (AOI&VRS) are performed.

[0081] Optionally, Figure 5 is Figure 3 a detailed flowchart included in the step S110, referring to Figure 5 The step S110 of forming the at least one core plate includes:

[0082] S111, a shielding layer, a first prepreg and a signal metal layer are formed in sequence.

[0083] S112, a first dry film is formed on a side of the signal metal layer away from the first prepreg.

[0084] S113, the first dry film is patterned.

[0085] S114, etching the signal metal layer through the first dry film after patterning to form a signal layer and a third metal layer; the third metal layer has the same thickness as the signal layer of the core plate;

[0086] S115, removing the first dry film;

[0087] S116, forming a second dry film on the side of the signal layer away from the first prepreg;

[0088] S117, patterning the second dry film, and the second dry film exposes the third metal layer;

[0089] S118, forming a fourth metal layer on the side of the third metal layer away from the first prepreg; the third metal layer and the fourth metal layer are power supply layers.

[0090] The signal metal layer, the first prepreg and the signal layer are sequentially and layerwisely arranged, the thickness of the signal layer is 10Z, the first dry film is used to cover the signal metal layer, the thickness of the first dry film is 1mil-1.2mil, the third metal layer of the signal line and the power supply layer is etched by inner layer acid, the first dry film is removed, and inner layer automatic optical detection (AOI) is performed; the second dry film is used for signal layer protection, the third metal layer is exposed, and the thickness of the second dry film is 5mil-6mil; then the power supply layer is formed by pattern plating on the third metal layer, the thickness of the fourth metal layer of the power supply layer can be 4mil; the second dry film is removed, and then process quality control (IPQC) is performed.

[0091] After the first acid etching, considering that the prepreg and the dry film are the same high polymer material, a thick photoresist layer can be directly hot-pressed on the surface of the signal metal layer, exposed, and used to protect the signal layer circuit and expose the area of the power supply layer for electroplating thickening; after the power supply layer with a thickness of 40Z is formed by pattern plating with specific current density, plating time and waveform parameters, the film is removed to obtain a core plate with a local thick copper power supply layer and a signal layer. By designing the process of first making dense signal lines on the core plate and then making a 4OZ thick copper power supply layer on the same layer by using a semi-additive method, the overall pattern etching factor can be controlled to meet the standard while ensuring that the PCB large-current power supply function is not affected; by using the selective electroplating method to increase the copper thickness, the copper demand of the power supply core plate can be effectively reduced, and energy consumption and cost can be reduced. The preparation method provided by the technical scheme of the embodiment of the application proposes a local thick copper process flow for the inner layer of the PCB. The local thick copper process flow refers to that the power supply layer and the signal layer are arranged on the same layer, and the thickness of the power supply layer is greater than that of the signal layer. The number of press plates can be reduced, the processing steps can be shortened, the function of the PCB large-current stable output component can be ensured, the same layer matching design of the signal layer and the power supply layer can be realized, the signal line transmission integrity can be ensured, the specific copper thickness of the power supply layer can be formed, and the process heat dissipation and the PCB working temperature can be effectively controlled.

[0092] The preparation method of the printed circuit board provided by the technical scheme of the embodiment of the present application and the printed circuit board described in any embodiment of the present application have the same beneficial effects.

[0093] It should be understood that the various forms of flow shown above can be used to reorder, add or delete steps. For example, each step described in the present application can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical scheme of the present application can be achieved, which is not limited herein.

[0094] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent replacement and improvement within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A printed circuit board, characterized by, The application relates to a printed circuit board, which comprises: a first combination plate, a second combination plate and at least one core plate; the at least one core plate is located between the first combination plate and the second combination plate; the core plate comprises a shielding layer, a first prepreg, a signal layer and a power supply layer; the first prepreg is located on a side of the shielding layer away from the first combination plate; the signal layer is located on a side of the first prepreg away from the shielding layer, the signal layer and the power supply layer are arranged in the same layer and are spaced apart, along a first direction, the thickness of the power supply layer is greater than the thickness of the signal layer; the signal layer is located in a central region of the core plate, and the power supply layer is located on both sides of the signal layer; wherein the first direction is a direction in which the first combination plate points to the second combination plate; wherein the power supply layer is formed by local electroplating, along the first direction, the thickness of the power supply layer is greater than or equal to 40 OZ; and the thickness of the signal layer is 10 OZ; a side-wall-metallized blind groove is arranged between the signal layer and the power supply layer, and the side-wall-metallized blind groove is used for isolating the signal layer and the power supply layer; a side-wall-metallized through hole is arranged at a middle position of the central region of the core plate, and the through hole penetrates through the first combination plate, the second combination plate and the at least one core plate.

2. The printed circuit board of claim 1, wherein, The at least one core plate comprises a first core plate and a second core plate; the second core plate is located on a side of the first core plate away from the first combination plate; a second prepreg is arranged between the first core plate and the second core plate, the second prepreg covers the signal layer and the power supply layer of the first core plate and part of the first prepreg, and is in contact with the shielding layer of the second core plate; the side-wall-metallized blind groove comprises a first blind groove and a second blind groove; the first blind groove is located between the signal layer and the power supply layer of the first core plate, the first blind groove penetrates through a surface of the first combination plate away from the second combination plate to be flush with a surface of the power supply layer of the first core plate away from the first combination plate; the second blind groove is located between the signal layer and the power supply layer of the second core plate, and the second blind groove penetrates through a surface of the second combination plate away from the first combination plate to be flush with a surface of the signal layer of the second core plate away from the second combination plate.

3. The printed circuit board of claim 2, wherein, The first combination plate comprises a plurality of first sub-plates arranged in layers, each first sub-plate comprises a first metal layer and a third prepreg, and the first metal layer is located on a side of the third prepreg away from the core plate; The second combination plate comprises a plurality of second sub-plates arranged in layers, each second sub-plate comprises a second metal layer and a fourth prepreg, and the second metal layer is located on a side of the fourth prepreg away from the core plate; along the first direction, odd-numbered metal layers are signal layers, and even-numbered metal layers are shielding layers.

4. The printed circuit board of claim 3, wherein, along the first direction, the thickness of the signal layer is less than the thickness of the shielding layer.

5. The printed circuit board of claim 1, wherein, The application further relates to a printed circuit board, which comprises: a metal block located in the interior of the blind groove.

6. The printed circuit board of claim 1, wherein, The power supply layer comprises a third metal layer and a fourth metal layer, and the fourth metal layer is located on a side of the third metal layer away from the first prepreg; the third metal layer has the same thickness as the signal layer of the core plate.

7. The printed circuit board of claim 1, wherein, In the second direction, the distance between the power layer of the core board and the signal layer of the core board is greater than or equal to 3 mil; wherein the second direction and the first direction are perpendicular to each other.

8. The printed circuit board of claim 6, wherein, In the first direction, the thickness of the first prepreg is greater than or equal to 4 mil.

9. A method of manufacturing a printed circuit board, characterized by, Comprising: forming at least one core board; the core board comprises a shielding layer, a first prepreg, a signal layer and a power layer; the signal layer is located on the side of the first prepreg away from the shielding layer, the signal layer and the power layer are co-layered and spaced apart, in the first direction, the thickness of the power layer is greater than the thickness of the signal layer; the signal layer is located in the central region of the core board, and the power layer is located on both sides of the signal layer; wherein the power layer is formed by local electroplating, in the first direction, the thickness of the power layer is greater than or equal to 40Z; the thickness of the signal layer is 10Z; forming a first combination board and a second combination board; the first prepreg is located on the side of the shielding layer away from the first combination board; wherein the first direction is the direction in which the first combination board points to the second combination board; pressing the first combination board, the second combination board and the at least one core board; forming a via hole; the via hole is located in the middle position of the central region of the core board, and the via hole penetrates through the first combination board, the second combination board and the at least one core board; forming a blind slot; the blind slot is located between the signal layer and the power layer; forming a side wall metallized via hole; forming a side wall metallized blind slot; the side wall metallized blind slot is used to isolate the signal layer and the power layer.

10. The method of manufacturing a printed circuit board according to claim 9, wherein forming at least one core board, comprising: forming a shielding layer, a first prepreg and a signal metal layer which are sequentially stacked; forming a first dry film on the side of the signal metal layer away from the first prepreg; patternizing the first dry film; etching the signal metal layer through the patternized first dry film to form a signal layer and a third metal layer; the thickness of the third metal layer is the same as that of the signal layer of the core board; removing the first dry film; forming a second dry film on the side of the signal layer away from the first prepreg; patternizing the second dry film, which exposes the third metal layer; forming a fourth metal layer on the side of the third metal layer away from the first prepreg; the third metal layer and the fourth metal layer are power layers.

Citation Information

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