A synchronous energy storage system supporting AC impedance spectroscopy measurement

Abstract

The present invention discloses a synchronous energy storage system supporting AC impedance spectrum measurement. The present invention adopts full system clock synchronization, directly superimposes an excitation current on the steady-state current of the charge and discharge module, and the excitation current is directly transmitted to the connected battery module. At the same time, the host issues a synchronous detection command to each battery module to realize synchronous detection of the excitation current and the battery voltage, and realizes the measurement of the AC and DC impedance of the battery. The energy storage system of the synchronous detection method has no power loss, and the charge and discharge currents of all series-connected batteries are consistent, which does not affect the consistency of the battery. In addition, the present invention uses a clock-synchronized energy storage system, and can use a more efficient frequency synthesis method to generate a sinusoidal excitation current, and use the loop control module of the charge and discharge module to generate a drive signal, without the need for an additional excitation power supply system and a control circuit, with low cost, no impact on the consistency of the series-connected batteries, and good EMI / EMC performance.

Description

Technical Field

[0001] The invention relates to a synchronous energy storage system supporting AC impedance spectrum measurement, and belongs to the field of energy storage. Background Art

[0002] The EIS method is a non-destructive parameter measurement and an effective method for measuring battery kinetic behavior in energy storage systems. A small-amplitude sinusoidal excitation current with a frequency F is applied to the battery system. , the system generates a sine wave excitation response voltage of the same frequency The ratio of the response voltage to the excitation current at different rates is the impedance of the electrochemical system, namely EIS.

[0003] The current EIS detection mainly adopts local detection, which mainly includes the following two types: 1) The resistor SPWM discharge method is used to generate the excitation current. The local battery module is often used as the power source, and the resistor will generate heat, which is inefficient. At the same time, the working conditions of each battery module are slightly different, the component parameters are different, and the equivalent discharge energy is also different, resulting in inconsistency of the battery (string).

[0004] 2) Use bidirectional DCDC to charge and discharge the battery module. An external power supply or a battery module can be used as the power supply. This has high efficiency and low loss. However, because a large number of inductors and control circuits are required, interference is caused to the detection circuit, EMI / EMC performance is degraded, and the cost is high. At the same time, the working conditions of each battery module are slightly different, the component parameters are different, and the equivalent discharge energy is also different, resulting in inconsistency of the battery (string). Summary of the invention

[0005] The present invention provides a synchronous energy storage system supporting AC impedance spectrum measurement, which solves the problems disclosed in the background technology.

[0006] According to one aspect of the present disclosure, there is provided a synchronous energy storage system supporting AC impedance spectroscopy measurement, including a loop control module of a charging and discharging module, an analog front end of a battery monitoring and management module, and an operation module; Loop control module: uses the sampled charge and discharge current output by the charge and discharge module as a feedback signal, and generates a drive signal according to the feedback signal, the frequency-synthesized excitation current and the preset current value; wherein the drive signal is used to drive the charge and discharge module to deliver the charge and discharge current to the connected battery module; the charge and discharge current includes a steady-state current and an excitation current superimposed on the steady-state current; Analog front end: samples the battery voltage and obtains the excitation response voltage corresponding to the excitation current from the sampled battery voltage; Operation module: Calculate the AC impedance spectrum according to the excitation response voltage and excitation current, or upload the excitation response voltage and excitation current to the host computer / cloud to calculate the AC impedance spectrum; wherein, the excitation current is the excitation current for generating the drive signal or the excitation current collected by the analog front end, and the analog front end obtains the excitation current synchronously with the excitation response voltage.

[0007] In some embodiments of the present disclosure, when sampling the excitation response voltage and the excitation current, the excitation response voltage and the excitation current sampled at each moment are stored. After a preset number is stored, the calculation module reads the excitation response voltage and the excitation current in a time-sharing manner, and uses a compensation method to phase-calibrate the excitation response voltage and the excitation current. The AC impedance spectrum is calculated using the excitation response voltage and the excitation current after phase calibration.

[0008] In some embodiments of the present disclosure, the analog front-end module collects the voltage of a battery or collects the voltage of multiple batteries in a time-sharing manner. Multiple analog front-ends are connected to the same bus to form an analog front-end module. The analog front-end modules of the same battery module are cascaded through a bus cascade interface to form a cascade module. The operation module obtains the excitation response voltage through the cascade bus.

[0009] In some embodiments of the present disclosure, if the energy storage system is a compact / small energy storage system, the loop control module and the operation module are integrated in the same controller.

[0010] In some embodiments of the present disclosure, if the energy storage system is a separate energy storage system, the loop control module and the operation module are integrated in the controller of the host end, or the loop control module is integrated in the controller of the host end, and the operation module is integrated in the controller of the battery module end; If the loop control module and the operation module are integrated in a controller at the host end, the controller at the host end is connected to a first line transceiver, the cascade module is connected to a second line transceiver, the first line transceiver and the second line transceiver are connected to form a ring daisy chain or all the second line transceivers are connected in parallel to the first line transceiver; or, the controller at the host end is connected to a first line transceiver, and all the cascade modules are connected in parallel to the first line transceiver; If the loop control module is integrated in the controller on the host side and the operation module is integrated in the controller on the battery module side, the controller on the host side is connected to the first line transceiver, each cascade module is connected to the controller on the corresponding battery module side, and the controller on the battery module side is connected to the second line transceiver, and the first line transceiver and the second line transceiver are connected to form a ring daisy chain.

[0011] In some embodiments of the present disclosure, the analog front end includes a first PGA, a first ADC, a first low-pass filter, a first DAC, and a first MUX; The first PGA detects the battery voltage and receives the 0 data output by the first MUX, and outputs the battery voltage to the first ADC, the first ADC performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first MUX input; The first PGA detects the battery voltage and receives the steady-state voltage component output by the first MUX, and outputs an excitation response voltage to the first ADC after subtracting the two voltages. The first ADC performs ADC conversion on the excitation response voltage and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation.

[0012] In some embodiments of the present disclosure, the analog front end includes a first PGA, a first ADC, a first low-pass filter, a first DAC, and a first MUX; The first MUX first channel selects the battery voltage and outputs the battery voltage to the first ADC, the first ADC performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first PGA; The first PGA detects the battery voltage and receives the converted steady-state voltage component, subtracts the two voltages and outputs an excitation response voltage, which is used as another path input of the first MUX. The first MUX outputs the excitation response voltage to the first ADC, and the first ADC performs ADC conversion on the excitation response voltage and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation.

[0013] In some embodiments of the present disclosure, the analog front end includes a first PGA, a first ADC, a second ADC, a first low-pass filter, and a first DAC; The first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state component of the battery voltage, the first DAC performs DAC conversion on the steady-state component, the first PGA detects the battery voltage and receives the converted steady-state voltage component, the two voltages are subtracted and an excitation response voltage is output to the second ADC, the second ADC performs ADC conversion on the excitation response voltage, and the converted excitation response voltage is used as the excitation response voltage required for AC impedance spectrum calculation.

[0014] In some embodiments of the present disclosure, the analog front end includes a first ADC, a first subtractor, and a first low-pass filter; the first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state component of the battery voltage, and the first subtractor subtracts the converted battery voltage input at the positive terminal from the steady-state component input at the negative terminal to obtain an excitation response voltage required for AC impedance spectrum calculation.

[0015] In some embodiments of the present disclosure, in the energy storage system, the clocks of all modules are synchronized, and the synchronized clocks follow the main clock or reference clock of the main system in which the energy storage system is located; in the energy storage system, voltage sampling is synchronized based on the timing of current sampling, and a synchronization detection command is issued with the current crossing zero or reaching a preset amplitude as the starting point.

[0016] The beneficial effects achieved by the present invention are as follows: the present invention adopts full system clock synchronization, directly superimposes the excitation current on the steady-state current of the charge and discharge module, and the excitation current is directly transmitted to the connected battery module. At the same time, the host issues a synchronous detection command to each battery module to realize synchronous detection of the excitation current and the battery voltage, and realizes the measurement of the AC and DC impedance of the battery. The energy storage system of this synchronous detection method has no power loss, and the charge and discharge currents of all series-connected batteries are consistent, which does not affect the consistency of the batteries. In addition, the present invention uses a clock-synchronized energy storage system, which can use a more efficient frequency synthesis method to generate a sinusoidal excitation current, and uses the loop control module of the charge and discharge module to generate a drive signal. No additional excitation power supply system and control circuit are required, the cost is low, it does not affect the consistency of the series-connected batteries, and the EMI / EMC performance is good. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of a synchronous energy storage system to support AC impedance spectroscopy measurements; Figure 2 The schematic diagram of the loop control module using analog circuit processing; Figure 3 The schematic diagram of the loop control module using digital signal processing; Figure 4 This is the first structural diagram of the analog front-end module; Figure 5 This is the second structural diagram of the analog front-end module; Figure 6 This is the third structural diagram of the analog front-end module; Figure 7 This is the fourth structural diagram of the analog front-end module; Figure 8 This is a schematic diagram of the module package of the analog front end; Fig. 9A schematic diagram of collecting battery module voltage for multiple analog front-end modules; Fig.10 A schematic diagram of a single analog front-end module collecting the battery module voltage in time-sharing manner; Fig.11 It is a schematic diagram of an analog front-end module; Fig.12 This is a schematic diagram of the cascade connection of analog front-end modules; Fig.13 This is a schematic diagram of differential half-duplex cascade connection of analog front-end modules; Fig.14 A simplified differential half-duplex cascade connection diagram for the analog front-end module; Fig.15 for Fig.14 Schematic diagram of data transmission of links; Fig.16 This is a schematic diagram of the half-duplex cascade connection of the analog front-end module; Fig.17 This is the first structural diagram of the operation module; Fig.18 It is the second structural diagram of the operation module; Fig.19 is a schematic diagram of a line transceiver; Fig. 20 A schematic diagram of the connection between the line transceiver and the cascade module; Fig.21 A schematic diagram of the connection between the line transceiver, the computing module and the cascade module; Fig. 22 is a schematic diagram of a compact / small energy storage system; Fig.23 This is a schematic diagram of the first structure of a large energy storage system; Fig.24 It is a second structural schematic diagram of a large energy storage system; Fig.25 A schematic diagram of a communication port and a first line transceiver being connected in parallel. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is obvious that the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present disclosure and its application or use. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0019] Unless otherwise specified, the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure.

[0020] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0021] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0022] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0023] It should be noted that similar symbols and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it does not require further discussion in subsequent figures.

[0024] In order to solve the problems existing in the existing EIS detection, the present disclosure proposes a synchronous energy storage system that supports AC impedance spectroscopy measurement.

[0025] Figure 1 This is a schematic diagram of an embodiment of the energy storage system disclosed in the present invention, including a loop control module of a charging and discharging module, an analog front end of a battery monitoring and management module, and an operation module; in the figure, ① represents the loop control module, ② represents the charging and discharging module, ③ represents the battery, ④ represents the analog front end of the battery monitoring and management module, and ⑤ represents the operation module.

[0026] It should be noted that the charging and discharging module, that is, the bidirectional / unidirectional charging and discharging module is an existing module, which works in constant current mode or constant power mode. It can be a vehicle-mounted bidirectional OBC, energy storage PCS converter module, dual / unidirectional DCDC, dual / single-phase inverter and other power modules. The loop control module of the charging and discharging module is implemented by a controller with a built-in control program.

[0027] The loop control module of the embodiment can be a digital signal processing method or an analog circuit processing method. When in the stable charge and discharge mode, the loop control module generates a drive signal by comparing the preset current reference value; specifically, the charge and discharge current output by the sampled charge and discharge module is used as a feedback signal, and the excitation current synthesized according to the feedback signal, the frequency and the preset current value I ref, generating a driving signal, namely a PWM signal; wherein the driving signal is used to drive the charging and discharging module to deliver charging and discharging current to the connected battery module (specifically a battery string); the charging and discharging current includes a steady-state current and an excitation current superimposed on the steady-state current, the excitation current is a sinusoidal current or a pulse current, the amplitude of which must be less than or equal to one tenth of the steady-state current, the duration of the sinusoidal current includes several cycles of the sinusoidal wave or longer, and the pulse duration depends on the frequency range to be measured.

[0028] It should be noted that there are many ways to sample the charge and discharge current. As shown in the figure, the inductor Ls is connected to the positive output end of the charge and discharge module to sample the charge and discharge current passing through the inductor Ls. Here, the series inductor Ls can maintain current continuity and constant current, reducing current pulsation and high-order harmonics.

[0029] In the loop control module, the excitation current and the preset current value are superimposed, and the superimposed signal is compared with the feedback signal to generate an error signal, and a PWM drive signal is further generated according to the error signal. The power module in the charge and discharge module is driven by the PWM drive signal, so that the charge and discharge module outputs the charge and discharge current.

[0030] It should be noted that the control principle in the loop control module can be seen in Figure 2 The sine wave current output by the memory is amplified by K times to obtain the excitation current. The excitation current is related to I ref After superposition, DAC conversion is performed, and the current reference value converted by DAC is differentiated from the feedback signal (i.e., an error signal is generated) to further generate a PWM drive signal; wherein, K is a programmable signal, which depends on the actual charging and discharging current of the system, so that the magnitude of the excitation current is a small signal current relative to the steady-state current, and does not affect the state of the battery.

[0031] It should be noted that the control principle in the loop control module can be seen in Figure 3 , a sine wave generator is used to output a sine wave current of a specific frequency. The sine wave current is amplified by K times to obtain an excitation current. The excitation current and I ref The superimposed and filtered feedback signals are differentiated to obtain a differential error signal, and the differential error signal is filtered to generate a PWM drive signal.

[0032] The analog front end of the embodiment samples the battery voltage, and obtains the excitation response voltage corresponding to the excitation current and the steady-state voltage corresponding to the steady-state current from the sampled battery voltage.

[0033] It should be noted that, if necessary, the analog front end can collect other information, namely temperature information, current, etc., while collecting voltage information, such as obtaining the excitation current in the same and synchronous manner as obtaining the excitation response voltage.

[0034] It should be noted that the structure of the analog front end can be seen Figure 4 , including a first PGA, a first ADC, a first memory, a first low-pass filter, a first DAC and a first MUX. When detecting the battery voltage, the first PGA uses a preset gain (the gain here can be relatively low, such as 0.5) to detect the battery voltage and receive the 0 data output by the first MUX, and outputs the battery voltage to the first ADC, the first ADC performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first MUX; when detecting the excitation response voltage, the first PGA detects the battery voltage using a preset gain (the gain here can be relatively large, such as 32, 64, etc.) and receives the steady-state voltage component output by the first MUX, subtracts the two voltages and outputs the excitation response voltage to the first ADC, the first ADC performs ADC conversion on the excitation response voltage, and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation and stores it in the first memory.

[0035] It should be noted that the structure of the analog front end can be seen Figure 5 The analog front end includes a first PGA, a first ADC, a first memory, a first low-pass filter, a first DAC and a first MUX. When detecting the battery voltage, the first MUX selects the battery voltage through a channel and outputs the battery voltage to the first ADC. The first ADC performs ADC conversion on the battery voltage. The first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component. The first DAC performs DAC conversion on the steady-state voltage component and transmits the converted steady-state voltage component to the first PGA. When detecting the excitation response voltage, the first PGA detects the battery voltage and receives the converted steady-state voltage component. After subtracting the two voltages, the excitation response voltage is output and used as another channel input of the first MUX. The first MUX transmits the excitation response voltage to the first ADC. The first ADC performs ADC conversion on the excitation response voltage and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation and stores it in the first memory.

[0036] It should be noted that Figure 4 and Figure 5 It uses a single ADC (i.e., the first ADC) architecture, which requires time-sharing detection: During normal operation, the first ADC detects the battery voltage V BAT The voltage passes through a low-pass filter to obtain a steady-state voltage, and the steady-state voltage passes through the first DAC to obtain an analog steady-state voltage. , at this time the gain of the first PGA is small; when checking the excitation response voltage, the battery voltage V BAT Subtract the simulated steady-state voltage The excitation response voltage is obtained and amplified by the first PGA. At this time, the gain of the first PGA is relatively large. The first ADC continuously collects N points and the collected excitation response voltage Stored in the first memory; wherein the output of the first DAC can be in any form, and can also be a PWM wave.

[0037] It should be noted that Figure 4 The first MUX is located at the input of the first PGA and needs to detect V BAT When data “0” is selected, the first PGA input is V BAT -0=V BAT ; When the excitation response voltage needs to be detected, the first PGA input is , the first low-pass filter data is not updated or the data after insertion and weighting with the previous data, the first DAC output remains unchanged or changes slowly. Figure 5 The first MUX directly connects two input signals, one is V BAT , one is the output of the first PGA When the excitation response voltage needs to be detected, the first ADC detects two channels in time, which requires a higher speed; or Figure 4 How it works.

[0038] It should be noted that when the excitation current is a sinusoidal wave signal, the excitation response voltage is also a sinusoidal wave voltage signal. When sampling the excitation response voltage and the excitation current, the excitation response voltage and the excitation current sampled at each moment are stored. After the preset number is stored, the data of each series-connected battery is read in time slots to calculate the impedance respectively. Generally, data of N points are continuously sampled and stored to satisfy the Nyquist sampling theorem, and multiple cycles are sampled (commonly used are 512 points, 1024 points, etc., preferably including an integer number of excitation current cycles, that is, ensuring that more than 2 points are obtained in 1 cycle). Therefore, in order to store the sampled data, the capacity of the first memory is N×M, where M is the number of bits of the ADC; wherein the first memory can be a register, SRAM, or DRAM and other media.

[0039] It should be noted that the structure of the analog front end can be seen Figure 6The analog front end includes a first PGA, a first ADC, a second ADC, a first memory, a first low-pass filter and a first DAC. When detecting the battery voltage, the first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a voltage steady-state component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first PGA; when detecting the excitation response voltage, the first PGA detects the battery voltage and receives the converted steady-state voltage component, subtracts the two voltages and outputs the excitation response voltage to the second ADC, the second ADC performs ADC conversion on the excitation response voltage, and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation and stores it in the first memory.

[0040] It should be noted that Figure 6 A dual ADC architecture is used, one detects the battery voltage and the other detects the excitation response voltage. The two do not affect each other, so parallel or synchronous detection can be used.

[0041] It should be noted that the structure of the analog front end can be seen Figure 7 The analog front end includes a first ADC, a first subtractor, a first low-pass filter and a first memory; the first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state component of the battery voltage, and the first subtractor subtracts the converted battery voltage input at the positive terminal from the steady-state component input at the negative terminal to obtain an excitation response voltage required for AC impedance spectrum calculation and stores it in the first memory.

[0042] It should be noted that the analog front end can be a Figure 8 The package module shown in the figure contains 6 external structures, among which V BAT + and V BAT - respectively voltage detection positive terminal and negative terminal, V dd and V ss They are the positive and negative power terminals respectively, DATA is the data communication interface terminal, and CLK is the clock terminal.

[0043] The analog front-end module can collect the voltage of one battery or multiple batteries. There are two specific ways: the first is that one channel ADC collects the voltage of the corresponding battery and collects the voltage of multiple batteries synchronously; the second is that a single channel ADC collects the voltage of multiple series-connected batteries in a time-sharing manner. Multiple analog front ends are connected to the same bus (data bus) to form an analog front-end module. The analog front-end modules of the same battery module are cascaded through the bus cascade interface to form a cascade module. The operation module obtains the excitation response voltage through the cascade bus. The cascade of the analog front end realizes clock synchronization and detection synchronization through the cascade bus. For details, see Figures 9 to 13 .

[0044] Fig. 9 In the example, each analog front-end module (AFE in the figure) collects the voltage of a battery, and the DATA and CLK of the analog front-end modules of the same string of batteries are connected to the same bus; Fig.10 In the process, the battery is connected to an analog front-end module through a multiplexer for time-sharing detection; Fig.11 Yes Fig. 9 or Fig.10 The structure in the figure is used as an analog front-end module. In the figure, TDATA and TCLK represent the sending data and clock respectively, RDATA and RCLK represent the receiving data and clock respectively, RDATA and RCLK contain synchronization information or synchronization commands, or a dedicated synchronization connection line Sync can be used to trigger synchronization detection. TCLK, RCLK and system clock are synchronized, and TCKL and RCLK can be shared as RCLK. TDATA and RDATA can also be combined to use half-duplex mode and single-line bidirectional communication.

[0045] Fig.12 , is to cascade the analog front-end modules of the same battery module through a bus cascade interface to form a cascade module.

[0046] It should be noted that see Fig.13 The bus cascade interface is a vertical bus cascade interface. The vertical bus includes two pairs of upstream clock lines and data lines (one pair for receiving, one pair for output), two pairs of downstream clock lines and data lines, and a pair of upstream synchronization lines (one for receiving and one for output and not required). Among them, clock downlink is not necessary, and the synchronization line can be implemented by issuing synchronization commands through the data line. Therefore, it can be simplified to a pair of upstream clock lines and data lines (one pair for receiving, one pair for output), and a downstream data line (one for receiving, one for output).

[0047] See Fig.13 In order to improve the anti-interference ability, differential signal transmission can be used. Each signal is sent using 2 differential lines, doubling the interface. A simplified method, see Fig.14 and 15 , using two pairs of half-duplex data lines (one pair of differential bidirectional connections to the upper analog front end, and one pair of differential bidirectional connections to the lower analog front end). The two pairs of data lines can use a unidirectional data transmission method, and then return to the first analog front-end module to form a closed-loop connection. In half-duplex mode, the clock is synchronized in a specific time slot.

[0048] It should be noted that in the case of differential signal transmission, the correct encoding method is used, and the transmitted data contains clock information. After receiving the data signal, the analog front end can extract the data and clock, and synchronize the local working clock and the receiving clock through a phase-locked loop or other means. The phase-locked loop can also filter out high-frequency jitter to prevent jitter accumulation, synchronize the data and clock, and then continue to send the data upstream.

[0049] It should be noted that in an environment with relatively small interference, differential signals do not need to be used for transmission. The communication method can be further simplified to use two half-duplex data lines (one bidirectional line connected to the upper analog front end and one bidirectional line connected to the lower analog front end) to achieve cascading, see Fig.16 .

[0050] The computing module of the embodiment calculates the AC impedance spectrum according to the excitation response voltage and the excitation current; or uploads the excitation response voltage and the excitation current to a host computer / cloud to calculate the AC impedance spectrum.

[0051] It should be noted that, similar to the loop control module, the calculation module is implemented by a controller with a built-in calculation program.

[0052] It should be noted that the excitation current is the excitation current of frequency synthesis or the excitation current obtained by the analog front end. The analog front end obtains the excitation current in the same and synchronous manner as the excitation response voltage. That is, the excitation current can be obtained from the loop control module, that is, obtained during frequency synthesis. It can also be obtained from the analog front end like obtaining the excitation response voltage. Specifically, it can be obtained from the analog front end of the battery monitoring management module or the analog front end of the charging and discharging module. No matter which acquisition method is optional.

[0053] The calculation of AC impedance spectrum is the calculation of complex impedance. Therefore, similar to the excitation response voltage, the excitation current of N points will also be sampled here, that is, the excitation response voltage and excitation current of N points will be stored, and then the operation module will read the excitation current and the excitation response voltage of different batteries in time-sharing to calculate the AC impedance spectrum; specifically, the excitation response voltage and excitation current can be read in time-sharing, the excitation response voltage and excitation current can be phase-calibrated, and the AC impedance spectrum can be calculated using the excitation response voltage and excitation current after the phase calibration. The AC impedance spectrum can be calculated by itself or uploaded for calculation.

[0054] It should be noted that the operation module can use two algorithms to calculate the complex impedance. The first is to calculate the complex impedance of a specific frequency by digital signal processing, and the second is to obtain the complex impedance of the corresponding time frequency by dividing the excitation response voltage by the excitation current at the same time.

[0055] The calculation of complex impedance requires synchronous data of the excitation current and voltage response to be calculated. The speed of the calculation is determined by the clock Fs; see Fig.17 The excitation current can be simulated locally, that is, the template data corresponding to the excitation current is generated by frequency synthesis and sent to DFT for calculation. The purpose of time compensation is to consider the delay time of the actual current generation, the influence of the delay of the synchronization signal or command transmission execution on the synchronous detection of the excitation current and voltage, so as to determine the position of the first point of the excitation current sine wave. Phase compensation is used for data calibration; see Fig.18 , directly using the actual excitation current measurement data, the current and voltage need to be detected synchronously, and the synchronization accuracy is required to be high. In addition to calibration, phase compensation also needs to consider the impact of synchronization errors.

[0056] It should be noted that in order to facilitate the distributed layout of the energy storage system, a line transceiver is also configured in the system to achieve data transmission at both ends through two line transceivers. Fig.19 The functions of the line transceiver include: signal reception and judgment, data clock recovery and extraction; line driving, that is, signal power amplification; waveform shaping; data demultiplexing, arranging the cell data in the corresponding time slot according to the protocol to become a fixed format transmission data frame for transmission, or demodulating the corresponding data and commands in the received data frame; data demultiplexing can be replaced by the function of a framer; through a certain communication protocol, the cascaded analog front end is controlled and managed, including issuing commands, reading and writing data, clock input, Sync trigger detection and other functions.

[0057] The receiving end and the transmitting end of the line transceiver can be short-circuited, and the internal receiver and transmitter work alternately in time-sharing. When the receiver receives data, the transmitter is in a closed state with high impedance, which does not affect the reception of data. Conversely, when sending data, the receiving end can work for diagnosis; the transmitting end can also be turned off, so that the module monitoring unit node supports half-duplex communication status.

[0058] by Fig. 20 For example, the line transceiver is directly connected to the cascade module, and the interface can be used to connect to the cascade bus. The line transceiver sends the received host command and clock information to the analog front-end module, and can multiplex the data information of the cascaded analog front-end into the corresponding channel (time slot) of the network and send it out.

[0059] by Fig.21For example, the controller with integrated computing module function (such as MCU / DSP, or PCB circuit system of multiple MCU / DSP computing modules) is connected to the cascade module, the controller with integrated computing module is connected to the line transceiver, the computing module receives the command, data and clock information of the line transceiver, and sends it to the cascaded analog front-end module, the line transceiver can multiplex the data information of the cascaded analog front-end into the corresponding channel (time slot) of the network. It should be noted that see Fig. 22 ,If the energy storage system is a compact / small energy storage system, the loop control module and the operation module can be integrated in the same controller, that is, the MCU / DSP in the figure.

[0060] It should be noted that see Fig.23 and 24 If the energy storage system is a large energy storage system, the line transceiver on the host side is defined as the first line transceiver, and the line transceiver on the battery module side is defined as the second line transceiver. The connection structure can be as follows: 1. The loop control module and the operation module are integrated in the controller (MCU / DSP) on the host side. The controller on the host side is connected to the first line transceiver, and each cascade module is connected to a second line transceiver. The first line transceiver and the second line transceiver are connected to form a ring daisy chain.

[0061] 2. The loop control module is integrated in the controller at the host end, the controller at the host end is connected to the first line transceiver, the operation module is integrated in the controller at the battery module end, each cascade module is connected to the controller at the corresponding battery module end, the controller at the battery module end is connected to the second line transceiver, and the first line transceiver and the second line transceiver are connected to form a ring daisy chain.

[0062] 3. The loop control module and the operation module are integrated in the controller (MCU / DSP) on the host side. The controller on the host side is connected to the first line transceiver, each cascade module is connected to a second line transceiver, and all the second line transceivers are connected in parallel to the first line transceiver.

[0063] 4. The loop control module and the operation module are integrated in the controller of the host side. The controller of the host side is connected to the first line transceiver. If the communication protocol and the physical layer electrical characteristics of the cascade module are compatible with the line transceiver, or meet the common standards (such as Ethernet 10 / 100Base_TXX), the second line transceiver can be omitted, that is, the communication port at one end of each cascade module can be connected to the first line transceiver to achieve parallel connection. Fig.25 .

[0064] It should be noted that the battery module end structure is defined as a module monitoring unit. When connected in parallel, the input and output corresponding ports of the module monitoring unit are short-circuited (shared interface), and a single pair of cables is used to connect to the host, working in master-slave mode; half-duplex communication, the first line transceiver and the receiving end and the transmitting end of the module monitoring unit work alternately in time sharing; the host system allocates specific time slots to broadcast clock information and clock calibration commands to the module monitoring unit through the second line transceiver for clock calibration to ensure that the module monitoring unit and the host system work synchronously.

[0065] In a ring daisy chain connection or a parallel connection, in a data idle phase, the host side issues an "idle" signal containing clock information through the second line transceiver, so that the first line transceiver of each node performs clock synchronization.

[0066] It should be noted that in the above energy storage system, the clock synchronization of all modules is as follows: 1) The energy storage system adopts the master-slave clock mode. The internal clocks of the internal functional modules including the charging and discharging module and the battery monitoring and management module all use a unified clock or work in the same clock domain as the master clock or reference clock of the main system; 2) Distributed nodes, such as analog front-end monitoring nodes, realize synchronous transmission in data communication, for example, using baseband transmission technology, clock recovery and extraction technology and other methods to achieve unified clock, and can also use Ethernet communication technology standard interface to meet V1588 synchronization standards, etc.; 3) Clock and data synchronization communication protocols are used between functional modules in the PCB board, such as SPI; 4) On-board high-voltage cascade analog front-end monitoring chip / module clock signal or synchronization signal cascade.

[0067] In the above energy storage system, the phase shift caused by the delay of the synchronous detection command is compensated, specifically: 1) Voltage sampling is synchronized based on the timing of current sampling, and the synchronization detection command is issued when the current crosses zero or reaches the preset amplitude; Method 1: Determine the starting phase of the current data during the SPWM wave generation process and send a synchronous detection signal; Mode 2: During the actual current detection process, a synchronous detection signal is issued when a zero crossing is detected or a crossing of a specific amplitude is detected; 2) Measure the delay of synchronous detection command to perform phase compensation; For a given network, the command delay from the host to each node is fixed, assuming that they are Td 1 , Td 2 ,…,Td m ,…,Td M, there are M nodes in total, Tdk is an integer multiple of the highest clock cycle, the current detection is on the host node or on an analog front end, the current and voltage detection cycles are the same, assuming it is TADC.

[0068] When the host issues a synchronous detection command, the current channel waits for Td M , the first node receives the command and waits for Td M -Td 1 +Tb, the mth node waits for Td M -Td m +Tb see, the Mth node waits for Td M -Td M +Tb, that is, 0+Tb, Tb is the preset time offset, which can be 0, all nodes start current and voltage detection at the same time, and a single ADC sampling period is TADC, which is a single synchronous inspection period of voltage and current, and N points are continuously detected for impedance measurement.

[0069] For the measurement of AC impedance spectrum, the above system uses a more efficient frequency synthesis method to generate a sinusoidal excitation current. The reference signal is generated by superimposing the feedback signal (i.e., the current output by the charging and discharging module), the frequency synthesized excitation current, and the preset current value (DC). The reference signal is compared with the current feedback signal to generate an SPWM drive signal. The drive signal drives the charging and discharging module to directly transmit the steady-state current and the sinusoidal excitation current superimposed on the steady-state current to the connected battery module. Each node synchronously detects the excitation current. , Excitation response voltage ;in, k Indicates k Inspection cycle, n It represents the number of the series-connected batteries. N current values ​​are collected continuously. N voltage values ​​are sampled for each series-connected battery, and then input into the calculation module to obtain the AC impedance of the corresponding frequency.

[0070] For the measurement of AC impedance amplitude-frequency response, a step signal is generated on the preset current reference value in the loop control module, and compared with the feedback signal to generate a PWM drive signal. The drive signal drives the charge and discharge module to directly deliver steady-state current to the connected battery module and superimpose the step current. At the same time, after issuing the synchronous detection command, each node synchronously detects the current , battery voltage , calculate the difference between the real-time current and the initial current in real time And the difference between the real-time voltage and the initial voltage , so that the time can be obtained as k * T ADC Impedance , and obtain the amplitude-frequency response of the AC impedance of the corresponding battery , expressed asn The frequency of the series-connected cells The magnitude of the AC impedance at T ADC It is the period of a single data sampling of voltage or current, or the time interval between two consecutive ADC data samplings.

[0071] The second way of impedance calculation is to directly use the direct frequency synthesis data of SPWM as the data of excitation current. At this time, the synchronization of voltage detection and current data generation must not only consider communication and command delays, but also the delay from SPWM control signal to actual current generation. At the same time, the current size must also be calibrated. However, since the current generation delay and amplitude may be related to changes in ambient temperature and component characteristics, real-time detection is required to obtain the ratio of the current excitation current generation delay time and actual amplitude change, and then combine the data with the existing compensation data to perform phase compensation and amplitude compensation on the data of the calculation module.

[0072] The above energy storage system adopts full system clock synchronization, directly superimposes the excitation current on the steady-state current of the charge and discharge module, and the excitation current is directly transmitted to the connected battery module. At the same time, the host issues a synchronous detection command to each battery module to achieve synchronous generation of excitation current template data and voltage detection data, or synchronous detection of excitation current and battery voltage, to achieve measurement of battery AC and DC impedance. The energy storage system with this synchronous detection method has no power loss, and the charge and discharge currents of all series-connected batteries are consistent, which does not affect the consistency of the batteries. In addition, the clock-synchronized energy storage system can use a more efficient frequency synthesis method to generate a sinusoidal excitation current, and use the loop control module of the charge and discharge module to generate a drive signal. There is no need for a large number of additional hardware inductors and control circuits, which is low-cost, does not affect the consistency of the series-connected batteries, and has little impact on EMI / EMC performance.

[0073] The above energy storage system adopts full system clock synchronization. Under certain specific working conditions, the charging and discharging current (steady-state current superimposed on the excitation current or other alternating current), the synchronous energy storage system can realize the synchronous generation of excitation current template data and voltage detection data, or the synchronous detection of excitation current and battery voltage. The obtained data does not need to be calculated. After being read from the data storage device (cache), it is directly sent to the host computer or data cloud as data recording the transient changes of the battery of the single cell / module for application processing as big data.

[0074] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A synchronous energy storage system supporting AC impedance spectroscopy measurement, characterized in that: It includes a loop control module of the charging and discharging module, an analog front end and a computing module of the battery monitoring and management module; Loop control module: a controller module of the charge-discharge load power supply system, which uses the sampled charge-discharge current output by the charge-discharge module as a feedback signal, and generates a drive signal according to the feedback signal, the frequency-synthesized excitation current and the preset current value; wherein the drive signal is used to drive the charge-discharge module to deliver the charge-discharge current to the connected battery module; the charge-discharge current includes a steady-state current and an excitation current superimposed on the steady-state current; Analog front end: samples the battery voltage and obtains the excitation response voltage corresponding to the excitation current from the sampled battery voltage; Operation module: Calculate the AC impedance spectrum according to the excitation response voltage and the excitation current; or upload the excitation response voltage and the excitation current to the host computer / cloud to calculate the AC impedance spectrum; wherein the excitation current is the excitation current for generating the drive signal or the excitation current collected by the analog front end, and the analog front end obtains the excitation current synchronously with the excitation response voltage.

2. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to claim 1, characterized in that: When sampling the excitation response voltage and the excitation current, the excitation response voltage and the excitation current sampled at each moment are stored. After a preset number is stored, the operation module reads the excitation response voltage and the excitation current in a time-sharing manner, and uses a compensation method to perform phase calibration on the excitation response voltage and the excitation current. The excitation response voltage and the excitation current after the phase calibration are used to calculate the AC impedance spectrum.

3. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to claim 1, characterized in that: The analog front-end module collects the voltage of a battery or collects the voltage of multiple batteries in a time-sharing manner. Multiple analog front ends are connected to the same bus to form an analog front-end module. The analog front-end modules of the same battery module are cascaded through a bus cascade interface to form a cascade module. The operation module obtains the excitation response voltage through the cascade bus.

4. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to claim 3, characterized in that: If the energy storage system is a compact / small energy storage system, the loop control module and the operation module are integrated in the same controller.

5. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to claim 3, characterized in that: If the energy storage system is a large energy storage system, the loop control module and the operation module are integrated in the controller of the host side, or the loop control module is integrated in the controller of the host side, and the operation module is integrated in the controller of the battery module side; If the loop control module and the operation module are integrated in a controller at the host end, the controller at the host end is connected to a first line transceiver, the cascade module is connected to a second line transceiver, the first line transceiver and the second line transceiver are connected to form a ring daisy chain or all the second line transceivers are connected in parallel to the first line transceiver; or, the controller at the host end is connected to a first line transceiver, and all the cascade modules are connected in parallel to the first line transceiver; If the loop control module is integrated in the controller on the host side and the operation module is integrated in the controller on the battery module side, the controller on the host side is connected to the first line transceiver, each cascade module is connected to the controller on the corresponding battery module side, and the controller on the battery module side is connected to the second line transceiver, and the first line transceiver and the second line transceiver are connected to form a ring daisy chain.

6. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to any one of claims 1, 3 to 5, characterized in that: The analog front end includes a first PGA, a first ADC, a first low-pass filter, a first DAC and a first MUX; The first PGA detects the battery voltage and receives the 0 data output by the first MUX, and outputs the battery voltage to the first ADC, the first ADC performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first MUX input; The first PGA detects the battery voltage and receives the steady-state voltage component output by the first MUX, and outputs an excitation response voltage to the first ADC after subtracting the two voltages. The first ADC performs ADC conversion on the excitation response voltage and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation.

7. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to any one of claims 1, 3 to 5, characterized in that: The analog front end includes a first PGA, a first ADC, a first low-pass filter, a first DAC and a first MUX; The first MUX first channel selects the battery voltage and outputs the battery voltage to the first ADC, the first ADC performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state voltage component, the first DAC performs DAC conversion on the steady-state voltage component, and transmits the converted steady-state voltage component to the first PGA; The first PGA detects the battery voltage and receives the converted steady-state voltage component, subtracts the two voltages and outputs an excitation response voltage, which is used as another path input of the first MUX. The first MUX outputs the excitation response voltage to the first ADC, and the first ADC performs ADC conversion on the excitation response voltage and uses the converted excitation response voltage as the excitation response voltage required for AC impedance spectrum calculation.

8. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to any one of claims 1, 3 to 5, characterized in that: The analog front end includes a first PGA, a first ADC, a second ADC, a first low-pass filter and a first DAC; The first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state component of the battery voltage, the first DAC performs DAC conversion on the steady-state component, the first PGA detects the battery voltage and receives the converted steady-state voltage component, the two voltages are subtracted and an excitation response voltage is output to the second ADC, the second ADC performs ADC conversion on the excitation response voltage, and the converted excitation response voltage is used as the excitation response voltage required for AC impedance spectrum calculation.

9. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to any one of claims 1, 3 to 5, characterized in that: The analog front end includes a first ADC, a first subtractor, and a first low-pass filter; The first ADC detects the battery voltage and performs ADC conversion on the battery voltage, the first low-pass filter performs low-pass filtering on the converted battery voltage to obtain a steady-state component of the battery voltage, and the first subtractor subtracts the converted battery voltage input at the positive terminal from the steady-state component input at the negative terminal to obtain an excitation response voltage required for AC impedance spectrum calculation.

10. The synchronous energy storage system supporting AC impedance spectroscopy measurement according to claim 1, characterized in that: In the energy storage system, the clocks of all modules are synchronized, and the synchronized clocks follow the master clock or reference clock of the main system where the energy storage system is located; In the energy storage system, voltage sampling is synchronized based on the timing of current sampling, and a synchronization detection command is issued when the current passes through zero or reaches a preset amplitude as a starting point.

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