Power consumption control method and device, equipment and storage medium

Abstract

The invention provides a power consumption control method and device, equipment and a storage medium, and the method comprises the steps: determining the states of a first processor and a second processor through mutual detection between the first processor and the second processor in a plurality of nodes; in response to the abnormality of the first processor, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and determines the overall power consumption according to the node power consumption of each node and the power consumption of the external equipment; when an overcurrent alarm signal sent by the power supply unit is received, determining and sending a power consumption limit value to external equipment and a node corresponding to the first processor in a normal state according to the overall power consumption; and in response to the abnormality of the second processor, when the first processor receives an abnormal signal sent by the power supply unit, acquiring information of the power supply unit through a bus, and determining a power consumption limit value of each node according to the information of the power supply unit.

Description

Technical Field

[0001] The present invention relates to the technical field of server power consumption management, and in particular to a power consumption control method, device, equipment and storage medium. Background Art

[0002] Dynamic power capping means, on the one hand, that when an overcurrent event is triggered, power consumption can be limited, rather than keeping the server in a power-limited state. When the overcurrent event ends, power consumption is returned to normal. On the other hand, it means that the power consumption limit value can be autonomously calculated based on the machine configuration without human intervention.

[0003] Compared with general servers, the dynamic power consumption capping of multi-node servers is more complex. First, each node is independent of each other, and the node power consumption is calculated separately; second, each node has a unified power input and relies on a common PSU (Power Supply Unit). When an overcurrent event is triggered, each node should adjust the power consumption together to reduce the system power consumption.

[0004] The dynamic power consumption capping of the multi-node server is jointly implemented by the MPCPLD (MidPlane Complex Programmable Logic Device) and the BMC (Baseboard Management Controller). When any one of them is abnormal, it will affect the implementation of the dynamic power consumption capping function of the multi-node server.

[0005] Therefore, in view of the shortcomings of the prior art solutions, the present invention provides a power consumption control method. Summary of the invention

[0006] Based on this, it is necessary to provide a power consumption control method, device, equipment and storage medium to address the above technical problems.

[0007] On the one hand, a power consumption control method is provided, which is applied to a multi-node server, wherein the multi-node server includes multiple nodes, a second processor, an external device and a power supply unit, wherein each node includes a first processor, and the multiple nodes, the external device and the power supply unit are respectively connected to the second processor, and the method includes: the first processor and the second processor in the multiple nodes determine the status of the first processor and the second processor through mutual detection; in response to one or more first processors in the multiple nodes being abnormal, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determines the whole machine power consumption according to the node power consumption of each node and the power consumption of the external device; when the second processor receives an overcurrent alarm signal sent by the power supply unit, the second processor determines and sends a power consumption limit value to the external device and the node corresponding to the first processor in a normal state according to the whole machine power consumption; in response to the abnormality of the second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through a bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

[0008] Optionally, the first processor and the second processor in the multiple nodes determine the states of the first processor and the second processor through mutual detection, including: the first processors in the multiple nodes are respectively connected to the second processor through pins; the first processor and the second processor detect changes in pin levels, and determine the states of the first processor and the second processor based on the changes in the pin levels.

[0009] Optionally, the first processor and the second processor in the multiple nodes determine the status of the first processor and the second processor through mutual detection, including: the first processor in the multiple nodes sends excitation signals to the second processor respectively; if the first processor in the multiple nodes detects that no response is received from the second processor within a first time interval after sending the excitation signal, it determines that the status of the second processor is an abnormal state; the second processor monitors and does not receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determines that the status of the first processor that did not send the signal is an abnormal state.

[0010] Optionally, the second processor determines the node power consumption corresponding to the abnormal first processor based on the received node power consumption, including: the second processor determines the maximum value of multiple node power consumptions based on the received node power consumptions corresponding to multiple normal first processors; the second processor uses the maximum value as the node power consumption corresponding to one or more abnormal first processors.

[0011] Optionally, when the second processor receives an overcurrent alarm signal sent by the power supply unit, it determines the power consumption limit value according to the power consumption of the whole machine and sends it to the external device and the node corresponding to the first processor in a normal state, including: the second processor determines the power consumption limit value of the external device according to the power consumption of the whole machine and sends it to the external device; determines the total power consumption of the nodes corresponding to multiple first processors in a normal state according to the power consumption of the whole machine and the power consumption limit value of the external device; determines the power consumption limit value corresponding to each node corresponding to the first processor in a normal state and sends it to the node corresponding to each first processor in a normal state according to the total power consumption and the power consumption requirement of the node corresponding to each first processor in a normal state.

[0012] Optionally, before responding to the exception of the second processor, the method also includes: the second processor determines the configuration of the entire machine based on the power consumption of the entire machine, wherein the configuration of the entire machine includes the configuration of a power supply unit; and the second processor sends the configuration of the entire machine to the first processor in each node.

[0013] Optionally, the first processor in each node obtains information about the power supply unit through a bus, and determines the power consumption limit value of each node based on the information about the power supply unit, including: the first processor in each node obtains a status register of the power supply unit through a power management bus to determine whether there is a data abnormality in the status register; when there is a data abnormality in the status register, the first processor in each node obtains the in-place status of the power supply unit through the power management bus; compares the configuration of the power supply unit in the whole machine configuration with the in-place status of the power supply unit, and when the configuration of the power supply unit in the whole machine configuration and the in-place status of the power supply unit are the same, determines that the in-place status of the power supply unit is normal; when the in-place status is normal and the data in the status register is abnormal, determines that the power supply unit is in an overcurrent state; the first processor in each node calculates the power consumption limit value corresponding to each node based on the power consumption requirement of each node; the first processor in each node controls the power consumption of each node based on the power consumption limit value.

[0014] On the other hand, a power consumption control device is provided, which is applied to a multi-node server. The multi-node server includes multiple nodes, a second processor, an external device and a power supply unit, wherein each node includes a first processor, and the multiple nodes, the external device and the power supply unit are respectively connected to the second processor. The device includes: a detection module, which is used for the first processor and the second processor in the multiple nodes to determine the status of the first processor and the second processor through mutual detection; a first processing module, which is used for responding to one or more first processors in the multiple nodes being abnormal, the second processor determining the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determining the whole machine power consumption according to the node power consumption of each node and the power consumption of the external device; a second processing module, which is used for determining and sending the power consumption limit value to the external device and the node corresponding to the first processor in normal state according to the whole machine power consumption when the second processor receives an overcurrent alarm signal sent by the power supply unit; a third processing module, which is used for responding to the abnormal second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

[0015] On the other hand, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: the first processor and the second processor in a plurality of nodes determine the status of the first processor and the second processor through mutual detection; in response to an abnormality of one or more first processors in a plurality of nodes, the second processor determines the node power consumption corresponding to the abnormal first processor based on the received node power consumption, and the second processor determines the power consumption of the entire machine based on the node power consumption of each node and the power consumption of an external device; when the second processor receives an overcurrent alarm signal sent by a power supply unit, the second processor determines the power consumption limit value based on the power consumption of the entire machine and sends it to the external device and the node corresponding to the first processor in a normal state; in response to an abnormality of the second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through a bus, and determines the power consumption limit value of each node based on the information of the power supply unit.

[0016] On the other hand, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented: the first processor and the second processor in multiple nodes determine the status of the first processor and the second processor through mutual detection; in response to an abnormality of one or more first processors in multiple nodes, the second processor determines the node power consumption corresponding to the abnormal first processor based on the received node power consumption, and the second processor determines the power consumption of the entire machine based on the node power consumption of each node and the power consumption of external devices; when the second processor receives an overcurrent alarm signal sent by a power supply unit, the second processor determines and sends a power consumption limit value to the external device and the node corresponding to the first processor in a normal state based on the power consumption of the entire machine; in response to an abnormality of the second processor, when the first processor in each node receives an abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through a bus, and determines the power consumption limit value of each node based on the information of the power supply unit.

[0017] The above-mentioned power consumption control method, device, equipment and storage medium, the method includes: the first processor and the second processor in multiple nodes determine the status of the first processor and the second processor through mutual detection; in response to the abnormality of one or more first processors in multiple nodes, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determines the whole machine power consumption according to the node power consumption of each node and the power consumption of external devices; when the second processor receives the overcurrent alarm signal sent by the power supply unit, the power consumption limit value is determined and sent to the external device and the node corresponding to the first processor in normal state according to the whole machine power consumption; in response to the abnormality of the second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node according to the information of the power supply unit; in this way, when the first processor or the second processor is in an abnormal state, dynamic power consumption capping can still be performed, thereby protecting system stability and improving energy efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a flow chart of a power consumption control method in one embodiment;

[0019] Figure 2 A schematic diagram of the dynamic power consumption capping state flow of a power consumption control method in one embodiment;

[0020] Figure 3 A schematic diagram of a system architecture of a power consumption control method in an embodiment;

[0021] Figure 4is a structural block diagram of a power consumption control device in one embodiment;

[0022] Figure 5 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0024] It should be understood that in the description of the present application, unless the context clearly requires otherwise, words such as "include", "comprises", and the like throughout the specification should be interpreted as including rather than being exclusive or exhaustive; that is, as including but not limited to.

[0025] It should also be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, "plurality" means two or more.

[0026] It should be noted that the terms "S1", "S2", etc. are only used for the purpose of describing the steps, and do not specifically refer to the order or sequence, nor are they used to limit the present application. They are only for the convenience of describing the method of the present application, and cannot be understood as indicating the order of the steps. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present application.

[0027] In one embodiment, Figure 1 As shown, a power consumption control method is provided, which is applied to a multi-node server, wherein the multi-node server includes a plurality of nodes, a second processor, an external device and a power supply unit, wherein each node includes a first processor, and the plurality of nodes, the external device and the power supply unit are respectively connected to the second processor, and comprises the following steps:

[0028] S101: First processors and second processors in multiple nodes determine states of the first processors and the second processors through mutual detection.

[0029] Here, the state of the processor includes a normal state and an abnormal state.

[0030] Here, the first processor is used to manage each node, and the second processor is used to manage multiple nodes, external devices, power supply units, etc.

[0031] Here, the abnormal state refers to that the processor cannot work normally and cannot support existing functions due to flash refresh, code running away or other problems during upgrading. At this time, the processor is in an abnormal state.

[0032] Exemplarily, the first processor may be a BMC, and the second processor may be an MPCPLD. The dynamic power consumption capping function is performed by the MPCPLD and the BMC together.

[0033] When the first processor is in an abnormal state, one first processor may be in an abnormal state, or multiple first processors may be in an abnormal state.

[0034] S102: In response to one or more first processors in multiple nodes being abnormal, the second processor determines the node power consumption corresponding to the abnormal first processor based on the received node power consumption, and the second processor determines the power consumption of the entire machine based on the node power consumption of each node and the power consumption of external devices.

[0035] Here, the power consumption of the external device may be the power consumption of a fan, a hard disk, or the like.

[0036] The first processor collects the node power consumption of each node and sends it to the second processor.

[0037] Specifically, when the first processor is in an abnormal state, it is unable to collect node power consumption and therefore unable to send the node power consumption to the second processor. The second processor determines the node power consumption of the abnormal node based on the received node power consumption, thereby calculating the power consumption of the entire machine.

[0038] In one embodiment, the second processor can preset a time range and record whether the node power consumption of all nodes corresponding to the first processor in normal state is received within the preset time range. If not, the power consumption control is terminated. In this way, it can prevent the situation where the first processor of a node is normal but the node power consumption cannot be sent in time, causing other links to be affected.

[0039] In one embodiment, the second processor sequentially detects whether one or more nodes corresponding to the abnormal first processor are in place, and terminates power consumption control when it is detected that the node corresponding to the abnormal first processor is not in place.

[0040] S103: When the second processor receives the overcurrent alarm signal sent by the power supply unit, it determines a power consumption limit value according to the power consumption of the entire machine and sends it to an external device and a node corresponding to the first processor in a normal state.

[0041] Here, the second processor may receive the overcurrent alarm signal sent by the power supply unit through a pin connected to the power supply unit.

[0042] Here, the power supply unit includes a plurality of PSUs for providing power.

[0043] The power consumption limit value includes the power consumption limit value of the external device and the power consumption limit value of the node, and the power consumption limit value of each node may be different.

[0044] Specifically, the power consumption of the node corresponding to the first processor in an abnormal state will not be reduced. The second processor can reduce the power consumption of the external device by controlling the power consumption limit value of the external device. At the same time, according to the power consumption of the whole machine, the power consumption limit value of each node corresponding to the first processor in a normal state is determined, and the power consumption limit value is sent to each node corresponding to the first processor in a normal state.

[0045] In one embodiment, after the second processor adjusts the power consumption limit value of the external device and the power consumption limit value of the node corresponding to the first processor in a normal state, the second processor still receives the overcurrent alarm signal sent by the power supply unit, and then powers off the node corresponding to the abnormal first processor to protect the normal operation of other nodes.

[0046] S104: In response to the second processor being abnormal, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

[0047] Here, the abnormal signal is used to indicate that the power supply unit is in an abnormal state, and cannot specifically indicate the type of abnormality.

[0048] In one embodiment, before the first processor in each node receives the abnormal signal sent by the power supply unit, it is assumed that the second processor is in an abnormal state. At this time, the first processor cannot calculate the power consumption and configuration of the entire machine. At this time, the dynamic power consumption capping function is turned off, the power consumption control is ended, and the first processor of each node automatically exits the dynamic power consumption capping state.

[0049] It should be noted that, when the first processor or the second processor is in an abnormal state, the dynamic power consumption capping function can be implemented in the present application.

[0050] In some specific implementations, the first processor and the second processor in the multiple nodes determine the states of the first processor and the second processor by mutual detection, including:

[0051] The first processors in the plurality of nodes are respectively connected to the second processors via pins;

[0052] The first processor and the second processor detect changes in pin levels, and determine states of the first processor and the second processor according to the changes in the pin levels.

[0053] Here, the pin may be a GPIO PIN, a general purpose input and output pin, which is used to implement input and output of digital signals.

[0054] Specifically, the first processor and the second processor of each node are connected through two pins, one pin is used for the first processor to detect whether the second processor is in an abnormal state, and the other pin is used for the second processor to detect whether the first processor is in an abnormal state. When it is detected that one of the parties is in an abnormal state, the pin level will change, and the other party will detect the change in the pin and detect the processor in the abnormal state.

[0055] In this way, the first processor and the second processor are connected through the pins to detect the status of the processors, and the signal is stable and the response speed is fast.

[0056] In some specific implementations, the first processor and the second processor in the multiple nodes determine the states of the first processor and the second processor by mutual detection, including:

[0057] The first processors in the plurality of nodes respectively send an excitation signal to the second processors;

[0058] If the first processor among the multiple nodes detects that no response from the second processor is received within a first time interval after sending the excitation signal, determining that the state of the second processor is an abnormal state;

[0059] The second processor monitors and fails to receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determines that the state of the first processor that does not send the signal is an abnormal state.

[0060] Here, the sizes of the first time interval and the second time interval can be adjusted according to user requirements.

[0061] The multiple first processors may send excitation signals to the second processor at the same time, or may send excitation signals to the second processor at different times.

[0062] Specifically, a request and response mechanism is adopted, where the first processor sends an excitation signal to the second processor at regular intervals, and the second processor responds after receiving the signal from the first processor. If both parties fail to send signals and response signals for a certain period of time, it means that one party is in an abnormal state.

[0063] In one embodiment, the second processor may also send an excitation signal to the multiple first processors and receive responses from the first processors to detect whether the multiple first processors are in an abnormal state.

[0064] In this way, by sending an excitation signal to detect the status of the processor, mutual detection can be achieved without occupying hardware resources.

[0065] In some specific implementations, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, including:

[0066] The second processor determines a maximum value among the multiple node power consumptions according to the received node power consumptions corresponding to the multiple normal first processors;

[0067] The second processor uses the maximum value as the power consumption of nodes corresponding to one or more abnormal first processors.

[0068] In one embodiment, the user may set the configuration of each node in advance, and when the first processor is abnormal, the power consumption corresponding to the preset configuration is used as the power consumption of the abnormal node received by the second processor.

[0069] In this way, the problem that the first processor is unable to report the node power consumption due to being in an abnormal state can be solved.

[0070] In some specific implementations, when the second processor receives the overcurrent alarm signal sent by the power supply unit, determining and sending the power consumption limit value to the external device and the node corresponding to the first processor in a normal state according to the power consumption of the entire machine includes:

[0071] The second processor determines, according to the power consumption of the entire device, and sends a power consumption limit value of the external device to the external device;

[0072] Determine the total power consumption of nodes corresponding to a plurality of first processors in normal states according to the power consumption of the entire machine and the power consumption limit value of the external device;

[0073] According to the total power consumption value and the power consumption requirement of the node corresponding to each first processor in a normal state, the power consumption limit value corresponding to the node corresponding to each first processor in a normal state is determined and sent to the node corresponding to each first processor in a normal state.

[0074] Here, the power consumption requirement of the node may be determined according to the current operating state of the node, the configuration of the node, etc.

[0075] The total power consumption value may be allocated by weighting or the like to determine the power consumption limit value of each node.

[0076] In this way, different power consumption limit values ​​are configured according to different power consumption requirements of each normal node, thereby reducing the impact of the power consumption limit on the node corresponding to the first processor in a normal state.

[0077] In some specific implementations, before responding to the second processor exception, the method further includes:

[0078] The second processor determines a whole machine configuration according to the whole machine power consumption, wherein the whole machine configuration includes a configuration of a power supply unit;

[0079] The second processor sends the entire machine configuration to the first processor in each node.

[0080] Here, the power supply unit includes multiple PSUs, and it is determined to enable some or all of the PSUs according to the power consumption and configuration of the entire machine.

[0081] The power consumption of the entire machine must be less than or equal to the maximum power consumption supported by all PSUs in the power supply unit after they are enabled.

[0082] Further, after determining the whole machine configuration, the second processor sends the whole machine configuration and the whole machine power consumption to the first processor of each node. After receiving the whole machine configuration and the whole machine power consumption, the first processor checks whether the whole machine power consumption meets the power consumption capping requirement. If not, the dynamic power consumption capping is turned off. Exemplarily, there may be a situation where the maximum power consumption supported by the power supply unit is less than the whole machine power consumption, or there may be a calculation error due to a transmission error, and the calculated whole machine power consumption is 0.

[0083] In some specific implementations, the first processor in each node obtains the information of the power supply unit through a bus, and determines the power consumption limit value of each node according to the information of the power supply unit, including:

[0084] The first processor in each node obtains the status register of the power supply unit through the power management bus, and determines whether there is data abnormality in the status register;

[0085] When there is data abnormality in the status register, the first processor in each node obtains the in-place status of the power supply unit through the power management bus;

[0086] comparing the configuration of the power supply unit in the whole machine configuration with the in-place state of the power supply unit, and determining that the in-place state of the power supply unit is normal when the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit are the same;

[0087] When the in-position state is normal and the data of the status register is abnormal, determining that the power supply unit is in an overcurrent state;

[0088] The first processor in each node calculates the power consumption limit value corresponding to each node according to the power consumption requirement of each node;

[0089] The first processor in each node controls the power consumption of each node according to the power consumption limit value.

[0090] Here, when the second processor is in an abnormal state, the first processor and the power supply unit may interact via PMBUS (Power Management Bus).

[0091] Among them, whether the node is in place can be detected by sensors, conductive contacts, dedicated signal lines, bus interfaces, etc.

[0092] Among them, when the second processor is abnormal, the first processor receives the abnormal signal sent by the power supply unit and cannot determine the specific abnormal type of the power supply unit. By detecting the in-place status and status register of the power supply unit, it is determined that the power supply unit is overcurrent abnormal, thereby implementing power consumption control.

[0093] Specifically, when the second processor is abnormal, the first processor cannot obtain the power consumption control instruction sent by the second processor, the first processor receives the whole machine configuration sent by the second processor, the first processor interacts with the power supply unit through PMBUS, detects the in-place status and status register of the power supply unit, when the in-place status of the power supply unit does not meet the whole machine configuration and the status register data is abnormal, multiple nodes need to perform power consumption control, each first processor determines the power consumption limit value of the corresponding node according to the power consumption requirements of the node, and sends it to the corresponding ME (Management Engine) for power consumption control.

[0094] In one embodiment, when the first processor is normal, after the power is restored or the second processor is restored, the power of the node corresponding to the first processor is reset to normal.

[0095] In this way, when the second processor is in an abnormal state, the first processor can control the power consumption of each node.

[0096] In some specific implementations, when the first processor in each node receives the abnormal signal sent by the power supply unit, it includes:

[0097] The first processor records the duration of receiving the abnormal signal;

[0098] The duration is compared with a standard duration, and when the duration is greater than the standard duration, power consumption of each node is controlled.

[0099] Here, the standard duration can be set according to user needs.

[0100] In this way, misjudgment of abnormal situations can be avoided through continuous abnormal signals.

[0101] In one embodiment, Figure 2 FIG. 1 is a schematic diagram of the dynamic power consumption capping state flow in the embodiment of the present application. Figure 2 As shown, the dynamic power consumption capping state flow includes: when the dynamic power consumption capping function is not enabled, it is in the closed dynamic power consumption capping state; when this function is enabled, the first processor will calculate the current node power consumption according to the current configuration of the node, and after the calculation is completed, the result will be sent to the second processor; after the second processor receives the node power consumption sent by the first processor of all nodes, it accumulates the values, calculates the power consumption of the whole machine, and calculates the whole machine configuration information based on the whole machine power consumption, and sends the configuration information to the first processor. When it is not enabled or the accumulation timeout occurs, it is in the closed dynamic power consumption capping state; the second processor monitors the health status of the power supply unit. After the first processor receives the whole machine configuration information of the second processor, it checks whether the configuration meets the power consumption capping requirements. If not, it is in the closed dynamic power consumption capping state; if it meets, the first processor starts to monitor the throttling signal sent by the second processor. If the signal is received, the node power consumption is capped.

[0102] In one embodiment, Figure 3 Schematic diagram of the system architecture in the embodiment of the present application. Figure 3 As shown, the system architecture in the present application includes: multiple nodes, MPCPLD or CMC, a power supply unit and external devices.

[0103] Specifically, each of the multiple nodes is composed of a mainboard and external devices, which may include a network card, a RAID (Redundant Arrays of Independent Disks) card, a BMC, a mainboard CPLD (Complex Programmable Logic Device), a CPU (Central Processing Unit), a memory, and an ME, etc. Each node can be managed by the BMC on its mainboard. The BMC of each node can obtain information about common components in the entire system by sending a request to the MPCPLD or CMC.

[0104] Specifically, the MPCPLD or CMC is used to manage all nodes, process multi-node information, and can also be used to manage external devices and power supply units. The MPCPLD or CMC can be used to deliver the power supply of the power supply unit to each node and external device, and the MPCPLD or CMC can obtain the health status of the power supply unit. The MPCPLD or CMC can control the speed of the fan, obtain hard disk information, and other operations.

[0105] Specifically, the power supply unit is used to supply power to the entire machine.

[0106] Specifically, the external devices may include fans and hard disks, etc. The external devices are centrally managed by the MPCPLD or CMC.

[0107] For example, when a PSU in the power supply unit fails, the power supply unit will send an overcurrent alarm signal to the MPCPLD. After receiving the overcurrent alarm signal, the MPCPLD will send a throttling signal to the BMC of each node, thereby triggering the BMC to cap the power consumption. When the BMC has completed the power consumption capping, it will inform the MPCPLD that the throttling is completed. At this time, the MPCPLD will wait for the faulty PSU to be replaced with a healthy PSU before clearing the alarm.

[0108] It should be understood that although Figure 1-3 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1-3 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0109] In one embodiment, Figure 4As shown, a power consumption control device is provided, which is applied to a multi-node server, and the multi-node server includes multiple nodes, a second processor, an external device and a power supply unit, wherein each node includes a first processor, and the multiple nodes, the external device and the power supply unit are respectively connected to the second processor, and the device includes: a detection module 401, which is used for the first processor and the second processor in the multiple nodes to determine the status of the first processor and the second processor through mutual detection; a first processing module 402, which is used for responding to one or more first processors in the multiple nodes being abnormal, the second processor to determine the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor to determine the whole machine power consumption according to the node power consumption of each node and the power consumption of the external device; a second processing module 403, which is used for the second processor to determine and send the power consumption limit value to the external device and the node corresponding to the normal first processor according to the whole machine power consumption when the second processor receives the overcurrent alarm signal sent by the power supply unit; a third processing module 404, which is used for responding to the abnormality of the second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

[0110] As a preferred implementation, in an embodiment of the present application, the detection module 401 is specifically used for: the first processors in the multiple nodes are respectively connected to the second processors through pins; the first processor and the second processor detect changes in pin levels, and determine the states of the first processor and the second processor based on the changes in the pin levels.

[0111] As a preferred implementation, in an embodiment of the present application, the detection module 401 is specifically used for: the first processors in the multiple nodes respectively send excitation signals to the second processors; if the first processors in the multiple nodes detect that they have not received a response from the second processor within a first time interval after sending the excitation signal, determining that the state of the second processor is an abnormal state; the second processor monitors and does not receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determining that the state of the first processor that has not sent a signal is an abnormal state.

[0112] As a preferred implementation, in an embodiment of the present application, the first processing module 402 is specifically used for: the second processor determines the maximum value of multiple node power consumptions based on the received node power consumptions corresponding to multiple normal first processors; the second processor uses the maximum value as the node power consumption corresponding to one or more abnormal first processors.

[0113] As a preferred implementation, in an embodiment of the present application, the second processing module 403 is specifically used for: the second processor determines and sends the power consumption limit value of the external device to the external device based on the power consumption of the entire machine; determines the total power consumption of nodes corresponding to multiple first processors in normal states based on the power consumption of the entire machine and the power consumption limit value of the external device; determines and sends the power consumption limit value corresponding to the node corresponding to each first processor in normal state to the node corresponding to each first processor in normal state based on the total power consumption and the power consumption requirements of the node corresponding to each first processor in normal state.

[0114] As a preferred implementation manner, in an embodiment of the present application, the device also includes a fourth processing device, and the fourth processing module is specifically used for: the second processor determines the configuration of the whole machine based on the power consumption of the whole machine, wherein the configuration of the whole machine includes the configuration of the power supply unit; the second processor sends the configuration of the whole machine to the first processor in each node.

[0115] As a preferred implementation, in an embodiment of the present application, the third processing module 404 is specifically used for: the first processor in each node obtains the status register of the power supply unit through the power management bus to determine whether there is a data abnormality in the status register; when there is a data abnormality in the status register, the first processor in each node obtains the in-place state of the power supply unit through the power management bus; compares the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit, and when the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit are the same, determines that the in-place state of the power supply unit is normal; when the in-place state is normal and the data in the status register is abnormal, determines that the power supply unit is in an overcurrent state; the first processor in each node calculates the power consumption limit value corresponding to each node according to the power consumption requirement of each node; the first processor in each node controls the power consumption of each node according to the power consumption limit value.

[0116] For the specific definition of the power consumption control device, please refer to the definition of the power consumption control method above, which will not be repeated here. Each module in the above-mentioned power consumption control device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0117] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 5As shown. The computer device includes a processor, a memory and a network interface connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a power consumption control method is implemented.

[0118] Those skilled in the art will understand that Figure 5 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0119] In one embodiment, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the following steps are implemented when the processor executes the computer program: S1: a first processor and a second processor in a plurality of nodes determine the states of the first processor and the second processor by mutual detection; S2: in response to an abnormality of one or more first processors in a plurality of nodes, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determines the power consumption of the entire machine according to the node power consumption of each node and the power consumption of an external device; S3: when the second processor receives an overcurrent alarm signal sent by a power supply unit, the second processor determines and sends a power consumption limit value to an external device and a node corresponding to a first processor in a normal state according to the power consumption of the entire machine; S4: in response to an abnormality of the second processor, when the first processor in each node receives an abnormal signal sent by the power supply unit, the first processor in each node obtains information of the power supply unit through a bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

[0120] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the first processors in the multiple nodes are respectively connected to the second processors through pins; the first processor and the second processor detect changes in pin levels, and determine the states of the first processor and the second processor based on the changes in the pin levels.

[0121] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the first processors in the multiple nodes respectively send excitation signals to the second processors; if the first processors in the multiple nodes detect that no response from the second processor is received within a first time interval after sending the excitation signal, the state of the second processor is determined to be an abnormal state; the second processor monitors and does not receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determines that the state of the first processor that did not send the signal is an abnormal state.

[0122] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the second processor determines the maximum value among multiple node power consumptions based on the received node power consumptions corresponding to multiple normal first processors; the second processor uses the maximum value as the node power consumption corresponding to one or more abnormal first processors.

[0123] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the second processor determines and sends the power consumption limit value of the external device to the external device based on the power consumption of the entire machine; determines the total power consumption of nodes corresponding to multiple first processors in normal states based on the power consumption of the entire machine and the power consumption limit value of the external device; determines and sends the power consumption limit value corresponding to the node corresponding to each first processor in normal state to the node corresponding to each first processor in normal state based on the total power consumption and the power consumption requirement of the node corresponding to each first processor in normal state.

[0124] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the second processor determines the whole machine configuration based on the whole machine power consumption, wherein the whole machine configuration includes the configuration of the power supply unit; and the second processor sends the whole machine configuration to the first processor in each node.

[0125] In one embodiment, when the processor executes the computer program, the following steps are also implemented: the first processor in each node obtains the status register of the power supply unit through the power management bus to determine whether there is a data abnormality in the status register; when there is a data abnormality in the status register, the first processor in each node obtains the in-place state of the power supply unit through the power management bus; compares the configuration of the power supply unit in the whole machine configuration with the in-place state of the power supply unit, and when the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit are the same, determines that the in-place state of the power supply unit is normal; when the in-place state is normal and the data in the status register is abnormal, determines that the power supply unit is in an overcurrent state; the first processor in each node calculates the power consumption limit value corresponding to each node according to the power consumption requirement of each node; the first processor in each node controls the power consumption of each node according to the power consumption limit value.

[0126] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and the following steps are implemented when the computer program is executed by a processor: S1: the first processor and the second processor in multiple nodes determine the status of the first processor and the second processor through mutual detection; S2: in response to the abnormality of one or more first processors in multiple nodes, the second processor determines the node power consumption corresponding to the abnormal first processor based on the received node power consumption, and the second processor determines the power consumption of the entire machine based on the node power consumption of each node and the power consumption of external devices; S3: when the second processor receives an overcurrent alarm signal sent by a power supply unit, the second processor determines and sends the power consumption limit value to the external device and the node corresponding to the first processor in normal status based on the power consumption of the entire machine; S4: in response to the abnormality of the second processor, when the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node based on the information of the power supply unit.

[0127] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the first processors in the multiple nodes are respectively connected to the second processors through pins; the first processor and the second processor detect changes in pin levels, and determine the states of the first processor and the second processor based on the changes in the pin levels.

[0128] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the first processors in the multiple nodes respectively send excitation signals to the second processors; if the first processors in the multiple nodes detect that they do not receive a response from the second processor within a first time interval after sending the excitation signal, the state of the second processor is determined to be an abnormal state; the second processor monitors and does not receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determines that the state of the first processor that did not send the signal is an abnormal state.

[0129] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the second processor determines the maximum value among multiple node power consumptions based on the received node power consumptions corresponding to multiple normal first processors; the second processor uses the maximum value as the node power consumption corresponding to one or more abnormal first processors.

[0130] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the second processor determines and sends the power consumption limit value of the external device to the external device based on the power consumption of the entire machine; determines the total power consumption of nodes corresponding to multiple first processors in normal states based on the power consumption of the entire machine and the power consumption limit value of the external device; determines and sends the power consumption limit value corresponding to the node corresponding to each first processor in normal state to the node corresponding to each first processor in normal state based on the total power consumption and the power consumption requirement of the node corresponding to each first processor in normal state.

[0131] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the second processor determines the whole machine configuration based on the whole machine power consumption, wherein the whole machine configuration includes the configuration of the power supply unit; and the second processor sends the whole machine configuration to the first processor in each node.

[0132] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: the first processor in each node obtains the status register of the power supply unit through the power management bus to determine whether there is a data abnormality in the status register; when there is a data abnormality in the status register, the first processor in each node obtains the in-place state of the power supply unit through the power management bus; compares the configuration of the power supply unit in the whole machine configuration with the in-place state of the power supply unit, and when the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit are the same, determines that the in-place state of the power supply unit is normal; when the in-place state is normal and the data in the status register is abnormal, determines that the power supply unit is in an overcurrent state; the first processor in each node calculates the power consumption limit value corresponding to each node according to the power consumption requirement of each node; the first processor in each node controls the power consumption of each node according to the power consumption limit value.

[0133] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0134] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0135] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A power consumption control method, characterized in that: Applied to a multi-node server, the multi-node server includes a plurality of nodes, a second processor, an external device, and a power supply unit, wherein each node includes a first processor, the plurality of nodes, the external device, and the power supply unit are respectively connected to the second processor, and the method includes: The first processor and the second processor in the plurality of nodes determine the states of the first processor and the second processor by mutual detection; In response to one or more first processors in the plurality of nodes being abnormal, the second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determines the whole machine power consumption according to the node power consumption of each node and the power consumption of the external device; When the second processor receives the overcurrent alarm signal sent by the power supply unit, it determines and sends the power consumption limit value to the external device and the node corresponding to the first processor in normal state according to the power consumption of the whole machine; In response to the second processor being abnormal, when the first processor in each node receives an abnormal signal sent by the power supply unit, the first processor in each node obtains information about the power supply unit through the bus, and determines the power consumption limit value of each node based on the information about the power supply unit.

2. The power consumption control method according to claim 1, characterized in that: The first processor and the second processor in the multiple nodes determine the states of the first processor and the second processor by mutual detection, including: The first processors in the plurality of nodes are respectively connected to the second processors via pins; The first processor and the second processor detect changes in pin levels, and determine states of the first processor and the second processor according to the changes in the pin levels.

3. The power consumption control method according to claim 1, characterized in that: The first processor and the second processor in the multiple nodes determine the states of the first processor and the second processor by mutual detection, including: The first processors in the plurality of nodes respectively send an excitation signal to the second processors; If the first processor among the multiple nodes detects that no response from the second processor is received within a first time interval after sending the excitation signal, determining that the state of the second processor is an abnormal state; The second processor monitors and fails to receive the first excitation signal sent by the first processor of each node within a preset second time interval, and determines that the state of the first processor that does not send the signal is an abnormal state.

4. The power consumption control method according to claim 1, characterized in that: The second processor determines the node power consumption corresponding to the abnormal first processor according to the received node power consumption, including: The second processor determines a maximum value of multiple node power consumptions according to the received node power consumptions corresponding to the multiple normal first processors; The second processor uses the maximum value as the power consumption of nodes corresponding to one or more abnormal first processors.

5. The power consumption control method according to claim 1, characterized in that: When the second processor receives the overcurrent alarm signal sent by the power supply unit, determining and sending the power consumption limit value to the external device and the node corresponding to the first processor in a normal state according to the power consumption of the whole machine, including: The second processor determines, according to the power consumption of the entire device, and sends a power consumption limit value of the external device to the external device; Determine the total power consumption of nodes corresponding to the plurality of first processors in normal states according to the power consumption of the entire machine and the power consumption limit value of the external device; According to the total power consumption value and the power consumption requirement of the node corresponding to each first processor in a normal state, the power consumption limit value corresponding to the node corresponding to each first processor in a normal state is determined and sent to the node corresponding to each first processor in a normal state.

6. The power consumption control method according to claim 1, characterized in that: Prior to the responding to the second processor exception, the method further comprises: The second processor determines a whole machine configuration according to the whole machine power consumption, wherein the whole machine configuration includes a configuration of a power supply unit; The second processor sends the entire machine configuration to the first processor in each node.

7. The power consumption control method according to claim 6, characterized in that: The first processor in each node obtains information of the power supply unit through a bus, and determines a power consumption limit value of each node according to the information of the power supply unit, including: The first processor in each node obtains the status register of the power supply unit through the power management bus, and determines whether there is data abnormality in the status register; When there is data abnormality in the status register, the first processor in each node obtains the in-place status of the power supply unit through the power management bus; comparing the configuration of the power supply unit in the whole machine configuration with the in-place state of the power supply unit, and determining that the in-place state of the power supply unit is normal when the configuration of the power supply unit in the whole machine configuration and the in-place state of the power supply unit are the same; When the in-position state is normal and the data of the status register is abnormal, determining that the power supply unit is in an overcurrent state; The first processor in each node calculates the power consumption limit value corresponding to each node according to the power consumption requirement of each node; The first processor in each node controls the power consumption of each node according to the power consumption limit value.

8. A power consumption control device, characterized in that: Applied to a multi-node server, the multi-node server includes a plurality of nodes, a second processor, an external device and a power supply unit, wherein each node includes a first processor, the plurality of nodes, the external device and the power supply unit are respectively connected to the second processor, and the apparatus includes: A detection module, configured to determine the states of the first processor and the second processor in the plurality of nodes by mutual detection between the first processor and the second processor; A first processing module, configured to respond to one or more first processors in a plurality of nodes being abnormal, the second processor determining the node power consumption corresponding to the abnormal first processor according to the received node power consumption, and the second processor determining the whole machine power consumption according to the node power consumption of each node and the power consumption of an external device; A second processing module, configured to determine and send a power consumption limit value to an external device and a node corresponding to the first processor in a normal state according to the power consumption of the entire machine when the second processor receives an overcurrent alarm signal sent by the power supply unit; The third processing module is used to respond to the abnormality of the second processor. When the first processor in each node receives the abnormal signal sent by the power supply unit, the first processor in each node obtains the information of the power supply unit through the bus, and determines the power consumption limit value of each node according to the information of the power supply unit.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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