Chips, electronic devices and interactive systems
By designing control modules, boot modules and fast response modules in the chip, the problem that the chip cannot reply to interactive instructions in time before being ready to interact with the host is solved, and the initialization of the fast response module and the rapid response of the host instructions are realized.
Patent Information
- Application Number
- CN202411882739.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-04-04
AI Technical Summary
Because it takes a long time to write the application in flash to memory, the chip may have received the interactive instructions before it is ready to interact with the host, so it is impossible to reply to the host's interactive instructions in time.
A chip is designed, including a control module, a boot module and a fast response module. In the boot startup phase, the boot module reads the initialization parameters required by the fast response module from the flash area and writes them to the registers of the fast response module; the control module is used to start the fast response module; the fast response module can return the corresponding reply data after receiving the host's control instructions.
By initializing the fast response module in the boot startup phase in advance, ensuring that it can quickly reply to the host's control instructions, the problem that the chip cannot reply to interactive instructions in a timely manner.
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Figure CN119759661A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of chips, and more specifically, to a chip, an electronic device and an interactive system. Background Art
[0002] The host sends a reset signal to the chip. Under the action of the reset signal, the chip starts the boot, writes the application in the flash to the memory, and then executes the application in the memory through the MCU to initialize the chip's modules or functions, so that the host and the chip can interact.
[0003] After the host sends the reset signal to the chip, it will wait for 10ms and then send an interaction command to the chip to interact with it. However, since it takes a long time to write the application in the flash to the memory (usually 8ms to 9ms), it is possible that the chip receives the interaction command before it is ready to interact with the host, and the chip cannot reply to the host's response data about the interaction command. Summary of the invention
[0004] In view of the above problems, the present application proposes a chip, an electronic device and an interactive system, wherein the chip can be ready to interact with the host more quickly to avoid the chip being unable to respond to the host's interactive instructions in a timely manner.
[0005] In the first aspect, an embodiment of the present application provides a chip, which includes: a control module, a boot module and a quick response module, wherein: the boot module is used to read the initialization parameters required for the quick response module to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the register of the quick response module; the control module is used to start the quick response module; the quick response module is used to return reply data corresponding to the control instruction to the host when receiving the control instruction sent from the host.
[0006] In a second aspect, an embodiment of the present application further provides an electronic device, which includes: the above-mentioned chip.
[0007] In the third aspect, an embodiment of the present application also provides an interactive system, which includes: a host and the above-mentioned electronic device; the host is used to send a reset signal to the chip in the electronic device, and send a MIPI command to the chip after a preset time; the chip is used to enter the boot startup phase according to the reset signal and reply to the MIPI command sent by the host through a quick response module.
[0008] The technical solution provided by the present application, the chip includes: a control module, a boot module and a quick response module, wherein: the boot module is used to read the initialization parameters required for the quick response module to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the register of the quick response module; the control module is used to start the quick response module; the quick response module is used to return the reply data corresponding to the control instruction to the host when receiving the control instruction sent from the host. Therefore, during the boot startup phase, the boot module directly reads the initialization parameters required for the quick response module that are set in advance in the flash area, and writes the initialization parameters into the register of the quick response module, so that the quick response module can work normally, thereby realizing that the quick response module can reply to the control instruction sent from the host. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, not all embodiments. Based on the embodiments of the present application, all other embodiments and drawings obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0010] Figure 1 A schematic structural diagram of a chip provided in an embodiment of the present application is shown.
[0011] Figure 2 A schematic structural diagram of an electronic device provided in an embodiment of the present application is shown.
[0012] Figure 3 A schematic diagram of the structure of an interactive system provided in an embodiment of the present application is shown. DETAILED DESCRIPTION
[0013] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.
[0014] In the following description, reference is made to "some embodiments", which describes a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict. In the following description, reference is made to the term "multiple" to mean at least two.
[0015] In the following description, the terms "first\second" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.
[0016] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0017] The host sends a reset signal to the chip. Under the action of the reset signal, the chip starts the boot, writes the application in the flash to the memory, and then executes the application in the memory through the MCU to initialize the chip's modules or functions, so that the host and the chip can interact.
[0018] After the host sends the reset signal to the chip, it will wait for 10ms and then send an interaction command to the chip to interact with it. However, since it takes a long time to write the application in the flash to the memory (usually 8ms to 9ms), it is possible that the chip receives the interaction command before it is ready to interact with the host, and the chip cannot reply to the host's response data about the interaction command.
[0019] In order to improve the above-mentioned problems, the present application provides a chip, an electronic device and an interactive system, wherein the chip includes a control module, a boot module and a quick response module, wherein: the boot module is used to read the initialization parameters required for the quick response module to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the register of the quick response module; the control module is used to start the quick response module; the quick response module is used to return reply data corresponding to the control instruction to the host when receiving the control instruction sent from the host.
[0020] Therefore, during the boot startup phase, the boot module directly reads the initialization parameters required by the quick response module that have been set in advance in the flash area, and writes the initialization parameters into the registers of the quick response module so that the quick response module can work normally, thereby enabling the quick response module to reply to the control instructions sent by the host.
[0021] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.
[0022] See also Figure 1 , Figure 1 FIG. 1 shows a schematic diagram of the structure of a chip provided in an embodiment of the present application. Figure 1 As shown, the chip 100 includes a control module 110 , a boot module 120 and a fast response module 130 .
[0023] The boot module 120 is used to read the initialization parameters required for the quick response module 130 to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the registers of the quick response module 130; the control module 110 is used to start the quick response module 130; the quick response module 130 is used to return reply data corresponding to the control instruction to the host when receiving the control instruction sent from the host.
[0024] In the embodiment of the present application, the control module 110 may be a microcontroller unit (MCU). In other embodiments, the control module 110 may also be a computer processor (Central Processing Unit, CPU).
[0025] In an embodiment of the present application, the boot module 120 may initialize various modules or functions of the chip 100 during the startup process of the chip 100 to ensure that the chip 100 can safely and reliably perform corresponding tasks.
[0026] In the embodiment of the present application, the quick response module 130 (Quick Response Module) may be a qresp module of the chip 100. The quick response module 130 may directly interact with the host without the involvement of application software.
[0027] In the embodiment of the present application, the control instruction may be a read instruction sent by the host.
[0028] In the boot startup phase, the boot module 120 reads the initialization parameters required for the quick response module 130 to interact with the host from the flash area, and writes the initialization parameters into the registers of the quick response module 130 to complete the initialization operation of the quick response module 130. After starting the quick response module 130, the quick response module 130 can normally reply to the control command sent by the host, that is, send the reply data corresponding to the control command to the host, so as to realize the interaction between the host and the quick response module 130.
[0029] Since the present application stores the initialization parameters required for the quick response module 130 to interact with the host in the flash area in advance, the initialization parameters required for the quick response module 130 to perform initialization operations can be directly read from the flash area during the boot startup phase, so that the quick response module 130 can work normally, and thus the quick response module 130 can quickly reply to the control instructions sent by the host. This process usually takes only 1ms, thereby ensuring that after the host sends a reset signal to the chip 100, it sends a control instruction to the chip 10ms, and the quick response module 130 can return the reply data required by the control instruction.
[0030] That is to say, in the boot phase, the quick response module 130 can work without the participation of application software, thereby realizing the interaction between the quick response module 130 and the host earlier.
[0031] Compared with the prior art, the MCU performs initialization operations on the hardware and functions of the chip 100 according to the application. In this process, the MCU initializes the MIPI module. The MCU is also used to monitor the control instructions sent by the host, so that the MCU can parse the control instructions and give the host the required reply data. Since the MCU writes the application from the flash area to the memory, this process takes a long time. In the boot stage of this application, the fast response module 130 can be used normally, so that the fast response module 130 can reply to the control instructions sent to the host, thereby getting rid of the dependence on the MCU. And it only takes 1ms to wake up the fast response module 130, which can ensure that when the host sends a control instruction to the chip 100, the fast response module 130 can parse the control instruction and reply to the reply data required by the host.
[0032] In some implementations, the control module 110 is further configured to determine initialization parameters required for the quick response module 130 to interact with the host; the control module 110 is further configured to store the initialization parameters in a flash area.
[0033] The control module 110 predetermines the initialization parameters required for the quick response module 130 to interact with the host, and stores the determined initialization parameters in the flash area, so that in the boot startup phase, the boot module 120 directly reads these initialization parameters from the flash area to write the initialization parameters into the register of the quick response module 130 to complete the initialization operation of the quick response module 130. After starting the quick response module 130, the quick response module 130 can normally reply to the control command sent by the host, that is, send the reply data corresponding to the control command to the host, so as to realize the interaction between the host and the quick response module 130.
[0034] In some embodiments, the initialization parameters include multiple initial sub-parameters, each of which is used to reply to a MIPI command; the fast response module 130 is used to return reply data corresponding to the MIPI command to the host when receiving a MIPI command sent from the host.
[0035] In a specific embodiment, the initialization parameter includes eight initial sub-parameters. The eight initial sub-parameters are used to reply to eight MIPI commands respectively. It is understandable that the present application does not limit the number of initial sub-parameters included in the initialization parameter.
[0036] The MIPI command may be a read command sent by the host.
[0037] In some embodiments, each of the multiple initial sub-parameters includes an area number, a command byte, a command data type, a target command, a command size, and a reply parameter. The area number may be a gresp number. The command byte may include a long packet and a short packet. The command data type may be a data type of a read command. The target command may be a read command that needs to be replied. The command size may be the size of the reply command. The reply parameter may be reply data.
[0038] It is understandable that the present application does not limit the specific information of the initialization parameters, and the specific information of the initialization parameters can be flexibly set according to the needs of different functions.
[0039] In a specific embodiment, setting the content of an initial sub-parameter may include: setting the area number corresponding to the initial sub-parameter. For example, assuming that there are eight area numbers, determine the area number corresponding to the current initial sub-parameter. Exemplarily, assuming that one of the eight area numbers is 0x00, the area number corresponding to the initial sub-parameter can be set to 0x00. Set the command byte. That is, set whether the command byte is a long packet or a short packet. Exemplarily, setting the command byte to 0x00 can indicate that the command byte is a short packet; setting the command byte to 0x01 can indicate that the command byte is a long packet. Set the command data type, that is, set the data type of the read command. Set the target command, that is, the read command that needs to be replied. Set the size of the read command. When the command byte is a long packet, the size of the read command is at most 64 bytes. Set the reply parameter. When the command byte is a long packet, the reply parameter is at most 64 bytes.
[0040] The control module 110 determines the initialization parameters required by the quick response module 130 in advance and stores these initialization parameters in the flash area. Therefore, in the boot startup phase, the boot module directly reads the initialization parameters stored in the flash area and writes them into the register of the quick response module 130. After determining the quick response module 130, the quick response module 130 can process the control instructions sent by the host, thereby returning reply data corresponding to the control instructions to the host.
[0041] Furthermore, the control module 110 is specifically used to determine the memory value of the initialization parameter; the control module 110 is specifically used to determine the target storage area in the flash area according to the memory value, so as to store the initialization parameter in the target storage area; the boot module is specifically used to read the initialization parameter from the target storage area during the boot startup phase, so as to write the initialization parameter into the register of the quick response module 130.
[0042] After determining the initialization parameters required for the interaction between the quick response module 130 and the host, the control module 110 determines the memory size required for these initialization parameters, that is, determines the memory value. An area corresponding to the memory value is planned in the flash area to store the initialization parameters. In a specific embodiment, the size of the memory value can be 1KB. It is understood that the present application does not limit the specific value of the memory value, and the specific value of the memory value can be flexibly set according to actual conditions.
[0043] During the compilation stage, the initialization parameters determined by the control module 110 can be specified to be compiled into the target storage area in the flash area, so that during the boot startup stage, the boot module directly reads the initialization parameters from the target storage area and writes the read initialization parameters into the registers of the quick response module 130, so that after the quick response module 130 is started, the registers of the quick response module 130 can interact with the host.
[0044] In a specific embodiment, the target storage area may be area A of the flash area. It is to be understood that the present application does not limit the specific location of the target storage area.
[0045] Specifically, the boot module 120 is specifically configured to write the initialization parameters read from the flash area into the register of the fast response module 130 during the boot startup phase.
[0046] In the boot startup phase, the boot module 120 directly reads the initialization parameters stored in advance from the flash area, and directly writes the initialization parameters into the register of the quick response module 130. This ensures that the quick response module 130 can interact with the host after startup. This avoids the host sending a reset signal to the chip and then waiting for 10ms before sending a control instruction to the chip. The quick response module 130 can respond to the control instruction to achieve normal interaction between the host and the chip.
[0047] In a specific embodiment, the boot module 120 is specifically used to write the initialization parameters read from the flash area into the memory of the chip 100 during the boot startup phase; the control module 110 is specifically used to read the initialization parameters in the memory and write the initialization parameters into the register of the fast response module 130.
[0048] The control module stores the determined initialization parameters in the flash area (for example, the target storage area) in advance. In the boot startup phase, the boot module 120 directly reads these initialization parameters from the flash area and writes these initialization parameters into the memory (for example, the memory area) of the chip 100. Then, the boot module 120 reads these initialization parameters from the memory of the chip 100 and writes these initialization parameters into the register of the fast response module 130. This ensures that the fast response module 130 can interact with the host after startup. This avoids the host sending a reset signal to the chip and then sending a control instruction to the chip after waiting for 10ms. The fast response module 130 can respond to the control instruction to achieve normal interaction between the host and the chip.
[0049] In some implementations, the boot module 120 is further configured to enter a boot startup phase upon receiving a reset signal; the reset signal is sent by the host to the boot module 120 .
[0050] After the host sends a reset signal to the chip 100, the chip 100 executes the corresponding content in the reset signal according to the reset signal. This triggers the boot module 120 to enter the boot startup phase, so that the boot module 120 reads the initialization parameters required for the quick response module 130 to interact with the host from the flash area, and writes the initialization parameters into the register of the quick response module 130 to complete the initialization operation of the quick response module 130. After starting the quick response module 130, the quick response module 130 can normally reply to the control command sent by the host, that is, send the reply data corresponding to the control command to the host, so as to realize the interaction between the host and the quick response module 130.
[0051] In some implementations, the boot module 120 is specifically used to move the application from the flash area to the memory of the chip 100 after the quick response module 130 is started, so as to start the application after the boot is started.
[0052] After the quick response module 130 is started, the boot module 120 moves the application from the flash area to the memory of the chip 100. This process takes a long time, but since the quick response module 130 can already process normally, although the boot module 120 takes a long time to move the application from the flash area to the memory of the chip 100, it does not affect the interaction between the host and the chip 100.
[0053] In some embodiments, the application may be used to initialize the modules or functions of the chip 100. That is, after starting the application, the modules or functions of the chip 100 may be initialized to ensure that the chip 100 can safely and reliably perform corresponding operations.
[0054] In some embodiments, the chip 100 also includes a MIPI module, and the control module 110 is also used to shut down the quick response module 130 after starting the application; the control module 110 is used to control the MIPI module to initialize after starting the application; wherein, after the MIPI module is initialized, the control module and the host can communicate based on the MIPI protocol.
[0055] The MIPI module may be a Mobile Industry Processor Interface (MIPI) module.
[0056] After the host sends a reset signal to the chip 100, the chip 100 executes the corresponding content in the reset signal according to the reset signal. This triggers the boot module 120 to enter the boot startup phase, so that the boot module 120 reads the initialization parameters required for the quick response module 130 to interact with the host from the flash area, and writes the initialization parameters into the register of the quick response module 130 to complete the initialization operation of the quick response module 130. After starting the quick response module 130, the quick response module 130 can normally reply to the control command sent by the host, that is, send the reply data corresponding to the control command to the host, so as to realize the interaction between the host and the quick response module 130.
[0057] After the chip 100 interacts with the host through the quick response module 130, the control module 110 can also be changed to reply to the read command sent by the host, and the quick response module 130 only needs to be turned off, and the control module 110 initializes the MIPI module, and the control module 110 monitors the control command sent by the host, and the control module 110 parses the control command and replies the required reply data.
[0058] See also Figure 2 , Figure 2 A schematic structural diagram of an electronic device provided in an embodiment of the present application is shown. The electronic device 200 includes: the above-mentioned chip 100.
[0059] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-mentioned chip 100 can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.
[0060] See also Figure 3 , Figure 3 The structure diagram of an interactive system provided by an embodiment of the present application is shown. The interactive system 300 includes: the host 310 and the electronic device 200, wherein: The host 310 is used to send a reset signal to the chip 100 in the electronic device 200, and send a MIPI command to the chip 100 after a preset time; The chip 100 is used to enter the boot phase according to the reset signal and reply to the MIPI command sent by the host 310 through the fast response module 130 .
[0061] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working processes of the host 310, chip 100 and electronic device 200 can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0062] The technical solution provided by the present application, the chip includes: a control module, a boot module and a quick response module, wherein: the boot module is used to read the initialization parameters required for the quick response module to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the register of the quick response module; the control module is used to start the quick response module; the quick response module is used to return the reply data corresponding to the control instruction to the host when receiving the control instruction sent from the host. Therefore, during the boot startup phase, the boot module directly reads the initialization parameters required for the quick response module that are set in advance in the flash area, and writes the initialization parameters into the register of the quick response module, so that the quick response module can work normally, thereby realizing that the quick response module can reply to the control instruction sent from the host.
[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A chip, characterized in that: It includes control module, boot module and quick response module, among which: The boot module is used to read the initialization parameters required for the quick response module to interact with the host from the flash area during the boot startup phase, and write the initialization parameters into the register of the quick response module; The control module is used to start the rapid response module; The quick response module is used to return reply data corresponding to the control instruction to the host when receiving the control instruction sent by the host.
2. The chip according to claim 1, characterized in that: The control module is further used to determine the initialization parameters required for the quick response module to interact with the host; The control module is also used to store the initialization parameters in the flash area.
3. The chip according to claim 1, characterized in that: The initialization parameter includes a plurality of initial sub-parameters, each of the plurality of initial sub-parameters being used to reply to a MIPI command; The fast response module is used to return reply data corresponding to the MIPI command to the host when receiving the MIPI command sent by the host.
4. The chip according to claim 3, characterized in that: Each of the multiple initial sub-parameters includes an area number, a command byte, a command data type, a target command, a command size, and a reply parameter.
5. The chip according to claim 2, characterized in that: The control module is specifically used to determine the memory value of the initialization parameter; The control module is specifically used to determine a target storage area in the flash area according to the memory value, so as to store the initialization parameter in the target storage area; The boot module is specifically used to read the initialization parameters from the target storage area during the boot startup phase, so as to write the initialization parameters into the register of the quick response module.
6. The chip according to claim 1, characterized in that: The boot module is specifically used to write the initialization parameters read from the flash area into the register of the quick response module during the boot startup phase.
7. The chip according to claim 1, characterized in that: The boot module is specifically used to write the initialization parameters read from the flash area into the memory of the chip during the boot startup phase; The control module is specifically used to read the initialization parameters in the memory and write the initialization parameters into the register of the fast response module.
8. The chip according to claim 1, characterized in that: The boot module is specifically used to move the application program from the flash area to the memory of the chip after the quick response module is started, so as to start the application program after the boot is started.
9. The chip according to claim 8, characterized in that: Also comprising a MIPI module, the control module is further used to close the quick response module after starting the application; The control module is used to control the MIPI module to initialize after starting the application; wherein, after the MIPI module is initialized, the control module and the host can communicate based on the MIPI protocol.
10. The chip according to claim 1, characterized in that: The boot module is further configured to enter the boot startup phase upon receiving a reset signal; the reset signal is sent by the host to the boot module.
11. An electronic device, characterized in that: Comprising a chip as described in any one of claims 1-10.
12. An interactive system, characterized in that: The interactive system comprises a host and the electronic device as claimed in claim 11; The host is used to send a reset signal to the chip in the electronic device, and send a MIPI command to the chip after a preset time; The chip is used to enter the boot startup phase according to the reset signal and reply to the MIPI command sent by the host through a fast response module.