A method for storing a parity check matrix, a data decoding method, an apparatus, and an electronic device.

Abstract

This application discloses a parity check matrix storage method, data decoding method, apparatus, and electronic device, relating to the field of data processing technology. The parity check matrix storage method includes: obtaining the base matrix corresponding to the parity check matrix; dividing the base matrix into multiple sub-base matrices with the same data format; for each sub-base matrix, determining the shift value corresponding to each non-zero item in each row of the sub-base matrix, and the column index in the sub-base matrix, forming multiple sets of data and row end marker information corresponding to each row; storing the multiple sets of data and row end marker information corresponding to each row by column to obtain the corresponding storage matrix. Thus, since the number of columns and / or rows in each sub-base matrix is ​​reduced relative to the base matrix, the redundant space required for alignment when storing the column index and shift value of each row of the base matrix can be reduced. Compared with the scheme of storing based on the column index and shift value of the non-zero item in each row of the base matrix, the storage space can be reduced.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to a method for storing a verification matrix, a data decoding method, an apparatus, and an electronic device. Background Technology

[0002] Quasi-cyclic low-density parity-check codes (QC-LDPCs) typically have a structured parity-check matrix. QC-LDPC codes can be implemented in hardware using shift registers, saving storage space. They offer high data throughput and near-random LDPC error correction performance, thus attracting wider research attention. However, for applications with long codewords and high code rates, the large dimension of the parity-check matrix means that directly storing the entire matrix consumes significant storage space and slows data transmission. Furthermore, it increases the complexity and time required for decoding. Summary of the Invention

[0003] In view of this, embodiments of this application provide a method for storing a verification matrix, a data decoding method, an apparatus, and an electronic device.

[0004] According to a first aspect of this application, embodiments of this application provide a method for storing a verification matrix, including:

[0005] Obtain the basis matrix corresponding to the verification matrix;

[0006] Divide the basis matrix into multiple sub-basis matrices with the same data format;

[0007] For each sub-base matrix, determine the shift value corresponding to each non-zero item in each row of the sub-base matrix, as well as the column index in the sub-base matrix, to form multiple sets of data and row end marker information for each row; store the multiple sets of data and row end marker information for each row by column to obtain the corresponding storage matrix.

[0008] Optionally, the basis matrix can be divided into multiple sub-basis matrices with the same data format, including:

[0009] The basis matrix is ​​split equally by column to obtain multiple sub-basis matrices with the same data format.

[0010] Optionally, the parity matrix storage method further includes the following before performing an average partitioning of the base matrix by column:

[0011] If it is determined that the number of columns in the base matrix is ​​not divisible by the preset number of splits, the number of columns in the base matrix is ​​padded to make the number of columns divisible by the preset number of splits.

[0012] Optionally, the basis matrix corresponding to the parity check matrix can be obtained as follows:

[0013] The parity check matrix is ​​divided according to the dimensions of the submatrices to determine each submatrix and its corresponding position information.

[0014] The shift value of each submatrix is ​​determined according to the shift value determination rules;

[0015] The base matrix is ​​formed based on the shift value of each submatrix and the position information corresponding to each submatrix.

[0016] According to a second aspect of this application, embodiments of this application provide a data decoding method, including:

[0017] Step 1: Initialize the posterior and prior probabilities based on the data to be decoded;

[0018] Step 2: For the first round of iteration, based on the row-by-row decoding method, read multiple sets of data and row end marker information from multiple storage matrices row by row; and based on the multiple sets of data and row end marker information from multiple storage matrices, update the prior probability according to the decoding rules; and update the posterior probability based on the updated prior probability; the storage matrix is ​​obtained by the check matrix storage method as described in the first aspect or any implementation of the first aspect.

[0019] Step 3: For the second round of iterations and subsequent iterations, based on row-by-row decoding and verification, multiple sets of data and row end markers are read from multiple storage matrices row by row; and based on the multiple sets of data and row end markers in the multiple storage matrices, the prior probabilities are updated according to the decoding rules; the posterior probabilities are updated based on the updated prior probabilities, and the decoding result corresponding to the updated posterior probabilities is determined; based on the updated posterior probabilities and the decoding result verification rules, the decoding result is verified to obtain the verification result.

[0020] Step 4: If the decoding result is determined to be correct based on the verification result, stop decoding; otherwise, repeat step 3 until the decoding result is determined to be correct or the iteration number threshold is reached.

[0021] Optionally, the posterior and prior probabilities are initialized based on the data to be decoded, including:

[0022] Initialize the data to be decoded;

[0023] The initialized data to be decoded is used as the initial value of the posterior probability, and the initial value of the prior probability is set to 0.

[0024] Optionally, based on multiple sets of data in multiple storage matrices and row end marker information, the prior probabilities are updated according to the decoding rules, including:

[0025] For each storage matrix, the position of each non-zero item in the parity check matrix is ​​calculated based on the shift value corresponding to the non-zero item in multiple sets of data, the column index in the sub-base matrix, and the row end marker information.

[0026] Based on the position, posterior probability, and prior probability of each non-zero item in the verification matrix, determine the probability difference at the corresponding position of each non-zero item;

[0027] Based on the probability difference at the position corresponding to each non-zero item in each storage matrix, determine the minimum value, the second smallest value, the cumulative product of the sign bits of the non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value;

[0028] The prior probability is updated based on the cumulative product of the minimum, second minimum, and non-zero sign bits in multiple storage matrices, as well as the row re-index and storage matrix number corresponding to the minimum value.

[0029] Optionally, based on the shift values ​​corresponding to non-zero items in multiple sets of data, their column indices in the sub-basis matrix, and row end marker information, the position of each non-zero item in the parity check matrix is ​​calculated, including:

[0030] Based on the shift values ​​corresponding to non-zero items in multiple sets of data, the column index in the sub-base matrix, and the dimension and row end marker information of the sub-matrix, calculate the actual column position of each non-zero item in the first row of the check matrix;

[0031] Based on the actual column position of each non-zero item in the first row of the check matrix, calculate the actual column position of each non-zero item in the other rows of the check matrix.

[0032] Optionally, based on the probability difference at the position corresponding to each non-zero item in each storage matrix, the minimum value, the second smallest value, the cumulative product of the sign bits of non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value are determined, including:

[0033] Based on the probability difference at the position corresponding to each non-zero item in each storage matrix, determine the minimum value of each storage matrix and its corresponding row re-index, storage matrix number, and the cumulative product of the second smallest value and the sign bit of the non-zero item;

[0034] Based on the minimum value of each storage matrix and its corresponding row re-index, storage matrix number, and the cumulative product of the second smallest value and the sign bits of non-zero items, determine the minimum value and its corresponding row re-index, storage matrix number among multiple storage matrices; and the cumulative product of the second smallest value and the sign bits of non-zero items.

[0035] Optionally, the prior probability is updated based on the cumulative product of the minimum, second minimum, and non-zero term sign bits in multiple storage matrices, as well as the row re-index and storage matrix number corresponding to the minimum value, including:

[0036] If the row index corresponding to the minimum value in multiple storage matrices is different from the column index corresponding to the non-zero item in the storage matrix, the prior probability is updated based on the cumulative product of the minimum value and the sign bit of the non-zero item in multiple storage matrices.

[0037] If the row index corresponding to the minimum value in multiple storage matrices is the same as the column index corresponding to the non-zero item in the storage matrix, and the storage matrix number of the minimum value is the same as the storage matrix number corresponding to the non-zero item, the prior probability is updated based on the cumulative product of the second smallest value and the sign bit of the non-zero item in multiple storage matrices.

[0038] According to a third aspect of this application, embodiments of this application provide a verification matrix storage device, comprising:

[0039] The acquisition module is used to obtain the base matrix corresponding to the verification matrix;

[0040] The partitioning module is used to divide a basis matrix into multiple sub-basis matrices with the same data format.

[0041] The storage module is used to determine the shift value corresponding to each non-zero item in each row of the sub-base matrix and the column index in the sub-base matrix for each sub-base matrix, forming multiple sets of data and row end marker information for each row; and storing the multiple sets of data and row end marker information for each row by column to obtain the corresponding storage matrix.

[0042] According to a fourth aspect of this application, embodiments of this application provide a data decoding apparatus, including:

[0043] An initialization module is used to initialize the posterior and prior probabilities based on the data to be decoded.

[0044] The decoding module is used for the first round of iteration to read multiple sets of data and row end marker information from multiple storage matrices row by row based on a row-by-row decoding method; and to update the prior probability according to the decoding rules based on the multiple sets of data and row end marker information from multiple storage matrices; and to update the posterior probability based on the updated prior probability; the storage matrix is ​​obtained by the check matrix storage method as described in the first aspect or any implementation of the first aspect.

[0045] The update module is used for the second round of iterations and subsequent iterations. It reads multiple sets of data and row end markers from multiple storage matrices row by row, based on a row-by-row decoding and verification method. It then updates the prior probabilities according to the decoding rules based on the data and row end markers from the multiple storage matrices. Finally, it updates the posterior probabilities based on the updated prior probabilities and determines the decoding result corresponding to the updated posterior probabilities. Finally, it verifies the decoding result based on the updated posterior probabilities and the decoding result verification rules to obtain the verification result.

[0046] The judgment module is used to stop decoding if the decoding result is determined to be correct based on the verification result; otherwise, it repeatedly updates the execution content of the module until the decoding result is determined to be correct or the iteration number threshold is reached.

[0047] According to a fifth aspect of this application, embodiments of this application provide an electronic device, including:

[0048] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to cause the at least one processor to perform a check matrix storage method as described in the first aspect or any embodiment of the first aspect, or a data decoding method as described in the second aspect or any embodiment of the second aspect.

[0049] According to a sixth aspect of this application, embodiments of this application provide a computer-readable storage medium storing computer instructions for causing a computer to perform a check matrix storage method as described in the first aspect or any embodiment of the first aspect, or a data decoding method as described in the second aspect or any embodiment of the second aspect.

[0050] According to a seventh aspect of this application, an embodiment of this application provides a computer program product, including a computer program or instructions, which, when executed by a processor, implement a check matrix storage method as described in the first aspect or any embodiment of the first aspect, or a data decoding method as described in the second aspect or any embodiment of the second aspect.

[0051] The parity check matrix storage method, data decoding method, apparatus, and electronic device provided in this application embodiment obtain the base matrix corresponding to the parity check matrix; divide the base matrix into multiple sub-base matrices with the same data format; for each sub-base matrix, determine the shift value corresponding to each non-zero item in each row of the sub-base matrix, as well as the column index in the sub-base matrix, forming multiple sets of data and row end marker information corresponding to each row; store the multiple sets of data and row end marker information corresponding to each row column-wise to obtain the corresponding storage matrix; thus, the parity check matrix is ​​converted into a base matrix, and then the base matrix is ​​divided into multiple sub-base matrices. Then, the column indices and shift values ​​of the non-zero items in each row of each sub-base matrix are stored to realize the storage of the parity check matrix. That is, multiple storage matrices jointly store the column indices and shift values ​​of all non-zero items in the base matrix. Since the number of columns and / or rows of each sub-base matrix is ​​reduced relative to the base matrix, the redundant space required for alignment when storing the column indices and shift values ​​of each row of the base matrix can be reduced. Compared with the scheme of directly storing the column indices and shift values ​​of the non-zero items in each row of the base matrix, or the scheme of directly storing the parity check matrix, the storage space can be reduced and the parity check matrix can be stored more conveniently.

[0052] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0053] Figure 1 This is a flowchart illustrating a verification matrix storage method according to an embodiment of this application;

[0054] Figure 2 This is a schematic diagram of the identity matrix in an embodiment of this application;

[0055] Figure 3 This is a schematic diagram of an all-zero matrix in an embodiment of this application;

[0056] Figure 4 This is a schematic diagram of a cyclic shift matrix with a shift value of 1 in an embodiment of this application;

[0057] Figure 5 This is a schematic diagram of the format of the storage matrix corresponding to each base matrix in the embodiments of this application;

[0058] Figure 6 This is a schematic diagram of the base matrix in an embodiment of this application;

[0059] Figure 7 This is a flowchart illustrating another verification matrix storage method in an embodiment of this application;

[0060] Figure 8 This is a flowchart illustrating the data decoding method in an embodiment of this application;

[0061] Figure 9 The BER performance graph is obtained based on the parity-check matrix storage method and decoding method of this application.

[0062] Figure 10 The FER performance diagram is obtained based on the parity-check matrix storage method and decoding method of this application;

[0063] Figure 11 This is a schematic diagram of the structure of the verification matrix storage device in the embodiments of this application;

[0064] Figure 12 This is a schematic diagram of the data decoding device in the embodiments of this application;

[0065] Figure 13 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0066] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0067] This application provides a method for storing a verification matrix, such as... Figure 1 As shown, it includes:

[0068] S101, obtain the base matrix corresponding to the parity check matrix.

[0069] In this embodiment, the parity check matrix can be a QC-LDPC parity check matrix. QC-LDPC (Quasi-Cyslic Low-Density Parity-Check Codes) is a quasi-cyclic LDPC code. Quasi-cyclic LDPC codes are an important subset of structured LDPC codes. Their corresponding parity check matrices can be divided into multiple sub-matrices of equal size. Each sub-matrix is ​​a cyclic shift matrix of the identity matrix or an all-zero matrix, which is very convenient for memory storage and addressing, thereby greatly reducing the encoding and decoding complexity of LDPC codes. Furthermore, quasi-cyclic LDPC codes with a repeating cumulative structure can achieve fast encoding with linear complexity.

[0070] A QC-LDPC check matrix is ​​typically composed of submatrices such as an identity matrix, a cyclic shift matrix of the identity matrix, and an all-zero matrix. Submatrices are characterized by shift values, which represent the value of a cyclic shift of the identity matrix to the right. For example, a shift value of -1 represents an all-zero matrix; a shift value of 0 represents the identity matrix; a shift value of 1 represents a cyclic shift matrix obtained by shifting the first column of the identity matrix to the right; and a shift value of 2 represents a cyclic shift matrix obtained by shifting the first and second columns of the identity matrix to the right. Therefore, for a specific submatrix of a QC-LDPC code, once the dimension and shift values ​​of the submatrix are determined, all the information of that submatrix can be obtained.

[0071] In this embodiment, the verification matrix can be composed of an identity matrix, a cyclic shift matrix of the identity matrix, and an all-zero matrix. The identity matrix is ​​as follows: Figure 2 As shown, the all-zero matrix is ​​as follows Figure 3 As shown. A cyclic shift matrix with a shift value of 1 is shown below. Figure 4 As shown. Therefore, by determining the type of each submatrix in the parity check matrix, the basis matrix H corresponding to the parity check matrix can be obtained, such as... Figure 5As shown, -1 represents a matrix of all zeros, 0 represents the identity matrix, and the other numbers in the base matrix represent the values ​​of the identity matrix shifted to the right. From the above... Figures 2-4 It can be seen that each row in each submatrix contains only one non-zero number. Therefore, for the parity check matrix, it is only necessary to store the actual column index of the non-zero item in each row of the base matrix and the shift value of the submatrix corresponding to the non-zero item in each row to determine the actual position of the non-zero item in the matrix.

[0072] S102 divides the basis matrix into multiple sub-basis matrices with the same data format.

[0073] In this embodiment, when the dimension of the base matrix is ​​large, such as the QC-LDPC matrix adapted in NAND flash memory, which often has hundreds of columns, storing all non-zero items in the base matrix using a single storage matrix places stricter requirements on the Static Random-Access Memory (SRAM). For example, when the number of columns in the base matrix exceeds 128, since communication systems and computers use binary storage, more redundant space is often needed to store some smaller columns for data format alignment, resulting in wasted storage space. A non-zero item refers to an element whose shift value is not -1.

[0074] Therefore, in this embodiment, the basis matrix can be divided into multiple sub-basis matrices with the same data format, so that multiple storage matrices can be used to store all non-zero items in the basis matrix.

[0075] In this embodiment, the basis matrix can be divided into multiple sub-basis matrices with the same data format based on the rows of the basis matrix, or it can be divided into multiple sub-basis matrices with the same data format based on the rows of the basis matrix. The same data format can mean that the data size is the same.

[0076] S103. For each sub-base matrix, determine the shift value corresponding to each non-zero item in each row of the sub-base matrix, as well as the column index in the sub-base matrix, to form multiple sets of data and row end marker information for each row; store the multiple sets of data and row end marker information for each row by column to obtain the corresponding storage matrix.

[0077] In this embodiment, the position of the non-zero item in the first row of the submatrix in the parity check matrix can be calculated from the column index of the non-zero item in the first row of the subbase matrix and the shift value. The positions of the non-zero items in the remaining rows of the submatrix can also be obtained through shift operations. Therefore, the subbase matrix can be stored by converting each subbase matrix into a special matrix that stores the index of the non-zero item in each column of the subbase matrix and the corresponding shift value information. Thus, for each subbase matrix, the shift value corresponding to each non-zero item in each row of the subbase matrix and its column index in the subbase matrix can be determined and stored column by column; and when a non-zero item is determined to be the last non-zero item in the current row of the subbase matrix, a row end marker is added, such as... Figure 6 As shown in the diagram. Here, Col-idx represents the column index, Factor represents the shift value, and Flag represents the row end marker. In this embodiment, -1 can be used to represent the row end marker.

[0078] Although this scheme adds a few bits for the row end marker for each row of the base matrix during storage, it actually reduces storage space and makes storage more convenient because it reduces the maximum number of columns or rows and the redundant space required for alignment.

[0079] by Figure 5 Taking the H matrix as an example, indexed by 0, the 0th and 1st columns of the H matrix are stored as a sub-basis matrix, H0; the 2nd and 3rd columns as a sub-basis matrix, H1; the 4th and 5th columns as a sub-basis matrix, H2; and the 6th and 7th columns as a sub-basis matrix, H3. That is, the actual values ​​stored in the first row of H0 are: 0, 0, -1; the actual values ​​stored in the first row of H1 are: 0, 2, 1, 0, -1; the actual values ​​stored in the first row of H2 are: 0, 3, -1; and the actual values ​​stored in the first row of H3 are: 0, 0, 1, 1, -1. Two numbers form a group, jointly representing the position of the non-zero item in the sub-basis matrix and its corresponding shift value. The first row of the H matrix above can be further understood as H1: [0 0] [-1]; H2: [0 2] [1 0][-1]; H3: [0 0][1 1] [-1]; where the first number represents the column index of the non-zero item in the sub-base matrix, the second number represents the shift value of the sub-matrix corresponding to the non-zero item, and the last -1 is the end marker of the row. When aligning according to the actual width of the SRAM, its position and shift value are both replaced by -1.

[0080] For the H matrix after the above segmentation, since the maximum number of columns in each sub-base matrix is ​​1, it becomes 1 after conversion to binary; the maximum shift value is 3, which becomes 11 after conversion to binary. Therefore, the bit width of each group of data is calculated and aligned according to 4. In the actual storage device, it is: H1: [0 0 0 0] [1 1 1 1][1 1 1]; H2: [0 0 1 0 ][0 1 00] [1 1 1 1 ]; H3: [0 0 0 0][0 1 0 1] [1 1 1 ], with a total bit width of 12×4, totaling 48 bits.

[0081] If stored according to the non-zero items and shift values ​​of a row in the base matrix, the actual stored numbers become 0, 0, 2, 2, 3, 0, 4, 3, 6, 0, 7, 1. Since 7 is 1 1 1 in binary, for alignment purposes, the column index of each non-zero item needs to be calculated using 4 bits. Therefore, its final binary representation is:

[0082] [0000 0000][0010 0010][0011 0000][0100 0011][0110 0011][0111 0001][11111111], totaling 56 bits. The actual space used is actually larger.

[0083] The parity check matrix storage method provided in this application involves obtaining the base matrix corresponding to the parity check matrix; dividing the base matrix into multiple sub-base matrices with the same data format; for each sub-base matrix, determining the shift value corresponding to each non-zero item in each row of the sub-base matrix, as well as the column index in the sub-base matrix, forming multiple sets of data and row end marker information for each row; and storing the multiple sets of data and row end marker information for each row column-wise to obtain the corresponding storage matrix. Thus, the parity check matrix is ​​converted into a base matrix, then the base matrix is ​​divided into multiple sub-base matrices, and then each sub-base matrix... The parity check matrix is ​​stored by storing the column indices and shift values ​​of the non-zero items in each row of the matrix. In other words, multiple storage matrices jointly store the column indices and shift values ​​of all non-zero items in the base matrix. Since the number of columns and / or rows of each sub-base matrix is ​​smaller than that of the base matrix, the redundant space required for alignment when storing the column indices and shift values ​​of each row of the base matrix can be reduced. Compared with the scheme of directly storing the column indices and shift values ​​of the non-zero items in each row of the base matrix, or the scheme of directly storing the parity check matrix, the storage space can be reduced and the parity check matrix can be stored more conveniently.

[0084] In an optional embodiment, step S101, obtaining the basis matrix corresponding to the parity check matrix, includes:

[0085] The parity check matrix is ​​divided according to the dimensions of the submatrices to determine each submatrix and its corresponding position information; the shift value of each submatrix is ​​determined according to the shift value determination rule; and a base matrix is ​​formed based on the shift value of each submatrix and its corresponding position information.

[0086] In this embodiment, since the base matrix is ​​composed of multiple submatrices, the parity check matrix is ​​divided according to the dimensions of the base matrix, which allows us to determine each submatrix and its corresponding position information. Then, for each submatrix, we can determine its type and, based on the correspondence between the shift value and the submatrix type, determine the shift value for each submatrix, thereby forming the base matrix corresponding to the parity check matrix.

[0087] In this embodiment, the parity check matrix is ​​divided according to the dimensions of the base matrix, thereby quickly determining the base matrix corresponding to the parity check matrix.

[0088] In an optional embodiment, step S102, dividing the basis matrix into multiple sub-basis matrices with the same data format, includes:

[0089] The basis matrix is ​​split equally by column to obtain multiple sub-basis matrices with the same data format.

[0090] In practice, the base matrix can be split into multiple sub-base matrices of the same size by column. For example, the base matrix can be split into four sub-base matrices of the same size by column.

[0091] In some implementations, the parity matrix storage method further includes the following steps before performing an average partitioning of the base matrix by column:

[0092] If it is determined that the number of columns in the base matrix is ​​not divisible by the preset number of splits, the number of columns in the base matrix is ​​padded to make the number of columns divisible by the preset number of splits.

[0093] In practice, for example, if the base matrix has 15 columns and the preset number of partitions is 4, then 15 is not divisible by 4, meaning the number of columns in the base matrix is ​​not divisible by the preset number of partitions. Therefore, the number of columns in the base matrix can be padded to 16, with each item in the padded 16 being a non-zero item. Thus, 16 becomes divisible by 4. When partitioning the base matrix column-wise, it can be divided into four sub-base matrices, each with four columns.

[0094] In this embodiment, by padding the number of columns in the base matrix, the base matrix can be split evenly, so that the data format of each sub-matrix is ​​the same and the data is easier to align when used.

[0095] The storage method of the parity check matrix of this application will be further described below with reference to a specific embodiment. For example... Figure 7 As shown, the base matrix H of the parity check matrix can be obtained first. Then, matrix H is divided into four equal parts by columns. If the size of any sub-base matrix is ​​smaller than the average matrix size when the base matrix is ​​divided, it is aligned to the average matrix size. That is, when the number of columns in the base matrix is ​​not divisible by 4, the size of the last sub-base matrix is ​​aligned to the size of the other sub-base matrices. Next, each matrix stores the column index and shift value of the column containing the non-zero item in each row, and continuously checks if it is the last non-zero item in that row. If it is, a row end marker is added, and the process continues to check if it is the last row of the sub-base matrix. If it is the last row, the process ends; otherwise, it continues to store the column index and shift value of the column containing the non-zero item in each row. If it is not the last row, the column index and shift value of the column containing the non-zero item in the next row are stored, and this process continues until the last row of the matrix. In this way, it is possible to store the shift value of each non-zero item in each row of each sub-base matrix and its column index in the sub-base matrix, as well as the row end marker information of each row.

[0096] This application also provides a data decoding method, such as... Figure 8 As shown, it includes:

[0097] Step 1: Initialize the posterior and prior probabilities based on the data to be decoded.

[0098] In some implementations, the posterior and prior probabilities are initialized based on the data to be decoded, including:

[0099] Initialize the data to be decoded; use the initialized data to be decoded as the initial value of the posterior probability, and set the initial value of the prior probability to 0.

[0100] In practice, the information of each bit position of the data to be decoded can be converted into an LLR value using the following formula to initialize the decoded data:

[0101] LLR = 2ay n / σ 2 ;

[0102] Among them, y n It is the codeword after encoding and being affected by noise, σ is the logarithmic standard deviation, and a is the average energy of the signal corresponding to the data to be decoded. LLR (Log Likelihood Ratio) is the log-likelihood ratio.

[0103] Step 2: For the first round of iteration, based on the row-by-row decoding method, read multiple sets of data and row end marker information from multiple storage matrices row by row; and based on the multiple sets of data and row end marker information from multiple storage matrices, update the prior probability according to the decoding rules; and update the posterior probability based on the updated prior probability; the storage matrix is ​​obtained by the check matrix storage method as described in any of the above embodiments.

[0104] In this embodiment, decoding is performed layer by layer, with each row of the multiple storage matrices considered as a layer. This allows for the reading of multiple sets of data and row end markers from the multiple storage matrices row by row. When reading multiple sets of data from each row in each storage matrix, the row weight of that row is incremented by 1 after each set of data is read, until the row end marker is decremented by 1. The row weight of each storage matrix is ​​recorded. For each row containing multiple sets of data and row end markers, the position of each non-zero item in the parity check matrix can be determined based on these data sets and markers. Then, the probability difference at each position corresponding to a non-zero item is determined, and the prior probability is updated based on this probability difference.

[0105] In some implementations, based on multiple sets of data in multiple storage matrices and row end marker information, the prior probabilities are updated according to decoding rules, including:

[0106] For each storage matrix, based on the shift values ​​corresponding to non-zero items in multiple sets of data, the column index in the sub-base matrix, and the row end marker information, calculate the position of each non-zero item in the parity check matrix; based on the position of each non-zero item in the parity check matrix, the posterior probability, and the prior probability, determine the probability difference at the position corresponding to each non-zero item; based on the probability difference at the position corresponding to each non-zero item in each storage matrix, determine the minimum value, the second smallest value, the cumulative product of the sign bits of non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value; based on the cumulative product of the minimum value, the second smallest value, and the sign bits of non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value, update the prior probability.

[0107] In this embodiment, the probability difference Lq = LQ – Lr, where LQ is the posterior probability and Lr is the prior probability.

[0108] In this embodiment, the row re-index corresponding to the minimum value is the nth non-zero item in that row of the storage matrix to which the minimum value belongs.

[0109] In this embodiment, the prior probability update formula is as follows: Lr = sign_all × current position sign × (minimum value / second smallest value) × α; where α is a normalization factor with a value between 0.5 and 1; sign_all is the cumulative product of the sign bits of non-zero items in multiple storage matrices.

[0110] In practice, based on the shift values ​​corresponding to non-zero items in multiple sets of data, their column indices in the sub-basis matrix, and row end marker information, the position of each non-zero item in the parity check matrix is ​​calculated, including:

[0111] Based on the shift values ​​of non-zero items in multiple sets of data, their column indices in the sub-base matrix, and the dimensions and row end markers of the sub-matrix, calculate the actual column position of each non-zero item in the first row of the parity check matrix; based on the actual column position of each non-zero item in the first row of the parity check matrix, calculate the actual column position of each non-zero item in other rows of the parity check matrix.

[0112] For example, using the column index of the non-zero item in the sub-base matrix and the dimension of the sub-matrix, the position of the corresponding non-zero item in the first row of the sub-matrix can be calculated through shifting operations, i.e.:

[0113] Y1= (x – 1)×p + f + 1 (1)

[0114] Where Y1 represents the actual column position of the non-zero item in the first row of the check matrix, x represents the stored column index, p is the submatrix dimension, and f is the submatrix shift value.

[0115] The actual column positions of non-zero items in other rows of the submatrix can be determined by the actual column positions in the first row.

[0116] Y i+1 = Y i +1 (Y) i (2) mod p ≠ 0

[0117] Y i+1 = Y i + 1– p (Y i (3) mod p = 0

[0118] Where i represents the row number in the submatrix, Yi represents the column position of the non-zero item corresponding to the other row in the submatrix, and p is the dimension of the submatrix.

[0119] In practical implementation, based on the probability difference at the position corresponding to each non-zero item in each storage matrix, the minimum value, the second smallest value, the cumulative product of the sign bits of non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value are determined, including:

[0120] Based on the probability difference at the corresponding position of each non-zero item in each storage matrix, determine the minimum value of each storage matrix and its corresponding row repetition index, storage matrix number, and the cumulative product of the second smallest value and the sign bit of the non-zero item; based on the minimum value of each storage matrix and its corresponding row repetition index, storage matrix number, and the cumulative product of the second smallest value and the sign bit of the non-zero item, determine the minimum value of multiple storage matrices and its corresponding row repetition index, storage matrix number, and the cumulative product of the second smallest value and the sign bit of the non-zero item.

[0121] In practice, the prior probability is updated based on the cumulative product of the minimum, second minimum, and non-zero sign bits in multiple storage matrices, as well as the row re-index and storage matrix number corresponding to the minimum value. This includes:

[0122] If the row index corresponding to the minimum value in multiple storage matrices is different from the column index corresponding to the non-zero item in the storage matrix, the prior probability is updated based on the cumulative product of the minimum value and the sign bit of the non-zero item in multiple storage matrices. If the row index corresponding to the minimum value in multiple storage matrices is the same as the column index corresponding to the non-zero item in the storage matrix, and the storage matrix number of the minimum value is the same as the storage matrix number corresponding to the non-zero item, the prior probability is updated based on the cumulative product of the second smallest value and the sign bit of the non-zero item in multiple storage matrices.

[0123] Step 3: For the second round of iterations and subsequent iterations, based on row-by-row decoding and verification, read multiple sets of data and row end marker information from multiple storage matrices row by row; and based on the multiple sets of data and row end marker information from multiple storage matrices, update the prior probability according to the decoding rules; update the posterior probability based on the updated prior probability and determine the decoding result corresponding to the updated posterior probability; and verify the decoding result based on the updated posterior probability and the decoding result verification rules to obtain the verification result.

[0124] In this embodiment, the update formula for the posterior probability is as follows: LQ = Lr + Lq, where Lr is the updated prior probability and Lq is the probability difference corresponding to the current position.

[0125] In this embodiment, the actual codeword c at that position, i.e., the decoding result, can be determined based on the positive or negative value of LQ. Specifically, if LQ is greater than 0, c = 0; otherwise, c = 1.

[0126] In this embodiment, when the row end marker of the last row of the storage matrix is ​​read for the first time, it indicates that the first iteration is complete, and all information of the base matrix H is obtained. During subsequent iterations, after reading the row end marker of the last row of each row of each sub-base matrix, in addition to determining the decoding result, a verification step can also be performed. If H·c T = 0, then the verification passes. If H·c TIf ≠ 0, the verification fails.

[0127] Step 4: If the decoding result is determined to be correct based on the verification result, stop decoding; otherwise, repeat step 3 until the decoding result is determined to be correct or the iteration number threshold is reached.

[0128] In this embodiment, if the verification passes, decoding can be stopped; otherwise, the next row of data in the storage matrix is ​​read, and step 3 is repeated until the decoding result is determined to be correct or the iteration number threshold is reached.

[0129] The data decoding method provided in this application embodiment can complete layered decoding based on the matrix storage scheme of this application. The setting of multiple storage matrices increases the parallelism of decoding, and multiple verifications can be performed in one iteration, which can accelerate the convergence of decoding and has good decoding performance.

[0130] The data decoding method of this application will be further explained below with reference to a specific embodiment.

[0131] The specific steps are as follows:

[0132] 1. First, determine the dimension p of the submatrix, and initialize the minimum and second minimum values ​​of each row of each storage matrix, as well as the row weight, to 0. The base matrix H is stored according to the parity check matrix storage method of this application to obtain multiple storage matrices, such as H1, H2, H3, and H4.

[0133] 2. Initialize the data to be decoded, and convert the information of each bit position into an LLR value using the following formula:

[0134] LLR = 2ay n / σ 2

[0135] Among them, y n It is the codeword after encoding and being affected by noise, σ is the logarithmic standard deviation, and a is the average energy of the signal. .

[0136] 3. Initialize the posterior probability to LLR information, LQ = LLR.

[0137] 4. Simultaneously read multiple storage matrices obtained according to the scheme of this application, such as H1, H2, H3, and H4, row by row, i.e., the column index position and shift value of the non-zero item. For each set of values ​​(column index and shift value) read, increment the row weight of that row of the storage matrix by 1 until the row end marker "-1" is read, and record the row weight of the four storage matrices at this time.

[0138] 5. Using the stored information on the non-zero position and shift value of the row, calculate the non-zero position Col_position of each column in the sub-basis matrix using the above formulas (1)-(3).

[0139] 6. Calculate the probability difference Lq = LQ - Lr at the non-zero positions in the actual parity matrix corresponding to the read row matrix. (Where Lr is the prior probability, i.e., the initial minimum value of the row, initialized to 0).

[0140] 7. When the end-of-row marker "-1" of the last row of the four storage matrices is read, the absolute values ​​of the row weights (Lq) of each row in the actual parity matrix are compared. At the same time, the minimum value, the second smallest value, and the cumulative product of the sign bits of the non-zero items in each row of the four storage matrices are recorded, namely min_value_H0, sub_min_value_H0, sign_all_H0; min_value_H1, sub_min_value_H1, sign_all_H1; min_value_H, sub_min_value_H2, sign_all_H2; min_value_H3, sub_min_value_H3, sign_all_H3.

[0141] 8. Compare the minimum values ​​of the four storage matrices, select the minimum value (min_value) and the second smallest value (sub_min_value_x) among the minimum values ​​of the four storage matrices, and perform a second comparison between the second smallest value and the second smallest value in the storage matrix containing the minimum value to select the true second smallest value in that row. Record the re-index of the row containing the minimum value and the number of the storage matrix. Also record the final sign-to-sign product (sign_all) of the corresponding row in the four storage matrices.

[0142] 9. Compare the column index of the non-zero item in each row of the four storage matrices with the row re-index of the minimum value in that row. If the column indexes are different, select the minimum value; if the column indexes are the same, compare the matrix indices; if the matrix indices are the same, select the second smallest value; otherwise, select the second smallest value. Then update Lr. Lr = sign_all × current position sign × (minimum value / second smallest value) × α, where α is a normalization factor with a value between 0.5 and 1.

[0143] 10. Calculate LQ = Lr + Lq.

[0144] 11. Read the second row of data in the storage matrix and repeat steps (4) to (10).

[0145] 12. When the row end marker of the last row of the storage matrix is ​​read, it indicates that the first iteration is complete, and all the information of the basis matrix H is obtained. At this point, the second iteration begins.

[0146] 12. The second round of iteration is similar to the calculation process of the first round of iteration. Both are performed row by row. After reading the last row end marker of each row of the four storage matrices, in addition to the process of steps (4) to (10), a verification step is also performed to determine the actual codeword c at that position based on the positive or negative value of the calculated LQ. If LQ is greater than 0, c = 0, otherwise c = 1. The decoded codeword is then verified. If H·c T = 0, then the verification passes. If H·c T If the value is not equal to 0, the verification fails. At this time, the data of the next row of the storage matrix is ​​read, and steps (4) to (10) are repeated. When the row end marker of the last row of the storage matrix is ​​read, it indicates that one round of iteration has been completed. Decoding stops when the decoding passes or the maximum number of iterations is reached.

[0147] The parity-check matrix storage and decoding scheme of this application was used to perform decoding simulation performance tests on a 24×286 basis matrix under an additive white Gaussian noise (AWGM) channel (submatrix dimension 128, code rate 0.91). The maximum number of iterations was set to 6, and the performance is as follows. Figure 9 and Figure 10 As shown, it exhibits excellent bit error probability (BER) and frame error rate (FER) performance at high signal-to-noise ratio (SNR). This demonstrates the applicability of the proposed solution.

[0148] This application provides a verification matrix storage device, such as... Figure 11 As shown, it includes:

[0149] The acquisition module 111 is used to obtain the base matrix corresponding to the verification matrix.

[0150] The partitioning module 112 is used to partition the basis matrix into multiple sub-basis matrices with the same data format.

[0151] Storage module 113 is used to determine the shift value corresponding to each non-zero item in each row of the sub-base matrix and the column index in the sub-base matrix for each sub-base matrix, forming multiple sets of data and row end marker information for each row; and storing the multiple sets of data and row end marker information for each row by column to obtain the corresponding storage matrix.

[0152] In some embodiments, the partitioning module 112 is used to perform an average split on the base matrix by column to obtain multiple sub-base matrices with the same data format.

[0153] In some embodiments, before the partitioning module 112 performs an average partitioning of the base matrix by column, the partitioning module is further configured to pad the number of columns of the base matrix if it is determined that the number of columns of the base matrix cannot be divided by the preset partitioning number, so that the number of columns of the base matrix can be divided by the preset partitioning number.

[0154] In some embodiments, the acquisition module 111 is used to divide the parity check matrix according to the dimensions of the submatrix, determine each submatrix in the parity check matrix and its corresponding position information; determine the shift value of each submatrix according to the shift value determination rule; and form a base matrix based on the shift value of each submatrix and the position information corresponding to each submatrix.

[0155] This application provides a data decoding device, such as... Figure 12 As shown, it includes:

[0156] Initialization module 121 is used to initialize the posterior probability and prior probability based on the data to be decoded.

[0157] The decoding module 122 is used for the first round of iteration process to read multiple sets of data and row end marker information from multiple storage matrices row by row based on the row-by-row decoding method; and to update the prior probability according to the decoding rules based on the multiple sets of data and row end marker information from multiple storage matrices; and to update the posterior probability based on the updated prior probability; the storage matrix is ​​obtained by the check matrix storage method as described in any of the above embodiments.

[0158] The update module 123 is used for the second round of iteration and subsequent iterations. Based on line-by-line decoding and verification, it reads multiple sets of data and row end marker information from multiple storage matrices row by row; updates the prior probability according to the decoding rules based on the multiple sets of data and row end marker information from multiple storage matrices; updates the posterior probability based on the updated prior probability and determines the decoding result corresponding to the updated posterior probability; and verifies the decoding result based on the updated posterior probability and the decoding result verification rules to obtain the verification result.

[0159] The judgment module 124 is used to stop decoding if the decoding result is determined to be correct based on the verification result; otherwise, it repeatedly updates the execution content of the module until the decoding result is determined to be correct or the iteration number threshold is reached.

[0160] In some embodiments, the initialization module 121 is used to initialize the data to be decoded; the initialized data to be decoded is used as the initial value of the posterior probability, and the initial value of the prior probability is set to 0.

[0161] In some embodiments, the decoding module 122 is configured to, for each storage matrix, calculate the position of each non-zero item in the parity check matrix based on the shift value corresponding to the non-zero item in multiple sets of data, the column index in the sub-basis matrix, and the row end marker information; determine the probability difference at the position corresponding to each non-zero item based on the position, posterior probability, and prior probability of each non-zero item in the parity check matrix; determine the minimum value, the second smallest value, the cumulative product of the sign bits of the non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value based on the probability difference at the position corresponding to each non-zero item in each storage matrix; and update the prior probability based on the cumulative product of the minimum value, the second smallest value, the sign bits of the non-zero items in multiple storage matrices, and the row re-index and storage matrix number corresponding to the minimum value.

[0162] In some embodiments, the decoding module 122 is used to calculate the actual column position of each non-zero item in the first row of the parity check matrix based on the shift value corresponding to the non-zero item in the multiple sets of data, the column index in the sub-base matrix, and the dimension and row end marker information of the sub-matrix; and to calculate the actual column position of each non-zero item in other rows of the parity check matrix based on the actual column position of each non-zero item in the first row of the parity check matrix.

[0163] In some embodiments, the decoding module 122 is used to determine the minimum value and corresponding row repetition index, storage matrix number, and cumulative product of the second smallest value and the sign bit of the non-zero item for each storage matrix based on the probability difference at the position corresponding to each non-zero item in each storage matrix; and to determine the minimum value and corresponding row repetition index, storage matrix number, and cumulative product of the second smallest value and the sign bit of the non-zero item among multiple storage matrices based on the minimum value and corresponding row repetition index, storage matrix number, and cumulative product of the second smallest value and the sign bit of the non-zero item among multiple storage matrices.

[0164] In some embodiments, the decoding module 122 is used to update the prior probability based on the cumulative product of the minimum value and the sign bits of the non-zero items in the multiple storage matrices if the row index corresponding to the minimum value in the multiple storage matrices is different from the column index corresponding to the non-zero item in the storage matrix; and to update the prior probability based on the cumulative product of the second smallest value and the sign bits of the non-zero items in the multiple storage matrices if the row index corresponding to the minimum value in the multiple storage matrices is the same as the column index corresponding to the non-zero item in the storage matrix, and the storage matrix number of the minimum value is the same as the storage matrix number corresponding to the non-zero item.

[0165] According to embodiments of this application, this application also provides an electronic device.

[0166] Figure 13A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of this application is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the application described and / or claimed herein.

[0167] like Figure 13 As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes based on a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. The RAM 803 may also store various programs and data required for the operation of the electronic device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0168] Multiple components in electronic device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of displays, speakers, etc.; storage unit 808, such as disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows electronic device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0169] The computing unit 801 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as the parity check matrix storage method and the data decoding method. For example, in some embodiments, the parity check matrix storage method and the data decoding method can be implemented as computer software programs, which are tangibly contained in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of the parity check matrix storage method and the data decoding method described above can be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to perform a check matrix storage method or a data decoding method by any other suitable means (e.g., by means of firmware).

[0170] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transferring data and instructions to the storage system, the at least one input device, and the at least one output device.

[0171] The program code used to implement the methods of this application may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0172] This application provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the check matrix storage method and data decoding method described above in this application.

[0173] This application provides a computer-readable storage medium storing executable instructions. When the executable instructions are executed by a processor, the processor will execute the check matrix storage method and data decoding method provided in this application.

[0174] In some embodiments, a computer-readable storage medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may be a machine-readable signal medium or a machine-readable storage medium. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of computer-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0175] In some embodiments, executable instructions may take the form of a program, software, software module, script, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0176] As an example, executable instructions may, but do not necessarily, correspond to files in a file system. They may be stored as part of a file that holds other programs or data, for example, in one or more scripts in a Hyper Text Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple collaborating files (e.g., a file that stores one or more modules, subroutines, or code sections).

[0177] As an example, executable instructions can be deployed to execute on a single computing device, or on multiple computing devices located in one location, or on multiple computing devices distributed across multiple locations and interconnected via a communication network.

[0178] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0179] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0180] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0181] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0182] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0183] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A parity check matrix storage method characterized by comprising: The method comprises the following steps: obtaining a base matrix corresponding to a check matrix; the check matrix is composed of an identity matrix, a cyclic shift matrix of the identity matrix, and an all-zero matrix; obtaining the base matrix corresponding to the check matrix comprises: dividing the check matrix according to the dimension of the sub-matrix, determining each sub-matrix in the check matrix and the corresponding position information; determining the shift value of each sub-matrix according to the shift value determination rule; based on the shift value of each sub-matrix and the position information corresponding to each sub-matrix, the base matrix is formed; the base matrix is divided into a plurality of sub-base matrices with the same data format; for each sub-base matrix, the shift value corresponding to each non-zero item in each row in the sub-base matrix and the column index in the sub-base matrix are determined, and a plurality of groups of data corresponding to each row and row end flag information are formed; the plurality of groups of data corresponding to each row and the row end flag information are stored in the static random access memory by column to obtain a corresponding storage matrix.

2. The parity check matrix storage method of claim 1, wherein, The base matrix is divided into a plurality of sub-base matrices with the same data format, comprising: the base matrix is evenly split by column to obtain a plurality of sub-base matrices with the same data format.

3. The parity check matrix storage method of claim 2, wherein, Before the base matrix is evenly split by column, the method further comprises the following steps: if it is determined that the number of columns of the base matrix cannot be evenly divided by the preset split number, the number of columns of the base matrix is padded to make the number of columns of the base matrix divisible by the preset split number.

4. A data coding method characterized by, The method comprises the following steps: Step 1: initializing the posterior probability and the prior probability based on the data to be decoded; Step 2: for the first iteration process, the plurality of groups of data and the row end flag information in the plurality of storage matrices are read by row respectively based on the row-by-row decoding manner; and the prior probability is updated according to the decoding rule based on the plurality of groups of data and the row end flag information in the plurality of storage matrices; and the posterior probability is updated based on the updated prior probability; the storage matrix is obtained by the check matrix storage method in any one of claims 1-3; Step 3: for the second iteration and the iterations after the second iteration, the plurality of groups of data and the row end flag information in the plurality of storage matrices are read by row respectively based on the row-by-row decoding and checking manner; and the prior probability is updated according to the decoding rule based on the plurality of groups of data and the row end flag information in the plurality of storage matrices; the posterior probability is updated based on the updated prior probability, and the decoding result corresponding to the updated posterior probability is determined; the decoding result is checked based on the updated posterior probability and the decoding result checking rule to obtain a checking result; Step 4: if it is determined that the decoding result is correct based on the checking result, the decoding is stopped, otherwise, step 3 is repeated until it is determined that the decoding result is correct or the iteration number threshold is reached.

5. The data coding method of claim 4, wherein, The posterior probability and the prior probability are initialized based on the data to be decoded, comprising: the data to be decoded is initialized; the initialized data to be decoded is taken as the initial value of the posterior probability, and the initial value of the prior probability is set to 0.

6. The data coding method of claim 4, wherein, The prior probability is updated according to the decoding rule based on the plurality of groups of data and the row end flag information in the plurality of storage matrices, comprising: For each storage matrix, based on the shift value corresponding to the non-zero item in the plurality of groups of data, the column index in the sub-base matrix, and the row end flag information, the position of each non-zero item in the check matrix is calculated; Based on the position of each non-zero item in the check matrix, the posterior probability and the prior probability, the probability difference value at the position corresponding to each non-zero item is determined; Based on the probability difference value at the position corresponding to each non-zero item of each storage matrix, the minimum value, the second minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, and the row index corresponding to the minimum value and the storage matrix number are determined; Based on the minimum value, the second minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, and the row index corresponding to the minimum value and the storage matrix number, the prior probability is updated.

7. The data coding method of claim 6, wherein, Based on the shift value corresponding to the non-zero item in the plurality of groups of data, the column index in the sub-base matrix, and the row end flag information, the position of each non-zero item in the check matrix is calculated, comprising: Based on the shift value corresponding to the non-zero item in the plurality of groups of data, the column index in the sub-base matrix, and the dimension of the sub-matrix, the row end flag information, the actual column position corresponding to the first row of each non-zero item in the check matrix is calculated; Based on the actual column position corresponding to the first row of each non-zero item in the check matrix, the actual column position corresponding to other rows of each non-zero item in the check matrix is calculated.

8. The data coding method of claim 6, wherein, Based on the probability difference value at the position corresponding to each non-zero item of each storage matrix, the minimum value, the second minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, and the row index corresponding to the minimum value and the storage matrix number are determined, comprising: Based on the probability difference value at the position corresponding to each non-zero item of each storage matrix, the minimum value and the corresponding row index, the storage matrix number of each storage matrix, and the second minimum value, the multiplication of the non-zero item sign bit are determined; Based on the minimum value and the corresponding row index, the storage matrix number of each storage matrix, and the second minimum value, the multiplication of the non-zero item sign bit, the minimum value and the corresponding row index, the storage matrix number in the plurality of storage matrices, and the second minimum value, the multiplication of the non-zero item sign bit are determined.

9. The data coding method of claim 6, wherein, Based on the minimum value, the second minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, and the row index corresponding to the minimum value and the storage matrix number, the prior probability is updated, comprising: If the row index corresponding to the minimum value in the plurality of storage matrices is different from the column index corresponding to the non-zero item in the storage matrix, based on the minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, the prior probability is updated; If the row index corresponding to the minimum value in the plurality of storage matrices is the same as the column index corresponding to the non-zero item in the storage matrix, and the storage matrix number of the minimum value is the same as the storage matrix number corresponding to the non-zero item, based on the second minimum value, the multiplication of the non-zero item sign bit in the plurality of storage matrices, the prior probability is updated.

10. A check matrix storage device, characterized by, Comprising: The acquisition module is used for acquiring the base matrix corresponding to the check matrix; The check matrix is composed of unit matrix, cyclic shift matrix of unit matrix, and all-zero matrix; The base matrix corresponding to the check matrix is obtained by: dividing the check matrix according to the dimensions of the sub-matrices, determining each sub-matrix in the check matrix and corresponding position information; determining the shift value of each sub-matrix according to a shift value determination rule; and forming the base matrix based on the shift value of each sub-matrix and the position information corresponding to each sub-matrix. The base matrix is divided into a plurality of sub-base matrices with the same data format by the division module. The storage module determines, for each sub-base matrix, the shift value corresponding to each non-zero item in each row in the sub-base matrix and the column index in the sub-base matrix, forms a plurality of groups of data corresponding to each row and row end flag information, and stores the plurality of groups of data corresponding to each row and the row end flag information in the static random access memory by column to obtain a corresponding storage matrix.

11. A data coding device, characterized by comprising: The initialization module initializes the posterior probability and the prior probability based on the data to be decoded. The decoding module reads the plurality of groups of data and the row end flag information in the plurality of storage matrices by row respectively based on a row-by-row decoding manner for the first iteration process. The decoding module updates the prior probability based on the plurality of groups of data and the row end flag information in the plurality of storage matrices according to a decoding rule. The decoding module updates the posterior probability based on the updated prior probability. The storage matrix is obtained by the check matrix storage method of any one of claims 1-3. The updating module reads the plurality of groups of data and the row end flag information in the plurality of storage matrices by row respectively based on a row-by-row decoding and checking manner for the second iteration and iterations after the second iteration. The updating module updates the prior probability based on the plurality of groups of data and the row end flag information in the plurality of storage matrices according to a decoding rule. The updating module updates the posterior probability based on the updated prior probability and determines a decoding result corresponding to the updated posterior probability.

12. An electronic device, comprising: The updating module checks the decoding result based on the updated posterior probability and a decoding result checking rule to obtain a checking result. The judgment module stops decoding if it is determined based on the checking result that the decoding result is correct, otherwise, the execution content of the updating module is repeated until it is determined that the decoding result is correct or a threshold number of iterations is reached. The at least one processor and the memory connected in communication with the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to cause the at least one processor to perform the check matrix storage method of any one of claims 1-3 or the data decoding method of any one of claims 4-9.

13. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for causing a computer to perform the check matrix storage method of any one of claims 1-3 or the data decoding method of any one of claims 4-9.

14. A computer program product comprising computer programs or instructions, characterized in that, The computer program or instructions are executed by the processor to implement the check matrix storage method of any one of claims 1-3 or the data decoding method of any one of claims 4-9.

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