OPS hot-swap protection circuit, OPS device access verification method and storage medium

Abstract

The present invention proposes an OPS hot-swap protection circuit, an OPS device access verification method and a storage medium, wherein the OPS hot-swap protection circuit includes: a first transistor, the base of the first transistor is connected to a first signal end, the first signal end is used to connect an OPS device, and the first signal end is connected to the SOC end of a target device; a second transistor, the base of the second transistor is connected to a second signal end via the collector of the first transistor, the second signal end is connected to the SOC end, and the second signal end is used to change its output level according to the output of the SOC end; a MOS tube, the gate of the MOS tube is connected to the collector of the second transistor, the drain of the MOS tube is connected to a power supply, the source of the MOS tube is connected to a power supply end, and the power supply end is used to connect an OPS device to power the OPS device. The present invention can avoid damage to OPS devices and large-screen machines due to live plug-in operations, achieve the purpose of protecting equipment, and improve equipment stability.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an OPS hot-plug protection circuit, an OPS device access verification method and a storage medium. Background Art

[0002] OPS devices are essential configurations for large-screen machine applications, which facilitate users to apply different systems to meet users' diversified application needs. However, in actual testing and applications, users or testers may plug and unplug OPS devices while they are powered on. This operation may damage the OPS device or large-screen machine, causing no OPS signal, and making it impossible for users to continue to use the OPS function, requiring maintenance before use. However, there is currently a lack of plug-in detection and protection measures for OPS devices, which causes OPS devices and large-screen machines to frequently malfunction due to human operations of plugging and unplugging while powered on, affecting the service life of the equipment. Summary of the invention

[0003] The embodiment of the present invention provides an OPS hot-swap protection circuit, an OPS device access verification method and a storage medium to solve the problems existing in the related art. The technical solution is as follows:

[0004] In a first aspect, an embodiment of the present invention provides an OPS hot-swap protection circuit, comprising:

[0005] A first transistor, a base of the first transistor is connected to a first signal terminal, the first signal terminal is used to connect to an OPS device, and the first signal terminal is connected to a SOC terminal of a target device;

[0006] A second triode, the base of the second triode is connected to the second signal terminal via the collector of the first triode, the second signal terminal is connected to the SOC terminal, and the second signal terminal is used to change its output level according to the output of the SOC terminal;

[0007] MOS tube, the gate of the MOS tube is connected to the collector of the second transistor, the drain of the MOS tube is connected to the power supply, the source of the MOS tube is connected to the power supply end, and the power supply end is used to connect the OPS device to power the OPS device.

[0008] In one embodiment, when the first signal end is not connected to the OPS device, the first signal end is in a high level state; when the first signal end is connected to the OPS device, the first signal end is switched to a low level state; the SOC end determines whether to connect to the OPS device by detecting the level change state of the first signal end.

[0009] In one implementation, when the SOC end detects that the OPS device is connected to the first signal end, the SOC end delays a specified time and then controls the second signal end to output a high level, so that the second transistor and the MOS tube are turned on, thereby outputting a specified voltage to the OPS device through the power supply end.

[0010] In one embodiment, when the SOC end detects that the OPS device is unplugged, the first signal end is switched to a high level state to turn on the first transistor, the second transistor is switched to a cut-off state, the MOS tube is switched to a cut-off state, and the power supply end stops supplying power to the OPS device.

[0011] In one implementation, the drain of the MOS tube is connected to the power supply via a filter circuit, and the filter circuit includes a capacitor ECW2 and a capacitor CW1 connected in parallel.

[0012] In a second aspect, an embodiment of the present invention provides an OPS device access verification method, which is applied to the OPS hot-swap protection circuit as described above; the method comprises:

[0013] Collect the level signal of the first signal end in real time, and determine the plug-in and unplug-out status of the OPS device when the level signal changes;

[0014] When the OPS device is connected, the unique identification information of the OPS device is obtained, and the legitimacy of the OPS device is verified according to the unique identification information;

[0015] When the OPS device passes the legal verification, the output level of the second signal terminal is controlled to start / stop the power supply of the OPS device.

[0016] In one embodiment, it further includes:

[0017] Obtain the output signal of the OPS device, check the integrity of the signal data frame based on the output signal, and generate a prompt message if the OPS device integrity check fails. The prompt message is used to prompt the user to shut down and check whether the OPS device is installed in place, and re-plug the OPS device after confirming that the OPS device is installed correctly.

[0018] In one embodiment, it further includes:

[0019] Obtaining the operating parameters of the OPS device during operation, and determining the operating status of the OPS device according to the operating parameters;

[0020] When the operating status is abnormal, protection operations are performed until the operating status of the OPS equipment returns to normal.

[0021] In one embodiment, it further includes:

[0022] Acquire gesture action parameters, and determine whether the user has the intention to plug or unplug based on the gesture action parameters; the gesture action parameters are collected by the gesture sensor and the capacitive sensor;

[0023] When the user's intention to plug or unplug is detected, a pop-up window and voice warning prompt are generated, and the OPS shutdown operation is automatically executed to ensure that the OPS device can be shut down normally and powered off safely before being unplugged.

[0024] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium, which stores a computer program. When the computer program runs on a computer, the method in any one of the above-mentioned embodiments is executed.

[0025] The advantages or beneficial effects of the above technical solution include at least:

[0026] The OPS hot-swap protection circuit of the present invention determines whether to connect to the OPS device by detecting the level change of the first signal end. When the OPS device is detected to be connected, the SOC end controls the second signal end to output a high level, so that the second triode and the MOS tube are turned on, so that the power supply end outputs 18V power for the normal operation of the OPS device. When the user unplugs the OPS device, the level signal of the first signal end is converted from a low level to a high level. At this time, the first triode is in a conducting state. At this time, the collector voltage of the first triode is zero, so that the second triode and the MOS tube are both in a cut-off state. At this time, the power supply end connected to the MOS tube has no voltage output, and the power supply of the OPS device is suspended, so as to avoid damage to the OPS device and the large-screen machine due to live plug-in operation, further protect the device, and improve the stability of the device.

[0027] The above summary is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments and features described above, further aspects, embodiments and features of the present invention will be readily apparent by reference to the accompanying drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in the present invention and should not be regarded as limiting the scope of the present invention.

[0029] Figure 1 This is a schematic diagram of an OPS hot-swap protection circuit of the present invention;

[0030] Figure 2 It is a connection diagram of the first signal terminal, the second signal terminal and the SOC terminal of the present invention;

[0031] Figure 3 A schematic diagram of a flow chart of an OPS device access verification method of the present invention;

[0032] Figure 4 The structure block diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the present invention. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.

[0034] Embodiment 1

[0035] OPS devices are essential configurations in the application of large-screen machines, which facilitates users to carry out applications between different systems to meet users' diversified application needs. However, in actual testing and applications, users or testers may plug and unplug OPS devices while they are powered on. This operation may damage the OPS device or large-screen machine, resulting in no OPS signal, making it impossible for users to continue to use the OPS function and requiring maintenance before use.

[0036] In order to solve the above problem, this embodiment provides an OPS hot-swap protection circuit, which can automatically disconnect the OPS power supply when the OPS device is unplugged to prevent the OPS device from being damaged during the hot-swap process.

[0037] like Figure 1 As shown, the OPS hot-swap protection circuit at least includes a first transistor QW2, a second transistor QW4, a MOS transistor QW1, a first signal terminal and a second signal terminal.

[0038] Specifically, the first transistor QW2 is an NPN transistor, the emitter of the first transistor QW2 is grounded, the base of the first transistor QW2 is connected to the first signal end via the resistor RW4, the first signal end is used to connect the OPS device, and the first signal end is connected to the SOC end of the target device, wherein the target device can be a large-screen machine or other device with a SOC chip.

[0039] It should be noted that the first signal terminal may be provided with only an interface for connecting to an OPS device, or may be provided with an interface for connecting to an OPS device and other components connected to the interface. The specific circuit structure of the first signal terminal is not limited here, as long as the first signal terminal can provide an interface for connecting to an OPS device, and the output level of the first signal terminal changes when the OPS device is plugged in or unplugged.

[0040] In this embodiment, when the first signal end is not connected to the OPS device, the first signal end is in a high level state; when the first signal end is connected to the OPS device, the first signal end switches to a low level state. The SOC end of the target device detects the level signal of the first signal end in real time, and the SOC end determines whether the OPS device is connected to the target device by detecting the level change state of the first signal end.

[0041] The second transistor QW4 is an NPN transistor, the emitter of the second transistor QW4 is connected to electricity, the second signal end is connected to the collector of the first transistor QW2 via the resistor RW3, and then connected to the base of the second transistor QW4 via the resistor RW17, and the collector of the second transistor QW4 is connected to the gate of the MOS transistor QW1.

[0042] Among them, the second signal end is connected to the SOC end, and the second signal end is used to change its output level according to the output of the SOC end, that is, when the SOC end detects the connection to the OPS device, the SOC end pulls up the output level of the second signal end, so that the second signal end also becomes a high level.

[0043] In this embodiment, the collector of the second transistor QW4 is connected to the power circuit via resistors RW84 and RW14; the collector of the second transistor QW4 is connected to the gate of the MOS transistor QW1 via resistors RW84 and RW81. The drain of the MOS transistor QW1 is connected to the power supply via the power circuit, and the source of the MOS transistor QW1 is connected to the power supply terminal via capacitor CW78 and resistor RW15. The power supply terminal is used to connect the OPS device to supply power to the OPS device.

[0044] Combination Figure 1 , Figure 2 As shown, the basic working principle of this embodiment is as follows:

[0045] When the OPS device is not connected, the first signal terminal is in a suspended state, and the SOC terminal detects a high level due to the existence of the resistor RW1. When the OPS device is connected, the level signal of the first signal terminal switches from the original high level state to the low level state, and after the SOC terminal detects the level change from the high level to the low level, it determines that the OPS device is currently connected; at this time, the SOC terminal changes the output of the second signal terminal, and the output level of the second signal terminal is a high level, so that the second transistor QW4 and the MOS tube QW1 are turned on, thereby turning on the power supply of the OPS device.

[0046] It should be noted that the output control of the SOC terminal is controlled according to a pre-written software program. In order to avoid problems with the control logic of the software program, for example, the software program does not detect the level state of the first signal terminal, but pulls up the second signal terminal as soon as it is turned on, then the second transistor QW4 and the MOS tube QW1 are always in the on state, and the power supply terminal OPS_18V always has an 18V voltage. When the user connects to the OPS device, the friction between the OPS sockets will generate a voltage shock, causing damage to the OPS device or the target device connected to the OPS device.

[0047] Furthermore, in order to avoid the problem of incorrect software control logic on the SOC side, such as Figure 1 As shown, in this embodiment, the first signal terminal and the second signal terminal are associated and controlled through the first transistor QW2, which plays a role in hardware anti-foolproofing. Even if the corresponding control logic is not configured, the MOS tube QW1 will not be turned on when the OPS device is not connected. It will be turned on only after the OPS device is connected to start the 18V power supply.

[0048] Specifically, when the OPS device is not connected, the first signal terminal is at a high level, the first transistor QW2 will be in a conducting state, and the collector of the first transistor QW2 will be pulled to 0V, so the second transistor QW4 is in a cut-off state. Regardless of whether the level of the second signal terminal is high or not, it does not affect the second transistor QW4 being in a cut-off state, so the MOS tube QW1 is also in a cut-off state, and the power supply terminal OPS_18V has no voltage output. When the OPS device is connected, the first signal terminal is pulled low, and the first transistor QW2 changes from a conducting state to a cut-off state. At this time, the SOC terminal also detects that the first signal terminal has become a low level, and recognizes that the OPS device is connected, and then delays a specified time (for example, 500ms) and controls the second signal terminal to output a high level, so that the second transistor QW4 is turned on, and the MOS tube QW1 is turned on. At this time, the power supply terminal OPS_18V outputs 18V power. The purpose of the delay is that the OPS device has already been in a stable state of access, and will no longer generate a surge voltage due to contact, which plays a protective role.

[0049] When the OPS device is unplugged, because the first signal terminal is immediately pulled high, the first transistor QW2 is turned on, thereby turning the second transistor QW4 into a cut-off state, and the MOS tube QW1 is also immediately changed from a conduction state to a cut-off state, turning off the output of the 18V power supply. Due to the existence of RW15, the residual voltage on the capacitor on the line will also be quickly released. Therefore, the improved circuit will be safer for hot-plugging OPS devices, and the risk of damaging OPS devices and large-screen machines due to incorrect software configuration can be improved from a hardware level, making the product safer and more reliable.

[0050] In this embodiment, the drain of the MOS tube QW1 is connected to the power supply through the power circuit, wherein the power circuit includes a CONW2 socket and a filter circuit. The CONW2 socket is powered by 18V from the power board. The filter circuit includes a capacitor ECW2 and a capacitor CW1 connected in parallel. The ECW1 and CW3 capacitors are used for filtering, and then the second transistor QW4 and the MOS tube QW1 are used to control whether to output the power to the power supply section OPS_18V.

[0051] Embodiment 2

[0052] This embodiment implements the OPS device access verification method based on the hardware of the OPS hot-swap protection circuit in the first embodiment, and cooperates with software detection to further improve the device access security.

[0053] It should be noted that the execution subject of the OPS device access verification method can be the SOC end in the first embodiment, or other electronic devices that communicate with the SOC end. Figure 1 , Figure 3 As shown, the OPS device access verification method in this embodiment, which is executed by the SOC end as the execution subject, specifically includes:

[0054] Step S1: collecting the level signal of the first signal end in real time, and determining the plug-in state of the OPS device when the level signal changes.

[0055] This embodiment monitors the interface status of the OPS device, collects the level change of the first signal terminal, and determines whether the OPS device is connected through the level signal of the first signal terminal.

[0056] If no level change is detected, the standby monitoring state continues;

[0057] If a level change is detected, the device verification phase of step S2 is entered.

[0058] It should be noted that the method for determining whether an OPS device is connected according to the level change of the first signal terminal has been described in the first embodiment and will not be repeated here.

[0059] Step S2: When the OPS device is connected, the unique identification information of the OPS device is obtained, and the legitimacy of the OPS device is verified according to the unique identification information.

[0060] After the OPS device is connected, obtain the device information of the OPS device, which includes unique identification information (UUID, device firmware version, model and other parameters.

[0061] The unique identification information of the OPS device is compared with the registered device information in the preset device database. If the unique identification information is the same as the device information in the device database, it means that the OPS device is legal. At this time, the OPS device verification is successful, a legitimacy mark is generated, and the power control stage of step S3 is entered.

[0062] If the device verification fails, a prompt message is generated to prompt the user to change the connected device and terminate the startup of the OPS device.

[0063] Step S3: When the OPS device passes the legal verification, the output level of the second signal terminal is controlled to start / stop the power supply of the OPS device.

[0064] It should be noted that the method of starting / stopping the power supply of the OPS device has been described in Example 1, that is, after the device verification is passed, the SOC end controls the second signal port to output a high level, so that the second transistor QW4 and the MOS tube QW1 are turned on, thereby starting the power supply of the OPS device to indicate that the OPS device can start to receive power and start; it will not be repeated here.

[0065] At the same time, the power supply voltage or current provided to the OPS device is constantly detected. When an abnormal voltage or current is detected, the power supply is stopped and an alarm signal is issued; if the voltage and current are normal, the power supply to the OPS device continues, and the next step is to initialize the communication between the OPS device and the target device. Specifically:

[0066] After the power supply is stable, the communication interface (such as HDMI, DisplayPort, etc.) between the OPS device and the target device begins to be initialized; after the initialization is completed, the OPS device and the target device establish a stable connection for video, audio and other data transmission, and the signal is output normally.

[0067] At this time, the output signal of the OPS device is obtained, and the integrity of the signal data frame is checked according to the output signal to confirm that the signal is not lost or erroneous; if the integrity check of the OPS device fails (i.e., data frame loss or error occurs), a prompt message is generated. The prompt message is used to prompt the user to shut down the device, check whether the OPS device is installed in place, and then reinsert the OPS device and turn it on.

[0068] If the signal connection is successful, it means that there is no signal loss or error, and then enter the device status monitoring.

[0069] Real-time monitoring of OPS device status is to monitor the operating parameters of the device through built-in sensors during the normal operation of the OPS device, and determine the operating status based on the operating parameters, including temperature, power status, signal transmission quality, etc.

[0070] The operating parameters of the OPS device are compared with the set safety thresholds. If any parameter exceeds the preset range, it means that the operating status is abnormal. At this time, the protection operation is performed, which means that the device power is automatically reduced or suspended until the operating status of the OPS device returns to normal, thereby preventing the equipment from being overloaded and damaged.

[0071] If the operating parameters are normal, the OPS device continues to operate normally.

[0072] In some embodiments, it further comprises:

[0073] Acquire gesture action parameters, and determine whether the user has the intention to plug or unplug based on the gesture action parameters; the gesture action parameters are collected by gesture sensors and capacitive sensors, wherein the gesture sensor can be installed at the interface between the OPS device and the target terminal, and is used to detect the user's actions near the OPS interface. When the user approaches or touches the OPS interface, the user's gesture actions are recognized through the existing intelligent gesture recognition algorithm to determine whether the user has the intention to plug or unplug; and the capacitive sensor can be installed at the interface of the OPS device. When the user holds the interface to perform the plug-in action, the capacitive sensor can sense the user's actions, thereby determining that the user has the intention to plug or unplug.

[0074] When the user's intention to plug or unplug is detected, a pop-up window and voice warning prompt for the plug or unplug operation will be issued, and a command will be sent to shut down the OPS device. The device can be shut down normally and the power will be cut off before it is unplugged to protect the hard disk data of the OPS device from being damaged.

[0075] If no user plugging or unplugging intention is detected, the OPS device maintains normal operation.

[0076] When the OPS device loses power or stops running due to abnormal conditions, an automatic recovery function is provided. When it detects that the OPS device status has returned to normal, it will automatically turn on the power again and initialize the communication connection, reducing the need for manual intervention by the user.

[0077] During the recovery process, the OPS device continuously monitors the device status to ensure that the device does not enter high-load operation mode before it is fully recovered. If the recovery process goes smoothly, the OPS device can continue to operate normally. If an abnormality is detected during the recovery process, the OPS device is kept in a closed state and the user is prompted to check the device.

[0078] The present invention realizes the control of the OPS power supply by combining software and hardware and making the hardware fool-proof design. When the OPS is unplugged, the power supply of the OPS is immediately cut off. After the software detects that the OPS device is connected, the power control of the OPS is turned on, thereby achieving the purpose of protecting the large-screen machine and the OPS device.

[0079] Embodiment 3

[0080] An embodiment of the present invention provides an electronic device, Figure 4 FIG. 2 shows a structural block diagram of an electronic device according to an embodiment of the present invention. Figure 4 As shown, the electronic device includes: a memory 100 and a processor 200, wherein the memory 100 stores a computer program that can be run on the processor 200. When the processor 200 executes the computer program, the OPS device access verification method in the above embodiment is implemented. The number of the memory 100 and the processor 200 can be one or more.

[0081] The electronic device also includes:

[0082] The communication interface 300 is used to communicate with external devices and perform data exchange transmission.

[0083] If the memory 100, the processor 200 and the communication interface 300 are implemented independently, the memory 100, the processor 200 and the communication interface 300 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0084] Optionally, in a specific implementation, if the memory 100, the processor 200 and the communication interface 300 are integrated on a chip, the memory 100, the processor 200 and the communication interface 300 can communicate with each other through an internal interface.

[0085] The embodiment of the present invention further provides a computer-readable storage medium storing a computer program, which implements the method provided in the embodiment of the present invention when the program is executed by a processor.

[0086] An embodiment of the present invention further provides a chip, which includes a processor for calling and executing instructions stored in the memory from the memory, so that a communication device equipped with the chip executes the method provided by the embodiment of the present invention.

[0087] An embodiment of the present invention also provides a chip, including: an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected via an internal connection path, and the processor is used to execute the code in the memory. When the code is executed, the processor is used to execute the method provided by the embodiment of the invention.

[0088] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor supporting the advanced RISC machines (ARM) architecture.

[0089] Further, optionally, the above-mentioned memory may include a read-only memory and a random access memory, and may also include a non-volatile random access memory. The memory may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may include a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may include a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available. For example, static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct rambus RAM (DR RAM).

[0090] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.

[0091] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples, unless they are contradictory.

[0092] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0093] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of various changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. An OPS hot-swap protection circuit, characterized in that: include: A first transistor, wherein a base of the first transistor is connected to a first signal terminal, the first signal terminal is used to connect to an OPS device, and the first signal terminal is connected to a SOC terminal of a target device; a second triode, wherein the base of the second triode is connected to a second signal terminal via the collector of the first triode, the second signal terminal is connected to the SOC terminal, and the second signal terminal is used to change its output level according to the output of the SOC terminal; A MOS tube, wherein the gate of the MOS tube is connected to the collector of the second transistor, the drain of the MOS tube is connected to a power supply, and the source of the MOS tube is connected to a power supply end, and the power supply end is used to connect an OPS device to power the OPS device.

2. The OPS hot-swap protection circuit according to claim 1, characterized in that: When the first signal end is not connected to the OPS device, the first signal end is in a high level state; when the first signal end is connected to the OPS device, the first signal end switches to a low level state; the SOC end determines whether to connect to the OPS device by detecting the level change state of the first signal end.

3. The OPS hot-swap protection circuit according to claim 1, characterized in that: When the SOC end detects that the OPS device is connected to the first signal end, the SOC end delays a specified time and then controls the second signal end to output a high level, so that the second transistor and the MOS tube are turned on, thereby outputting a specified voltage for the OPS device through the power supply end.

4. The OPS hot-swap protection circuit according to claim 1, characterized in that: When the SOC end detects that the OPS device is unplugged, the first signal end is switched to a high level state to turn on the first transistor, the second transistor is switched to a cut-off state, the MOS tube is switched to a cut-off state, and the power supply end stops supplying power to the OPS device.

5. The OPS hot-swap protection circuit according to claim 1, characterized in that: The drain of the MOS tube is connected to the power supply via a filter circuit, and the filter circuit includes a capacitor ECW2 and a capacitor CW1 connected in parallel.

6. An OPS device access verification method, characterized in that: Applied to the OPS hot-swap protection circuit as described in any one of claims 1 to 5; the method comprises: Collecting the level signal of the first signal end in real time, and determining the plug-in and unplug-out status of the OPS device when the level signal changes; Acquire the unique identification information of the OPS device when the OPS device is connected, and verify the legitimacy of the OPS device according to the unique identification information; When the OPS device passes the legal verification, the output level of the second signal terminal is controlled to start / stop the power supply of the OPS device.

7. The OPS device access verification method according to claim 6, characterized in that: Also includes: Obtain the output signal of the OPS device, check the integrity of the signal data frame according to the output signal, and generate a prompt message when the integrity check of the OPS device fails, wherein the prompt message is used to prompt the user to shut down and check the installation status of the OPS device, and re-plug the OPS device after confirming that the OPS device is correctly installed.

8. The OPS device access verification method according to claim 6, characterized in that: Also includes: Acquire operating parameters of the OPS device during operation, and determine the operating state of the OPS device according to the operating parameters; When the operating state is abnormal, a protection operation is performed until the operating state of the OPS device returns to normal.

9. The OPS device access verification method according to claim 6, characterized in that: Also includes: Acquire gesture action parameters, and determine whether the user has the intention to plug or unplug according to the gesture action parameters; The gesture action parameters are collected by the gesture sensor and the capacitive sensor; When it is detected that the user has the plugging and unplugging intention, a pop-up window and voice warning prompt are generated, and the OPS shutdown operation is automatically executed to ensure that the OPS device can be shut down normally and safely powered off before being unplugged.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by the processor, the OPS device access verification method according to any one of claims 6 to 9 is implemented.

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