A via test structure, a test method and an integrated circuit

Abstract

The present invention discloses a via test structure, a test method and an integrated circuit, belonging to the field of semiconductor technology. The via test structure at least includes: a bottom metal layer, a top metal layer, and an intermediate metal layer; a via layer connecting two metal layers, and the via layer includes a first type of connection structure and a second type of connection structure. The first type of connection structure includes a first number of vias, and the second type of connection structure includes a second number of vias, and the second number is greater than the first number; wherein, the bottom via layer or the top via layer includes at least one of the first type of connection structures, and along the stacking direction of the via layer, except at the position of the first type of connection structure in the upper layer, at least one of the first type of connection structures is added at any position of the via layer in this layer. Through the via test structure, the test method and the integrated circuit provided by the present invention, the accuracy of via anomaly detection can be improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductors, and particularly relates to a via test structure, a test method, and an integrated circuit. Background Art

[0002] In the semiconductor manufacturing process, a via test structure is required to test the via impedance to complete the reliability evaluation of semiconductor integrated circuits. Among them, the via test structure is usually a chain structure or a Kelvin structure.

[0003] The chain structure connects the vias of the same layer in series through a metal layer. When a via is open, the impedance of the via test structure is extremely high. However, a chain structure can only test one layer of vias. A Kelvin structure only detects the resistance value of one via. When multiple vias need to be tested, a Kelvin structure needs to be set at each via. Therefore, neither the chain structure nor the Kelvin structure can achieve the detection of via abnormalities in different layers by one test structure. Summary of the Invention

[0004] The purpose of the present invention is to provide a via test structure, a test method, and an integrated circuit, which can solve the problem that it is impossible to detect via abnormalities in different layers by one test structure.

[0005] To solve the above technical problems, the present invention is realized through the following technical solutions:

[0006] The present invention provides a via test structure, including:

[0007] A bottom metal layer, including a bottom metal wire;

[0008] A top metal layer, including a top metal wire, and the bottom metal wire and the top metal wire cover all test positions;

[0009] An intermediate metal layer, disposed between the bottom metal layer and the top metal layer, and the intermediate metal layer includes a plurality of intermediate metal wires, and each intermediate metal wire covers one of the test positions;

[0010] A via layer, disposed between two metal layers, connecting the two metal layers, and the via layer includes a first type of connection structure and a second type of connection structure. The first type of connection structure includes a first number of vias, and the second type of connection structure includes a second number of vias, and the second number is greater than the first number;

[0011] Among them, the bottom via layer or the top via layer includes at least one of the first type of connection structures, and along the stacking direction of the via layer, at least one of the first type of connection structures is added at any position of the current via layer except at the test position of the first type of connection structure in the upper layer.

[0012] In an embodiment of the present invention, the via test structure includes:

[0013] A first intermediate metal layer disposed on the bottom metal layer;

[0014] A second intermediate metal layer disposed on the first intermediate metal layer;

[0015] A first via layer disposed between the bottom metal layer and the first intermediate metal layer;

[0016] A second via layer disposed between the first intermediate metal layer and the second intermediate metal layer;

[0017] A third via layer disposed between the second intermediate metal layer and the top metal layer;

[0018] Among them, the via test structure further includes a first test position, a second test position, and a third test position, and the first test position, the second test position, and the third test position are arranged side by side;

[0019] In the first via layer, the first type of connection structure is disposed at the first test position, and the second type of connection structure is disposed at the second test position and the third test position;

[0020] In the second via layer, the first type of connection structure is disposed at the first test position and the second test position, and the second type of connection structure is disposed at the third test position;

[0021] In the third via layer, the first type of connection structure is disposed at the first test position, the second test position, and the third test position.

[0022] In an embodiment of the present invention, the first quantity is equal to one, and the vias of the second quantity cover the surface of the intermediate metal layer.

[0023] The present invention also provides a via test method using the via test structure described in any one of the above, and the via test method includes:

[0024] One end of the top metal layer or the bottom metal layer is used as a current input terminal, and one end of the bottom metal layer or the top metal layer relative to the current input terminal is used as a current output terminal, and the impedance of the via test structure from the current input terminal to the current output terminal is obtained; and

[0025] Based on the impedance of the via test structure, the via layer where an open circuit occurs is judged.

[0026] In an embodiment of the present invention, the via test structure includes:

[0027] A first intermediate metal layer disposed on the bottom metal layer;

[0028] A second intermediate metal layer disposed on the first intermediate metal layer;

[0029] A first via layer disposed between the bottom metal layer and the first intermediate metal layer;

[0030] A second via layer disposed between the first intermediate metal layer and the second intermediate metal layer;

[0031] A third via layer disposed between the second intermediate metal layer and the top metal layer;

[0032] A first test position, a second test position, and a third test position, and the first test position, the second test position, and the third test position are arranged side by side;

[0033] Wherein, in the first via layer, a first type of connection structure is disposed at the first test position, and a second type of connection structure is disposed at the second test position and the third test position; in the second via layer, the first type of connection structure is disposed at the first test position and the second test position, and the second type of connection structure is disposed at the third test position; in the third via layer, the first type of connection structure is disposed at the first test position, the second test position, and the third test position.

[0034] In an embodiment of the present invention, when all the connection structures in the first via layer, the second via layer, and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula:

[0035] R = 6(R0 ± r) / 11;

[0036] Wherein, R0 is the impedance value of the first type of connection structure, and r is the impedance fluctuation margin value of each connection structure.

[0037] In an embodiment of the present invention, when an open circuit occurs in the first via layer and the connection structures in the second via layer and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula:

[0038] R = 2(R0 ± r) / 3;

[0039] Wherein, R0 is the impedance value of the first type of connection structure, and r is the impedance fluctuation margin value of each connection structure.

[0040] In an embodiment of the present invention, when an open circuit occurs in the second via layer and the connection structures in the first via layer and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula:

[0041] Wherein, R = R0 ± r;

[0042] Wherein, R0 is the impedance value of the first type of connection structure, and r is the impedance fluctuation margin value of each connection structure.

[0043] In an embodiment of the present invention, when an open circuit occurs in the third via layer and the connection structures in the first via layer and the second via layer are normal, the impedance of the via test structure is a maximum value.

[0044] The present invention also provides an integrated circuit, characterized in that it includes the via test structure described in any one of the above.

[0045] In summary, for the manufacturing method of a via test structure provided by the present invention, the unexpected effect is that in the via layer, two types of connection structures are provided, namely, a first type of connection structure including a first number of vias and a second type of connection structure including a second number of vias. By setting the number of vias in the connection structure, it is ensured that the first type of connection structure is affected by static electricity and the second type of connection structure is not affected by static electricity. Then, through the setting of the positions and numbers of the first type of connection structure and the second type of connection structure in each via layer, that is, in the bottom via layer or the top via layer, at least one first type of connection structure is provided, and along the stacking direction of the via layer, except for the test position where the first type of connection structure is located in the upper layer, at least one first type of connection structure is added at any position in the current via layer until all test positions in the top via layer or the bottom via layer are provided with the first type of connection structure. When static electricity occurs, when different via layers are affected by static electricity and an open circuit occurs, the impedances of the non-open test paths are different. Therefore, after a static electricity fault occurs, by detecting the impedance of the via test structure, the via layer where the fault occurs can be judged.

[0046] Of course, it is not necessary for any product implementing the present invention to achieve all the above advantages at the same time. Description of the Drawings

[0047] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0048] Figure 1 It is the distribution of the impedance via test structure in the dicing channel.

[0049] Figure 2 It is the structural diagram of the via test structure in an embodiment of the present application.

[0050] Figure 3 It is the circuit diagram of the via test structure in an embodiment of the present application.

[0051] Figure 4 It is the structural diagram of the via test structure in another embodiment of the present application.

[0052] Figure 5 It is the structural diagram of the via test structure in still another embodiment of the present application.

[0053] Label description:

[0054] 10, dicing channel; 100, metal layer; 1001, intermediate metal wire; 101, bottom metal layer; 1011, bottom metal wire; 102, first intermediate metal layer; 103, second intermediate metal layer; 104, top metal layer; 1041, top metal wire; 200, via layer; 201, first via layer; 202, second via layer; 203, third via layer; 301, first type of connection structure; 302, second type of connection structure. Specific embodiments

[0055] The following illustrates the embodiments of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0056] It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0057] In the present invention, it should be noted that terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. This is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application. In addition, terms such as "first" and "second" are only used for descriptive and distinguishing purposes and cannot be construed as indicating or implying relative importance.

[0058] In a semiconductor integrated circuit, multiple semiconductor devices are integrated on a silicon wafer. After forming multiple semiconductor devices on the silicon wafer, multiple metal layers need to be formed, and adjacent metal layers are connected using a via layer to electrically connect each semiconductor device according to the designed circuit. The metal layer can be disposed on the surface of the semiconductor device or on the surface of the silicon wafer away from the semiconductor device. During the semiconductor manufacturing process, electrical testing is required. During electrical testing, a via test structure is used to test whether there is an open circuit in the via layer. If an open circuit occurs, failure analysis needs to be performed to find the open circuit point and analyze it.

[0059] Please refer to Figure 1 As shown, the via test structures for testing different metal layers are distributed at different positions in the scribe line 10. If abnormal occurrences are prone to occur in a specific area, due to the limitation of the dispersed distribution of the via test structures, it is impossible to monitor the via impedance abnormalities of different layers at the same test position. In the semiconductor manufacturing process, static electricity will affect the connection between the via and the metal layer, resulting in a relatively high via impedance or even an open circuit. The via impedance abnormalities caused by static electricity have characteristics such as an unfixed via layer position, an uncertain impedance magnitude, and often a regional concentration due to the process characteristics. Conventional via test structures are difficult to monitor the abnormalities caused by this reason.

[0060] Please refer to Figure 2 As shown, the present application provides a via test structure, a test method, and an integrated circuit. The via test structure can simultaneously monitor the vias of all layers. When a problem occurs in the via of a certain layer due to static electricity, the layer where the problem occurs is judged by measuring the resistance value of the via test structure.

[0061] Please refer to Figure 2As shown, in an embodiment of the present invention, the via test structure includes a metal layer 100 and a via layer 200. Each via layer 200 is disposed between two metal layers 100 to connect the two metal layers 100. In the present application, the via test structure includes at least three metal layers 100 and at least two via layers 200. Each metal layer 100 includes a plurality of metal wires, and each via layer 200 includes a plurality of connection structures. Each connection structure connects the metal wires at the same test position in the upper and lower metal layers 100. By changing the shapes and arrangements of the metal wires and the connection structures, various via test structures can be formed.

[0062] Please refer to Figure 2 As shown, in an embodiment of the present invention, the metal layer 100 includes a top metal layer 104, a bottom metal layer 101, and intermediate metal layers. The top metal layer 104 and the bottom metal layer 101 are located on both sides of the intermediate metal layer. Each via test structure includes one top metal layer 104, one top metal layer 104, and at least one intermediate metal layer. Moreover, the present application does not limit the positions of the top metal layer 104 and the bottom metal layer 101. The top metal layer 104 and the bottom metal layer 101 are provided only to indicate that metal layers 100 are provided on both sides of the intermediate metal layer. In this embodiment, the bottom metal layer 101 is located on the side close to the semiconductor device, and the top metal layer 104 is located on the side far from the semiconductor device.

[0063] Please refer to Figure 2 As shown, in an embodiment of the present invention, the top metal layer 104 includes top metal wires 1041, and the bottom metal layer 101 includes bottom metal wires 1011. The bottom metal wires 1011 and the bottom metal wires 1011 cover all the test positions, and connect the connection structures at each position in series to form a via test structure.

[0064] Please refer to Figure 2 As shown, in an embodiment of the present invention, the intermediate metal layer is disposed between the top metal layer 104 and the bottom metal layer 101, and each via test structure includes at least one intermediate metal layer. In some embodiments, one or two intermediate metal layers are provided between the top metal layer 104 and the bottom metal layer 101. In other embodiments, three or more intermediate metal layers are provided between the top metal layer 104 and the bottom metal layer 101.

[0065] Please refer to Figure 2As shown, in an embodiment of the present invention, taking the case where two intermediate metal layers are provided between the top metal layer 104 and the bottom metal layer 101 as an example for illustration. At this time, the intermediate metal layers include a first intermediate metal layer 102 and a second intermediate metal layer 103. The first intermediate metal layer 102 is located on the bottom metal layer 101, the second intermediate metal layer 103 is located on the first metal layer 100, and the top metal layer 104 is located on the second intermediate metal layer 103.

[0066] Please refer to Figure 2 As shown, in an embodiment of the present invention, the intermediate metal layer includes a plurality of intermediate metal wires 1001. Specifically, the number of intermediate metal wires 1001 provided in each intermediate metal layer is equal to the number of test positions, and each intermediate metal wire 1001 covers one test position, and there is a preset spacing between adjacent intermediate metal wires 1001.

[0067] Please refer to Figure 2 As shown, in an embodiment of the present invention, the via layer 200 is provided between two adjacent metal layers 100, and the number of via layers 200 is determined according to the number of metal layers 100. In this embodiment, three via layers 200 are provided between four metal layers 100. In other embodiments, if there are three metal layers 100, then two via layers 200 are provided between the three metal layers 100. If there are two metal layers 100, then one via layer 200 is provided between the two metal layers 100. That is, the number of via layers 200 is equal to the number of metal layers 100 minus one.

[0068] Please refer to Figure 2 As shown, in an embodiment of the present invention, the via layer 200 includes a first via layer 201, a second via layer 202, and a third via layer 203. Among them, the first via layer 201 is provided between the bottom metal layer 101 and the first intermediate metal layer 102, and the connection structure in the first via layer 201 connects the bottom metal wire 1011 in the bottom metal layer 101 and the intermediate metal wire 1001 in the first intermediate metal layer 102. The second via layer 202 is provided between the first intermediate metal layer 102 and the second intermediate metal layer 103, and the connection structure in the second via layer 202 connects the intermediate metal wire 1001 in the first intermediate metal layer 102 and the intermediate metal wire 1001 in the second intermediate metal layer 103. The third via layer 203 is provided between the second intermediate metal layer 103 and the top metal layer 104, and the connection structure in the third via layer 203 connects the intermediate metal wire 1001 in the second intermediate metal layer 103 and the top metal wire 1041 in the top metal layer 104.

[0069] Please refer to Figure 2As shown in the figure, in an embodiment of the present invention, at each test position, a connection structure is provided in each via layer 200, and the connection structure connects the metal wires in the metal layers 100 on both sides thereof. The metal wires connect the connection structures in each metal layer 100 at the current test position in series, thus forming a test path. Then, through the top metal layer 104 and the bottom metal layer 101, the test paths of multiple test positions are connected to form a via test structure.

[0070] Please refer to Figure 2 As shown in the figure, in an embodiment of the present invention, the via layer 200 includes two types of connection structures, namely, the first type of connection structure 301 and the second type of connection structure 302. Among them, the first type of connection structure 301 includes a first number of vias, and the second type of connection structure 302 includes a second number of vias, and the second number is greater than the first number. Among them, the first number is, for example, 1. The second number is set according to requirements, and the vias of the second number cover the surface of the middle metal wire 1001. The first vias and the second vias are filled with a conductive material to form a connection structure. At this time, the resistance value of the first type of connection structure 301 is much larger than the resistance value of the metal wire, and the resistance value of the second type of connection structure 302 is approximately equal to the resistance value of the metal wire. The second type of connection structure 302 is equivalent to a section of wire. At this time, when a via layer 200 is affected by static electricity, the first type of connection structure 301 will be affected by static electricity and an open circuit will occur. However, the second type of connection structure 302 will not be open-circuited by static electricity.

[0071] Please refer to Figure 2 As shown in the figure, in an embodiment of the present invention, in the bottom via layer or the top via layer, at least one first type of connection structure 301 is provided, and along the stacking direction of the via layer 200, except for the test position where the first type of connection structure 301 is located in the upper layer, at least one first type of connection structure 301 is added at any position of the current via layer 200 until the top via layer or the bottom via layer, and the first type of connection structure 301 is provided at all test positions. Among them, the stacking direction of the via layer 200 can be the direction from the bottom metal layer 101 to the top metal layer 104, or the direction from the top metal layer 104 to the bottom metal layer 101. At this time, in each test path, a first type of connection structure 301 is provided. And the number of the first type of connection structures 301 in each via layer 200 is different. When static electricity occurs and different via layers 200 are affected by static electricity and an open circuit occurs, the impedances of the test paths that are not open-circuited are different. Therefore, after a static electricity fault occurs, by detecting the impedance of the via test structure, the via layer 200 where the fault occurs can be judged.

[0072] Please refer to Figure 2As shown, in an embodiment of the present invention, the top via layer is the via layer 200 connected to the top metal layer 104, and the bottom via layer is the via layer 200 connected to the bottom metal layer 101. In this embodiment, the bottom via layer is the first via layer 201, and the top via layer is the third via layer 203.

[0073] Please refer to Figure 2 As shown, it should be noted that the present application does not limit the number of test positions, the number of first-type connection structures 301 in each via layer 200, and the number of second-type connection structures 302 in each via layer 200.

[0074] Please refer to Figure 2 As shown, in an embodiment of the present invention, taking the example that there are three test positions in the via test structure, the three test positions are the first test position, the second test position, and the third test position. In the first via layer 200, one first-type connection structure 301 is provided, and the first-type connection structure 301 is located at the first test position. While at the second test position and the third test position, second-type connection structures 302 are provided.

[0075] Please refer to Figure 2As shown, in an embodiment of the present invention, along the stacking direction of the via layer 200, except for the test position where the first type of connection structure 301 is located in the upper layer, a first type of connection structure 301 is added at any position of the current via layer 200. There is one first type of connection structure 301 and two second type of connection structures 302 in the first via layer 201, and one first type of connection structure 301 is arranged at the first test position, one second type of connection structure 302 is arranged at the second test position, and the other second type of connection structure 302 is arranged at the third test position. Then there are two first type of connection structures 301 and one second type of connection structure 302 in the second via layer 202, and one first type of connection structure 301 is arranged at the first test position, the other first type of connection structure 301 is arranged at the second test position, and one second type of connection structure 302 is arranged at the third test position. In the third via layer 203, three first type of connection structures 301 are arranged. That is, at the first test position, the second test position, and the third test position, first type of connection structures 301 are all arranged. At this time, it is equivalent that the via test structure has Y test positions, and each test position is provided with Y stacked via layers connected in series to connect the bottom metal layer 101 and the top metal layer 104, and adjacent two via layers are connected to each other through an intermediate metal layer. Among them, at the Xth test position, the Y via layers include (X - 1) second type of connection structures 302 from the bottom metal layer 101 to the top metal layer 104 and Y - (X - 1) first type of connection structures 301, where X ∈ [1, Y] and X ∈ N*.

[0076] Please refer to Figure 4 and Figure 5 As shown, in another embodiment of the present invention, the via test structure includes four metal layers 100 and three via layers 200, and five test positions are provided. Then in the first via layer 200, one first type of connection structure 301 can be arranged, three first type of connection structures 301 are arranged in the second via layer 202, and five first type of connection structures 301 are arranged in the third via layer 203. In still another embodiment of the present invention, the via test structure includes five metal layers 100 and four via layers 200, and four test positions are provided. Then in the first via layer 200, one first type of connection structure 301 can be arranged, two first type of connection structures 301 are arranged in the second via layer 202, three first type of connection structures 301 are arranged in the third via layer 203, and four first type of connection structures 301 are arranged in the fourth via layer 200. Therefore, the number of the first type of connection structures 301 and the second type of connection structures 302 in each via layer 200 can be configured according to the number of metal layers 100, the number of via layers 200, and the number of test positions.

[0077] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, when testing using the via test structure provided in the present application, one end of the top metal layer 104 or the bottom metal layer 101 is used as the current input end, and one end of the bottom metal layer 101 or the top metal layer 104 relative to the current input end is used as the current output end. Input current from the current input end, detect the voltage between the current input end and the current output end, and obtain the impedance of the via test structure. Or when inputting current into the via test structure, directly measure the impedance of the via test structure at the impedance sensing end. Then, based on the magnitude of the impedance, determine the via layer 200 where an open circuit occurs.

[0078] Please refer to Figure 2 and Figure 3 As shown, the present application takes the impedance test circuit shown in Figure 2 as an example. Among them, the impedance of the first type of connection structure 301 in the first via layer 201 is set as the first impedance R1, the impedance of the first type of connection structure 301 in the second via layer 202 is set as the second impedance R2, and the impedance of the first type of connection structure 301 in the third via layer 203 is set as the third impedance R3. And the second type of connection structure 302 is equivalent to a wire. Then a test circuit as shown in Figure 3 is formed. At this time, the first type of connection structures 301 in the first via layer 201, the second via layer 202, and the third via layer 203 at the first test position are connected in series through the metal layer 100 to form a test path at the first test position. The first type of connection structures 301 in the second via layer 202 and the third via layer 203 at the second test position are connected in series through the metal layer 100 and the second type of connection structure 302 in the first via layer 201 to form a test path at the second test position. The first type of connection structure 301 in the third via layer 203 at the third test position is connected in series through the metal layer 100 and the second type of connection structures 302 in the first via layer 201 and the second via layer 202 to form a test path at the third test position.

[0079] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, when all the connection structures in the first via layer 201, the second via layer 202, and the third via layer 203 are normal, the impedance of the via test structure is equal to the impedance after the parallel connection of the test paths at the first test position, the test path at the second test position, and the test path at the third test position. Therefore, when all the connection structures in the first via layer 201, the second via layer 202, and the third via layer 203 are normal, the impedance of the via test structure can be specifically obtained according to the following formula:

[0080] R = 1 / (1 / (R1 + R2 + R3) + 1 / (R2 + R3) + 1 / R3);

[0081] Among them, R is the impedance of the via test structure, R1 is the impedance of the first type of connection structure 301 in the first via layer 201, R2 is the impedance of the first type of connection structure 301 in the second via layer 202, and R3 is the impedance of the first type of connection structure 301 in the third via layer 203.

[0082] When the via heights and exposure sizes of different layers are the same, the resistance deviation caused by normal process fluctuations is relatively small, and the via resistances of different layers are considered equal, that is, when R1 = R2 = R3 = R0, then R = 6R0 / 11. At the same time, considering the resistance fluctuations of the connection structures, the impedance of the via test structure can be obtained according to the following formula:

[0083] R = 6(R0 ± r) / 11;

[0084] Among them, r is the impedance fluctuation margin value of each connection structure.

[0085] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, when there is an open circuit in the first via layer 201 and all the connection structures in the second via layer 202 and the third via layer 203 are normal, the first type of connection structure 301 in the first via layer 201 is disconnected, and the second type of connection structure 302 will not be disconnected. At this time, the impedance of the via test structure is equal to the impedance after the test paths at the second test position and the third test position are connected in parallel. Therefore, when there is an open circuit in the first via layer 201 and all the connection structures in the second via layer 202 and the third via layer 203 are normal, the impedance of the via test structure can be specifically obtained according to the following formula:

[0086] R = 1 / (1 / (R2 + R3) + 1 / R3);

[0087] Among them, R is the impedance of the via test structure, R2 is the impedance of the first type of connection structure 301 in the second via layer 202, and R3 is the impedance of the first type of connection structure 301 in the third via layer 203.

[0088] When the via heights and exposure sizes of different layers are the same, the resistance deviation caused by normal process fluctuations is relatively small, and the via resistances of different layers are considered equal, that is, when R2 = R3 = R0, then R = 2R0 / 3. At the same time, considering the resistance fluctuations of the connection structures, the impedance of the via test structure can be obtained according to the following formula:

[0089] R = 2(R0 ± r) / 3;

[0090] Among them, r is the impedance fluctuation margin value of each connection structure.

[0091] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, when the second via layer 202 is open-circuited and all connection structures in the first via layer 201 and the third via layer 203 are normal, the first type of connection structure 301 in the second via layer 202 is disconnected, and the second type of connection structure 302 is not disconnected. At this time, the impedance of the via test structure is equal to the impedance of the test path at the third test position. Therefore, when the second via layer 202 is open-circuited and all connection structures in the first via layer 201 and the third via layer 203 are normal, the impedance of the via test structure can be specifically obtained according to the following formula:

[0092] R = R3;

[0093] wherein, R3 is the impedance of the first type of connection structure 301 in the third via layer 203.

[0094] When the via heights and exposure sizes of different layers are the same, the resistance deviation caused by normal process fluctuations is relatively small, and the via resistances of different layers are regarded as equal, that is, when R3 = R0, then R = R0. At the same time, considering the fluctuations in the resistance of the connection structure, the impedance of the via test structure can be obtained according to the following formula:

[0095] R = R0 ± r;

[0096] wherein, r is the impedance fluctuation margin value of each connection structure.

[0097] Please refer to Figure 2 and Figure 3 As shown, in an embodiment of the present invention, when the third via layer 203 is open-circuited and all connection structures in the first via layer 201 and the second via layer 202 are normal, the first type of connection structure 301 in the third via layer 203 is disconnected, and all test paths are disconnected. At this time, the impedance of the via test structure is a maximum value.

[0098] In addition to the above situations, when there is no via connection open circuit and only the impedance is too high, i.e., R > 6R0 / 11, it can be further judged by means such as confirming the via size and physical property structure analysis.

[0099] In summary, the present invention provides a via test structure, a test method, and an integrated circuit. The via test structure includes: a bottom metal layer including a bottom metal wire; a top metal layer including a top metal wire, and the bottom metal wire and the top metal wire cover all test positions; an intermediate metal layer disposed between the bottom metal layer and the top metal layer, and the intermediate metal layer includes a plurality of intermediate metal wires, each intermediate metal wire covering one test position; a via layer disposed between two metal layers, connecting the two metal layers, and the via layer includes a first type of connection structure and a second type of connection structure. The first type of connection structure includes a first number of vias, and the second type of connection structure includes a second number of vias, and the second number is greater than the first number; wherein, the bottom via layer or the top via layer includes at least one first type of connection structure, and along the stacking direction of the via layer, except at the test positions of the first type of connection structure in the upper layer, at least one first type of connection structure is added at any position of the via layer in this layer. An unexpected effect of the via test structure, the test method, and the integrated circuit provided by the present invention is that: in the via layer, two types of connection structures are provided, namely, a first type of connection structure including a first number of vias and a second type of connection structure including a second number of vias. By setting the number of vias in the connection structure, it is ensured that the first type of connection structure is affected by static electricity, while the second type of connection structure is not affected by static electricity. Then, through the setting of the positions and numbers of the first type of connection structure and the second type of connection structure in each via layer, that is, in the bottom via layer or the top via layer, at least one first type of connection structure is provided, and along the stacking direction of the via layer, except at the test positions where the first type of connection structure in the upper layer is located, at least one first type of connection structure is added at any position of the via layer in this layer until the top via layer or the bottom via layer, and the first type of connection structure is provided at all test positions. When static electricity occurs, when different via layers are affected by static electricity and open circuits occur, the impedances of the test paths that are not open-circuited are different. Therefore, after a static electricity failure occurs, by detecting the impedance of the via test structure, the via layer where the failure occurs can be determined.

[0100] The embodiments of the present invention disclosed above are only used to help explain the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the art can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A through-hole test structure, characterized in that: include: A bottom metal layer, including a bottom metal conductor; A top metal layer, including a top metal wire, wherein the bottom metal wire and the top metal wire cover all test positions; An intermediate metal layer is disposed between the bottom metal layer and the top metal layer, and the intermediate metal layer includes a plurality of intermediate metal wires, each of which covers one of the test positions; A through-hole layer is arranged between two metal layers to connect the two metal layers, and the through-hole layer includes a first type connection structure and a second type connection structure, the first type connection structure includes a first number of through-holes, the second type connection structure includes a second number of through-holes, the second number is greater than the first number, the first number is equal to one, and the second number of through-holes covers the surface of the middle metal layer; Among them, the bottom through-hole layer or the top through-hole layer includes at least one of the first-type connection structures, and along the stacking direction of the through-hole layer, the first-type connection structure is set at the test position corresponding to the first-type connection structure of the current through-hole layer and the previous through-hole layer, and in addition to the test position of the first-type connection structure of the previous layer, at least one first-type connection structure is added at any position of the current through-hole layer.

2. The through-hole test structure according to claim 1, characterized in that: The through-hole test structure comprises: A first intermediate metal layer, disposed on the bottom metal layer; a second intermediate metal layer, disposed on the first intermediate metal layer; A first via layer, disposed between the bottom metal layer and the first intermediate metal layer; A second through-hole layer is arranged between the first intermediate metal layer and the corresponding second intermediate metal layer; A third via layer is arranged between the second intermediate metal layer and the top metal layer; Wherein, the through-hole test structure further includes a first test position, a second test position and a third test position, and the first test position, the second test position and the third test position are arranged side by side; In the first via layer, the first type connection structure is arranged at the first test position, and the second type connection structure is arranged at the second test position and the third test position; In the second through-hole layer, the first type connection structure is arranged at the first test position and the second test position, and the second type connection structure is arranged at the third test position; In the third via layer, the first test location, the second test location, and the third test location are provided with the first type connection structure.

3. A through-hole testing method, characterized in that: Using the through-hole test structure described in any one of claims 1 to 2, and the through-hole test method comprises: Using one end of the top metal layer or the bottom metal layer as a current input end, using one end of the bottom metal layer or the top metal layer opposite to the current input end as a current output end, and obtaining the impedance of the through-hole test structure from the current input end to the current output end; and The via layer where the circuit is broken is determined according to the impedance of the via test structure.

4. The through-hole testing method according to claim 3, characterized in that: The through-hole test structure comprises: A first intermediate metal layer, disposed on the bottom metal layer; a second intermediate metal layer, disposed on the first intermediate metal layer; A first via layer, disposed between the bottom metal layer and the first intermediate metal layer; A second through-hole layer is arranged between the first intermediate metal layer and the corresponding second intermediate metal layer; A third via layer is arranged between the second intermediate metal layer and the top metal layer; A first test position, a second test position and a third test position, wherein the first test position, the second test position and the third test position are arranged side by side; Among them, in the first through-hole layer, the first type of connection structure is set at the first test position, and the second type of connection structure is set at the second test position and the third test position; in the second through-hole layer, the first type of connection structure is set at the first test position and the second test position, and the second type of connection structure is set at the third test position; in the third through-hole layer, the first type of connection structure is set at the first test position, the second test position and the third test position.

5. The through-hole testing method according to claim 4, characterized in that: When all the connection structures in the first via layer, the second via layer and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula: R = 6 (R0 ± r) / 11; Wherein, R0 is the impedance value of the first type connection structure, and r is the impedance fluctuation margin value of each connection structure.

6. The through-hole testing method according to claim 4, characterized in that: When the first via layer is broken and the connection structures in the second via layer and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula: R = 2 (R0 ± r) / 3; Wherein, R0 is the impedance value of the first type connection structure, and r is the impedance fluctuation margin value of each connection structure.

7. The through-hole testing method according to claim 4, characterized in that: When the second via layer is broken and the connection structures in the first via layer and the third via layer are normal, the impedance of the via test structure is obtained according to the following formula: Where, R = R0 ± r; Wherein, R0 is the impedance value of the first type connection structure, and r is the impedance fluctuation margin value of each connection structure.

8. The through-hole testing method according to claim 4, characterized in that: When the third via layer is broken and the connection structures in the first via layer and the second via layer are normal, the impedance of the via test structure is a maximum value.

9. An integrated circuit, characterized in that: The method comprises the through-hole test structure as claimed in any one of claims 1 to 2.

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