Machine-side current active damping system for eliminating time delay

Abstract

The invention discloses a machine-side current active damping system for eliminating time delay, and the system comprises a first module which is used for constructing a model of a voltage source inverter and a digital control system which are connected to a power grid through an LCL filter; the second module is used for short-circuiting the vg (s) of the model of the voltage source inverter and the digital control system in the first module and obtaining a new model; the third module is used for adding a transfer function Gc (s) in the model in the second module and obtaining a new model; the fourth module is used for updating the model in the first module according to the model in the second module; therefore, the inverter side current can serve as a feedback point, compared with a traditional system, no additional sensor is needed, cost is saved, engineering practice is met, time delay is eliminated in a control loop, the damping performance can be represented as constant positive resistance under the ideal condition, and therefore the stable area of damping gain is remarkably enlarged.

Description

Technical Field

[0001] The invention relates to the field of control engineering, and in particular to a machine-side current active damping system for eliminating time delay. Background Art

[0002] For LCL type grid-connected power generation system, the traditional capacitor current active damping method is used at the resonant frequency f r Greater than Time (f s is the sampling frequency), the virtual resistance is less than zero and introduces a pair of unstable open-loop poles, which may cause instability and is not conducive to the reliable operation of the system.

[0003] Digital control introduces a control delay of 1.5 beats in the control loop. At this time, the damping feedback cannot be equivalent to a virtual resistor, but a virtual impedance that changes with the system frequency. In order to alleviate or even eliminate the adverse effects of control delay on the damping effect, current research methods can be roughly divided into two categories: one is to directly reduce the control delay, and the other is to use control methods to indirectly compensate for the control delay.

[0004] For example, it is proposed to add a leading link to correct the impedance characteristics in the inner loop of the inverter current feedback, which can effectively change the stable range from Increase to [0,0.25f s ], a delay compensation scheme for the cascade leading link is proposed to compensate for the phase lag introduced by the delay and expand the equivalent positive damping zone to [0,0.48f s ], proposed a delay compensation strategy based on Newton interpolation method, which changes the stable interval from Expand to [0,0.23f s ], using the method of double loading and advance feedback, the resistance component is in [0,0.5f s ]The positive resistance characteristic is maintained within the frequency range, but the sampling frequency of the active damping inner loop needs to be doubled, which increases the amount of calculation.

[0005] Although these methods can expand the positive resistance area of ​​the virtual impedance, they cannot completely eliminate the influence of time delay. Summary of the invention

[0006] The present invention aims to solve the technical problems in the above-mentioned technology at least to some extent.

[0007] To this end, the present invention discloses a machine-side current active damping system for eliminating time delay, comprising the following steps:

[0008] The first module is used to build a model of a voltage source inverter and a digital control system connected to the grid through an LCL filter. Specifically, Among them, L1 is the inverter side inductor, L2 is the grid side inductor, C is the filter capacitor, G i (s) is the current controller, G ad (s) is the active damping function and G d (s) is the inherent time delay in digital control;

[0009] The second module is used to convert the voltage source inverter and digital control system model in the first module into the voltage source inverter and digital control system model. g (s) short-circuit, and get a new model, specifically,

[0010] The third module is used to add the transfer function G to the model in the second module. c (s), and get a new model, specifically,

[0011] The fourth module is used to update the model in the first module according to the model in the second module, specifically,

[0012]

[0013] According to the machine-side current active damping system for eliminating time delay disclosed in the present invention, the inverter-side current can be used as a feedback point. Compared with the traditional system, no additional sensors are required, which saves costs and conforms to engineering practice. The time delay is eliminated in the control loop. Under ideal circumstances, the damping performance can be expressed as a constant positive resistance, thereby significantly expanding the stable area of ​​the damping gain.

[0014] In addition, the machine-side current active damping system for eliminating time delay disclosed in the present invention may also have the following additional technical features:

[0015] In one embodiment of the present invention, in the first module, G d (s) consists of a sampling period calculation delay and a half sampling period PWM delay, specifically,

[0016] In one embodiment of the present invention, in the second module,

[0017] In one embodiment of the present invention, in the third module, G c (s) = [1-G d (s)]G ad (s)G p (s).

[0018] Additional contents and advantages of the present invention will be given in the following description or may be understood through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The technical solutions and beneficial effects of the present invention will become apparent and easily understood from the following contents in conjunction with the accompanying drawings, wherein:

[0020] Figure 1 is a system structure diagram of a voltage source inverter connected to a power grid through an LCL filter in the first module of the present invention;

[0021] Figure 2 A system block diagram of a voltage source inverter connected to a power grid through an LCL filter in the first module of the present invention;

[0022] Figure 3 It is a simplified system block diagram of the second module in the present invention;

[0023] Figure 4 This is a block diagram of the improved system in the third module of the present invention;

[0024] Figure 5 This is a system block diagram updated in the fourth module of the present invention;

[0025] Figure 6 It is a schematic diagram of the equivalent impedance model in the present invention. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0027] The machine-side current active damping system for eliminating time delay disclosed by the present invention will be described below with reference to the accompanying drawings;

[0028] A machine-side current active damping system for eliminating time delay includes the following steps:

[0029] like Figure 1 and Figure 2 As shown, the first module is used to construct a model of a voltage source inverter and a digital control system connected to a power grid through an LCL filter, specifically, Among them, L1 is the inverter side inductor, L2 is the grid side inductor, C is the filter capacitor, G i (s) is the current controller, G ad (s) is the active damping function and G d (s) is the inherent time delay in digital control;

[0030] G d (s) consists of a sampling period calculation delay and a half sampling period PWM delay, specifically,

[0031] Specifically, an inverter U inv The positive and negative poles on one side are connected to a power supply U dc The positive electrode on the other side is connected to an inverter side inductor L1, the other end of the inverter side inductor L1 is connected to a grid side inductor L2, and the other end of the grid side inductor L2 is connected to a grid impedance L g , grid impedance L g The other end is connected to a grid voltage U g , grid voltage U g The other end is connected to the inverter U inv The negative pole on the other side, the junction of the inverter side inductor L1 and the grid side inductor L2 is connected to a filter capacitor C, and the other end of the filter capacitor C is connected to the inverter U inv The negative pole on the other side measures the grid-side inductor L2 and grid impedance L g The node between the inverter U inv The voltage U between the negative poles on the other side pcc , inverter U inv A monitoring point is set on the negative electrode on the other side and a current i is drawn from this monitoring point L1 ;

[0032] A PWM unit, a PLL unit, an active damping link unit, a G i unit, a first normally open switch, a second normally open switch, a first adding point, a second adding point, a first branch point and a cosθ multiplier;

[0033] The output end of the first normally open switch is connected to the input end of the first branch point, the output end of the first branch point is respectively connected to the input end of the active damping link unit and the second adding point difference input end, the output end of the active damping link unit is connected to the first adding point difference input end, the output end of the second normally open switch is connected to the input end of the PLL unit, the output end of the PLL unit is connected to the first input end of the cosθ multiplier, and the second input end of the cosθ multiplier inputs an I * , the output of the cosθ multiplier is i ref ,i ref Input to the second summing point summing input terminal, the second summing point output terminal and G i The input terminal of the unit is connected to G i The output end of the unit is connected to the first summing point summing input end, the first summing point output end is connected to the input end of the PWM unit, and the PWM unit points to the inverter U inv , current Input to the input terminal of the first normally open switch, voltage U pcc Input to the input terminal of the second normally open switch;

[0034] In order to consider the worst operating state of the system, the inverter side inductor L1, the grid side inductor L2, the filter capacitor C and the grid impedance L g The equivalent series resistance is neglected;

[0035] Input signal ref (s) and v g (s), output signal i2(s);

[0036] Input signal ref (s) enters the first summing point and subtracts, and the signal output from the first summing point enters G i (s), G i The signal output by (s) enters the second summing point and is added, and the signal output by the second summing point enters G d (s), G d The signal output by (s) enters the third summing point and is added. The signal output by the third summing point enters The output signals enter the fourth summing point and are added, G ad (s) and the first summing point and subtract them, G ad The signal output by (s) enters the second summing point and is subtracted, and the signal output by the fourth summing point enters The output signals enter the fifth summing point and are added and the third summing point and are subtracted, v g The signal output by (s) enters the fifth summing point and is subtracted. The signal output by the fifth summing point enters The output signal is the output signal i2(s), and the output signal i2(s) enters the fourth summing point and is subtracted;

[0037] like Figure 3 As shown, the second module is used to convert the voltage source inverter and digital control system model in the first module into the voltage source inverter and digital control system model. g (s) short-circuit, and get a new model, specifically,

[0038] Specifically, the input signal i ref (s), output signal i1(s);

[0039] Input signal ref (s) enters the first summing point and is added, and the signal output from the first summing point enters G i (s), G i The signal output by (s) enters the second summing point and is added, and the signal output by the second summing point enters G d (s), G d (s) The output signal enters G p (s), Gp The output signal of (s) is the output signal i1(s), and the output signal i1(s) enters the first summing point and subtracts the sum G ad (s), G ad (s) The output signal enters the second summing point and is subtracted;

[0040] like Figure 4 As shown, the third module is used to add the transfer function G to the model in the second module. c (s), and get a new model, specifically, G p (s)G d (s)G ad (s)],G c (s) = [1-G d (s)]G ad (s)G p (s);

[0041] Specifically, the input signal i ref (s), output signal i1(s);

[0042] Input signal ref (s) enters the first summing point and is added, and the signal output from the first summing point enters G i (s), G i The signal output by (s) enters the second summing point and is added, and the signal output by the second summing point enters G d (s) and G c (s), G c (s) The output signal enters G p (s), G p The output signal of (s) is the output signal i1(s), and the output signal i1(s) enters the first summing point and subtracts the sum G ad (s), G ad (s) The output signal enters the third summing point and is added, G c (s) The output signal enters the third summing point and is added, and the output signal of the third summing point enters the second summing point and is subtracted;

[0043] like Figure 5 As shown, the fourth module is used to update the model in the first module according to the model in the second module, specifically,

[0044] Specifically, the input signal i ref (s) and v g (s), output signal i2(s);

[0045] Input signal ref(s) enters the first summing point and is added, and the signal output from the first summing point enters G i (s), G i (s) The output signal enters G d (s), G d The signal output by (s) enters the second summing point and is added. The signal output by the second summing point enters The output signals enter the third summing point and are added. ad (s) and the first summing point and subtract them, G ad The signal output by (s) enters the second summing point and is subtracted, and the signal output by the third summing point enters The output signals enter the fourth summing point and are added and subtracted from the second summing point. The input signal v g (s) enters the fourth summing point and is subtracted. The signal output from the fourth summing point enters The output signal is the output signal i2(s), and the output signal i2(s) enters the third summing point and is subtracted;

[0046] like Figure 6 As shown, the virtual impedance Z eq (s) model, the feedback is no longer a virtual impedance that changes with the system frequency, but is only related to the active damping link function G ad (s) related.

[0047] In summary, the machine-side current active damping system for eliminating time delay disclosed in the present invention can use the inverter-side current as a feedback point. Compared with traditional systems, it does not require additional sensors, saves costs and conforms to engineering practice. In addition, the time delay is eliminated in the control loop. Under ideal circumstances, the damping performance can be expressed as a constant positive resistance, thereby significantly expanding the stable area of ​​the damping gain.

[0048] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A machine-side current active damping system for eliminating time delay, characterized in that: The following steps are involved: The first module is used to build a model of a voltage source inverter and a digital control system connected to the grid through an LCL filter. Specifically, Among them, L1 is the inverter side inductor, L2 is the grid side inductor, C is the filter capacitor, G i (s) is the current controller, G ad (s) is the active damping function and G d (s) is the inherent time delay in digital control; The second module is used to convert the voltage source inverter and digital control system model in the first module into the voltage source inverter and digital control system model. g (s) short-circuit, and get a new model, specifically, The third module is used to add the transfer function G to the model in the second module. c (s), and get a new model, specifically, The fourth module is used to update the model in the first module according to the model in the second module, specifically, 2. The machine-side current active damping system for eliminating time delay according to claim 1, characterized in that: In the first module, G d (s) consists of a sampling period calculation delay and a half sampling period PWM delay, specifically, 3. The machine-side current active damping system for eliminating time delay according to claim 1, characterized in that: In the second module, 4. The machine-side current active damping system for eliminating time delay according to claim 1, characterized in that: In the third module, G c (s) = [1-G d (s)]G ad (s)G p (s).

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