Light emitting diode chip and preparation method thereof

Abstract

The embodiment of the invention provides a light-emitting diode chip and a preparation method thereof, and belongs to the technical field of display, and the method comprises the steps: providing a first substrate; growing an epitaxial layer on the first substrate, and performing an etching process on the epitaxial layer to form a plurality of luminous bodies distributed in an array; providing a second substrate, and forming a conductive layer on the second substrate; bonding the conductive layer with the epitaxial layer comprising a plurality of luminous bodies; injecting a filling material towards the epitaxial layer from one side of the conductive layer, and enabling the filling material to fill gaps among the light-emitting bodies; and removing the second substrate, and forming a bonding electrode on the epitaxial layer and the conductive layer. According to the light-emitting diode chip and the preparation method thereof provided by the embodiment of the invention, the stability of the connection performance between the conductive layer and the electrode layer in the light-emitting diode chip can be improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and more specifically, to a light emitting diode chip and a method for preparing the same. Background Art

[0002] Micro-LED (Micro Light-Emitting Diode) is widely used in various display devices due to its high light efficiency and stability. However, it has some problems. One of them is the decrease in light efficiency after the Micro-LED is reduced in size (<20μm), and the other is the problem that the peak efficiency of Micro-LED with reduced size shifts to the right corresponding to the current density.

[0003] In related technologies, by adopting the nano-column LED solution, that is, through micro-nano processing, the luminescence of the nano-scale LED structure is realized, the quantum Stark effect caused by strain and the non-radiative recombination caused by defects are reduced. At the same time, through nano-scale LED optical design, the light output efficiency is improved, and the problem of the decrease in peak efficiency of Micro-LED as the size decreases and the low luminous efficiency at small current density is solved.

[0004] However, in the process of preparing the nanocolumn LED, there may be a problem of unstable electrical connection between the conductive layer and the electrode layer in the LED due to process problems. Summary of the invention

[0005] The embodiments of the present application provide a light-emitting diode chip and a method for preparing the same, aiming to improve the stability of the connection performance between the conductive layer and the electrode layer in the light-emitting diode chip.

[0006] A first aspect of an embodiment of the present application provides a method for preparing a light emitting diode chip, the method comprising: providing a first substrate; Growing an epitaxial layer on the first substrate, and performing an etching process on the epitaxial layer to form a plurality of light-emitting bodies distributed in an array; providing a second substrate, and forming a conductive layer on the second substrate; bonding the conductive layer to the epitaxial layer including a plurality of light emitters; Injecting a filling material on one side of the conductive layer toward the epitaxial layer so that the filling material fills the gaps between the light-emitting bodies; The second substrate is removed, and bonding electrodes are formed on the epitaxial layer and the conductive layer.

[0007] Optionally, the refractive index of the filling material is greater than 2, and the filling material is a transparent insulating material.

[0008] Optionally, in the step of bonding the conductive layer to the epitaxial layer including a plurality of light-emitting bodies, the preparation method comprises: The conductive layer is bonded to the epitaxial layer including a plurality of light-emitting bodies at a target temperature, a target pressure and a target time.

[0009] Optionally, the target temperature is greater than or equal to 200° C. and less than or equal to 500° C.; The target pressure is greater than 0.5 MPa; The target duration is greater than 10 minutes.

[0010] Optionally, a dissociation layer is provided between the second substrate and the conductive layer.

[0011] Optionally, the material of the dissociation layer includes PI and graphene.

[0012] Optionally, the conductive layer includes a single-layer structure or a multi-layer structure.

[0013] Optionally, the material of the conductive layer includes at least one of ITO, IZO, Cu, Au, Sn, Cr, Pt, Ti, and Ni.

[0014] Optionally, the second substrate is made of glass or sapphire.

[0015] A second aspect of the embodiments of the present application provides a light-emitting diode chip, which is prepared by the method for preparing a light-emitting diode chip provided by the first aspect of the embodiments of the present application.

[0016] Beneficial effects: The present application provides a light-emitting diode chip and a method for preparing the same, wherein an epitaxial layer including a plurality of light-emitting bodies is formed on a first substrate, a conductive layer is formed on a second substrate, and after the conductive layer and the epitaxial layer are bonded, a filling material is injected toward the epitaxial layer on one side of the conductive layer to fill the gaps between the light-emitting bodies, and then the second substrate is removed and a bonding electrode is made; in this way, the connection between the conductive layer and the electrode layer in the epitaxial layer can be prevented from being affected by the filling material, thereby improving the stability of the connection performance between the conductive layer and the electrode layer in the light-emitting diode chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0018] Figure 1 is a flowchart of a method for preparing a light emitting diode chip according to an embodiment of the present application; Figure 2 It is a structural schematic diagram of completing the production of an epitaxial layer and a first electrode in a method for preparing a light-emitting diode chip proposed in one embodiment of the present application; Figure 3 It is a structural schematic diagram of completing the production of a mask layer in a method for preparing a light-emitting diode chip proposed in an embodiment of the present application; Figure 4 It is a structural schematic diagram of completing mask layer etching in a method for preparing a light-emitting diode chip proposed in one embodiment of the present application; Figure 5 It is a structural schematic diagram of completing etching of a first electrode and an epitaxial layer in a method for preparing a light-emitting diode chip proposed in one embodiment of the present application; Figure 6 It is a structural schematic diagram after removing the mask layer in a method for preparing a light emitting diode chip proposed in one embodiment of the present application; Figure 7 It is a structural schematic diagram of completing the production of a conductive layer in a method for preparing a light-emitting diode chip proposed in one embodiment of the present application; Figure 8 It is a structural schematic diagram of completing bonding between a conductive layer and a first electrode in a method for preparing a light-emitting diode chip proposed in an embodiment of the present application; Fig. 9 It is a schematic diagram of the principle of injecting a filling material in a method for preparing a light-emitting diode chip proposed in one embodiment of the present application; Fig.10 It is a structural schematic diagram of completing filling of a filling material in a method for preparing a light emitting diode chip proposed in an embodiment of the present application; Fig.11 It is a structural schematic diagram of a method for preparing a light-emitting diode chip proposed in an embodiment of the present application after removing the second substrate; Fig.12 It is a structural schematic diagram of completing the production of bonding electrodes in a method for preparing a light emitting diode chip proposed in one embodiment of the present application.

[0019] Explanation of the accompanying drawings: 10, first substrate; 20, epitaxial layer; 21, first semiconductor layer; 22, quantum well material layer; 23, second semiconductor layer; 30, first electrode; 31, second electrode; 33, first connecting electrode; 34, second connecting electrode; 40, mask layer; 50, second substrate; 60, dissociation layer; 70, conductive layer; 80, filling material; 90, passivation layer. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0021] In the related art, conventional GaN-based LEDs usually use InGaN / GaN multi-quantum well structures as active layers on c-plane sapphire substrates. Due to the large lattice mismatch and thermal mismatch between the substrate material and the epitaxial material, there is a strong polarization electric field inside the quantum well structure grown on the c-plane, which separates the spatial wave functions of electrons and holes, resulting in a decrease in internal quantum efficiency, thereby limiting the luminous efficiency of GaN-based light-emitting diodes. This phenomenon is called the quantum confined Stokes effect (QCSE).

[0022] To this end, researchers have tried many methods, such as using non-polar or semi-polar InGaN / GaN quantum well structures to eliminate polarization electric fields, introducing nano-microcavity structures to form resonant modes, and preparing or growing InGaN / GaN quantum well nanostructures. On the other hand, due to the total reflection at the interface between GaN material and air, the light extraction efficiency of GaN-based LEDs is greatly limited. In order to solve this problem, researchers have adopted a variety of methods to enhance the light extraction efficiency, such as surface roughening, preparing photonic crystal structures, and introducing metal or distributed Bragg reflectors on the back. In summary, the preparation of an ordered In-GaN / GaN quantum well nanocolumn structure can not only weaken the polarization electric field and improve the internal quantum efficiency of the quantum well, but also overcome the total reflection at the interface and enhance the light extraction efficiency. It is one of the most effective methods to improve the efficiency of GaN-based LED devices.

[0023] In the process of making nanocolumn LEDs, after the nanocolumn processing is completed, the gaps between the nanocolumns need to be filled by spin coating with filling glue, and then subsequent conductive layers and other film layers are made. However, the filling layer will cause the surface of the nanocolumns to be uneven and rough, resulting in the electrical connection between the conductive layer and the electrode layer in the nanocolumns being affected, thereby affecting the light-emitting effect of the LED.

[0024] In view of this, an embodiment of the present application proposes a light-emitting diode chip and a preparation method thereof, wherein an epitaxial layer including a plurality of light-emitting bodies is formed on a first substrate, a conductive layer is formed on a second substrate, and the conductive layer is bonded to the epitaxial layer. Then, a filling material is injected on one side of a position between the conductive layer and the epitaxial layer to fill the gaps between the light-emitting bodies, and then the second substrate is removed and a bonding electrode is made. In this way, the connection between the conductive layer and the electrode layer in the epitaxial layer can be prevented from being affected by the filling material, thereby improving the stability of the connection performance between the conductive layer and the electrode layer in the light-emitting diode chip.

[0025] Figure 1 A flowchart of a method for preparing a light emitting diode chip is shown. Figure 1 As shown, the embodiment of the present application discloses a method for preparing a light emitting diode chip, the preparation method comprising: Step 101: Provide a first substrate 10.

[0026] Specifically, the first substrate 10 is mainly used to grow the epitaxial layer 20 , and the material of the first substrate 10 may include sapphire, silicon, silicon carbide, etc.

[0027] Step 102: growing an epitaxial layer 20 on the first substrate 10, and performing an etching process on the epitaxial layer 20 to form a plurality of light-emitting bodies distributed in an array.

[0028] Specifically, the epitaxial layer 20 may include a first semiconductor layer 21, a quantum well material layer 22, and a second semiconductor layer 23, which are stacked in sequence. The first semiconductor layer 21 is disposed close to the first substrate 10. The material of the first semiconductor layer 21 may be n-type gallium nitride, and the material of the second semiconductor layer 23 may be p-type gallium nitride, such as Figure 2 shown.

[0029] Meanwhile, in step 102, the specific preparation method may include: Step 1021 : forming a first electrode 30 and a mask layer 40 in sequence on a side of the epitaxial layer 20 facing away from the first substrate 10 .

[0030] Specifically, the material of the first electrode 30 can be ITO (indium tin oxide), and the first electrode 30 is formed on the side of the second semiconductor layer 23 away from the first substrate 10, and the material of the mask layer 40 can be silicon dioxide, and the mask layer 40 can be formed on the side of the first electrode 30 away from the substrate 10 by chemical vapor deposition. The thickness of the mask layer 40 is greater than or equal to 100nm and less than or equal to 400nm. Exemplarily, the thickness of the mask layer 40 can be 100nm, 200nm, 300nm, 400nm, etc., such as Figure 3 shown.

[0031] Step 1022 : performing a patterning process on the mask layer 40 , and etching the patterned mask layer 40 to expose a portion of the first electrode 30 .

[0032] Specifically, a patterned protective glue is formed on the mask layer 40 by exposure, development or nano-imprinting, and then the mask layer 40 is etched using a F-based gas (such as CF4, SF6, CHF3) to ensure that the mask layer 40 is completely etched. At this time, part of the first electrode 30 is exposed, such as Figure 3 and Figure 4 shown.

[0033] Step 1023 : Etching the epitaxial layer 20 to form a plurality of light-emitting bodies 22 .

[0034] Specifically, the second semiconductor layer 23, the quantum well material layer 22 and the first semiconductor layer 21 of the epitaxial layer 20 can be etched in sequence by using gases such as Cl2 / BCl3, and the second semiconductor layer 23, the quantum well material layer 22 and the first semiconductor layer 21 can be etched in sequence, and the etching depth is about 300nm-1000nm (that is, the thickness of each light-emitting body). Figure 5 shown.

[0035] It should be noted that the first semiconductor layer 21 is etched incompletely to form a semiconductor thin film layer 24 between the light-emitting body and the substrate 10. The semiconductor thin film layer 24 is used to achieve electrical connection between multiple light-emitting bodies, that is, electrical signals can be transmitted to each light-emitting body through the semiconductor thin film layer 24.

[0036] Then, the plurality of luminous bodies after etching are stripped and cleaned to remove the remaining mask layer 40. Figure 6 shown.

[0037] Then, the defects of the light-emitting body can be repaired. Exemplarily, the repair can be carried out by high-temperature annealing, wet etching, sidewall passivation, etc.; wherein high-temperature annealing refers to annealing at a certain temperature (500-900°C) in an atmosphere such as N2 or NH3 to reduce internal dislocations, while promoting local element diffusion and recombination to reduce internal defects; wet etching refers to the use of alkaline KOH, TMAH; acidic H3PO4 and other solutions to react with the side walls of the light-emitting body to reduce the surface dangling bonds and oxide content, reduce defects; in addition, neutral solutions such as ammonium sulfide can be used to replace the surface to reduce the defect content; sidewall passivation refers to the use of silicon oxide, silicon nitride or aluminum oxide to protect the side walls of the light-emitting body, wherein silicon oxide can be formed by atomic layer deposition, chemical vapor deposition, etc., and silicon oxide formed after curing of organic passivation glue can also be used as a passivation layer.

[0038] Step 103 : providing a second substrate 50 , and forming a conductive layer 70 on the second substrate 50 .

[0039] Specifically, the material of the second substrate 50 may include glass or sapphire.

[0040] Furthermore, the conductive layer 70 is connected to the second substrate 50 via the dissociation layer 60. Figure 7 As shown. The dissociation layer 60 is a film layer having properties such as photolysis, thermal decomposition, and mechanical decomposition. Exemplarily, if the dissociation layer 60 has photolysis properties, then under the action of laser, the dissociation layer 60 will dissociate, thereby separating the second substrate 50 from the conductive layer 70. It can be understood that if the dissociation layer 60 has properties such as thermal decomposition or mechanical decomposition, the dissociation layer 60 will dissociate under corresponding conditions. In an embodiment of the present application, the material of the dissociation layer 60 can be selected from materials such as PI (polyimide) or graphene.

[0041] The conductive layer 70 may be a single-layer structure or a multi-layer structure. For example, when the conductive layer 70 is a single-layer structure, the conductive layer 70 may include only one material layer; when the conductive layer 70 is a multi-layer structure, the conductive layer 70 may include multiple material layers stacked. The material of the conductive layer 70 may include at least one of ITO, IZO, Cu, Au, Sn, Cr, Pt, Ti, and Ni. Considering the subsequent process support, the conductive layer 70 in the embodiment of the present application is preferably ITO, IZO, Cu, Ag, etc., which are easy to etch.

[0042] Step 104: Bonding the conductive layer 70 to the epitaxial layer 20 including a plurality of light emitting bodies.

[0043] Specifically, this step requires connecting the conductive layer 70 to the first electrodes 30 in the plurality of light-emitting bodies, such as Figure 8 As shown. In addition, the conductive layer 70 needs to be bonded to the epitaxial layer 20 including the light emitter at the target temperature, target pressure and target duration. In an embodiment of the present application, the target temperature is greater than or equal to 200°C and less than or equal to 500°C. For example, the target temperature may be 200°C, 250°C, 300°C, 400°C, 500°C, and the like. The target pressure is greater than 0.5MPa. For example, the target pressure may be 0.55MPa, 0.60MPa, 0.65MPa, and the like. The target duration is greater than 10min. For example, the target duration may be 15min, 20min, 25min, and the like. Those skilled in the art may select the target temperature, target pressure and target duration according to actual needs to ensure that the conductive layer is bonded to the epitaxial layer.

[0044] Step 105: injecting a filling material 80 on one side of the conductive layer 70 toward the epitaxial layer 20 so that the filling material 80 fills the gaps between the light-emitting bodies.

[0045] Specifically, refer to Fig. 9 As shown in FIG. 1 , since the gaps between the light emitters are very small, when the filling material 80 is injected toward the epitaxial layer 20 from one side of the conductive layer 70, the filling material 80 will fill the gaps between the light emitters under the capillary phenomenon generated by the light emitters, thereby achieving the effect of filling the gaps between the light emitters. Fig.10 shown.

[0046] It can be understood that the filling material 80 is preferably a transparent insulating material with a refractive index greater than 2.

[0047] In one embodiment, if the luminous efficiency of the luminous body is not required to be high, the gaps between the luminous bodies may not be filled.

[0048] Step 106 : remove the second substrate 50 , and form bonding electrodes on the epitaxial layer 20 and the conductive layer 70 .

[0049] Specifically, the step of removing the second substrate 50 may include removing the dissociation layer 60 and removing the second substrate 50, such as Fig.11 shown.

[0050] Reference Fig.12 As shown, after the epitaxial layer 20 and the conductive layer 70 are partially etched, a second electrode 31 needs to be formed on the epitaxial layer 20 , and the bonding electrode may include a first connection electrode 33 and a second connection electrode 34 .

[0051] Specifically, the second electrode 31 is arranged on the semiconductor thin film layer 24 in the epitaxial layer 20, and the orthographic projection of the second electrode 31 on the substrate 10 is located in the non-light-emitting area of ​​the light-emitting diode chip. The second electrode 31 is electrically connected to each light-emitting body through the semiconductor thin film layer 24, so that the first electrode 30 and the second electrode 31 can realize the conduction of the electrical signals of each light-emitting body. In the embodiment of the present application, the second electrode 31 is a multilayer structure. Exemplarily, the second electrode 31 can be a metal laminate structure of Ti / Al / Ni / Au, and the thickness of each metal layer in the metal laminate structure is 30nm, 175nm, 35nm, and 1000nm respectively; or, the second electrode 31 can be a metal laminate structure of Cr / Pt / Au, and the thickness of each metal layer in the metal laminate structure is 20nm, 20nm, and 1000nm.

[0052] Reference Fig.12 As shown, a passivation layer 90 is arranged between the bonding electrode and the conductive layer 70 and the epitaxial layer 20. The passivation layer 90 is arranged on the side of the conductive layer 70 and the second electrode 31 away from the substrate 10. The passivation layer 90 can be at least one of silicon dioxide (SiO2) and silicon nitride (SiNx).

[0053] Reference Fig.12 As shown, the first connection electrode 33 and the second connection electrode 34 are arranged on the side of the passivation layer 90 away from the substrate 10, and the first connection electrode 33 is connected to the conductive layer 70 through a via hole penetrating the passivation layer 90, and the second connection electrode 34 is connected to the second electrode 31 through a via hole penetrating the passivation layer 90. When the light-emitting diode chip is bonded to the backplane, the first connection electrode 33 and the second connection electrode 34 can be used for bonding connection. The first connection electrode 33 and the second connection electrode 34 can use a multi-layer metal stacked structure. For example, the first connection electrode 33 and the second connection electrode 34 can use a metal stacked structure of Ti / Al / Ni / Au or Cr / Pt / Au, and the overall thickness of the first connection electrode 33 and the second connection electrode 34 is greater than or equal to 1400nm and less than or equal to 1500nm.

[0054] The method for preparing the light-emitting diode chip provided in the embodiment of the present application can prevent the connection between the conductive layer and the electrode layer in the epitaxial layer from being affected by the filling material, thereby improving the stability of the connection performance between the conductive layer and the electrode layer in the light-emitting diode chip.

[0055] Based on the same inventive concept, an embodiment of the present application discloses a light-emitting diode chip, which is prepared by the light-emitting diode chip preparation method provided by the embodiment of the present application.

[0056] Specifically, the light emitting diode chip may be a flip-chip structure or a vertical structure, which is not specifically limited in the embodiments of the present application.

[0057] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0058] It should also be noted that, in this article, the orientation or position relationship indicated by the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations, nor can they be understood as indicating or implying relative importance. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. Without more restrictions, an element defined by the phrase "comprising a ..." does not exclude the existence of other identical elements in the process, method, article or terminal device comprising the element.

[0059] The technical solution provided by the present application is described in detail above. The principle and implementation method of the present application are described in this article using specific examples. The description of the above embodiments is only used to help understand the present application, and the content of this specification should not be understood as limiting the present application. At the same time, for those of ordinary skill in the art, according to the present application, there will be different forms of changes in the specific implementation methods and application scopes. It is not necessary and impossible to list all the implementation methods here, and the obvious changes or modifications derived therefrom are still within the scope of protection of the present application.

Claims

1. A method for preparing a light emitting diode chip, characterized in that: The preparation method comprises: providing a first substrate; Growing an epitaxial layer on the first substrate, and performing an etching process on the epitaxial layer to form a plurality of light-emitting bodies distributed in an array; providing a second substrate, and forming a conductive layer on the second substrate; bonding the conductive layer to the epitaxial layer including a plurality of light emitters; Injecting a filling material on one side of the conductive layer toward the epitaxial layer so that the filling material fills the gaps between the light-emitting bodies; The second substrate is removed, and bonding electrodes are formed on the epitaxial layer and the conductive layer.

2. The method for preparing a light emitting diode chip according to claim 1, characterized in that: The refractive index of the filling material is greater than 2, and the filling material is a transparent insulating material.

3. The method for preparing a light emitting diode chip according to claim 1, characterized in that: In the step of bonding the conductive layer to the epitaxial layer including a plurality of light-emitting bodies, the preparation method comprises: The conductive layer is bonded to the epitaxial layer including a plurality of light-emitting bodies at a target temperature, a target pressure and a target time.

4. The method for preparing a light emitting diode chip according to claim 3, characterized in that: The target temperature is greater than or equal to 200° C. and less than or equal to 500° C.; The target pressure is greater than 0.5 MPa; The target duration is greater than 10 minutes.

5. The method for preparing a light emitting diode chip according to claim 1, characterized in that: A dissociation layer is disposed between the second substrate and the conductive layer.

6. The method for preparing a light emitting diode chip according to claim 5, characterized in that: The materials of the dissociation layer include PI and graphene.

7. The method for preparing a light emitting diode chip according to claim 1, characterized in that: The conductive layer includes a single-layer structure or a multi-layer structure.

8. The method for preparing a light emitting diode chip according to claim 1, characterized in that: The material of the conductive layer includes at least one of ITO, IZO, Cu, Au, Sn, Cr, Pt, Ti, and Ni.

9. The method for preparing a light emitting diode chip according to claim 1, characterized in that: The second substrate is made of glass or sapphire.

10. A light emitting diode chip, characterized in that: The light emitting diode chip is prepared by the method for preparing a light emitting diode chip according to any one of claims 1 to 9.

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