Processing method and separating method of electric field sensitive chip
Through fine lithography, deposition and etching technology, the accuracy and stability of the electric field-sensitive chip in the manufacturing process are solved, and efficient and lossless separation of the chip is achieved through the method of etching the connection point, ensuring the integrity and high reliability of the sensitive structure.
Patent Information
- Application Number
- CN202411628127.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-14
- Publication Date
- 2025-04-11
AI Technical Summary
In the manufacturing of electric field sensitive chips, it is difficult to ensure high accuracy, low cost, good stability and high reliability, especially in the etching process, which can easily lead to fracture of sensitive structures, and traditional chip separation methods may damage sensitive structures.
Fine photolithography, deposition and etching techniques are used, including cleaning wafer surfaces, glueing on the back and front, lithography, depositing metal and peeling, etching out sensitive structural patterns, coating and etching silica for protective materials to release sensitive structures. At the same time, physical separation of the chip is achieved by etching out the connection points and destroying the connection points.
High-precision chip processing and separation are achieved, ensuring the integrity and sensitivity of sensitive structures, avoiding damage or defects that may be caused by traditional methods, and improving the stability and reliability of the chip.
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Figure CN119797269A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of microelectronics, in particular to a method for processing and separating an electric field sensitive chip. Background Art
[0002] In the prior art, the manufacture of electric field sensitive chips faces multiple challenges, especially in the production of fine processing and multi-layer structures. Common technologies include photolithography, deposition, etching, etc., but these technologies face the challenge of how to ensure high precision, low cost, good stability and high reliability. Especially when etching from the back to the sacrificial layer, due to factors such as silicon dioxide stress and photoresist stress, the sensitive structure of the silicon wafer is prone to breakage. As a result, while etching the back, the etching plasma gas passes through the cracks and etches the sensitive structure layer on the front, causing the release process to fail.
[0003] Chip separation is also a difficult task, and the commonly used methods are mechanical grinding wheel scribing and laser scribing. Mechanical grinding wheel scribing uses the high-speed rotation of the grinding wheel blade to complete the removal of silicon at the corresponding scribing position. During the high-speed rotation of the blade, high-pressure water flow is required to cool and clean the dust generated by the cutting process. However, since the sensitive structure is a hollow structure, if a mechanical grinding wheel is used for scribing, the water flow and dust will impact the sensitive structure of the electric field sensor, causing pollution and damage to the hollow structure. Traditional laser scribing is to irradiate a high-energy laser beam on the surface of silicon dioxide that needs to be scribed, so that the focused area melts and then achieves scribing. Compared with mechanical grinding wheel cutting, this method does not introduce water flow, but dust will be generated during the cutting process, and the dust will enter the sensitive structure and cause pollution. Therefore, neither mechanical grinding wheel cutting nor traditional laser cutting is suitable for scribing the electric field sensor designed in this report. Summary of the invention
[0004] In view of the above problems existing in the prior art, the present invention is proposed.
[0005] Therefore, the problem to be solved by the present invention is how to process the electric field sensitive chip with high precision and efficiently remove the excess material during processing, so as to ensure the integrity and sensitivity of the sensitive structure and complete the separation quickly and without damage.
[0006] To solve the above technical problems, the present invention provides the following technical solutions: a method for processing an electric field sensitive chip, which includes cleaning the surface of a wafer; applying glue, photolithography, depositing metal and then stripping off the metal on the back of the wafer; applying glue, photolithography, depositing metal and then stripping off the metal on the front of the wafer; applying glue, photolithography and etching a sensitive structure pattern on the front of the wafer; applying a protective material on the front of the wafer, etching off the silicon substrate layer on the back of the wafer to expose silicon dioxide; etching the silicon dioxide to release the sensitive structure.
[0007] As a preferred solution of the processing method of the electric field sensitive chip of the present invention, cleaning the surface of the wafer includes removing surface impurities to ensure the adhesion and uniformity of the material in subsequent steps.
[0008] As a preferred solution of the processing method of the electric field sensitive chip described in the present invention, wherein: coating glue on the back of the wafer, photolithography, depositing metal and then stripping the metal includes coating glue on the back of the wafer, forming a pattern of the back electrode by photolithography technology, then depositing metal on the back of the wafer to form the basis of the electrode, and using a stripping process to strip the metal attached to the photoresist on the back of the wafer.
[0009] As a preferred solution of the processing method of the electric field sensitive chip described in the present invention, wherein: applying glue on the front side of the wafer, photolithography, depositing metal and then stripping the metal includes applying glue on the front side of the wafer, and forming a pattern of the front electrode by photolithography technology, then depositing metal on the front side of the wafer to form the basis of the electrode, and using a stripping process to strip off the metal attached to the photoresist on the front side of the wafer.
[0010] As a preferred solution of the processing method of the electric field sensitive chip described in the present invention, wherein: coating the front side of the wafer with glue, photolithography, and then etching a sensitive structure pattern includes coating the front side of the wafer with photoresist, forming a pattern of the sensitive structure by photolithography technology, and etching the sensitive structure on the front side of the wafer using deep reactive ion etching technology until the silicon dioxide buried oxide layer is etched out.
[0011] As a preferred solution of the processing method of the electric field sensitive chip described in the present invention, wherein: applying a protective material on the front side of the wafer, etching away the silicon substrate layer on the back side of the wafer to expose the silicon dioxide includes using deep reactive ion etching technology on the back side of the wafer to etch away the bottom silicon substrate layer to expose the silicon dioxide.
[0012] As a preferred solution of the processing method of the electric field sensitive chip described in the present invention, etching silicon dioxide to release the sensitive structure includes using plasma to etch away the exposed silicon dioxide to release the sensitive structure, and then using oxygen plasma to remove the protective material coated on the front side of the wafer.
[0013] In order to solve the above technical problems, the present invention also provides the following technical solutions: a method for separating an electric field sensitive chip, comprising etching out connection points; and destroying the connection points.
[0014] As a preferred solution of the method for processing the electric field sensitive chip of the present invention, etching out the connection point includes etching a scribe groove between two chips, so that only one connection point is retained between the two chips.
[0015] As a preferred solution of the processing method of the electric field sensitive chip of the present invention, wherein: destroying the connection point includes removing the protective material on the front side of the wafer, cutting off the silicon material at the connection point, and completing the physical separation of the chip.
[0016] The beneficial effects of the present invention are as follows: the processing method of the electric field sensitive chip of the present invention can ensure the stability of each step while ensuring high precision through fine photolithography, deposition and etching technology. Through multi-level structural manufacturing, the chip can achieve a more accurate electric field sensing function, and the separation method completes physical separation by etching connection points between the chips and destroying the connection points. This method can ensure precise control during chip separation and avoid damage or defects that may be caused by traditional cutting methods. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:
[0018] Figure 1 The present invention is a flow chart of a method for processing an electric field sensitive chip.
[0019] Figure 2 Wafer cleaning diagram for the processing method of electric field sensitive chip.
[0020] Figure 3 Back-side glue coating photolithography diagram for the processing method of electric field sensitive chip.
[0021] Figure 4 This is a diagram of the electrode pattern of the processing method of the electric field sensitive chip.
[0022] Figure 5 The present invention is a front-side glue coating photolithography and metal electrode deposition diagram for the processing method of electric field sensitive chip.
[0023] Figure 6 A graphical schematic diagram of the front electrode of the processing method of the electric field sensitive chip.
[0024] Figure 7 The method for processing electric field sensitive chip is to coat the front side with glue and photolithography to produce a sensitive structure diagram.
[0025] Figure 8 Deep silicon etching for the processing method of electric field sensitive chips exposes the silicon dioxide pattern.
[0026] Fig. 9 A method for etching away silicon dioxide for the processing of electric field sensitive chips.
[0027] Fig.10 The figure is a schematic diagram of the components of the processing method of the electric field sensitive chip.
[0028] Fig.11 The present invention is a flow chart of the method for separating the electric field sensitive chip. DETAILED DESCRIPTION
[0029] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings.
[0030] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0031] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments.
[0032] Example 1, reference Figure 1 , which is the first embodiment of the present invention, provides a method for processing an electric field sensitive chip, including cleaning the wafer surface, cleaning and pre-treating the wafer surface, which can remove impurities and oxide layers on the surface and ensure the adhesion and uniformity of the sensitive element.
[0033] The back of the wafer is coated with glue, photolithography, metal is deposited and then stripped. First, the back of the silicon wafer is coated with glue and photolithography is performed to prepare for the next step of depositing a metal transition layer. Then, photolithography is performed to remove a portion of the photoresist, and then a metal transition layer is deposited on the back. The deposited metal is copper or gold. At this time, the metal will be deposited on the exposed area of the photoresist and on the surface of the photoresist. The electrode pattern is stripped out using a lift-off process. When removing the photoresist, the metal film on the photoresist will also be removed, leaving a metal structure of the desired pattern. Then, the wafer surface is cleaned to remove residual solvent or metal that has not fallen off.
[0034] Apply glue on the front side of the wafer, perform photolithography, deposit metal and then strip the metal. Similarly, first apply glue on the front side of the silicon wafer and perform photolithography to prepare for the next step of depositing a metal transition layer. Then perform photolithography to remove a portion of the photoresist, and then deposit a metal transition layer on the front side. The deposited metal is also copper or gold. At this time, the metal will be deposited on the exposed area of the photoresist and on the surface of the photoresist. The electrode pattern is stripped out using the lift-off process. When removing the photoresist, the metal film on the photoresist will also be removed, leaving the metal structure of the required pattern. Then clean the wafer surface to remove residual solvent or metal that has not fallen off.
[0035] The wafer is coated with glue, photolithography, and then etched to produce sensitive structure patterns. The sensitive structure is etched with DRIE, where DRIE is deep reactive ion etching, which combines reactive ion etching and physical etching. It uses two alternating gas reaction processes to form a reaction layer in the reaction stage while stripping the material through the physical etching stage. Alternating reactions and physical etching can control the depth and shape of etching to achieve deep etching and vertical sidewall control. It can manufacture microstructures such as deep holes and deep grooves, and maintain precise geometric shapes to etch precise sensitive structure patterns. DRIE technology precisely controls the etching process, and when the etching reaches the silicon dioxide layer, the etching stops automatically.
[0036] The protective material is applied to the front of the wafer, and the silicon substrate layer is etched off the back of the wafer to expose the silicon dioxide. The protective material is applied to the front, and a protective layer such as photoresist or other materials is used to cover the front of the silicon wafer. This is to prevent the sensitive structure in the front area from being etched or otherwise damaged during subsequent processing. The back is also etched using DRIE to remove the bottom layer of the silicon substrate of the back silicon wafer to manufacture the microstructure of the electric field sensitive chip.
[0037] Because silicon dioxide is less reactive than silicon, it can provide electrical isolation, protection or support. Therefore, after the silicon is completely etched away, the silicon dioxide layer acts as a "stop layer" to self-stop, thereby avoiding over-etching and protecting the sensitive structures underneath.
[0038] Etch silicon dioxide and release sensitive structures using hydrogen fluoride gas or trifluoromethane plasma. The ions and free radicals in these plasmas have strong chemical reactivity and can react with silicon dioxide to produce volatile compounds and release sensitive structures.
[0039] Example 2, reference Figures 1 to 10 , which is the second embodiment of the present invention, and this embodiment is based on the previous embodiment.
[0040] Specifically, cleaning the wafer surface includes removing surface impurities to ensure the adhesion and uniformity of the material in subsequent steps.
[0041] Keep the wafer surface clean before processing to avoid any contaminants that affect subsequent processes. If there is oil, dust or other impurities on the surface, the material will not adhere evenly, affecting the final performance of the chip.
[0042] Specifically, the process of coating glue on the back of the wafer, performing photolithography, depositing metal, and then stripping the metal includes coating glue on the back of the wafer, forming a pattern of the back electrode by photolithography technology, then depositing metal on the back of the wafer to form the basis of the electrode, and using a stripping process to strip off the metal attached to the photoresist on the back of the wafer.
[0043] The wafer coated with photoresist is placed in the photolithography machine and irradiated with ultraviolet light to make the photoresist react to light. The back electrode pattern is transferred to the photoresist layer through the mask. After photolithography, the photoresist in the exposed area or the unexposed area is removed by development to form the back electrode pattern.
[0044] Specifically, the process of applying glue on the front side of the wafer, performing photolithography, depositing metal and then stripping the metal includes applying glue on the front side of the wafer, forming a pattern of the front electrode by photolithography technology, then depositing metal on the front side of the wafer to form the basis of the electrode, and using a stripping process to strip off the metal attached to the photoresist on the front side of the wafer.
[0045] The same steps are used to form the front electrode pattern on the front side.
[0046] Specifically, coating the wafer front side with photoresist, photolithography, and then etching out the sensitive structure pattern includes coating the wafer front side with photoresist, forming the pattern of the sensitive structure by photolithography technology, and etching out the sensitive structure on the wafer front side using deep reactive ion etching technology until the silicon dioxide buried oxide layer is etched out.
[0047] DRIE etching technology is used to etch sensitive structures on the front side of the wafer by alternating high-precision chemical reactions and physical etching processes, while maintaining good verticality and accuracy.
[0048] Specifically, a protective material is applied to the front side of the wafer, and the silicon substrate layer is etched away on the back side of the wafer to expose the silicon dioxide, including using deep reactive ion etching technology on the back side of the wafer to etch away the bottom silicon substrate layer to expose the silicon dioxide.
[0049] In order to protect the sensitive structure on the front side of the wafer, a layer of protective material such as photoresist or other material is coated on the front side to prevent damage to the front side structure during etching. The etching process stops when the silicon dioxide layer is exposed.
[0050] Specifically, etching silicon dioxide and releasing the sensitive structure includes using plasma to etch away the exposed silicon dioxide to release the sensitive structure, and then using oxygen plasma to remove the protective material coated on the front side of the wafer.
[0051] Once the silicon dioxide layer is exposed, a plasma etching technique such as hydrogen fluoride gas is used to remove the exposed silicon dioxide layer. In this way, the sensitive structure is released and can perform its electric field sensing task.
[0052] In this way, the electric field sensitive chip is processed, and through optimized processing steps, it is ensured that the electric field sensitive chip has high precision, high sensitivity and high stability.
[0053] Example 3, reference Fig.11 , which is the third embodiment of the present invention, provides a method for separating an electric field sensitive chip. The method includes etching a connection point and destroying the connection point. The connection point is to prevent water flow or dust from entering the hollowed-out sensitive structure when using a mechanical grinding wheel or laser scribing.
[0054] Specifically, etching out the connection point includes etching a scribe groove between the two chips, so that only one connection point is retained between the two chips.
[0055] The width of the scribe groove is 300 microns, and the connection point formed is a thin block of 300 microns x 300 microns. This connection point is the last connection part of the chip that needs to be retained during the entire production process to ensure that other areas will not be affected during the cutting process. The role of the scribe groove is to make the connection between the chips weaker, which is convenient for subsequent separation operations.
[0056] Specifically, destroying the connection points includes removing the protective material on the front side of the wafer, cutting off the silicon material at the connection points, and completing the physical separation of the chips.
[0057] It should be noted that the final connection point needs to be destroyed from the front side of the chip. If it is destroyed from the back side of the chip, the front side structure will directly contact the supporting surface during the process of destroying the chip connection point. When the tweezers press the connection point from the back side to the front side, the sensitive structure on the front side will break.
[0058] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
Claims
1. A method for processing an electric field sensitive chip, characterized in that: include, Cleaning the wafer surface; Apply glue, perform photolithography, deposit metal and then strip the metal on the back of the wafer; Apply glue on the front side of the wafer, perform photolithography, deposit metal, and then strip the metal; Apply glue, photolithography, and then etch sensitive structural patterns on the front side of the wafer; Apply protective material to the front of the wafer and etch away the silicon substrate layer on the back of the wafer to expose silicon dioxide; Etching the silicon dioxide releases sensitive structures.
2. The method for processing an electric field sensitive chip according to claim 1, characterized in that: Cleaning the wafer surface includes removing surface impurities to ensure the adhesion and uniformity of materials in subsequent steps.
3. The method for processing an electric field sensitive chip according to claim 1, characterized in that: Applying glue on the back of the wafer, photolithography, depositing metal and then stripping the metal includes applying glue on the back of the wafer and forming the pattern of the back electrode through photolithography technology, then depositing metal on the back of the wafer to form the basis of the electrode, and using a stripping process to strip the metal attached to the photoresist on the back of the wafer.
4. The method for processing an electric field sensitive chip according to claim 1, characterized in that: Applying glue on the front side of the wafer, photolithography, depositing metal and then stripping the metal includes applying glue on the front side of the wafer, forming the pattern of the front electrode through photolithography technology, then depositing metal on the front side of the wafer to form the basis of the electrode, and using the stripping process to strip the metal attached to the photoresist on the front side of the wafer.
5. The method for processing an electric field sensitive chip according to claim 1, characterized in that: The process of coating the wafer front side with photoresist, photolithography and etching out the sensitive structure pattern includes coating the wafer front side with photoresist, forming the pattern of the sensitive structure by photolithography technology, etching out the sensitive structure on the wafer front side by deep reactive ion etching technology, until the silicon dioxide buried oxide layer is etched out.
6. The method for processing an electric field sensitive chip according to claim 1, characterized in that: A protective material is applied to the front side of the wafer, and the silicon substrate layer is etched away on the back side of the wafer to expose the silicon dioxide, including using a deep reactive ion etching technique on the back side of the wafer to etch away the bottom silicon substrate layer to expose the silicon dioxide.
7. The method for processing an electric field sensitive chip according to claim 1, characterized in that: Etching silicon dioxide and releasing sensitive structures includes using plasma to etch away the exposed silicon dioxide to release the sensitive structure, and then using oxygen plasma to remove the protective material coated on the front side of the wafer.
8. A method for separating an electric field sensitive chip, characterized in that: include, Etching out the connection points; Destroy the connection point.
9. The method for separating an electric field sensitive chip according to claim 8, characterized in that: Etching out the connection point includes etching a scribe line between the two chips, so that only one connection point remains between the two chips.
10. The method for separating an electric field sensitive chip according to claim 9, characterized in that: Destroying the connection points involves removing the protective material on the front side of the wafer, cutting off the silicon material at the connection points, and completing the physical separation of the chips.