A PET detector imaging system and its application

Abstract

This invention relates to the field of positron emission tomography (PET) imaging technology, specifically to a PET detector imaging system and its application. The system includes a shield, a scintillation crystal LYSO array, a silicon photomultiplier tube (SiPM) array, a PET circuit array, an FPGA main control board, a level conversion module, a CameraLink protocol conversion module, and a PC host computer. This invention constructs a model of a large-scale PET detector imaging system, using a high-precision multi-channel PET circuit as the core component. The PET detector (shield + scintillation crystal LYSO array + silicon photomultiplier tube (SiPM) array) is modular. Pulse time window coincidence detection technology is used to encode the accurate location of annihilation, and the acquired energy information is converted and transmitted using the CameraLink protocol. This imaging system is scalable, fully domestically produced, and highly sensitive, and can be effectively applied to ring-type PET detectors in the nuclear medicine field, providing another implementation method and path for large-scale medical diagnostic imaging technology.

Description

Technical Field

[0001] This invention relates to the field of positron emission tomography (PET) technology, specifically to a PET detector imaging system and its applications. Background Technology

[0002] Positron emission tomography (PET) is a non-invasive imaging technique that provides 3D tomographic images of the distribution of radioactive tracers within the body. When compounds (choline, acetic acid, etc.) or analogues (fluorodeoxyglucose, i.e., FDG, etc.) containing radionuclides (such as 18F, 11C, 13N, 15O) required for human metabolism are injected into the body, they are distributed throughout the body via metabolism. These radionuclides decay within the body, producing positrons. These positrons travel a short distance in the tissue before interacting with electrons in the surrounding matter, annihilating and emitting two gamma photons (because this distance is short and difficult to measure, the location of the annihilation can be approximated as the location of the radionuclides). By detecting these highly penetrating gamma photons and reconstructing the annihilation event using the detected signals, the location and distribution of the radionuclides can be obtained. Tumor tissue generally exhibits abnormal metabolic states; therefore, the location of tumors can be inferred from the concentration distribution of radionuclides (in the form of compounds or analogues required for human metabolism) within the body. This is the principle behind PET imaging for cancer diagnosis.

[0003] PET is one of the most advanced large-scale medical diagnostic imaging technologies available today. A PET device consists of a PET detector and readout circuitry. The PET detector comprises a shield, a crystal array, and a photoelectric conversion array or SiPM. The principle of PET imaging is as follows: a biological organism injected with a developer within a ring-shaped PET detector generates positrons due to tracer decay. These positrons annihilate each other, emitting two pairs of gamma rays moving in opposite directions at 180°. The crystals in the crystal array convert the received gamma rays into photons, which are then converted into electrical signals by the photoelectric conversion array. The readout circuitry uses these electrical signals to read the time and energy of the event, thereby estimating the approximate location of the positron annihilation. By acquiring a large amount of data, PET image reconstruction is achieved. The accuracy of the PET detector's readout of energy, time, and location information has a crucial impact on the quality of PET image reconstruction.

[0004] Traditional PET detector imaging systems have low integration and domestic production levels, as well as low reliability, sensitivity, and positioning accuracy. They cannot meet the needs of cutting-edge nuclear medicine research and cannot solve the need for domestic production of PET detector imaging systems. Summary of the Invention

[0005] To address the problems existing in the prior art, namely improving the integration and domestic production rate of PET detector imaging systems, this invention proposes a PET detector imaging system, including a shielding cover, a scintillation crystal LYSO array, a silicon photomultiplier tube (SiPM) array, a PET circuit array, an FPGA main control board, a level conversion module, a Cameralink protocol conversion module, and a PC host computer, wherein:

[0006] A shield is used to mount on the outside of a scintillation crystal LYSO array to reflect the visible light emitted by the scintillation crystal LYSO array after it has been excited by high-energy gamma photons without damage.

[0007] A scintillation crystal LYSO array is used to interact with 511keV gamma photons and then release them in the form of visible light.

[0008] Silicon photomultiplier tube (SiPM) arrays are used to convert received visible light photons into electrical signals, i.e., current pulse signals, through a photoelectric conversion array.

[0009] PET circuit array is used to acquire current pulse signals from silicon photomultiplier tube (SiPM) arrays, converting electrical signals into energy and time signals;

[0010] The FPGA main control board is used for image timing conversion of the energy signal from the PET detector.

[0011] The level conversion module is used for level conversion, providing the required voltage for the entire system;

[0012] The Cameralink protocol conversion module is used to perform data fitting and long-distance transmission of the energy from four pairs of LVDS differential signals to the PET detector imaging system.

[0013] The PC host computer uses an image acquisition card to collect the location and energy information of the effect, and performs imaging according to the frame rate set by the FPGA, and then reconstructs the image.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] 1. This invention proposes a PET detector module (including a shield + LYSO scintillation crystal array + SiPM array of silicon photomultiplier tubes), a completely domestically produced solution with high reliability and high sensitivity;

[0016] 2. By dividing the SiPM array into rows and columns, this invention can accurately collect and analyze the specific location where the crystal generates γ-rays, which is of great significance for locating and imaging the location of subsequent γ-ray generation.

[0017] 3. This invention uses time window matching condition detection technology to accurately encode the location of annihilation, which can exclude the entry of many scattered photons and improve detection sensitivity;

[0018] 4. This invention uses an 18-bit high-precision ADC to digitize the energy collected by the PET circuit. The digitized energy signal is then converted into a Cameralink image using an FPGA main control board. This provides real-time analysis of the position and energy of the γ-rays generated by the crystal.

[0019] 5. This invention uses four-channel serial LVDS low-voltage differential signal transmission to transmit PET detector energy data, which can effectively cancel external electromagnetic interference. It is suitable for long-distance communication and data transmission in PET detector imaging systems, and the system has good imaging quality and undistorted transmission signals.

[0020] 6. This invention features low cost, scalability, and complete domestic production.

[0021] 7. This invention can be effectively applied to ring-type PET detector equipment in the field of nuclear medicine, providing another implementation method and path for large-scale medical diagnostic imaging technology, forming a complete positron emission tomography scan, and providing strong support for medical diagnosis. Attached Figure Description

[0022] Figure 1 This is a system block diagram of a PET detector imaging system and imaging method provided in Embodiment 1 of the present invention;

[0023] Figure 2 This is a schematic diagram showing the position of a PET detector imaging system provided in Embodiment 1 of the present invention between a ring detector device, a support, and a host computer;

[0024] Figure 3 This is a schematic diagram of the structure of a silicon photomultiplier tube (SiPM) array for a PET detector imaging system provided in Embodiment 1 of the present invention;

[0025] Figure 4 This is a schematic diagram of the pulse matching conditions of a PET detector imaging system provided in Embodiment 2 of the present invention;

[0026] Figure 5 This is a structural configuration diagram of a PET detector module in a ring detector imaging device provided in Embodiment 2 of the present invention;

[0027] Figure 6 This is a schematic diagram of the acquisition method of the x-axis and y-axis of the PET detector module "SiPM array + LYSO crystal array" in a ring detector imaging device provided in Embodiment 2 of the present invention;

[0028] Figure 7 This is a schematic diagram of the timing of energy-image conversion of a SiPM array by the FPGA main control board of a PET detector imaging system provided in Embodiment 1 of the present invention;

[0029] Figure 8 This is a schematic diagram of the four-channel serial data output format of a PET detector imaging system according to Embodiment 7 of the present invention, based on the Cameralink protocol conversion.

[0030] Figure 9 This is a schematic diagram of the energy transfer interface after Cameralink protocol conversion for a PET detector imaging system provided in Embodiment 7 of the present invention;

[0031] Figure 10 This is a flowchart of signal acquisition and image conversion for a PET detector imaging system provided in Embodiment 1 of the present invention;

[0032] Among them, 101, shielding cover; 102, LYSO scintillation crystal array; 103, silicon photomultiplier tube (SiPM) array; 104, PET circuit array; 105, FPGA main control board; 106, level conversion; 107, Cameralink protocol conversion; 108, PC host computer; 200, human body scanning channel; 201, acquisition and reception of the subject; 202, scanning channel wall; 203, PET detector module; 204, ring-shaped PET detector cover; 401, human body ingesting radioactive nuclides; 402, positron; 403, a pair of PET detector modules; 501, field of view area; 502, human body channel. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] This invention proposes a PET detector imaging system, comprising a shielding cover, a scintillation crystal LYSO array, a silicon photomultiplier tube (SiPM) array, a PET circuit array, an FPGA main control board, a level conversion module, a CameraLink protocol conversion module, and a PC host computer, wherein:

[0035] A shield is used to mount on the outside of a scintillation crystal LYSO array to reflect the visible light emitted by the scintillation crystal LYSO array after it has been excited by high-energy gamma photons without damage.

[0036] A scintillation crystal LYSO array is used to interact with 511keV gamma photons and then release them in the form of visible light.

[0037] Silicon photomultiplier tube (SiPM) arrays are used to convert received visible light photons into electrical signals, i.e., current pulse signals, through a photoelectric conversion array.

[0038] PET circuit array is used to acquire current pulse signals from silicon photomultiplier tube (SiPM) arrays, converting electrical signals into energy and time signals;

[0039] The FPGA main control board is used for image timing conversion of the energy signal from the PET detector.

[0040] The level conversion module is used for level conversion, providing the required voltage for the entire system;

[0041] The Cameralink protocol conversion module is used to perform data fitting and long-distance transmission of the energy from four pairs of LVDS differential signals to the PET detector imaging system.

[0042] The PC host computer uses an image acquisition card to collect the location and energy information of the effect, and performs energy transmission and image reconstruction according to the frame rate set by the FPGA.

[0043] Example 1

[0044] like Figure 1 The diagram shows a system block diagram of a PET detector imaging system and its imaging method, including a shielding cover 101, a scintillation crystal LYSO array 102, a silicon photomultiplier tube (SiPM) array 103, a PET circuit array 104, an FPGA main control board 105, a level converter 106, a Cameralink protocol converter 107, and a PC host computer 108. Wherein:

[0045] ① Shielding Cover 101: The scintillation crystal LYSO array 102 is provided with a shielding cover 101, which is a carbon fiber shielding cover. This shielding cover provides light protection to the surrounding surfaces of the scintillation crystal LYSO array (except for the bottom), effectively blocking the intake of external visible light. Simultaneously, the inner skin is coated with a reflective material, maximizing the lossless reflection of visible light excited by high-energy gamma photons from the scintillation crystal LYSO array 102. The bottom of the shielding cover 101 is not shielded and receives 511keV gamma photons emitted during annihilation. In this invention, there are multiple shielding covers 101, each mounted on the outside of the scintillation crystal LYSO array; only one is described here.

[0046] ② LYSO Scintillation Crystal Array 102: The full name of the LYSO scintillation crystal array 102 is "Yttrium Lutetium Silicate Scintillation Crystal," or simply LYSO scintillation crystal. With its high light output, fast light decay, high effective atomic number, and high density, along with its stable physicochemical properties, non-hygroscopic nature, and high gamma-ray detection efficiency, it is considered the best-performing inorganic scintillation crystal material and an ideal scintillation crystal for PET applications. In a ring-shaped PET detector, a biological organism injected with a developer will generate positrons due to tracer decay. The positrons and electrons annihilate, emitting two pairs of gamma rays moving in opposite directions at 180°. In the LYSO scintillation crystal array 102, the received gamma rays are converted into photons. The ability of LYSO to absorb and block 511 keV gamma photons is an important indicator of system sensitivity; the stronger the blocking ability, the higher the system sensitivity. Therefore, LYSO must have a high density and an effective atomic number to minimize the attenuation distance of gamma photons. Here, LYSO with a density of 7.15 g / cm³ is used. 3 Relative optical output 75% (NaI(Tl)) γ-rays, decay time 40 ns, crystal array 16*16, size 25*25*8 mm 3 In this invention, there are multiple scintillation crystal LYSO arrays 102, each of which corresponds to a silicon photomultiplier tube (SiPM) array 103. In practical applications, the array size can be expanded as needed; only one is described here.

[0047] ③ Silicon Photomultiplier Tube (SiPM) Array 103: The photons received by the SiPM array 103 are converted into electrical signals and current pulse signals through a photoelectric conversion array. In this invention, an 8×8 SiPM array is used for actual testing, specifically the JARY-TP3050-8x8C model, with a breakdown voltage of 25±0.2V, an overvoltage of 1~5V, a channel count of 8×8, a photosensitive area of ​​3mm×3mm, an array size of 25.38mm×25.38mm, a pixel size of 50μm, a pixel count of 3364, and a DF12B(3.0)-40DP-0.5V(86)) connector. In this invention, there are also many SiPM arrays 103, each corresponding to a scintillation crystal LYSO array 102. In practical applications, the array size can be expanded as needed; only one is introduced here.

[0048] ④ PET Circuit 104: A multi-channel high-precision PET circuit, or simply PET circuit, is used here. The PET circuit 104 is packaged in a BGA package, with the ball and BGA soldered onto the bottom of the package using a steel sheet and solder paste. This significantly saves space on the FPGA main control board, allowing for more PET circuits 104 to be placed per unit area, facilitating integration and scaling. The multi-channel high-precision PET circuit 104 can acquire current pulse signals from the silicon photomultiplier tube (SiPM) array 103, converting the electrical signals into energy and time signals. The multi-channel high-precision PET circuit is a core component of PET equipment and imaging systems, and its performance directly affects the system's performance. In this invention, there are multiple PET circuits 104, each corresponding to a set of PET detectors (shielding cover 101 + scintillation crystal LYSO array 102 + silicon photomultiplier tube (SiPM) array 103). In practical applications, the array size can be expanded as needed; only one is described here.

[0049] ⑤ FPGA Main Control Board 105: The core device of the FPGA main control board 105 uses a Xilinx Spartan6 FPGA, model XC6SLX45T-3FGG484I, for signal processing and control. The FPGA main control board converts the 64-channel energy and time signals through the CameraLink communication protocol. Simultaneously, the main control board also performs level conversion and provides power to various modules. In this invention, there is only one FPGA main control board 105, but it houses many acquisition units (shielding cover 101 + LYSO scintillation crystal array 102 + silicon photomultiplier tube (SiPM) array 103 + PET circuit 104), and they are all in a one-to-one correspondence. In practical applications, the array size can be expanded as needed; only one is described here.

[0050] ⑥ Level Conversion 106: Level conversion 106 performs level conversion to provide the necessary voltage for the entire system. The 5V supplied by the power supply is converted to 3.3V via a high-current LDO circuit LT1764EQ-3.3V, and then converted to 1.2V via a high-precision high-current LDO circuit LT3083. The 3.3V and 1.2V simultaneously power the multi-channel high-precision PET imaging circuit and the FPGA on the DUT board. The 3.3V also needs to power the Cameralink conversion circuit.

[0051] ⑦Cameralink Conversion Protocol 107: This invention quantizes the energy and time signals transmitted back from each acquisition unit on the main control board into digital signals and corresponding positions according to the (M×N) array arrangement. Each unit will correspond to the magnitude of the energy digital signal at different row and column positions. Then, through the Cameralink communication protocol, the entire (M×N) array information is used to generate an energy display image composed of frame rate, row signal, column signal and energy digital signal, and transmitted to the host computer through a video cable.

[0052] ⑧PC host computer 108: The PC host computer 108 acquires and reconstructs the energy image transmitted from the video cable through the image acquisition card. The PC host computer 108 can determine the specific location and energy of the γ-rays received by the scintillation crystal LYSO array 102 in the PET detector through the transmitted information, thereby estimating the approximate location of positron annihilation and realizing PET image reconstruction.

[0053] Example 2

[0054] like Figure 2 The diagram shows the position of a PET detector imaging system provided in this embodiment of the invention between a ring detector device, a support, and a host computer, illustrating the application of a PET detector imaging system proposed in this embodiment.

[0055] exist Figure 2 The ring detector equipment and support include: a human body scanning channel 200; a subject acquisition and reception device 201; a scanning channel wall 202; a PET detector module 203 (the PET detector module includes a shield, a scintillation crystal LYSO array, a silicon photomultiplier tube SiPM array, a PET circuit, and an FPGA main control board); and a ring PET detector cover 204.

[0056] The scanning channel wall 202 arranged around the human body scanning channel 200 is used to fix the PET detector module 203. Multiple PET detector modules 203 are also placed between the scanning channel wall 202 and the annular PET detector cover 204 in order to collect and receive photon information emitted by the subject 201.

[0057] The host computer is placed next to the ring detector device and transmits image data through video cables. The data converted by the Cameralink image protocol is transmitted to the host computer through the image acquisition card.

[0058] This invention can be effectively applied to ring-type PET detectors in the field of nuclear medicine, providing another implementation method and path for large-scale medical diagnostic imaging technology, forming a complete positron emission tomography (PET) scan, and providing strong support for medical diagnosis.

[0059] Example 3

[0060] This embodiment 1 provides a schematic diagram of the structure of a silicon photomultiplier tube (SiPM) array 103 in a PET detector imaging system, including:

[0061] The silicon photomultiplier tube (SiPM) array 103 converts received photons into electrical signals, specifically current pulse signals, via a photoelectric conversion array. A top view of the connector structure of the SiPM array 103 is shown below. Figure 3 As shown above, two 40-pin connectors (model DF12B(3.0)-40DP-0.5V(86)) are connected to the FPGA main control board 105 at the top and to the scintillation crystal LYSO array 102 at the bottom. Depending on the requirements, direct contact coupling or optical adhesive can be used to bond the two surfaces together.

[0062] A top view of the structure of the silicon photomultiplier tube (SiPM) array 103 is shown below. Figure 3 As shown below, an 8×8 SiPM array is used. The first column of the x-axis is numbered from 1-1 to 8-1, and the first row of the y-axis is numbered from 1-1 to 1-8, forming an 8*8 energy image array. This array corresponds to the energy display interface of the host computer.

[0063] This invention only describes the use of an 8×8 SiPM array in detail, but is not limited to this array size. It can be expanded to M×N (where M represents the number of rows along the x-axis of the SiPM array, and N represents the number of columns along the y-axis) according to design needs. Based on the SiPM array, this invention can accurately acquire the specific location of γ-rays generated by the crystal, which is of great reference value for locating the location and energy analysis of subsequent γ-ray generation.

[0064] Example 4

[0065] like Figure 4 As shown in the figure, this embodiment provides a schematic diagram of the pulse coincidence condition of a PET detector imaging system, including:

[0066] The ring detector imaging device is assembled from 32 PET detector modules 203. Modules numbered 1-16 and modules numbered 17-31 have a mirror-image relationship on a straight line and are called a pair of PET detector modules 403.

[0067] The module's x-axis and y-axis correspond to the x-axis and y-axis of the top view of the SiPM array 103 structure, respectively. In the ring detector imaging device, the x-axis is the horizontal axis of the ring detector imaging device's cross-section, the y-axis is the depth axis of the ring detector imaging device, and the z-axis is the vertical axis of the ring detector imaging device's cross-section. When a person ingests a radionuclide, 401 decays and releases a positron 402. The positron 402 annihilates with a surrounding electron, producing a pair of gamma photons at 180° to each other.

[0068] The PET detector imaging system will use a coincidence detection method to acquire data on this pair of gamma photons. A coincidence time window is set in the PET circuit according to the acquisition time information, and the arriving pulse time signal is monitored to identify and determine whether it is a true coincidence event. The schematic diagram is shown below. Figure 4 ;

[0069] In the ring detector imaging device, the SiPM arrays (1-1) in PET detector module 1 and PET detector module 17 respectively detect two 180° γ-photons generated by the annihilation of positron-402. PET detector modules 1 and 17 detect a pulse signal generated by the γ-photons. The pulse signal is timed through a set time window, and the pulse information is evaluated. Signals entering the time window simultaneously are compared in energy magnitude; if the magnitudes match, it is identified as a coincidence event and recorded. This is the coincidence evaluation process. The two pulses in a coincidence event correspond to a pair of 180° γ-photons generated after the annihilation of positron-402. The time window coincidence detection technique can exclude many scattered photons, improving detection sensitivity.

[0070] Example 5

[0071] like Figure 5 As shown in the figure, this embodiment provides a structural configuration diagram of a PET detector module in a ring detector imaging device.

[0072] The connection lines between PET detector modules that conform to the time window are called response lines (LORs). The PET detector module configuration diagram here is to obtain the combination of all response line LORs. The detector module configuration is closely related to the structure of the ring detector device; there is a unique response line between two PET detector modules. However, during image reconstruction, not every response line LOR is acquired. Here, the field of view (FOV) 501 of the ring detector imaging device is introduced. In most ring detector imaging devices, the FOV diameter is set to about half the diameter of the detector ring, because the further away the PET detector module is from the FOV center, the more severely its response line LOR is affected. Also, to better acquire response line LOR data, the diameter of the human body channel 502 is about half the diameter of the FOV.

[0073] Encoding the addresses between PET detector modules is essentially position encoding of response lines (LORs) that meet the conditions within the time window. Each LOR passing through the 501-degree field of view reflects the location information of a positron annihilation event, thus determining the location of the annihilation and consequently the image location. Therefore, it is necessary to position-encode all LORs passing through the 501-degree field of view. The encoding must ensure that each LOR has exactly one corresponding code. Therefore, for all LYSO crystals on the ring detector, once the numbers of the two PET detector modules, and their X-direction and Y-direction numbers, are determined, a single LOR can be uniquely identified, thus uniquely determining the location of the annihilation event.

[0074] The diagram shows a correspondence between PET detector module 1 and PET detector modules 13-22. Similarly, it shows a correspondence between PET detector module 17 and PET detector modules 28-32, and 1-5. This process can be repeated to find all the correspondences among the 32 PET detector modules.

[0075] Example 6

[0076] like Figure 6 As shown in the figure, this embodiment provides a schematic diagram of the acquisition method of the x-axis and y-axis corresponding to the "SiPM array + LYSO crystal array" PET detector module in a ring detector imaging device.

[0077] The 32 PET detector modules in the ring detector imaging device have a one-to-one correspondence. In this invention, the PET detector module "SiPM array + LYSO crystal array" adopts an 8×8 array. Therefore, the x-axis and y-axis of the 8×8 structure of a single PET detector module "SiPM array + LYSO crystal array" also have a corresponding relationship. For example, in the figure, PET detector module 1 and PET detector module 17 are corresponding. The first column of PET detector module 1 (x-axis) and each column of PET detector module 17 (x-axis) numbered from 1-1 to 8-1 are fully corresponding. That is, the first column number 1-1 of PET detector module 1 (x-axis) and each column number of PET detector module 17 (x-axis) numbered from 1-1 to 8-1 form a corresponding combination. Similarly, the remaining numbers in the first column of PET detector module 1 (x-axis) also correspond to each column number of PET detector module 17 (x-axis) numbered from 1-1 to 8-1. Similarly, the numbering of columns 2 to 8 of PET detector module 1 (x-axis) and each column of PET detector module 17 (x-axis) also corresponds in this way. This example uses two corresponding x-axis columns of PET detector modules; similarly, the y-axis rows could also be used, but we won't go into detail here.

[0078] As can be seen from the figure, the number (1-1) of PET detector module 1 and the number from (1-1) to (8-1) of PET detector module 17 are possible correspondences. Therefore, as long as the number is recorded until a response line LOR in which the annihilation event of the positron is found, and the number of the two PET detector modules is determined in Example 5, the column number in the X direction and the row number in the Y direction of the two PET detector modules are recorded together, a complete position code, i.e., position information, is obtained.

[0079] Example 7

[0080] like Figure 7 This embodiment provides a schematic diagram of the timing of energy-image conversion of SiPM array 103 by the FPGA main control board 105 of a PET detector imaging system.

[0081] The FPGA main control board 105 determines which channel and location of the effect occurred based on the information acquired by the PET circuit 104 according to the time window conditions, and maps the location encoding information to the acquired energy information. Here, the FPGA main control board 105 uses an 18-bit 8-channel AD7608BSTZ to digitize the analog energy signal acquired by the PET circuit 104. The AD7608BSTZ uses 8-channel synchronous sampling input, true bipolar analog input, and is powered by a 5V single analog power supply. Based on the structural diagram of the SiPM array 103, the FPGA main control board 105 performs image conversion, generating the accompanying clock CLK, frame signal FRAME, line signal ROW, line valid DAT, and image data SD0 (LSB) to image data SD17 (MSB).

[0082] The AD7608BSTZ digitizes the energy signals from the eight channels acquired, and the FPGA main control board 105 performs image conversion on the energy signals from the eight channels respectively. The SiPM array 103 adopts an 8*8 array. For example, the first row is encoded as (1-1), (1-2), (1-3), ... (1-8) rows of pixels. The eight rows of pixels in the first row are digitized using 18 bits. The 18 bits are encoded as bit0, bit1, bit2, ... bit17, corresponding to the image data SD0, SD1, SD2, ... SD17. Here, the image data is input serially. The input order of the image data SD0 is the bit0 data of the first row (1-1), (1-2), (1-3), ... (1-8), followed by the bit0 data of the second row (1-1), (1-2), (1-3), ... (1-8), and so on, until the bit0 data of the eighth row (1-1), (1-2), (1-3), ... (1-8) is completely transmitted. Similarly, image data SD1, SD2, ... SD17 are also transmitted serially, bit1, bit2, ... bit17 respectively. Here, bits0, bit1, bit2, ... bit17 of the same row of pixels are transmitted in parallel.

[0083] When transmitting the first row of pixel image data, the FPGA generates a high-level row signal ROW and a row active signal DAT. After the first row of data is transmitted, it generates a low-level row signal ROW and a row active signal DAT, and so on, until the eighth row of pixel image data is transmitted and the row signals ROW and DAT are pulled low. When transmitting the first row of pixel image data, the FPGA generates a high-level frame signal FRAME, and this signal is pulled low after all 8×8 array pixel image data has been transmitted. The FPGA generates an accompanying clock CLK for each bit of pixel data transmitted, until the entire image transmission is complete.

[0084] This invention uses the rising edge of the accompanying clock CLK signal to acquire data during transmission. Timing operations are performed on FRAME, ROW, CLK, and DAT. The design selects an image resolution of M×N (M represents the number of rows in the SiPM array, and N represents the number of columns; the selection is based on design requirements; here, an 8×8 SiPM array is used for illustration) and a data output frame rate F (in Hz). To achieve frame rate F, the number of effective row pixel clock cycles A, the number of invalid row clock cycles B, and the number of invalid frame clock cycles C need to be determined. The frequency of the accompanying clock CLK is F. clk The specific implementation is as follows:

[0085]

[0086] Finally, the FPGA main control board 105 sends the 18-bit parallel data signal and FRAME, ROW, CLK and DAT generated according to the F frame rate to the Cameralink interface.

[0087] This invention numbers the SiPM array to form an M×N (here, 8×8) image array. It uses an 18-bit high-precision AD7608BSTZ to digitize the energy collected by the PET circuit. The digitized energy signal is then converted into a CameraLink image using an FPGA main control board. This accurately transmits the energy information of the specific location of the gamma rays generated by the crystal, providing real-time analysis of the position and energy of the gamma rays generated by the crystal.

[0088] Example 8

[0089] As shown in Table 1, this embodiment shows the correspondence of the output data formats of the Cameralink protocol converter 107 in a PET detector imaging system.

[0090] Table 1 Output data format converted by Cameralink protocol

[0091]

[0092] CameraLink is used in medical imaging to transmit high-definition medical images in real time, providing doctors with accurate diagnostic information. CameraLink is a video signal output serial communication protocol that uses Low Voltage Differential Signaling (LVDS) for transmission. In the standard CameraLink interface, the image acquisition card port definitions are shown in the leftmost column of the table. Digital image camera signals are divided into: video image data (Port A-Port H) and enable signals (Fval, Lval, Dval, and Spare). The CameraLink interface standard specifies the interface between digital cameras and image acquisition cards, enabling high-speed transmission of multi-bit image data and enable signals (line signals, frame signals, line valid signals, and spare signals). The 28-bit input definition of the image acquisition card interface standard is shown in the middle column of the table. CameraLink has three connection modes: BASE mode (Port A-Port C), Medium mode (Port A-Port F), and Full mode (Port A-Port H). This invention uses the Base mode as the CameraLink interface configuration. In Base mode, 18-bit and 24-bit RGB configurations can be used. However, for the entire system, the 18-bit configuration with a total bit width of 28 bits under the Base configuration will be used to meet the input requirements of 18-bit pixel data.

[0093] This invention digitizes the energy signals of the 8-channel PET circuit acquired by the 18-bit AD7608BSTZ. The 18 bits are encoded as bit0, bit1, bit2, ... bit17, which correspond one-to-one with the definition of the 28-bit input of the image acquisition card interface standard. Bits that do not correspond are padded with 0. The corresponding relationships are (bit0~IN0), (bit1~IN1), (bit2~IN2), (bit3~IN3), (bit4~IN4), (bit5~IN6), (bit6~IN27), (bit7~IN5), (bit8~IN7), (bit9~IN8), (bit10~IN9), (bit11~IN12), (bit12~IN13), (bit13~IN14), (bit14~IN10), (bit15~IN11), (bit16~IN15), (bit17~IN18), (0~IN19), (0~IN20), (0~IN21), (0~IN22), (0~IN16), (0~IN17). The FPGA main control board 105 transmits the generated frame signal FRAME, line signal ROW, and line valid signal DAT to the FVAL, LVAL, and DVAL ports of the image acquisition card, respectively. Simultaneously, the FPGA main control board 105 sets the spare signal input to 0 and transmits it to the Spare port of the image acquisition card. These four signals correspond one-to-one with the 28-bit input definition of the image acquisition card's interface standard, with the following correspondences: (ROW ~ IN24), (FRAME ~ IN25), (DAT ~ IN26), and (0 ~ IN23). Finally, according to the TxCLK Out / TxCLK In requirements, the FPGA main control board 105 generates the corresponding clock.

[0094] Example 9

[0095] like Figure 8 This embodiment provides a schematic diagram of the four-channel serial data output format of the Cameralink protocol converter 107 in a PET detector imaging system.

[0096] CameraLink is a serial communication protocol specifically designed for machine vision applications. It uses Low Voltage Differential Signaling (LVDS) for data transmission and communication. This invention performs CameraLink protocol conversion on a PET detector imaging system, using LVDS for data transmission and communication. Four pairs of LVDS differential signals are used to fit and transmit the quantized digital signal from the PET detector's energy acquisition. These four pairs of LVDS differential signals are TxOUT3 / RxIN3, TxOUT2 / RxIN2, TxOUT1 / RxIN1, and TxOUT0 / RxIN0. The coupling relationships between the frame signal FRAME, line signal ROW, line valid DAT, and image data (bit0-bit17) and these four pairs of LVDS differential signals are shown in Example 4. In this invention, the FPGA main control board 105 also generates a TxCLK OUT / RxCLK IN clock signal. Note that this clock signal is not the same as the accompanying clock CLK on the left. The TxCLK OUT / RxCLK IN clock signal is an LVDS differential parallel clock with a duty cycle of 4:3, that is, 4 high levels and 3 low levels. It is used for data alignment at the receiving end. After being multiplied by 7, it can be used by the image acquisition card to acquire differential serial data. The high and low levels are transmitted in parallel using four differential pairs: TxOUT3 / RxIN3, TxOUT2 / RxIN2, TxOUT2 / RxIN2, and TxOUT1 / RxIN1. After the TxCLK OUT / RxCLK IN clock signal begins to rise, it will transmit TxIN5 (bit 7), TxIN20 (bit 0), TxIN9 (bit 10), and TxIN1 (bit 1) of the four differential pairs TxOUT(3~0) / RxIN(3~0) (i.e., the digital signals transmitting the corresponding PET detector energy). Strict alignment is required between the rising and falling edges of the clock signal, the high and low levels, and the parallel data. This process continues in sequence, and will not be elaborated further here, as shown in the example diagram.

[0097] This invention employs a four-channel serial LVDS low-voltage differential signal transmission method to transmit PET detector energy data. Since data transmission interference typically affects two signal lines simultaneously, the differential signal effectively cancels out external electromagnetic interference by transmitting the difference between the two lines. Furthermore, common-mode noise also occurs simultaneously across the signal lines, while the differential signal only considers the potential difference between the two lines. Therefore, the differential signal can effectively suppress common-mode noise, making it suitable for long-distance communication and data transmission in PET detector imaging systems. The energy transmission signal remains undistorted, resulting in high system imaging quality.

[0098] Example 10

[0099] like Figure 9 This embodiment provides a schematic diagram of the energy transmission interface after Cameralink protocol conversion in a PET detector imaging system.

[0100] The PET detector transmits energy information to the host computer via Cameralink protocol conversion. The energy transmission interface can display the energy of the silicon photomultiplier tube (SiPM) array in Example 3. Based on the array size of the PET detector, the "shielding cover + LYSO scintillation crystal array + SiPM array" PET detector generates energy display interfaces such as PET detector 1, PET detector 2, and PET detector 3. For example, in PET detector 1, each 8×8 SiPM array is displayed as one pixel in the energy transmission screen. Depending on the required energy transmission interface array, such as M×N, n 8×8 SiPM arrays can be selected for display; their calculation formula is M×...

[0101] N = n × (8 × 8).

[0102] Example 11

[0103] like Figure 10 This embodiment provides a flowchart of signal acquisition and image conversion for a PET detector imaging system. It is used to acquire energy and time signals from the PET detector, determine the location information of positron annihilation events using pulse signals that meet the acquisition time window conditions, and perform CameraLink image protocol conversion using the energy information. This embodiment includes the following steps:

[0104] Step 1101: The scintillation crystal LYSO array interacts with the gamma photons and releases energy in the form of visible light photons. As in Example 1, the scintillation crystal LYSO array 102 and the 511keV gamma photons interact in the shield 101 and release energy in the form of visible light.

[0105] Step 1102: The silicon photomultiplier tube (SiPM) array converts the visible light signal collected from the corresponding crystal into an electrical signal. As in Example 1, the visible light photons received by the silicon photomultiplier tube (SiPM) array 103 are converted into electrical signals, specifically current pulse signals, via a photoelectric conversion array.

[0106] Step 1103: The multi-channel PET circuit array converts the electrical signal of the corresponding SiPM array into energy and time signals. As in Example 1, the multi-channel PET circuit 104 can acquire data of the current pulse signal of the silicon photomultiplier tube (SiPM) array 103 and convert the electrical signal into energy and time signals.

[0107] Step 1104: The FPGA performs time window compliance checks on the signals input to the PET circuit array and records the location information of the effect. It then digitizes the energy signal corresponding to that location and performs Cameralink protocol conversion. As in Example 1, the FPGA main control board 105 determines which channel acquired which location of the effect based on the information collected by the multi-channel PET circuit 104, then locates the effect according to the structural diagram of the SiPM array 103 and performs position encoding. The specific process is shown in Examples 2-6.

[0108] The FPGA main control board 105 is powered by the level conversion module 106. An 18-bit 8-channel ADC is used to digitize the energy signal at this location and perform image timing conversion to generate the accompanying clock CLK, frame signal FRAME, line signal ROW, line valid DAT, and image data. The specific process of image timing conversion is shown in Example 7.

[0109] The digitized image data (energy) is mapped one-to-one with the four generated control signals according to the requirements of Cameralink protocol conversion 107. The specific process of mapping and output data format is shown in Example 8.

[0110] The corresponding Cameralink data format is transmitted and communicated using interference-resistant and low-noise LVDS low-voltage differential signals. The Cameralink protocol converter 107 uses four pairs of LVDS differential signals to perform data fitting and long-distance transmission of the PET detector imaging system's energy. The specific process of the four-channel serial data output format is shown in Example 9.

[0111] Step 1105: The host computer image acquisition card acquires the energy signal transmitted at the frame frequency set by the FPGA, obtains the corresponding energy location information, and finally performs image reconstruction. The specific process of setting the frame frequency on the FPGA main control board 105 is shown in the calculation formula in Example 7. The PC host computer 108 uses the image acquisition card to transmit an energy signal transmitted from the long line at a certain frame frequency, thereby determining the specific location and energy magnitude of the γ-rays received by the scintillation crystal LYSO array 102 in the PET detector, estimating the approximate location of positron annihilation, and by acquiring a large amount of PET location and energy image data, performing data reconstruction, and drawing a complete positron emission tomography (PET) scan, providing strong support for medical diagnosis.

[0112] This invention constructs a model of a large-scale PET detector imaging system, employing a high-precision multi-channel PET circuit as the core component of the imaging system. It utilizes the Cameralink protocol for energy signal acquisition, conversion, and energy interface transmission, providing another implementation method and pathway for large-scale medical diagnostic imaging technology. This invention features scalable PET detectors, high imaging accuracy, strong anti-interference capabilities for image signals, and the ability to acquire large amounts of detector data for image reconstruction, making it effectively applicable to medical ring-type PET detectors.

[0113] The above-described embodiments further illustrate the purpose, technical solution, and advantages of the present invention. It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made to the present invention within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A PET detector imaging system, characterized in that, The system includes a shielding cover, a scintillation crystal LYSO array, a silicon photomultiplier tube (SiPM) array, a PET circuit array, an FPGA main control board, a level conversion module, a CameraLink protocol conversion module, and a PC host computer, among which: A shield is used to mount on the outside of a scintillation crystal LYSO array to reflect the visible light emitted by the scintillation crystal LYSO array after it has been excited by high-energy gamma photons without damage. A scintillation crystal LYSO array is used to interact with 511keV gamma photons and then release them in the form of visible light. Silicon photomultiplier tube (SiPM) arrays are used to convert received visible light photons into electrical signals, i.e., current pulse signals, through a photoelectric conversion array. PET circuit array is used to acquire current pulse signals from silicon photomultiplier tube (SiPM) arrays, converting electrical signals into energy and time signals; The FPGA main control board is used for image timing conversion of the energy signal from the PET detector. The level conversion module is used for level conversion, providing the required voltage for the entire system; The Cameralink protocol conversion module is used to perform data fitting and long-distance transmission of the energy from four pairs of LVDS differential signals to the PET detector imaging system. The PC host computer uses an image acquisition card to collect the location and energy information of the effect, and performs energy transmission and image reconstruction according to the frame rate set by the FPGA. When transmitting energy data, data is acquired using the rising edge of the accompanying clock CLK signal. To obtain an energy image resolution of M×N and a data output frame rate F, the following conditions must be met: The silicon photomultiplier tube (SiPM) array has M rows and N columns; A is the number of effective pixel clock cycles per row, B is the number of invalid clock cycles per row, and C is the number of invalid clock cycles per frame. The frequency of the accompanying clock signal CLK.

2. The PET detector imaging system according to claim 1, characterized in that, The shield is a carbon fiber shield with a through-hole structure and an inner skin coated with reflective material.

3. The PET detector imaging system according to claim 1, characterized in that, A shield is fitted over the outer surface of a scintillation crystal LYSO array. One end of the scintillation crystal LYSO array receives and interacts with γ photons, while the other end is coupled to the scintillation crystal LYSO array. A shield, a scintillation crystal LYSO array, and a silicon photomultiplier tube (SiPM) array form a PET detector. The PET circuit array is set on the FPGA main control board, and a PET detector is connected to the FPGA main control board through a connector.

4. An application of a PET detector imaging system, characterized in that, A detection channel is constructed using the scanning channel wall and the PET detector cover, and multiple PET detector imaging systems as described in claim 1 are installed in the annular area between the scanning channel wall and the PET detector cover. The PET detector imaging system is used to collect photon information emitted by the person to be detected in the detection channel.

5. The application of the PET detector imaging system according to claim 4, characterized in that, When two PET detector imaging systems located on the diameter of the circle passing through the annular region are considered as a pair, the pair of imaging systems detect two γ photons at 180° to each other. The pulse signals are timed through a set time window, and the pulse information is identified. Through the set time window, the energy magnitude of the signals that enter the time window at the same time is compared. If the magnitude is the same, it is a valid event. Only the visible light photons of the valid event are converted into electrical signals through the photoelectric conversion array to perform subsequent operations.

6. The application of the PET detector imaging system according to claim 4, characterized in that, The process of identifying and encoding the response lines of valid events includes: encoding all response lines (LORs) passing through the set field of view area, with each LOR having only one corresponding code; setting the horizontal axis coordinate of the ring detector imaging device's cross-section as x and the vertical axis coordinate of the ring detector imaging device as y; using x and y to encode the position of each element of the SiPM array; and using time window compliance judgment to locate the specific x-axis and y-axis positions of the SiPM array where the annihilation effect occurs, and encoding the positions, thus determining the position codes of the two PET detector SiPM arrays, i.e., determining a response line (LOR) where the annihilation effect occurs.

7. An application of a PET detector imaging system, characterized in that, Image reconstruction using the PET detector imaging system of claim 1 specifically includes the following steps: The LYSO scintillation crystal array interacts with gamma photons and releases energy in the form of visible light photons; Silicon photomultiplier tube (SiPM) arrays convert visible light signals collected from the corresponding crystal into electrical signals; The multi-channel PET circuit array converts the electrical signals of the corresponding SiPM array into energy and time signals; The FPGA main control board calculates the location of the effect from the time signal input to the PET circuit array, digitizes the energy signal corresponding to that location, and performs Cameralink protocol conversion. The host computer image acquisition card acquires the location and energy information of the effect, performs energy transmission according to the frame rate set by the FPGA, and reconstructs the image.

8. The application of the PET detector imaging system according to claim 7, characterized in that, The FPGA main control board uses an 18-bit, 8-channel analog-to-digital converter chip to digitize the energy analog signals acquired by the PET circuit array. The FPGA main control board performs image conversion based on the silicon photomultiplier tube (SiPM) array, generating accompanying clock CLK, frame signal FRAME, row signal ROW, row active DAT, and image data. When transmitting row pixel image data, the FPGA main control board generates a high-level row signal ROW and row active DAT. After all row data is transmitted, it generates a low-level row signal ROW and row active DAT. After the last row of image data from the SiPM array is transmitted, the row signal ROW and row active DAT are pulled low. When transmitting the first row of image data from the first row, the FPGA main control board generates a high-level frame signal FRAME, continuing until all SiPM array pixel image data is transmitted, at which point the frame signal FRAME is pulled low. The FPGA main control board generates an accompanying clock CLK for each bit of pixel data transmitted, until the entire image transmission is complete.

9. The application of a PET detector imaging system according to claim 7 or 8, characterized in that, The silicon photomultiplier tube (SiPM) array is an 8×8 array. Each row of the array is encoded as a group of row pixels. Each row pixel is digitized using 18 bits, and the 18-bit image data of the same row pixel is transmitted in parallel.

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