Multi-task dynamic reconfigurable parallel computing method and system based on systolic array

Abstract

The invention provides a multi-task dynamic reconfigurable parallel computing method and system based on a systolic array. The method comprises the steps that different task operators are input into different multifunctional processing units; optimizing the operation mode selection and task allocation path of each multifunctional processing unit through the configuration matrix; decomposing the total calculation task into small calculation sub-tasks, and distributing different calculation sub-tasks to corresponding multifunctional processing units through a task decomposition matrix; the output results of the multifunctional processing units are integrated step by step through a multi-stage summator, so that the calculation results of the blocks are combined into a complete output result, and meanwhile, the voltage and frequency of the system need to be adjusted in real time according to the load conditions of the multifunctional processing units; and the running state of the system is monitored and evaluated in real time. The system is combined with multi-level configuration matrix control, a hierarchical aggregation structure and a low-power-consumption management strategy, and multi-task loads of various neural network architectures can be efficiently supported.

Description

Technical Field

[0001] The present invention belongs to the technical field of deep learning hardware acceleration and high-performance computing architecture, and relates to a multi-task dynamically reconfigurable parallel computing method and system based on a systolic array. Background Art

[0002] In deep learning tasks, convolution, matrix multiplication, and activation functions are computationally intensive basic operators, and different neural network structures have different load requirements for these operators. For example, CNN has a strong dependence on convolution operators, while LSTM and Transformer networks focus on matrix multiplication.

[0003] However, in the existing hardware architecture, computing units and transmission links are often unable to be dynamically reconfigured, resulting in low resource utilization and difficulty in adapting to the task requirements of various network structures. Therefore, it is urgent to design a flexible and dynamically reconfigurable architecture to meet the efficient parallel computing requirements of multi-task loads.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a dynamically reconfigurable systolic array architecture that can adaptively adjust the resource allocation of each operator, which is suitable for multi-task deep learning loads including convolutional neural networks (CNNs), long short-term memory networks (LSTMs) and Transformer networks to meet complex and dynamic computing requirements.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] In a first aspect, the present invention provides a multi-task dynamically reconfigurable parallel computing method based on a systolic array, comprising the following steps:

[0008] Step 1: Input different task operators into different multi-functional processing units;

[0009] Step 2: Optimize the operation mode selection and task allocation path of each multifunctional processing unit through the configuration matrix;

[0010] Step 3: Decompose the total computing task into small computing subtasks, and assign different computing subtasks to corresponding optimized multifunctional processing units through the task decomposition matrix;

[0011] Step 4: The output results of each multifunctional processing unit are integrated step by step through a multi-stage adder, so that the calculation results of each block are combined into a complete output result. At the same time, the voltage and frequency of the system need to be adjusted in real time according to the load conditions of each multifunctional processing unit;

[0012] Step 5: Monitor and evaluate the system's operating status in real time, and adaptively adjust task allocation and resource configuration.

[0013] Furthermore, the different task operators in step 1 include: convolution, matrix multiplication and activation function.

[0014] Furthermore, the optimization of the operation mode selection and task allocation path of each multifunctional processing unit by configuring the matrix in step 2 specifically includes:

[0015] When the system is running, the configuration matrix dynamically adjusts the allocation path and operation mode of each multi-functional processing unit according to task requirements and resource conditions.

[0016] Assuming that there are N multi-function processing units and M task blocks in the system, the configuration matrix can be expressed as an N×M×2 matrix, where the first dimension data C config (i,:,:) represents the task allocation and operation mode of the i-th multifunctional processing unit, and the second dimension data C config (:, j, :) represents the operation mode and path information of task j, and the third dimension data represents the allocation relationship between the processing unit and the task allocation and the corresponding path information, where C config (i, j, 1) indicates whether task j is assigned to processing unit i. If C config (i, j, 1) = 1 means yes, if C config (i, j, 1) = 0 means no, C config (i, j, 2) represents the operation mode of the current processing unit. Its value 0 means that task j is not assigned to processing unit i. config (i, j, 1) = 1 means the convolution operator is currently being executed, C config (i, j, 1) = 2 means that the current matrix multiplication is executed, C config (i, j, 1) = 3 indicates that the activation function operator is currently being executed.

[0017] Furthermore, the configuration matrix controls the operation mode and task allocation path of each multi-functional processing unit, specifically including:

[0018] Step 2.1, control of operation mode:

[0019] Each element in the configuration matrix C config (i, j, 2) contains the operation mode mark, that is, the operator currently being processed. Correspondingly, the configuration matrix will dynamically update these operation mode marks according to the task requirements, thereby indicating the operation mode executed by the multifunctional processing unit at different task stages. At the same time, when the task load changes, the configuration matrix will update the operation mode of the corresponding multifunctional processing unit, so that the multifunctional processing unit can adapt to the requirements of the current task;

[0020] Step 2.2: Control of task allocation path:

[0021] The transmission path of the matrix control task from one multifunctional processing unit to another multifunctional processing unit is configured so that the transmission path selection can minimize the transmission time. The specific transmission path can be expressed as:

[0022]

[0023] Among them, M trans (i,j) represents the transmission delay from the i-th multifunctional processing unit to the j-th multifunctional processing unit, C config (i, j, 1) represents the selection of the marked path in the configuration matrix, 1 represents selection, 0 represents non-selection,

[0024] Step 2.3: Dynamic update mechanism of configuration matrix

[0025] The system updates the configuration matrix C according to the load conditions in each task scheduling cycle config , so that each task can be assigned to the multifunctional processing unit with the lowest current load and corresponding resources. When the task is transmitted, the transmission path with the lowest delay is selected to realize the conversion of data between multifunctional processing units.

[0026] Furthermore, in step 3, the total computing task is decomposed into small computing subtasks, and different computing subtasks are allocated to corresponding optimized multifunctional processing units through the task decomposition matrix. The specific steps include:

[0027] The multifunctional processing unit switches between operator tasks according to the current load and configuration matrix instructions. The task allocation model for the task load T is as follows:

[0028] T ij =C PEi (V j )+C memi (V j )

[0029] Among them, T ij represents the total computational load assigned to the i-th multifunctional processing unit for the j-th task, C PEi (V j ) is the computational overhead of the i-th multi-function processing unit, which is determined by the resource demand supervector V j OK, C memi (V j ) is the memory usage overhead of the i-th multi-function processing unit,

[0030] Resource demand super vector V jIt includes various resource requirements required by the device when running tasks, such as computing resource requirements, memory requirements, storage requirements, bandwidth requirements, and power consumption requirements, which are specifically expressed as:

[0031] V j =[w1r j1 ,w2r j2 ,...,w n r jn ]

[0032] Among them, r jk represents the demand value of device j on resource dimension k, w k represents the weight of resource dimension k, reflecting the importance of this dimension in the total demand.

[0033] By optimizing the configuration matrix, the system allocates each task to the corresponding multi-function processing unit with the minimum overhead, specifically minimizing the total overhead through the following optimization objective function:

[0034]

[0035] Where N is the number of multi-function processing units, M is the number of tasks, and T ij represents the total computational overhead allocated to the i-th multi-function processing unit for the j-th task.

[0036] Furthermore, in step 4, the output results of each multifunctional processing unit are integrated step by step through a multi-stage adder to merge the calculation results of each block into a complete output result. The specific steps are:

[0037] The block calculation results of the design calculation task are expressed as matrix A, where each block corresponds to a different multi-functional processing unit, and its block calculation results are expressed as A i,j , the multi-level adder integrates each sub-block matrix A layer by layer i,j , so that the block calculation results are accumulated layer by layer through the adder layer, and finally a complete large matrix output G is generated result , the specific implementation is as follows:

[0038]

[0039] Among them, G result represents the final generated complete calculation result matrix, which is the output of the block calculation results of each multifunctional processing unit after being integrated by the layer-by-layer adder structure. k is the weight of the kth layer, and L is the number of aggregation layers, ensuring that the final complete result is output based on the integration of data at each layer.

[0040] Furthermore, the method of adjusting the voltage and frequency of the system in real time according to the load conditions of each multifunctional processing unit in step 4 includes: dynamic voltage and frequency adjustment, task allocation optimization, load detection and power consumption mode switching;

[0041] The voltage and frequency of the system are adjusted by dynamic voltage and frequency regulation, which specifically includes the following steps:

[0042] The system optimizes power consumption by adjusting the operating voltage V and frequency f of the multi-function processing unit. Power consumption P = CV 2 f

[0043] Where C is the constant of the capacitive load; V is the operating voltage of the multi-function processing unit; f is the operating frequency,

[0044] The system will adjust the voltage V and frequency f in real time according to the load so that the voltage and frequency are reduced when the load is low. This is achieved through the following steps:

[0045] First, real-time load monitoring: The system monitors the current load level of the multi-functional processing unit through sensors.

[0046] Secondly, through dynamic voltage and frequency adjustment control strategy: select voltage and frequency values ​​according to load status, for example, reduce frequency and voltage when the load is low, reduce dynamic power consumption,

[0047] Finally, switch the voltage and frequency: adjust the voltage and frequency of the multi-function processing unit through corresponding hardware connections;

[0048] The voltage and frequency of the system are adjusted by optimizing task allocation. The system allocates high-load tasks to multi-function processing units at high voltage and frequency, and allocates low-load or short-time tasks to multi-function processing units in low power consumption mode. Specifically, the steps include:

[0049] First, the tasks are classified: according to the amount of calculation, the tasks are divided into high-load and low-load tasks according to the rated number of instructions of the device. That is, when the current number of instructions is higher than 60% of the rated number of instructions of the device, it is judged as high-load, otherwise it is judged as low-load.

[0050] Secondly, priority allocation: prioritize low-load tasks to low-power multi-function processing units, and reduce the frequency of use of high-power multi-function processing units.

[0051] Finally, ensure that the load is evenly distributed;

[0052] The voltage and frequency of the system are adjusted by load detection and power consumption mode switching. The system analyzes the operating status of each multi-functional processing unit in real time through the load monitoring module, and dynamically switches the power consumption mode according to different load levels. The power consumption modes include: normal mode, low power consumption mode and standby mode, which specifically include the following steps:

[0053] First, load monitoring is performed: the real-time load of the multi-functional processing unit is monitored through hardware sensors or control units.

[0054] Secondly, select the power consumption mode:

[0055] When the multi-function processing unit is under high load, the system sets it to normal working mode.

[0056] When the load drops below 30% of the device's rated load, the system switches the multi-function processing unit to low-power mode, reducing voltage and frequency.

[0057] When the system detects that the multi-function processing unit is idle for a long time, the system puts the multi-function processing unit into standby mode and only retains the most basic power supply;

[0058] Finally, dynamic switching is performed: the system regularly checks the load of each multi-function processing unit and automatically switches its power consumption mode according to preset conditions to achieve energy saving on demand;

[0059] The system minimizes the overall power consumption through the following objective function:

[0060]

[0061] Where N is the number of multi-function processing units in the system; Pi is the power consumption of the i-th multi-function processing unit; C i 、V i and f i are the capacitive load, operating voltage and frequency of the i-th multifunctional processing unit, respectively.

[0062] The system optimizes V i and f i value, so that the total power consumption is minimized.

[0063] Furthermore, in step 5, real-time monitoring and evaluation of the system's operating status and adaptively adjusting task allocation and resource allocation specifically include:

[0064] The steps to implement real-time monitoring and evaluation of the system's operating status are:

[0065] Define the performance indicator E(t) to evaluate the system configuration effect:

[0066]

[0067] Among them, w k is the weight, u k (t) represents the utilization rate of the multifunctional processing unit, which is calculated as follows:

[0068]

[0069] The actual working time k(t) refers to the total time that the k-th multi-function processing unit uses to perform computing tasks during time t.

[0070] Total available time k(t): the total time that the kth multi-function processing unit can theoretically use for task execution during this time period.

[0071] The above formula is used to calculate the utilization rate of the multi-function processing unit at the current time point. The value range is between [0,1]. The closer the utilization rate is to 1, the higher the load of the multi-function processing unit is; the closer it is to 0, the lower the load or idle state of the unit is. The specific calculation steps are as follows:

[0072] First, monitor the actual working time: through the real-time recording of task allocation and execution, the system can determine the total amount of time each multi-functional processing unit spends executing tasks in time period t.

[0073] Secondly, monitor the total available time: The total available time is usually preset, which means the time during which the k-th multi-function processing unit can perform calculations in time period t.

[0074] Finally, calculate the utilization rate: calculate the ratio of the monitored actual working time to the total available time to obtain the utilization rate at that moment;

[0075] When the performance index E(t) is lower than 0.3, the feedback module automatically adjusts the configuration matrix to ensure that the system can still operate efficiently when the load changes;

[0076] Adaptively adjust task allocation and resource configuration, that is, the feedback module automatically adjusts the configuration matrix. The specific implementation steps are:

[0077] First, analyze the current load distribution:

[0078] Identify multi-function processing units with utilization rates exceeding 75% to determine if they are overloaded.

[0079] Identify multi-function processing units that are less than 30% utilized or idle to determine if they can receive more tasks;

[0080] Secondly, optimize the task allocation strategy: according to the load distribution analysis, readjust the task allocation between the multi-functional processing units.

[0081] Third, reconfigure the operation mode: according to the task requirements and the current load of the multi-function processing unit, dynamically adjust the operation mode of each multi-function processing unit through the configuration matrix.

[0082] Finally, optimization of the transmission path: According to the adjusted task allocation plan, the transmission path of tasks between multifunctional processing units is optimized to reduce data transmission delay.

[0083] Furthermore, the operation modes include: convolution, matrix multiplication and activation function.

[0084] On the other hand, the present invention also provides a multi-task dynamically reconfigurable parallel computing system based on a systolic array, comprising:

[0085] Multifunctional processing unit for input of multiple task operators,

[0086] A configuration matrix and path optimization module, whose input end is connected to the output end of the multifunctional processing unit, is used to dynamically adjust the operation mode and path transmission of the computing unit to minimize the computing delay and data transmission overhead,

[0087] A task decomposition and distribution module, whose input end is connected to the output end of the configuration matrix and the path optimization module, is used to decompose the computing task into small tasks so that each multifunctional processing unit can process the assigned subtasks in parallel.

[0088] A multi-level aggregation calculation module, whose input end is connected to the output end of the task decomposition and distribution module, is used to aggregate the calculation results scattered in each multifunctional processing unit to achieve the integration of block calculations.

[0089] A low power management monitoring module, whose input end is connected to the output end of the multi-level aggregation computing module, and whose output end is connected to the input end of the task decomposition and distribution module, is used for real-time monitoring and adjusting the voltage and frequency of the system according to the load conditions of the multi-functional processing unit.

[0090] A feedback and adaptive control module, whose input end is connected to the output end of the multi-level aggregation calculation module, and whose output end is connected to the input end of the task decomposition and distribution module, is used to monitor the real-time load and resource utilization of the system and adaptively adjust task allocation and resource configuration.

[0091] Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects:

[0092] The present invention proposes a dynamic reconfigurable architecture based on a systolic array, which combines multi-level configuration matrix control, hierarchical aggregation structure and low-power management strategy, so that the system can efficiently support multi-task loads of various neural network architectures. In addition, a low-power management and monitoring module is set in the system of the present invention to save the overall power consumption of the system and ensure the computing performance of the system. The feedback and adaptive control module quantifies the resource utilization and response time of the system through a performance evaluation model to guide dynamic resource scheduling and power consumption management, thereby ensuring that the system can achieve adaptive and efficient operation when the load changes. BRIEF DESCRIPTION OF THE DRAWINGS

[0093] The accompanying drawings are incorporated in and constitute a part of this specification and, together with the description, serve to explain the principles of the present invention.

[0094] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0095] Figure 1 A flowchart of a multi-task dynamically reconfigurable parallel computing method based on a systolic array provided by the present invention;

[0096] Figure 2 It is a structural connection diagram of a multi-task dynamically reconfigurable parallel computing system based on a systolic array provided by the present invention. DETAILED DESCRIPTION

[0097] Here, exemplary embodiments will be described in detail, and the embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are only examples of methods consistent with some aspects of the present invention as detailed in the appended claims.

[0098] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0099] Example 1

[0100] See also Figure 1 As shown, the present invention provides a multi-task dynamically reconfigurable parallel computing method based on a systolic array, comprising the following steps:

[0101] Step 1: Input different task operators into different multi-functional processing units.

[0102] That is, the system assigns three operator tasks, namely convolution, matrix multiplication and activation function, to different multi-function processing (MF-PE) units, and the MF-PE units switch between operator tasks according to the current load and configuration matrix instructions.

[0103] Step 2: Optimize the operation mode selection and task allocation path of each multi-functional processing unit through the configuration matrix.

[0104] This system uses a configuration matrix to dynamically manage and control the multi-dimensional matrix structure of computing resources, which is responsible for the selection of the operation mode of each MF-PE unit and the optimization of the task allocation path. When the system is running, the configuration matrix dynamically adjusts the allocation path and operation mode of each MF-PE unit according to the task requirements and resource conditions, so as to minimize the computing overhead and data transmission delay.

[0105] Assuming that there are N multi-function processing units and M task blocks in the system, the configuration matrix can be expressed as an N×M×2 matrix, where the first dimension data C config (i,:,:) represents the task allocation and operation mode of the i-th multifunctional processing unit, and the second dimension data C config (:, j, :) represents the operation mode and path information of task j, and the third dimension data represents the allocation relationship between the processing unit and the task allocation and the corresponding path information, where C config (i, j, 1) indicates whether task j is assigned to processing unit i. If C config (i, j, 1) = 1 means yes, if C config (i, j, 1) = 0 means no. config (i, j, 2) represents the operation mode of the current processing unit. Its value 0 means that task j is not assigned to processing unit i. config (i, j, 1) = 1 means the convolution operator is currently being executed, C config (i, j, 1) = 2 means that the current matrix multiplication is executed, C config (i, j, 1) = 3 indicates that the activation function operator is currently being executed.

[0106] The configuration matrix controls the operation mode and task distribution path of each multi-function processing as follows:

[0107] 1) Operation mode control

[0108] Each element in the configuration matrix C config (i,j,2) contains the operation mode flag, such as setting a flag value in the matrix to determine the current operation mode of each MF-PE unit.

[0109] Marking rules: Set different marking values ​​to represent different operation modes, with convolution as 1, matrix multiplication as 2, and activation function as 3. The configuration matrix will dynamically update these markings according to task requirements, thereby indicating the operation mode performed by the MF-PE unit at different task stages.

[0110] Mode switching: When the task load changes, the configuration matrix will update the operation mode of the corresponding MF-PE unit, so that the MF-PE unit can adapt to the needs of the current task.

[0111] 2) Task allocation path control

[0112] Path optimization formula: Under the delay optimization formula of the transmission matrix, the transmission path of the matrix control task from one MF-PE unit to another MF-PE unit is configured so that the transmission path selection can minimize the transmission time. The specific transmission path can be expressed as:

[0113]

[0114] M trans (i,j) Transmission delay from MF-PEi to MF-PEj.

[0115] C config (i, j, 1): The selection of the marked path in the configuration matrix, where 1 indicates selection and 0 indicates non-selection.

[0116] 3) Dynamic update mechanism of configuration matrix

[0117] The system updates the configuration matrix C according to the load conditions in each task scheduling cycle config ,make sure:

[0118] Reasonable allocation of tasks: Each task can be allocated to the MF-PE unit with the lowest current load and the most suitable resources.

[0119] Optimal path selection: When transmitting tasks, the transmission path with the lowest latency is selected to achieve efficient data flow between MF-PE units.

[0120] Through this dynamic configuration mechanism, the configuration matrix controls the operation mode and task allocation path of each MF-PE unit, ensuring that the system has the best resource utilization efficiency and minimum transmission delay under different task loads.

[0121] Operation mode: Each MF-PE unit can switch between different operation modes (such as convolution, matrix multiplication, activation function, etc.). One dimension of the configuration matrix is ​​used to record and control the current operation mode of each MF-PE, and the other dimension is used to record the processing path.

[0122] Step 3: Decompose the total computing task into small computing subtasks, and assign different computing subtasks to the corresponding optimized multi-functional processing units through the task decomposition matrix.

[0123] The multifunctional processing unit switches between operator tasks according to the current load and configuration matrix instructions. The task allocation model for the task load T is as follows:

[0124] T ij =C PEi (V j )+C memi (V j )

[0125] Among them, T ij represents the total computational load assigned to the i-th multifunctional processing unit for the j-th task, C PEi (V j ) is the computational overhead of the i-th multi-function processing unit, which is determined by the resource demand supervector V j OK, C memi (V j ) is the memory usage overhead of the i-th multi-function processing unit,

[0126] Resource demand super vector V j It includes various resource requirements required by the device when running tasks, such as computing resource requirements, memory requirements, storage requirements, bandwidth requirements, and power consumption requirements, which are specifically expressed as:

[0127] V j =[w1r j1 ,w2r j2 ,...,w n r jn ]

[0128] Among them, r jk represents the demand value of device j on resource dimension k, w k represents the weight of resource dimension k, reflecting the importance of this dimension in the total demand.

[0129] This ensures that computing tasks are allocated with consideration of the device's memory resources to prevent memory bottlenecks from affecting task execution. By optimizing the configuration matrix, the system allocates each task to the corresponding multi-function processing unit with minimal overhead, specifically minimizing the total overhead through the following optimization objective function:

[0130]

[0131] Where N is the number of multi-function processing units, M is the number of tasks, and T ij represents the total computational overhead allocated to the i-th multi-function processing unit for the j-th task.

[0132] Step 4: The output results of each multifunctional processing unit are integrated step by step through a multi-stage adder, so that the calculation results of each block are combined into a complete output result. At the same time, the voltage and frequency of the system need to be adjusted in real time according to the load conditions of each multifunctional processing unit.

[0133] The multi-level aggregation module aggregates the outputs of the multi-function processing units in a layer-by-layer adder structure. The block results of the design calculation task are represented as a matrix A, where each block corresponds to a different multi-function processing unit, and the calculation results of each block are represented as A i,j The multi-level aggregation module integrates each sub-block matrix A layer by layer i,j , so that the block calculation results are accumulated layer by layer through the adder layer, and finally a complete large matrix output G is generated result , the specific implementation is as follows:

[0134]

[0135] Among them, G result Represents the final generated complete calculation result matrix, which is the output of the block calculation results of each multifunctional processing unit after being integrated by the layer-by-layer adder structure. k is the weight of the kth layer, and L is the number of aggregation layers, ensuring that the complete result is finally output based on the integration of data at each layer.

[0136] The low power management monitoring module adjusts the system voltage and frequency in real time according to the load conditions of each multi-functional processing unit, including dynamic voltage and frequency scaling (DVFS), task allocation optimization, load detection and power consumption mode switching, and other methods.

[0137] The voltage and frequency of the system are adjusted by dynamic voltage and frequency regulation, which specifically includes the following steps:

[0138] Dynamic Voltage and Frequency Scaling (DVFS) is the core part of the low power management and monitoring module. The system optimizes power consumption by adjusting the operating voltage V and frequency f of the multi-function processing unit. Power consumption P = CV 2 f

[0139] Wherein, C is the constant of the capacitive load; V is the operating voltage of the multi-function processing unit; and f is the operating frequency.

[0140] In DVFS, the system adjusts the voltage V and frequency f in real time according to the load, so that when the load is low, the voltage and frequency are reduced to save power consumption; when the load is high, the voltage and frequency are increased to ensure computing performance.

[0141] Specific implementation steps:

[0142] ① Real-time load monitoring: The system monitors the current load level of the multi-functional processing unit through sensors.

[0143] ②DVFS control strategy: Select appropriate voltage and frequency values ​​according to the load status, such as reducing frequency and voltage when the load is low to reduce dynamic power consumption.

[0144] ③ Voltage and frequency switching: The voltage and frequency adjustment of the multifunctional processing unit is realized through corresponding hardware connection, that is, different voltage connection interfaces and frequency connection interfaces are switched according to the above-mentioned different load states.

[0145] The voltage and frequency of the system are adjusted by optimizing task allocation. The system allocates high-load tasks to multi-function processing units at high voltage and frequency, and allocates low-load or short-time tasks to multi-function processing units in low power consumption mode to avoid unnecessary increase in power consumption. Specifically, the steps include:

[0146] ①Task classification: According to the computing amount of the task, the task is divided into high-load and low-load tasks according to the rated instruction number of the device. That is, when the instruction number of the current device is higher than 60% of the rated instruction number of the device, it is judged as high load, otherwise it is judged as low load. Different devices correspond to different rated instruction numbers.

[0147] ② Priority allocation: Prioritize low-load tasks to low-power multi-function processing units to reduce the frequency of use of high-power multi-function processing units.

[0148] ③ Load balancing: Ensure that the load is evenly distributed and prevent excessive use of high-power units to optimize the energy efficiency of the entire system.

[0149] The voltage and frequency of the system are adjusted by load detection and power consumption mode switching. The system analyzes the operating status of each multi-functional processing unit in real time through the load monitoring module, and dynamically switches the power consumption mode according to different load levels. The power consumption modes include: normal mode, low power consumption mode and standby mode, which specifically include the following steps:

[0150] ① Load monitoring: Monitor the real-time load of the multi-functional processing unit through hardware sensors or control units.

[0151] ②Mode selection:

[0152] Normal mode: When the multi-function processing unit is under high load, the system sets it to normal working mode.

[0153] Low power mode: When the load drops below 30% of the device's rated load, the system switches the multi-function processing unit to low power mode, reducing voltage and frequency.

[0154] Standby mode: When the system detects that the multi-function processing unit is idle for a long time, the system puts the multi-function processing unit into standby mode and only retains the most basic power supply.

[0155] ③ Dynamic switching: The system regularly checks the load of each multi-function processing unit and automatically switches its power consumption mode according to preset conditions to achieve on-demand energy saving.

[0156] The system minimizes the overall power consumption through the following objective function:

[0157]

[0158] Where N is the number of multi-function processing units in the system; Pi is the power consumption of the i-th multi-function processing unit; C i 、V i and f i are the capacitive load, operating voltage and frequency of the i-th multifunctional processing unit, respectively.

[0159] The system optimizes V i and f i value, so that the total power consumption is minimized.

[0160] Step 5: Monitor and evaluate the system's operating status in real time, and adaptively adjust task allocation and resource configuration.

[0161] The feedback and adaptive control module is responsible for real-time monitoring and evaluation of the system's operating status, and dynamically adjusts the resource allocation and operating parameters of each module according to performance requirements. This module quantifies the system's resource utilization and response time through a performance evaluation model to guide dynamic resource scheduling and power consumption management, ensuring that the system can achieve adaptive and efficient operation when the load changes. The following is a specific implementation method for performance evaluation in the feedback and adaptive control module.

[0162] The feedback control module dynamically adjusts the task allocation strategy by monitoring the system utilization and response time. The performance indicator E(t) is defined to evaluate the system configuration effect:

[0163]

[0164] Among them, w k is the weight, u k (t) represents the utilization rate of the multifunctional processing unit, which is calculated as follows:

[0165]

[0166] The actual working time k(t) refers to the total time that the k-th multi-function processing unit uses to perform computing tasks during time t.

[0167] Total available time k(t): the total time that the kth multi-function processing unit can theoretically use for task execution during this time period.

[0168] The above formula is used to calculate the utilization rate of the multi-function processing unit at the current time point. The value range is between [0,1]. The closer the utilization rate is to 1, the higher the load of the multi-function processing unit is; the closer it is to 0, the lower the load or idle state of the unit is. The specific calculation steps are as follows:

[0169] ① Monitor actual working time: Through real-time recording of task allocation and execution, the system can determine the total amount of time each multi-functional processing unit spends executing tasks within time period t. Specifically, the system records the start and end time of each task to count the actual working time within time period t.

[0170] ② Monitor the total available time: The total available time is usually preset, which means the time that the kth multi-function processing unit can perform calculations within the time period t. For example, if the monitoring duration within this period is 100ms, then the total available time of each multi-function processing unit is also 100ms.

[0171] ③ Calculate utilization rate: calculate the ratio of the monitored actual working time to the total available time to obtain the utilization rate at that moment;

[0172] When the performance index E(t) is lower than 0.3, the feedback module automatically adjusts the configuration matrix to ensure that the system can still operate efficiently when the load changes;

[0173] Adaptively adjust task allocation and resource configuration, that is, the feedback module automatically adjusts the configuration matrix. The specific implementation steps are:

[0174] ①Analyze the current load distribution:

[0175] The feedback module first analyzes the current load of all multi-functional processing units in the system, including:

[0176] High Load Units: Identify multi-function processing units with utilization rates exceeding 75% to determine if they are overloaded.

[0177] Underloaded Units: Identify multi-function processing units that are below 30% utilization or idle to determine if they can receive more tasks.

[0178] ②Optimize the task allocation strategy: According to the load distribution analysis, readjust the task allocation between the multi-functional processing units. The specific adjustment strategy is as follows:

[0179] Task offloading of high-loaded MPUs: If the utilization of some MPUs is too high, the feedback module will reallocate some of their tasks to MPUs with lower loads to achieve load balancing. This operation helps prevent a single MPU from becoming a performance bottleneck for the system.

[0180] Task allocation for low-load multi-function processing units: For multi-function processing units with low utilization, the feedback module will utilize their idle resources and assign more tasks to ensure that resources are fully utilized.

[0181] ③ Reconfiguration of operation mode: Each multi-function processing unit can switch between different operation modes (such as convolution, matrix multiplication, activation function, etc.). The feedback module will dynamically adjust the operation mode of each multi-function processing through the configuration matrix according to the specific requirements of the task and the current load of the multi-function processing unit:

[0182] Determine the priority operation mode: Based on the current task's requirements for different types of calculations (such as convolution and matrix multiplication), prioritize the required operation modes to the appropriate multi-function processing units. For example, when a task has a high demand for matrix multiplication, more multi-function processing units are configured in matrix multiplication mode.

[0183] Operation mode switching: By updating the configuration matrix, specific multi-function processing units are instructed to switch operation modes in the new task cycle to adapt to the needs of different tasks. This process can be flexibly adjusted when the task load changes to ensure the optimal configuration of system resources.

[0184] ④Transmission path optimization

[0185] The feedback module can also optimize the task transmission path between the multi-functional processing units according to the adjusted task allocation plan to reduce data transmission delay:

[0186] Path selection: In the configuration matrix, the path selection element Cconfig(i,j)C_{config}(i,j)Cconfig(i,j) represents the transmission path selection of the task from the multifunctional processing unit iii to jjj. The feedback module updates the path selection element to make the data transmission path as short as possible to minimize the transmission delay.

[0187] Dynamic path adjustment: When tasks are reallocated between multi-functional processing units, the feedback module automatically updates the transmission path to ensure that task data can be efficiently transmitted under the new configuration.

[0188] Example 2

[0189] See also Figure 2 As shown, a multi-task dynamically reconfigurable parallel computing system based on a systolic array comprises:

[0190] Multi-function processing unit: used for input of multiple task operators.

[0191] Each MF-PE unit can flexibly switch between three modes: convolution (fconv), matrix multiplication (fmatmul) and activation function (factivation). The system determines the current operation mode of the MF-PE unit based on the instructions of the configuration matrix to meet the needs of different tasks.

[0192] Configuration matrix and path optimization module: Its input end is connected to the output end of the multifunctional processing unit, and is used to dynamically adjust the operation mode and path transmission of the computing multifunctional processing unit to minimize computing delay and data transmission overhead.

[0193] Optimization mechanism: The configuration matrix automatically adjusts the transmission path according to the system load and optimizes the resource allocation of the multi-function processing unit for each task to ensure efficient data transmission.

[0194] Task decomposition and distribution module: Its input end is connected to the output end of the configuration matrix and path optimization module, and is used to decompose the computing task into small tasks so that each multifunctional processing unit can process the assigned subtasks in parallel.

[0195] Distribution mechanism: The system distributes tasks to appropriate multifunctional processing units through the task decomposition matrix, ensuring parallel execution of tasks to maximize resource utilization.

[0196] Multi-level aggregation calculation module: Its input end is connected to the output end of the task decomposition and distribution module, and is used to summarize the calculation results scattered in each multi-functional processing unit to achieve the integration of block calculations.

[0197] The multi-stage adder structure integrates the output of each multi-functional processing unit step by step, so that the block calculation results can be quickly merged into a complete output.

[0198] Low power management monitoring module: its input end is connected to the output end of the multi-level aggregation computing module, and its output end is connected to the input end of the task decomposition and distribution module, and is used for real-time monitoring and adjusting the voltage and frequency of the system according to the load conditions of the multi-functional processing unit to achieve energy-saving operation.

[0199] Control mechanism: When the load is low, unused multi-function processing units are placed in low-power mode; when the load is high, the voltage frequency is adjusted to ensure computing performance.

[0200] Feedback and adaptive control module: Its input end is connected to the output end of the multi-level aggregation calculation module, and its output end is connected to the input end of the task decomposition and distribution module, and is used to monitor the real-time load and resource utilization of the system, and adaptively adjust task allocation and resource configuration.

[0201] With feedback mechanism: The feedback module evaluates system performance indicators to ensure that resource allocation is optimal while meeting load requirements.

[0202] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention.

[0203] It should be understood that the present invention is not limited to what has been described above and that various modifications and changes may be made without departing from its scope. The scope of the present invention is limited only by the appended claims.

Claims

1. A multi-task dynamically reconfigurable parallel computing method based on a systolic array, characterized in that: The following steps are involved: Step 1: Input different task operators into different multi-functional processing units; Step 2: Optimizing the operation mode selection and task allocation path of each multifunctional processing unit by configuring the matrix; Step 3: Decompose the total computing task into small computing subtasks, and assign different computing subtasks to corresponding optimized multifunctional processing units through the task decomposition matrix; Step 4: The output results of each multifunctional processing unit are integrated step by step through a multi-stage adder, so that the calculation results of each block are combined into a complete output result. At the same time, the voltage and frequency of the system need to be adjusted in real time according to the load conditions of each multifunctional processing unit; Step 5: Monitor and evaluate the system's operating status in real time, and adaptively adjust task allocation and resource configuration.

2. The multi-task dynamically reconfigurable parallel computing method based on a systolic array according to claim 1, characterized in that: The different task operators in step 1 include: convolution, matrix multiplication and activation function.

3. The multi-task dynamically reconfigurable parallel computing method based on a systolic array according to claim 1, characterized in that: The optimization of the operation mode selection and task allocation path of each multifunctional processing unit by configuring the matrix in step 2 specifically includes: When the system is running, the configuration matrix dynamically adjusts the allocation path and operation mode of each multi-functional processing unit according to task requirements and resource conditions. Assuming that there are N multi-function processing units and M task blocks in the system, the configuration matrix can be expressed as an N×M×2 matrix, where the first dimension data C config (i,:,:) represents the task allocation and operation mode of the i-th multifunctional processing unit, and the second dimension data C config (:, j, :) represents the operation mode and path information of task j, and the third dimension data represents the allocation relationship between the processing unit and the task allocation and the corresponding path information, where C config (i, j, 1) indicates whether task j is assigned to processing unit i. If C config (i, j, 1) = 1 means yes, if C config (i, j, 1) = 0 means no, C config (i, j, 2) represents the operation mode of the current processing unit. Its value 0 means that task j is not assigned to processing unit i. config (i, j, 1) = 1 means the convolution operator is currently being executed, C config (i, j, 1) = 2 means that the current matrix multiplication is executed, C config (i, j, 1) = 3 indicates that the activation function operator is currently being executed.

4. The multi-task dynamically reconfigurable parallel computing method based on a systolic array according to claim 3, characterized in that: The configuration matrix controls the operation mode and task allocation path of each multi-function processing unit, including: Step 2.1, control of operation mode: Each element in the configuration matrix C config (i, j, 2) contains the operation mode mark, that is, the operator currently being processed. Correspondingly, the configuration matrix will dynamically update these operation mode marks according to the task requirements, thereby indicating the operation mode executed by the multifunctional processing unit at different task stages. At the same time, when the task load changes, the configuration matrix will update the operation mode of the corresponding multifunctional processing unit, so that the multifunctional processing unit can adapt to the requirements of the current task; Step 2.2: Control of task allocation path: The transmission path of the matrix control task from one multifunctional processing unit to another multifunctional processing unit is configured so that the transmission path selection can minimize the transmission time. The specific transmission path can be expressed as: Among them, M trans (i,j) represents the transmission delay from the i-th multifunctional processing unit to the j-th multifunctional processing unit, C config (i, j, 1) represents the selection of the marked path in the configuration matrix, 1 represents selection and 0 represents non-selection; Step 2.3, dynamic update mechanism of configuration matrix: The system updates the configuration matrix C according to the load conditions in each task scheduling cycle config , so that each task can be assigned to the multifunctional processing unit with the lowest current load and corresponding resources. When the task is transmitted, the transmission path with the lowest delay is selected to realize the conversion of data between multifunctional processing units.

5. The multi-task dynamically reconfigurable parallel computing method based on systolic array according to claim 1, characterized in that: In step 3, the total computing task is decomposed into small computing subtasks, and different computing subtasks are allocated to corresponding optimized multifunctional processing units through the task decomposition matrix. The specific steps include: The multifunctional processing unit switches between operator tasks according to the current load and configuration matrix instructions. The task allocation model for the task load T is as follows: T ij =C PEi (V j )+C memi (V j ) Among them, T ij represents the total computational load assigned to the i-th multifunctional processing unit for the j-th task, C PEi (V j ) is the computational overhead of the i-th multifunctional processing unit, which is determined by the resource demand supervector V j OK, C memi (V j ) is the memory usage overhead of the i-th multi-function processing unit, Resource demand super vector V j It includes various resource requirements required by the device when running tasks, such as computing resource requirements, memory requirements, storage requirements, bandwidth requirements, and power consumption requirements, which are specifically expressed as: V j =[w1r j1 ,w2r j2 ,...,w n r jn ] Among them, r jk represents the demand value of device j on resource dimension k, w k represents the weight of resource dimension k, reflecting the importance of this dimension in the total demand. By optimizing the configuration matrix, the system allocates each task to the corresponding multi-function processing unit with the minimum overhead, specifically minimizing the total overhead through the following optimization objective function: Where N is the number of multi-function processing units, M is the number of tasks, and T ij represents the total computational overhead allocated to the i-th multi-function processing unit for the j-th task.

6. The multi-task dynamically reconfigurable parallel computing method based on a systolic array according to claim 1, characterized in that: The specific steps in step 4 to integrate the output results of each multifunctional processing unit step by step through a multi-stage adder so as to merge the calculation results of each block into a complete output result are: The block calculation results of the design calculation task are expressed as matrix A, where each block corresponds to a different multi-functional processing unit, and its block calculation results are expressed as A i,j , the multi-level adder integrates each sub-block matrix A layer by layer i,j , so that the block calculation results are accumulated layer by layer through the adder layer, and finally a complete large matrix output G is generated result , the specific implementation is as follows: Among them, G result represents the final generated complete calculation result matrix, which is the output of the block calculation results of each multifunctional processing unit after being integrated by the layer-by-layer adder structure. k is the weight of the kth layer, and L is the number of aggregation layers, ensuring that the final complete result is output based on the integration of data at each layer.

7. The multi-task dynamically reconfigurable parallel computing method based on systolic array according to claim 1, characterized in that: The method of adjusting the voltage and frequency of the system in real time according to the load conditions of each multifunctional processing unit in step 4 includes: dynamic voltage and frequency adjustment, task allocation optimization, load detection and power consumption mode switching; The voltage and frequency of the system are adjusted by dynamic voltage and frequency regulation, which specifically includes the following steps: The system optimizes power consumption by adjusting the operating voltage V and frequency f of the multi-function processing unit. Power consumption P = CV 2 f Where C is the constant of the capacitive load; V is the operating voltage of the multi-function processing unit; f is the operating frequency, The system will adjust the voltage V and frequency f in real time according to the load so that the voltage and frequency are reduced when the load is low. This is achieved through the following steps: First, real-time load monitoring: The system monitors the current load level of the multi-functional processing unit through sensors. Secondly, through the dynamic voltage and frequency adjustment control strategy: select the voltage and frequency values ​​according to the load state, for example, reduce the frequency and voltage when the load is low, reduce dynamic power consumption, Finally, switch the voltage and frequency: adjust the voltage and frequency of the multi-function processing unit through corresponding hardware connections; The voltage and frequency of the system are adjusted by optimizing task allocation. The system allocates high-load tasks to multi-function processing units at high voltage and frequency, and allocates low-load or short-time tasks to multi-function processing units in low power consumption mode. Specifically, the steps include: First, classify the tasks: according to the amount of calculation, divide the tasks into high-load and low-load tasks according to the rated number of instructions of the equipment. Secondly, priority allocation: prioritize low-load tasks to low-power multi-function processing units, and reduce the frequency of use of high-power multi-function processing units. Finally, ensure that the load is evenly distributed; The voltage and frequency of the system are adjusted by load detection and power consumption mode switching. The system analyzes the operating status of each multi-functional processing unit in real time through the load monitoring module, and dynamically switches the power consumption mode according to different load levels. The power consumption modes include: normal mode, low power consumption mode and standby mode, which specifically include the following steps: First, load monitoring is performed: the real-time load of the multi-functional processing unit is monitored through hardware sensors or control units. Secondly, select the power consumption mode: When the multi-function processing unit is under high load, the system sets it to normal working mode. When the load drops below 30% of the device's rated load, the system switches the multi-function processing unit to low-power mode, reducing voltage and frequency. When the system detects that the multi-function processing unit is idle for a long time, the system puts the multi-function processing unit into standby mode and only retains the most basic power supply; Finally, dynamic switching is performed: the system regularly checks the load of each multi-function processing unit and automatically switches its power consumption mode according to preset conditions to achieve energy saving on demand; The system minimizes the overall power consumption through the following objective function: Where N is the number of multi-function processing units in the system; Pi is the power consumption of the i-th multi-function processing unit; C i 、V i and f i are the capacitive load, operating voltage and frequency of the i-th multifunctional processing unit, respectively. The system optimizes V i and f i value, so that the total power consumption is minimized.

8. The multi-task dynamically reconfigurable parallel computing method based on systolic array according to claim 1, characterized in that: In step 5, real-time monitoring and evaluation of the system's operating status and adaptive adjustment of task allocation and resource allocation specifically include: The steps to implement real-time monitoring and evaluation of the system's operating status are: Define the performance indicator E(t) to evaluate the system configuration effect: Among them, w k is the weight, u k (t) represents the utilization rate of the multifunctional processing unit, which is calculated as follows: The actual working time k(t) refers to the total time that the k-th multi-function processing unit uses to perform computing tasks during time t. Total available time k(t): the total time that the kth multi-function processing unit can theoretically use for task execution during this time period. The above formula is used to calculate the utilization of the multi-function processing unit at the current time point. The value range is between [0,1]. The closer the utilization is to 1, the higher the load of the multi-function processing unit is; the closer it is to 0, the lower the load or idle state of the unit is. The specific calculation steps are as follows: First, monitor the actual working time: through the real-time recording of task allocation and execution, the system can determine the total amount of time each multi-functional processing unit spends executing tasks in time period t. Secondly, monitor the total available time: The total available time is usually preset, which means the time during which the k-th multi-function processing unit can perform calculations in time period t. Finally, calculate the utilization rate: calculate the ratio of the monitored actual working time to the total available time to obtain the utilization rate at that moment; When the performance index E(t) is lower than 0.3, the feedback module automatically adjusts the configuration matrix to ensure that the system can still operate efficiently when the load changes; Adaptively adjust task allocation and resource configuration, that is, the feedback module automatically adjusts the configuration matrix. The specific implementation steps are: First, analyze the current load distribution; Secondly, optimize the task allocation strategy: according to the load distribution analysis, readjust the task allocation between the multi-functional processing units. Third, reconfigure the operation mode: according to the task requirements and the current load of the multi-function processing unit, dynamically adjust the operation mode of each multi-function processing unit through the configuration matrix. Finally, optimization of the transmission path: According to the adjusted task allocation plan, the transmission path of tasks between multifunctional processing units is optimized to reduce data transmission delay.

9. The multi-task dynamically reconfigurable parallel computing method based on systolic array according to claim 8, characterized in that: The operation mode includes executing respectively: convolution, matrix multiplication and activation function operators.

10. A multi-task dynamically reconfigurable parallel computing system based on a systolic array, characterized in that: include: Multifunctional processing unit for input of multiple task operators, A configuration matrix and path optimization module, whose input end is connected to the output end of the multifunctional processing unit, is used to dynamically adjust the operation mode and path transmission of the computing unit to minimize the computing delay and data transmission overhead, A task decomposition and distribution module, whose input end is connected to the output end of the configuration matrix and the path optimization module, is used to decompose the computing task into small tasks so that each multifunctional processing unit can process the assigned subtasks in parallel. A multi-level aggregation calculation module, whose input end is connected to the output end of the task decomposition and distribution module, is used to aggregate the calculation results scattered in each multifunctional processing unit to achieve the integration of block calculations. A low power management monitoring module, whose input end is connected to the output end of the multi-level aggregation computing module, and whose output end is connected to the input end of the task decomposition and distribution module, is used for real-time monitoring and adjusting the voltage and frequency of the system according to the load conditions of the multi-functional processing unit. A feedback and adaptive control module, whose input end is connected to the output end of the multi-level aggregation calculation module, and whose output end is connected to the input end of the task decomposition and distribution module, is used to monitor the real-time load and resource utilization of the system and adaptively adjust task allocation and resource configuration.

Images