Shift register data transmission method and device based on multiplexer

Abstract

The invention relates to a shift register data transmission method and device based on a multiplexer, and the method comprises the steps: obtaining RGB data through an external interface, and carrying out the initialization configuration of a shift register. After initialization is completed, RGB data are gradually transmitted to the corresponding MUX channels in the shift register, each MUX channel corresponds to one latch circuit, and data transmission is carried out with MUX as a unit. In the data transmission process, the data of each MUX channel is latched, the data output by the latch circuit is corrected and adjusted through the source buffer, and finally the corrected data is output to a target display screen. In this way, the data transmission and latching process is optimized, the number of latching circuits is reduced, and the chip area and the production cost are effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a shift register data transmission method and device based on a multiplexer. Background Art

[0002] In traditional LCD LTPS (low temperature polysilicon) display drivers, the multiplexer structure transmits signals to individual channels on the glass. Data is transmitted and latched in units of each line through a shift register. Specifically, RGB data passes through a shift register and is output to the display image through a source buffer. The time unit of each line in this process is used to latch the data. Although this method is simple, it has significant problems: 1. A large number of latch circuits: Each line requires a latch circuit to store data. If the resolution of the LCD is higher, the number of lines will increase, thus requiring more latch circuits. The increase in latch circuits not only occupies the chip area, but also leads to an increase in production costs.

[0003] 2. Size and cost issues: In order to store a large amount of data, a large number of latch circuits need to be arranged on the chip, which will occupy most of the chip area and increase the manufacturing cost. For example, assuming that the number of multiplexers is 24 channels, the traditional data latch method requires 72 latches.

[0004] In summary, for traditional LCD LTPS display drivers, data is transmitted and latched in units of each line, resulting in the need for a large number of latch circuits at high resolutions, thereby increasing chip area and production costs, and there is currently no solution. Summary of the invention

[0005] The main purpose of the present invention is to provide a multiplexer-based shift register data transmission method and device to solve the technical problem that in traditional LCD LTPS display driving, data is transmitted and latched in units of each line, resulting in a large number of latch circuits required at high resolution, thereby increasing chip area and production cost.

[0006] To achieve the above-mentioned purpose, the present invention provides a shift register data transmission method based on a multiplexer, comprising the following steps: obtaining RGB data through an external interface and initializing the shift register; after the shift register completes the initialization configuration, gradually transmitting the RGB data to the corresponding MUX channels in the shift register, and performing data transmission in units of MUX; latching the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; correcting and adjusting the data output by each latch circuit using a source buffer, and outputting the corrected and adjusted data to a target display screen.

[0007] The present invention also provides a shift register data transmission device based on a multiplexer, comprising: an initialization processing unit, used to obtain RGB data through an external interface and initialize the shift register; a transmission unit, used to gradually transmit the RGB data to the corresponding MUX channels in the shift register after the shift register completes the initialization configuration, and perform data transmission in units of MUX; a latch unit, used to latch the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; an output unit, used to correct and adjust the data output by each latch circuit using a source buffer, and output the corrected and adjusted data to a target display screen.

[0008] The present invention also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any one of the above methods when executing the computer program.

[0009] The present invention also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of any of the above-mentioned methods are implemented.

[0010] The present invention provides a multiplexer-based shift register data transmission method and device, which obtains RGB data through an external interface and initializes the shift register. After the initialization is completed, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, each MUX channel corresponds to a latch circuit, and data transmission is performed in units of MUX. During the data transmission process, the data of each MUX channel is latched, and the data output by the latch circuit is corrected and adjusted through the source buffer, and finally the corrected data is output to the target display screen. In this way, the present invention not only optimizes the data transmission and latching process, but also reduces the number of latch circuits, effectively reducing the chip area and production cost.

[0011] In summary, the present invention simplifies the data transmission and latch circuit design in high-resolution display driving by introducing a multiplexer, effectively solves the chip area and cost problems in traditional methods, and has significant technical advantages and practical application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a schematic diagram of the steps of a shift register data transmission method based on a multiplexer in one embodiment of the present invention; Figure 2 is a schematic diagram of a traditional STP transmission direction in one embodiment of the present invention; Figure 3This is a schematic diagram of the STP transmission direction based on the multiplexer in one embodiment of the present invention. Figure 1 ; Figure 4 This is a schematic diagram of the STP transmission direction based on the multiplexer in one embodiment of the present invention. Figure 2 ; Figure 5 It is a structural block diagram of a shift register data transmission device based on a multiplexer in one embodiment of the present invention; Figure 6 It is a schematic block diagram of the structure of a computer device according to an embodiment of the present invention.

[0013] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0014] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0015] Reference Figure 1 The embodiment of the present invention provides a shift register data transmission method based on a multiplexer, comprising the following steps: S1, obtain RGB data through the external interface and initialize the shift register; S2, after the shift register completes the initialization configuration, the RGB data is gradually transferred to the corresponding MUX channel in the shift register, and the data is transmitted in units of MUX; S3, latching the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; S4, using the source buffer to correct and adjust the data output by each latch circuit, and output the corrected and adjusted data to the target display screen.

[0016] In traditional LCD LTPS display drivers, data transmission and latching are usually performed on a per-line basis, which requires each line to be equipped with a latch circuit. As the LCD resolution increases, the number of lines increases, resulting in the need for more latch circuits, which not only occupies the chip area but also significantly increases the production cost. In order to solve this problem, the present invention proposes a shift register data transmission method based on a multiplexer (MUX), which reduces the chip area and reduces the cost by reducing the number of latch circuits.

[0017] In this technical solution, RGB data is first obtained through an external interface, and the shift register is initialized. After initialization, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, and each MUX channel serves as a unit of data transmission. This design changes the traditional data transmission method based on lines, and transmits it in units of MUX, so that each MUX channel only needs one latch circuit to store the transmitted data. In this way, the efficiency of data transmission and latching is significantly improved, especially in the case of high resolution, the number of latch circuits is reduced, thereby reducing the area of ​​the chip.

[0018] Furthermore, after the data is transmitted to each MUX channel, the data will be latched by the corresponding latch circuit. At this point, the data of each MUX channel is not only precisely controlled in time, but also effectively stored through the latch circuit, laying the foundation for subsequent data processing. Next, the data output by these latch circuits is corrected and adjusted through the source buffer to ensure the accuracy and consistency of the data when it is transmitted to the target display screen. The correction and adjustment of this process further optimizes the display effect, so that the quality of the final output image is improved.

[0019] The key to this solution is to perform data transmission and latching in units of MUX. This innovation greatly reduces the number of latch circuits. Compared with the traditional method, the number of latches is reduced by 3 times, and the occupied area is reduced to one-third of the original. This not only reduces the manufacturing cost of the chip, but also frees up the area of ​​the chip, which can be used for the layout of other functional circuits, such as strengthening the wiring of power lines or integrating additional ESD circuits to improve the overall performance of the chip. Through this improvement, the present invention effectively solves the problem of excessive area occupied by latch circuits at high resolution, and achieves the improvement of display drive efficiency and image quality while reducing chip area and cost.

[0020] In one example, the shift register is initialized, including: determining the resolution of the target display screen, and determining the number of pixels in each row and column on the target display screen based on the resolution; determining the number of MUX channels based on the number of pixels in each row and column on the target display screen; based on the number of MUX channels, re-dividing the storage unit of the shift register into areas equal to the number of MUX channels, and allocating the divided areas to multiple MUX channels in turn, so that each MUX channel has an independent storage area.

[0021] In this example, the initialization of the shift register is mainly to adapt to the resolution requirements of the target display screen and determine the appropriate number of MUX channels based on the resolution, thereby optimizing data transmission and storage efficiency. This initialization process can be divided into the following key steps: First, the system determines the resolution of the target display screen, that is, the number of pixels per row and column on the screen. Resolution is an important parameter that affects data transmission and display quality, so this information must be determined first during initialization. For example, assuming the screen resolution is 1920x1080, there are 1920 pixels per row and 1080 pixels per column.

[0022] Next, based on the number of pixels per row and column, calculate how many MUX channels are needed to transmit this data. The number of MUX channels is usually determined by the resolution of the screen and the capacity of the shift register. For example, if a MUX channel can handle a certain amount of pixel data, then these pixel data need to be reasonably distributed to different MUX channels to ensure effective transmission and storage of data.

[0023] Then, based on the determined number of MUX channels, the storage cells of the shift register are re-divided. The purpose of this step is to allocate independent storage areas for each MUX channel to ensure that the data of each channel can be stored and transmitted independently. Specifically, the storage cells of the shift register will be divided into multiple areas, each corresponding to a MUX channel. For example, if the calculated number of MUX channels is 24, then the storage cells of the shift register will be divided into 24 areas, each of which is allocated to a MUX channel.

[0024] Finally, the system will allocate these divided areas to different MUX channels in turn to ensure that each channel has independent storage space. The advantage of this is that it can avoid interference between different channels during data transmission and improve the efficiency and accuracy of data transmission. In addition, in this way, the storage area of ​​each MUX channel can be fully utilized, further optimizing the efficiency of chip use.

[0025] In summary, the core of this initialization process is to reasonably determine the number of MUX channels according to the resolution of the target display screen, and scientifically divide the storage units of the shift register to ensure that each MUX channel has an independent storage area. This method not only improves the efficiency of data transmission, but also reduces circuit complexity, which helps to reduce the manufacturing cost of the chip.

[0026] In one example, after determining the number of MUX channels based on the number of pixels in each row and column on the target display screen, the shift register data transmission method further includes: allocating a pixel set to each MUX channel based on the number of pixels in each row and column on the target display screen and the number of MUX channels, wherein the MUX channel is used to process data content corresponding to the allocated pixel set.

[0027] In this example, after determining the resolution of the target display screen and the corresponding number of MUX channels, it is necessary to further allocate a specific pixel set to each MUX channel to ensure that each channel can effectively process and transmit the allocated pixel data. This process can be understood as classifying and grouping the pixel data on the screen and assigning the grouped data to different MUX channels for processing.

[0028] The specific steps are as follows: First, according to the number of pixels in each row and column of the target display screen and the number of MUX channels determined, calculate the number of pixels that each MUX channel needs to process. For example, if the resolution of the display screen is 1920x1080, and 24 MUX channels are determined, each MUX channel will be responsible for processing approximately 45 rows of pixel data (assuming that each row has 1920 pixels, each channel processes approximately 86400 pixels).

[0029] Next, the pixel data of the entire screen is divided into rows and columns to form multiple pixel sets. Each pixel set contains a certain number of pixels, and these pixels belong to different parts of the screen. For example, suppose the screen is divided into 24 areas, and the pixels in each area constitute a pixel set. In this way, the pixel data of the screen is divided into 24 independent sets, and the number of pixels in each set is roughly equal, so that they can be evenly distributed to each MUX channel.

[0030] These pixel sets are then assigned to various MUX channels. Each MUX channel is responsible for processing a specific pixel set, which means that the channel will process the data content corresponding to these pixels. For example, MUX channel 1 may be responsible for processing a portion of the pixels in the upper left corner of the screen, MUX channel 2 is responsible for the pixels in the middle left part of the screen, and so on, until all pixel sets are assigned.

[0031] In actual operation, each MUX channel receives the data content corresponding to its assigned pixel set, and then transmits, latches and finally displays the data content on the screen. This allocation method makes the data transmission process more efficient and avoids data conflicts between different channels. Since each MUX channel only needs to process the data of its assigned pixel set, this greatly simplifies the management of data transmission and optimizes the performance of the display driver.

[0032] In summary, the core of this process is to group the pixel data of the display screen reasonably and assign these grouped pixel sets to different MUX channels. In this way, each MUX channel can efficiently process and transmit the pixel data content it is responsible for, thereby achieving fast and accurate image display.

[0033] In one example, after each MUX channel has an independent storage area, the shift register data transmission method also includes: recalculating the frequency of the clock signal of the shift register according to the number of MUX channels, matching a time unit for each MUX channel, so that the shift register performs data transmission based on the time unit; reconfiguring the start pulse and reset signal of the shift register, wherein the reconfigured start pulse is used to trigger the reset of the shift register, so that the shift register and the MUX channel enter the initial state synchronously, and at the same time, the reconfigured reset signal is used to trigger the state clearing of the shift register to prevent the residual data of the previous data cycle from affecting the current data transmission.

[0034] In this example, further optimization of the shift register data transfer method involves adjusting the clock signal frequency and reconfiguring the start pulse and reset signal. The purpose of these steps is to ensure that the shift register and MUX channel can efficiently and synchronously transfer data while preventing the residual data of the previous data cycle from affecting the data processing of the current cycle. The following is a detailed explanation of these steps: First, after each MUX channel is assigned an independent storage area, the system needs to recalculate the clock signal frequency of the shift register according to the number of MUX channels. The frequency of the clock signal directly affects the speed and efficiency of data transmission. Specifically, the clock frequency must match the number of MUX channels and the refresh requirements of the display screen to ensure that each MUX channel can complete data processing within the specified time. To this end, the system will match a suitable time unit for each MUX channel, which represents the basic time interval for data transmission and processing in the channel. By adjusting the frequency of the clock signal, the shift register can synchronously transfer data to each MUX channel within the appropriate time unit.

[0035] Next, the system reconfigures the start pulse and reset signal of the shift register. The start pulse is an important signal for the shift register to start working, which determines the starting point of data transmission. Through reconfiguration, the start pulse not only starts data transmission, but also triggers the reset operation of the shift register, so that the shift register and the MUX channel enter the initial state synchronously. In this way, each data transmission cycle will start from a consistent and clean starting point, avoiding timing confusion or asynchrony problems.

[0036] At the same time, the reset signal is also reconfigured. The reset signal is reconfigured to trigger the state clearing of the shift register at the end of each data transmission cycle. This step is very important because if the data remnants of the previous cycle are not cleared, data confusion or errors may occur, affecting the accuracy of the current data transmission. By reconfiguring the reset signal, it is ensured that all states and data in the shift register are cleared before the start of a new data cycle, thereby providing a clean operating environment for the new data transmission cycle.

[0037] In summary, the method in this example achieves efficient synchronization between the shift register and the MUX channel by recalculating the clock signal frequency, matching the time unit for the MUX channel, and reconfiguring the start pulse and reset signal. This design not only improves the accuracy and efficiency of data transmission, but also effectively avoids the impact of residual data from the previous data cycle on the current cycle, ensuring the stability and quality of the displayed image.

[0038] In one example, RGB data is gradually transferred to the corresponding MUX channels in the shift register, and data transmission is performed in units of MUX, including: each time RGB data is received, based on a start pulse and a reset signal, each MUX channel is started to perform a reset process in sequence so that subsequent data starts from a unified starting point; and, according to the advancement of a clock signal, a pixel set is allocated based on each MUX channel, and the RGB data is transmitted to each MUX channel.

[0039] In this example, the transmission process of RGB data is carried out step by step through the MUX channels in the shift register, ensuring that each MUX channel starts data processing at the same starting point, thereby improving the accuracy and efficiency of data transmission. The following is a detailed explanation of this process: First, when the shift register receives RGB data, the system starts the reset process of each MUX channel based on the start pulse and reset signal. The role of the start pulse and reset signal is to ensure that all MUX channels are in the same initial state at the beginning of data transmission. Specifically, the start pulse is used to trigger the start of the shift register, while the reset signal is responsible for clearing the state of all MUX channels so that the previous data no longer affects the current transmission. Through this process, all MUX channels receive and process data from a unified and clean starting point, avoiding the problem of inconsistent timing or data confusion.

[0040] Next, after each RGB data is received, the system will gradually transfer the data to each MUX channel according to the advancement of the clock signal. The clock signal plays a synchronization role here, ensuring that the data is transmitted in an orderly manner according to the predetermined time interval. Since each MUX channel has been assigned a specific set of pixels, the RGB data will be accurately transmitted to the corresponding MUX channel according to the allocation of these pixel sets. For example, MUX channel 1 may be responsible for processing a set of pixel data in the upper left corner of the screen, MUX channel 2 is responsible for the pixel data in the middle left part of the screen, and so on.

[0041] This process ensures that the RGB data can enter each MUX channel in an orderly manner according to the predetermined order and time node during transmission, and the data received by each MUX channel can be processed from the same initial state. In this way, not only the accuracy and consistency of data transmission are guaranteed, but also the quality and efficiency of image display are improved. By transmitting data in MUX units, the system can better control the flow of data and reduce image distortion or flickering caused by timing problems or data conflicts.

[0042] In summary, in this example, the transmission of RGB data is achieved through precise timing control and channel reset mechanism. Every time RGB data is received, the system starts the reset process of the MUX channel, so that the data starts from a unified starting point, and then transmits the data to each MUX channel according to the advancement of the clock signal. This method effectively improves the stability of data transmission and the quality of image display.

[0043] In one example, the data transmitted to each MUX channel is latched, including: transmitting the data of each MUX channel to the first latch in the latch circuit corresponding to the MUX channel; according to the advancement of the clock signal, the data in each latch circuit is transmitted and latched in sequence according to the connection order of multiple latches in the latch circuit.

[0044] In this example, the process of latching the data transmitted to each MUX channel mainly involves transferring the data from the MUX channel to its corresponding latch circuit, and then gradually transferring and latching it in the latch circuit to ensure the correct storage and subsequent output of the data. The following is a detailed explanation of this process: First, after receiving the data, each MUX channel will transfer the data to the first latch in its corresponding latch circuit. The latch circuit can be understood as a sequence of multiple latches, each of which can temporarily store a certain amount of data. The process of transferring data to the first latch is similar to the initial storage of data, ensuring that the data of each MUX channel has a fixed storage location, ready for further processing.

[0045] Next, the advancement of the clock signal plays a key role in this process. The clock signal controls the order in which data is transferred in the latch circuit by generating a series of synchronization pulses. With each advancement of the clock signal, the data in the first latch will be transferred to the next latch in the order of connection in the latch circuit. This step-by-step data transmission and latching process ensures that each piece of data can be stored in a predetermined order, and data will not be lost or confused due to timing problems.

[0046] For example, suppose the latch circuit corresponding to a certain MUX channel consists of three latches. When the first latch receives data, the first advance of the clock signal triggers the first latch to pass the data to the second latch. Then, with the second advance of the clock signal, the second latch passes the data to the third latch, and so on. In this way, the data will be gradually transferred and stored in the latch circuit according to the rhythm of the clock signal.

[0047] This latching mechanism helps ensure that data can be stably stored in the correct location at different times, thus laying the foundation for subsequent data processing and display. By controlling the sequential transmission of data in the latch circuit, the system can avoid data conflicts or confusion, ensuring that the image signal can be output to the display screen in time and order. This method is particularly suitable for high-resolution displays, and can effectively improve the performance and display effect of the system when the data volume is large and the processing speed is high.

[0048] In summary, in this example, the core of latching the data transmitted to each MUX channel is to use the latch circuit and clock signal to orderly transmit and store the data in multiple latches. This method not only ensures the integrity of the data and the consistency of the timing, but also provides a reliable foundation for subsequent image display.

[0049] In one example, a source buffer is used to correct and adjust the data output by each latch circuit, and the corrected and adjusted data is output to a target display screen, including: using a source buffer to receive the data output by each latch circuit, and performing stabilization processing and synchronization calibration processing on the data, wherein the stabilization processing at least includes: filtering out instantaneous interference and noise; using a color correction algorithm built into the source buffer, and adjusting the data for color difference according to pre-set correction parameters to compensate for color deviation caused by the manufacturing process; obtaining a temperature detection value of the target display screen, and performing temperature compensation processing on the data after color difference adjustment based on the temperature detection value; performing gamma-corrected nonlinear mapping processing on the temperature-compensated data according to a gamma curve built into the source buffer; converting the gamma-corrected data into corresponding analog voltage signals, and enhancing the linearity of the analog voltage signals to obtain output signals corresponding to each pixel; and sending the output signals to each pixel of the target display screen so that the target display screen performs picture presentation processing based on the received output signals.

[0050] In this example, the source buffer is used to correct and adjust the data output by each latch circuit, mainly to ensure that the image quality finally output to the target display screen reaches the best effect. This process involves a series of steps, including data reception, stabilization processing, color correction, temperature compensation, gamma correction, and the output of the final signal. The following is a detailed explanation of this process: First, the source buffer receives data from each latch circuit. These data may be affected by external interference or noise during transmission, so the source buffer will first perform stabilization processing. The core task of stabilization processing is to filter out instantaneous interference and noise. This can be achieved by applying a filtering algorithm during data transmission to remove noise components that may cause image instability and ensure the purity of the data.

[0051] Next, the source buffer uses a built-in color correction algorithm to adjust the data for color differences. Due to differences in manufacturing processes, the display screen may have color deviations, such as some colors appearing too strong or dim. By applying pre-set correction parameters, the source buffer can adjust these deviations based on actual conditions, making the final displayed color more accurate and natural. This step is very critical because it directly affects the authenticity and consistency of the image color seen by the user.

[0052] After color correction, the source buffer also performs temperature compensation on the data. The temperature of the display screen will affect the color performance. For example, high temperature may cause the color to be warmer, while low temperature may cause the color to be cooler. To address this problem, the source buffer obtains the temperature detection values ​​of the target display screen and further compensates the data that has been adjusted for color difference based on these values. In this way, the display screen can maintain color accuracy regardless of the temperature.

[0053] Next, the source buffer performs nonlinear gamma mapping on the data. Gamma correction is a common image processing technique used to adjust the brightness and contrast of an image to make it more consistent with the perception characteristics of the human eye. Through gamma correction, the light and dark levels of the image will be more distinct, and the details will be richer. The source buffer uses the built-in gamma curve to perform nonlinear mapping on the data, so that the brightness and contrast of the image are more natural and reasonable when it is finally displayed.

[0054] Finally, the gamma-corrected data is converted into corresponding analog voltage signals. These signals are key to driving each pixel of the display screen. To ensure that each pixel accurately reflects the data, the source buffer enhances the linearity of the analog voltage signal. This step ensures a more linear relationship between the voltage signal and the pixel brightness, thus avoiding image distortion or uneven brightness.

[0055] After this series of processing, the output signal is sent to each pixel of the target display screen. Each pixel will perform image presentation processing based on the received output signal, and finally form a clear, accurate and colorful image on the screen. This process not only ensures the stability and accuracy of image quality, but also can adapt to different temperature environments and manufacturing process differences, providing users with the best visual experience.

[0056] In general, this application proposes a technical solution for transmitting data in a multiplexer (MUX) unit in a source channel for 3D printing, aiming to optimize the data transmission and latching process in an LCD 3D printer. Specifically, in a MUX circuit of an LCD low-temperature polysilicon (LTPS) structure, a signal is transmitted to a channel on the glass through a source driver of a DDIC, and RGB data is transmitted through a shift register with each line as a time unit, and then latched into a corresponding latch, and finally output to a display screen through a source buffer to generate an image.

[0057] However, in traditional technologies, such as Figure 2As shown, the data transmission of the shift register is latched in line units, which requires a large number of latch circuits to store data. If the resolution of the LCD is higher, the number of latches required is more, which will not only occupy a large area of ​​the chip, but also significantly increase the cost. For example, in the multiplexer 3 (MUX3) data latch diagram, it is assumed that the number of channels is 24, the start pulse (AS_LT_STP) is reset once during each data transmission, and the data transmission is arranged in order as MUX1, MUX2, and MUX3, and finally the data is transmitted to each channel in sequence through the clock signal (AS_LT_CLK). Under the traditional method, 72 latches are required to complete data storage, which leads to a large occupation of chip area.

[0058] In view of the above defects, the present application proposes an improved MUX type shift register (STREG) structure, such as Figure 3 As shown, the unit of data transmission is switched from line to MUX. Specifically, when transmitting data in MUX units, this scheme also uses the start pulse (AS_LT_STP) for reset, and the data is arranged in order as MUX1, MUX2, and MUX3. The data is transmitted to the channel in sequence through the clock signal (AS_LT_CLK), and finally output to the display screen through the source buffer. In this structure, although 72 pieces of data still need to be transmitted, due to the use of MUX-based transmission, only 27 latches are needed to complete the data storage. Compared with the traditional method, the chip area is reduced to one third of the original.

[0059] In order to achieve accurate data transmission and output, this application also proposes a supplementary solution, namely Figure 4 As shown in the figure, when data is passed to the output, it is first passed to the first latch (latch1) in sequence, then passed to the second latch (latch2) according to the specific address requirements, and finally output through the source buffer. Therefore, the latched data of each MUX will actually become the MUX data at the next time point. This design effectively reduces the number of latches used, thereby saving chip area.

[0060] The key innovations of this technical solution are: 1. Switching the time unit of data transmission from line to MUX. This conversion not only reduces the number of latches, but also effectively reduces the chip area, thereby reducing production costs; 2. When the resolution is high and the number of MUXs is large, the data transmission method using MUX as the unit can significantly save area, and the freed space can be used for other circuits or to enhance the wiring of power lines.

[0061] Compared with traditional technologies, the embodiments of the present application have achieved significant technical progress in terms of chip area utilization, production cost control, and circuit design flexibility, etc. This not only brings higher efficiency and lower cost to 3D printing technology, but also provides new ideas and references for circuit design in related fields.

[0062] like Figure 5 As shown, an embodiment of the present invention further provides a shift register data transmission device based on a multiplexer, comprising: Initialization processing unit 1, used for acquiring RGB data through an external interface and performing initialization processing on a shift register; Transmission unit 2 is used to gradually transmit the RGB data to the corresponding MUX channels in the shift register after the shift register completes the initialization configuration, and perform data transmission in units of MUX; A latch unit 3, used for latching the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; The output unit 4 is used to correct and adjust the data output by each latch circuit using a source buffer, and output the corrected and adjusted data to a target display screen.

[0063] In this embodiment, for the specific implementation of each unit in the above device embodiment, please refer to the above method embodiment, which will not be described in detail here.

[0064] Reference Figure 6 In an embodiment of the present invention, a computer device is also provided. The computer device may be a server, and its internal structure may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface and a database connected through a system bus. Among them, the processor designed by the computer is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.

[0065] Those skilled in the art will understand that Figure 6 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.

[0066] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the above method is implemented. It can be understood that the computer-readable storage medium in this embodiment can be a volatile readable storage medium or a non-volatile readable storage medium.

[0067] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media provided by the present invention and used in the embodiments may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double-speed data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM.

[0068] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, device, article or method including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, device, article or method. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the presence of other identical elements in the process, device, article or method including the element.

[0069] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A shift register data transmission method based on a multiplexer, characterized in that: The following steps are involved: Obtain RGB data through the external interface and initialize the shift register; After the shift register completes the initialization configuration, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, and data transmission is performed in units of MUX; Latching the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; The source buffer is used to correct and adjust the data output by each latch circuit, and the corrected and adjusted data is output to the target display screen.

2. The shift register data transmission method according to claim 1, characterized in that: Initialize the shift register, including: Determining a resolution of the target display screen, and determining the number of pixels in each row and column on the target display screen based on the resolution; Determining the number of MUX channels according to the number of pixels in each row and column on the target display screen; Based on the number of the MUX channels, the storage unit of the shift register is re-divided into regions of the same number as the MUX channels, and the divided regions are sequentially allocated to the multiple MUX channels, so that each of the MUX channels has an independent storage region.

3. The shift register data transmission method according to claim 2, characterized in that: After determining the number of MUX channels according to the number of pixels in each row and column on the target display screen, the shift register data transmission method further includes: According to the number of pixels in each row and column on the target display screen and the number of MUX channels, a pixel set is allocated to each MUX channel, wherein the MUX channel is used to process data content corresponding to the allocated pixel set.

4. The shift register data transmission method according to claim 3, characterized in that: After each of the MUX channels has an independent storage area, the shift register data transmission method further includes: Recalculating the frequency of the clock signal of the shift register according to the number of the MUX channels, and matching a time unit for each MUX channel so that the shift register performs data transmission based on the time unit; The start pulse and reset signal of the shift register are reconfigured, wherein the reconfigured start pulse is used to trigger the reset of the shift register, so that the shift register and the MUX channel enter the initial state synchronously, and at the same time, the reconfigured reset signal is used to trigger the state clearing of the shift register to prevent the residual data of the previous data cycle from affecting the current data transmission.

5. The shift register data transmission method according to claim 4, characterized in that: The RGB data is gradually transmitted to the corresponding MUX channel in the shift register, and data transmission is performed in units of MUX, including: Each time the RGB data is received, based on the start pulse and the reset signal, each MUX channel is started to perform a reset process in sequence, so that subsequent data starts from a unified starting point; and According to the advancement of the clock signal, pixel sets are allocated based on each MUX channel, and the RGB data is transmitted to each MUX channel.

6. The shift register data transmission method according to claim 5, characterized in that: The data transmitted to each MUX channel is latched, including: Transmitting the data of each of the MUX channels to the first latch in the latch circuit corresponding to the MUX channel; According to the advancement of the clock signal, the data in each of the latch circuits is sequentially transferred and latched according to the connection sequence of the multiple latches in the latch circuit.

7. The shift register data transmission method according to claim 6, characterized in that: The source buffer is used to correct and adjust the data output by each latch circuit, and the corrected and adjusted data is output to the target display screen, including: A source buffer is used to receive data output by each latch circuit, and the data is stabilized and synchronized and calibrated, wherein the stabilization process at least includes: filtering out instantaneous interference and noise; Using a color correction algorithm built into the source buffer and adjusting the data for color difference according to pre-set correction parameters to compensate for color deviation caused by the manufacturing process; Acquire a temperature detection value of a target display screen, and perform temperature compensation processing on the data after the color difference adjustment processing based on the temperature detection value; According to the gamma curve built into the source buffer, performing nonlinear mapping processing of gamma correction on the temperature compensated data; Convert the gamma-corrected data into corresponding analog voltage signals, and enhance the linearity of the analog voltage signals to obtain output signals corresponding to each pixel; The output signal is sent to each pixel of the target display screen accordingly, so that the target display screen performs picture presentation processing based on the received output signal.

8. A shift register data transmission device based on a multiplexer, characterized in that: include: An initialization processing unit, used to obtain RGB data through an external interface and perform initialization processing on a shift register; A transmission unit, used for gradually transmitting the RGB data to the corresponding MUX channels in the shift register after the shift register completes the initialization configuration, and performing data transmission in units of MUX; A latch unit, used for latching data transmitted to each MUX channel, wherein each MUX channel corresponds to a latch circuit; The output unit is used to correct and adjust the data output by each latch circuit using a source buffer, and output the corrected and adjusted data to a target display screen.

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