Display device and method of manufacturing same

Abstract

The invention discloses a display device and a method of manufacturing the same. The display device includes: a substrate including an emission area and a non-emission area; an anode electrode on the emission region of the substrate; a pixel defining layer on the non-emission region of the substrate and defining an opening; a light emitting layer on the anode electrode; a common electronic layer on the light emitting layer and the pixel defining layer; and a common electrode on the common electronic layer, the pixel defining layer including: a first portion overlapping the non-emission area; and a second portion overlapping the emission region and spaced apart from the first portion in a direction parallel to the substrate, the groove being interposed between the first portion and the second portion, the groove being recessed toward the substrate, the light emitting layer contacting the first portion and the second portion, and the light emitting layer filling the groove between the first portion and the second portion.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0134904 filed in the Korean Intellectual Property Office on October 11, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device and a method of manufacturing the display device. Background Art

[0004] With the development of the information society, the demand for display devices for displaying images has increased and diversified. For example, display devices have been applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices, and smart TVs. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, or an organic light emitting display device. Among such flat panel display devices, a light emitting display device may display an image without a backlight unit for providing light to the display panel, because each of the pixels of the display panel may include a light emitting element that can emit light by itself.

[0005] Recently, with the development of various electronic devices, the demand for high-resolution display devices has increased. Since high-resolution display devices require high integration of pixels, the interval between light-emitting elements overlapping with corresponding emission areas can be reduced. Accordingly, high-resolution display devices can be formed by a photolithography process for forming a single pixel instead of a mask process.

[0006] It will be understood that this background section is intended, in part, to provide a useful background for understanding the technology. However, this background section may also include ideas, concepts, or cognitions that were not part of what was known or appreciated by a person skilled in the relevant art prior to the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0007] Aspects of the present disclosure provide a display device capable of solving a peeling defect of a light emitting layer when forming a plurality of pixels through a photolithography process and a method of manufacturing the display device.

[0008] However, the aspects of the present disclosure are not limited to those described herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs by referring to the detailed description of the present disclosure given below.

[0009] An embodiment of a display device may include: a substrate including an emission area and a non-emission area; an anode electrode disposed on the emission area of ​​the substrate; a pixel defining layer disposed on the non-emission area of ​​the substrate, the pixel defining layer defining an opening; a light-emitting layer disposed on the anode electrode; a common electron layer disposed on the light-emitting layer and the pixel defining layer; and a common electrode disposed on the common electron layer, wherein the pixel defining layer may include: a first portion overlapping the non-emission area; and a second portion overlapping the emission area and spaced apart from the first portion in a direction parallel to the substrate, a groove being disposed between the first portion and the second portion, the groove being recessed toward the substrate, the light-emitting layer may contact the first portion and the second portion, and the light-emitting layer fills the groove between the first portion and the second portion.

[0010] A height of the pixel defining layer in a direction perpendicular to the substrate may be less than about half of a height of the light emitting layer in the direction perpendicular to the substrate.

[0011] The second portion may be completely surrounded by the anode electrode and the light emitting layer.

[0012] The pixel defining layer may include an inorganic material, and the first portion and the second portion include the same material.

[0013] The opening may be completely surrounded by the emission area in plan view.

[0014] The common electron layer may be disposed between the pixel defining layer and the common electrode in a portion overlapping the non-emission region.

[0015] The common electron layer may contact the first portion and the common electrode in a portion overlapping the non-emission region.

[0016] A side surface of the light emitting layer facing the non-emission region may contact the common electron layer.

[0017] The light emitting layer can be formed by photolithography.

[0018] The second portion may include a plurality of grooves recessed in a direction toward the substrate.

[0019] The light emitting layer may fill the plurality of grooves included in the second portion.

[0020] The display device of an embodiment may include: a substrate including an emission region and a non-emission region; an anode electrode disposed on the emission region of the substrate; a pixel defining layer including a first portion disposed on the non-emission region of the substrate and a second portion including a material different from the first portion, the second portion being disposed on the first portion; a light-emitting layer disposed on the anode electrode; a common electron layer disposed on the light-emitting layer and the pixel defining layer; and a common electrode disposed on the common electron layer, wherein a side surface of the second portion facing the emission region protrudes toward the emission region more than a side surface of the first portion facing the emission region, and an undercut may be formed between the side surfaces of the second portion and the first portion in a portion overlapping with the emission region.

[0021] The light emitting layer may fill an undercut formed between the second portion and side surfaces of the first portion.

[0022] A height of the first portion in a direction perpendicular to the substrate may be greater than a height of the second portion in the direction perpendicular to the substrate.

[0023] The pixel defining layer may further include: a third portion, which is arranged on the second portion, and the third portion and the first portion include the same material; and a fourth portion, which is arranged on the third portion, and the fourth portion and the second portion include the same material, and a side surface of the fourth portion facing the emission area protrudes toward the emission area more than a side surface of the third portion facing the emission area.

[0024] An undercut may be formed between side surfaces of the fourth portion and the third portion in a portion overlapping the emission region, and the light emitting layer fills the undercut formed between side surfaces of the fourth portion and the third portion.

[0025] In a direction parallel to the substrate, a width of an undercut formed between the first portion and the second portion and a width of an undercut formed between the third portion and the fourth portion may be about 0.05 μm or less.

[0026] The first portion and the third portion may include silicon nitride or silicon oxynitride, and the second portion and the fourth portion include silicon oxide.

[0027] The common electron layer may be disposed between the fourth portion and the common electrode in a portion overlapping the non-emission region, and the common electron layer contacts the fourth portion and the common electrode in a portion overlapping the non-emission region.

[0028] An embodiment of a method for manufacturing a display device may include: providing a substrate including an emission region and a non-emission region; forming a first anode electrode and a second anode electrode spaced apart from each other on the emission region of the substrate, and forming a pixel defining material layer that completely covers the first anode electrode, the second anode electrode, and the substrate; removing a portion of the pixel defining material layer except a portion overlapping with a portion of the emission region and the non-emission region by etching to form a pixel defining layer including a first portion and a second portion spaced apart from the first portion, wherein each of the grooves is disposed between the first portion and the second portion, the groove being recessed toward the substrate; forming a first light emitting material layer that completely covers the first anode electrode, the second anode electrode, and the pixel defining layer, completely forming a sacrificial layer on the first light emitting material layer, and removing the portion of the pixel defining material layer except a portion overlapping with a portion of the emission region and the non-emission region by etching The method comprises the steps of: forming a first light-emitting layer by forming a first light-emitting material layer and a sacrificial layer in the remaining portion except the portion overlapping with the first anode electrode; forming a second light-emitting layer by forming a second light-emitting material layer that completely covers the first light-emitting layer, the second anode electrode and the pixel defining layer, completely forming a sacrificial layer on the second light-emitting material layer and removing the second light-emitting material layer and the sacrificial layer in the remaining portion except the portion overlapping with the second anode electrode by etching; and removing the sacrificial layer by wet etching to form a common electron layer that completely covers the first light-emitting layer, the second light-emitting layer and the pixel defining layer, and completely forming a common electrode on the common electron layer, wherein in the formation of the first light-emitting layer and the formation of the second light-emitting layer, the first light-emitting layer and the second light-emitting layer can fill the groove set between the first part and the second part of the pixel defining layer.

[0029] Details of other embodiments are described in the detailed description and illustrated in the accompanying drawings.

[0030] In the display device according to the embodiment, by forming a plurality of pixels by photolithography and forming a pixel defining layer including a single groove or a plurality of grooves between the plurality of pixels, the bonding strength between the light emitting layer and the underlying structure can be improved. Accordingly, the display device according to the embodiment can solve the peeling defect of the light emitting layer. By forming a plurality of pixels by photolithography, a display device suitable for ultra-high resolution can be provided.

[0031] The effects of the present disclosure are not limited to the above-mentioned effects, and various other effects are also included in the specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and other aspects and features of the present disclosure will become more apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0033] Figure 1 is a schematic perspective view illustrating an electronic device according to an embodiment;

[0034] Figure 2 is a schematic perspective view illustrating a display device included in the electronic device;

[0035] Figure 3 yes Figure 2 A schematic cross-sectional view of a display device;

[0036] Figure 4 yes Figure 3 A schematic plan view of the display layers in FIG.

[0037] Figure 5 It is a graphic Figure 4 A schematic plan view of an arrangement of emission regions in a display region of FIG.

[0038] Figure 6 is along Figure 5 A schematic cross-sectional view of the display area taken along line X1-X1';

[0039] Figure 7 yes Figure 6 An enlarged cross-sectional view of a light emitting element in FIG.

[0040] Figure 8 yes Figure 6 An enlarged cross-sectional view of the first emission region in FIG.

[0041] Fig. 9 is an enlarged cross-sectional view of a first emission region according to an embodiment;

[0042] Fig.10 is along Figure 5 A schematic cross-sectional view of the display area taken along line X1-X1';

[0043] Fig.11 yes Fig.10 An enlarged cross-sectional view of region C in FIG.

[0044] Fig.12 yes Fig.11 an enlarged cross-sectional view of a region P in FIG.

[0045] Figures 13 to 22 It is a graphic manufacturing Figure 6 Schematic cross-sectional view of a method of displaying element layers in FIG. DETAILED DESCRIPTION

[0046] In the following description, for the purpose of explanation, many details are set forth in order to provide a thorough understanding of various embodiments or implementations of the present disclosure. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the device or method disclosed herein. However, it is apparent that various embodiments may be practiced without these details or with one or more equivalent arrangements. Here, various embodiments need not be exclusive, nor need they limit the present disclosure. For example, the shape, configuration, and characteristics in the embodiment may be used or implemented in another embodiment.

[0047] Unless otherwise specified, the illustrated embodiments will be understood to provide features of the present disclosure. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter referred to as "elements" individually or collectively) in various embodiments may be combined, separated, interchanged and / or rearranged in other ways without departing from the present disclosure.

[0048] The use of cross-hatching and / or shading in the drawings is generally provided to clarify boundaries between adjacent elements. As such, unless otherwise specified, neither the presence nor the absence of cross-hatching or shading conveys or indicates any preference or requirement for particular materials, material properties, scales, proportions, commonalities between illustrated elements, and / or any other features, attributes, properties, etc. of the elements.

[0049] In addition, in the accompanying drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments can be implemented differently, a specific process sequence can be performed in a different order than described. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the described order. In addition, the same reference numerals and / or reference characters refer to the same elements.

[0050] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it may be directly on, directly connected to, or coupled to that other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements.

[0051] In addition, the X-axis direction, the Y-axis direction, and the Z-axis direction are not limited to the directions corresponding to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the X-axis direction, the Y-axis direction, and the Z-axis direction can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0052] For the purpose of the present disclosure, “at least one of A and B” may be interpreted as only A, only B, or any combination of A and B. In addition, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z.

[0053] In this specification and claims, for the purpose of its meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunctive or disjunctive sense and may be understood to be equivalent to "and / or".

[0054] Although the terms "first", "second", etc. can be used to describe various types of elements in this article, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the first element discussed below can be referred to as the second element without departing from the teachings of the present disclosure.

[0055] For descriptive purposes, spatially relative terms such as "below," "below," "under," "down," "above," "on," "above," and "side" (e.g., as in "sidewall") may be used herein and thereby describe the relationship of one element to another element(s) as illustrated in the figures. In addition to the orientations depicted in the figures, spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figure is flipped, an element described as being "below" or "below" other elements or features will then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both above and below orientations. Additionally, the device may be otherwise oriented (e.g., rotated (approximately) 90 degrees or in other orientations), and therefore, the spatially relative descriptors used herein should be interpreted accordingly.

[0056] The term "overlap" or "overlapping" means that a first object can be above or below or to the side of a second object, and vice versa. In addition, the term "overlap" may include stacking, stacking, facing or facing, extending over, covering or partially covering, or any other appropriate term that a person of ordinary skill in the art will appreciate and understand.

[0057] The terms "facing" and "facing" mean that the first element can be directly or indirectly opposite to the second element. In the case where a third element is interposed between the first and second elements, the first and second elements can be understood to be indirectly opposite to each other, although still facing each other.

[0058] When an element is described as “not overlaying” or “not overlapping” another element, this may include the elements being spaced apart, offset or separated from each other, or any other appropriate terminology as would be appreciated and understood by one of ordinary skill in the art.

[0059] The terminology used herein is for the purpose of describing embodiments and is not intended to be limiting.

[0060] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0061] When used in this specification, the terms "comprise" and / or "include" and / or "have" and their variations indicate the presence of stated features, integers, steps, operations, elements, parts and / or groups thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups thereof.

[0062] It should also be noted that, as used herein, the terms "substantially," "about," and other similar terms are used as terms of approximation and not as terms of degree, and are therefore used to account for the inherent deviations in measured, calculated, and / or provided values ​​recognized by those of ordinary skill in the art. In addition, taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "about" or "approximately" as used herein include the value and mean within the acceptable deviation range for that particular value determined by those of ordinary skill in the art. For example, "about" can mean within one or more standard deviations of the value, or within ±30%, ±20%, ±10%, ±5% of the value.

[0063] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and these terms will not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0064] Various embodiments are described herein with reference to cross-sectional illustrations and / or exploded illustrations as schematic illustrations of embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are to be expected. Therefore, the embodiments disclosed herein should not necessarily be construed as limited to the shapes of the illustrated regions, but will include shape deviations due to, for example, manufacturing. In this manner, the regions illustrated in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and therefore are not necessarily intended to be limiting.

[0065] Each embodiment is described and illustrated in the accompanying drawings according to functional blocks, units and / or modules. It will be appreciated by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (e.g., logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements and wiring connections, etc.), which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where these blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform various functions discussed herein, and they can be optionally driven by firmware and / or software. It can also be expected that each block, unit and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware that performs some functions and a processor that performs other functions (e.g., one or more programmed microprocessors and associated circuits). In addition, each block, unit and / or module of each embodiment can be physically separated into two or more interacting and discrete blocks, units and / or modules without departing from the scope of this disclosure. Furthermore, the blocks, units and / or modules of the various embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the present disclosure.

[0066] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0067] Figure 1 is a schematic perspective view of an electronic device 1 according to the embodiment.

[0068] refer to Figure 1 , the electronic device 1 displays a moving image or a still image. The electronic device 1 may refer to all electronic devices that provide a display screen. For example, a television set, a laptop computer, a monitor, a billboard, an Internet of Things (IoT) device, a mobile phone, a smart phone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, and a video camera, etc. that provide a display screen may be included in the electronic device 1.

[0069] exist Figure 1 In the figure, a first direction (X-axis direction), a second direction (Y-axis direction) and a third direction (Z-axis direction) are defined. The first direction (X-axis direction) and the second direction (Y-axis direction) may be perpendicular to each other, the first direction (X-axis direction) and the third direction (Z-axis direction) may be perpendicular to each other, and the second direction (Y-axis direction) and the third direction (Z-axis direction) may be perpendicular to each other. It is understood that the first direction (X-axis direction) refers to the lateral direction in the figure, the second direction (Y-axis direction) refers to the longitudinal direction in the figure, and the third direction (Z-axis direction) refers to the upward and downward directions in the figure (for example, thickness direction). In the following description, unless otherwise specified, the term "direction" may refer to two directions extending along the direction and toward both sides. In the case where the two "directions" extending to both sides need to be distinguished from each other, one side or one side will be referred to as "one side in the direction", and the other side or the other side will be referred to as "the other side in the direction". In Figure 1 , the direction to which an arrow indicating a direction points will be referred to as one side or one side, and the direction opposite to such direction will be referred to as the other side or the other side.

[0070] In the following, for the sake of convenience of explanation, when referring to the surfaces of the electronic device 1 or the various components constituting the electronic device 1, a surface or a surface facing a side or a side in the direction in which an image is displayed (for example, the third direction (Z-axis direction)) will be referred to as an upper surface, and the surface opposite to the one surface will be referred to as the other surface or another surface. However, the present disclosure is not limited to this, and one surface and the other surface of the component may be referred to as a front surface and a rear surface, respectively, or as a first surface and a second surface, respectively. When describing the relative positions of the various components of the electronic device 1, a side or a side in the third direction (Z-axis direction) may be referred to as an upper portion, and the other side in the third direction (Z-axis direction) may be referred to as a lower portion.

[0071] The shape of the electronic device 1 may be modified variously. For example, the electronic device 1 may have a shape such as a rectangular shape with a width greater than a length, a rectangular shape with a length greater than a width, a square shape, a quadrilateral shape with rounded corners (vertices), other polygonal shapes, or a circular shape in a plan view.

[0072] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is an area where a picture can be displayed, and the non-display area NDA is an area where a picture is not displayed. The display area DA may also be referred to as an active area, and the non-display area NDA may also be referred to as a non-active area. The display area DA may substantially occupy the center of the electronic device 1.

[0073] Figure 2is a schematic perspective view illustrating a display device 10 included in the electronic device 1 according to the embodiment.

[0074] refer to Figure 2 According to the embodiment, the electronic device 1 may include a display device 10. The display device 10 may provide a picture displayed on the electronic device 1. Within the spirit and scope of the present disclosure, examples of the display device 10 may include an inorganic light emitting diode display device, an organic light emitting display device, a quantum dot light emitting display device, a plasma display panel, and a field emission display device. Hereinafter, the case where the organic light emitting diode display device is applied as an example of the display device will be described by way of example, but the present disclosure is not limited thereto, and the same technical spirit may be applied to other applicable display devices.

[0075] The display device 10 may have a shape similar to that of the electronic device 1 in a plan view. For example, the display device 10 may have a rectangular shape with a short side in a first direction (X-axis direction) and a long side in a second direction (Y-axis direction) in a plan view. The corner where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) intersect may be rounded with a curvature, but is not limited thereto, and may also be a right angle. The shape of the display device 10 in a plan view is not limited to a rectangular shape, and may be a shape similar to other polygonal shapes, a circular shape, or an elliptical shape.

[0076] The display device 10 may include a display panel 100 , a display driver 200 , a circuit board 300 , and a touch driver 400 .

[0077] The display panel 100 (and its layers or elements, such as the substrate 110 ) may include a main area MA and a sub-area SBA. The main area MA may include a display area DA including pixels displaying an image and a non-display area NDA disposed around the display area DA.

[0078] The display area DA may emit light from a plurality of emission areas or a plurality of opening areas to be described later. For example, the display panel 100 may include a pixel circuit including a switching element, a pixel defining film defining an emission area or an opening area, and a self-luminous element. For example, the self-luminous element may include at least one of an organic light emitting diode (LED) including an organic light emitting layer, a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, and a micro-LED, but is not limited thereto. The self-luminous element is illustrated as an organic light emitting diode in the accompanying drawings.

[0079] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100 .

[0080] The sub-area SBA may be an area extending from one side or one side of the main area MA. The sub-area SBA may include a flexible material that may be bent, folded, or curled. For example, when the sub-area SBA is bent, the sub-area SBA may overlap with the main area MA in the thickness direction (e.g., the Z-axis direction). The sub-area SBA may include a display driver 200 and a pad portion connected to the circuit board 300. In an embodiment, the sub-area SBA may be omitted, and the display driver 200 and the pad portion may be positioned in the non-display area NDA.

[0081] The display driver 200 may output signals and voltages for driving the display panel 100. The display driver 200 may be formed as an integrated circuit (IC) and mounted on the display panel 100 in a chip on glass (COG) manner, a chip on plastic (COP) manner, or an ultrasonic bonding manner. As an example, the display driver 200 may be disposed in the sub-area SBA and may overlap with the main area MA in the thickness direction by bending the sub-area SBA. As another example, the display driver 200 may be mounted on the circuit board 300.

[0082] The circuit board 300 may be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). The circuit board 300 may be a flexible printed circuit board, a rigid printed circuit board, or a flexible film such as a chip on film.

[0083] The touch driver 400 may be mounted on the circuit board 300. The touch driver 400 may be connected to the touch sensor layer 180 (see FIG. 1 ) of the display panel 100. Figure 3 ). The touch driver 400 may be formed as an integrated circuit.

[0084] Figure 3 yes Figure 2 Schematic cross-sectional view of a display device 10 .

[0085] refer to Figure 3 , the display panel 100 may include a display layer DPL, a touch sensor layer 180 and a color filter layer 190 . The display layer DPL may include a substrate 110 , a thin film transistor layer 130 , a display element layer 150 and a thin film encapsulation layer 170 .

[0086] The substrate 110 may be a base substrate or a base member. The substrate 110 may be a flexible substrate that can be bent, folded, or rolled. For example, the substrate 110 may include a polymer resin such as polyimide (PI), but is not limited thereto. In an embodiment, the substrate 110 may include a glass material or a metal material.

[0087] The thin film transistor layer 130 may be disposed on the substrate 110. The thin film transistor layer 130 may be disposed in the display area DA, the non-display area NDA, and the sub-area SBA. The thin film transistor layer 130 may include a pixel PX (see Figure 4 ) of a plurality of thin film transistors TFT (see Figure 6 ).

[0088] The display element layer 150 may be disposed on the thin film transistor layer 130. The display element layer 150 may be positioned to overlap the display area DA. The display element layer 150 may include a plurality of light emitting elements ED (see Figure 6 As an example, the light emitting element according to the embodiment may include at least one of an organic light emitting diode (LED) including an organic light emitting layer, a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, and a micro LED, but is not limited thereto.

[0089] The thin film encapsulation layer 170 may be positioned on the display element layer 150. The thin film encapsulation layer 170 may be positioned to overlap the display area DA and the non-display area NDA. The thin film encapsulation layer 170 may cover the upper surface and the side surface of the display element layer 150, and may protect the display element layer 150 from external oxygen and moisture. The thin film encapsulation layer 170 may include at least one inorganic film and at least one organic film for encapsulating the display element layer 150.

[0090] The touch sensor layer 180 may be disposed on the thin film encapsulation layer 170. The touch sensor layer 180 may be positioned to overlap the display area DA and the non-display area NDA. The touch sensor layer 180 may sense a user's touch in a mutual capacitance manner or a self-capacitance manner.

[0091] The color filter layer 190 may be disposed on the touch sensor layer 180. The color filter layer 190 may be positioned to overlap the display area DA and the non-display area NDA. The color filter layer 190 may absorb some of the light introduced from the outside of the display device 10 to reduce reflected light caused by the external light. Accordingly, the color filter layer 190 may prevent color distortion caused by external light reflection.

[0092] Since the color filter layer 190 is directly disposed on the touch sensor layer 180, the display device 10 may not require a separate substrate for the color filter layer 190. Accordingly, the thickness of the display device 10 may be relatively small. According to an embodiment, the color filter layer 190 may also be omitted.

[0093] like Figure 3As shown in FIG. 1 , a portion of the display layer DPL overlapping the sub-area SBA may be bent. When a portion of the display layer DPL is bent, the display driver 200, the circuit board 300, and the touch driver 400 may overlap the main area MA in the third direction (Z-axis direction).

[0094] Figure 4 yes Figure 3 Schematic plan view of the display layer DPL in FIG.

[0095] refer to Figure 4 , the display layer DPL included in the embodiment may include a plurality of pixels PX, a plurality of gate lines GL, a plurality of data lines DL, and a plurality of second power lines VL2 in a portion overlapping the display area DA of the main area MA.

[0096] Each of the plurality of pixels PX may be defined as a minimum unit for emitting light. Each of the plurality of pixels PX may constitute first to third emission areas EA1, EA2, and EA3 (see Figure 5 ) in each of the .

[0097] The plurality of gate lines GL may supply gate signals received from the gate driver 210 to the plurality of pixels PX. The plurality of gate lines GL may extend in a first direction (X-axis direction) and may be spaced apart from each other in a second direction (Y-axis direction) intersecting the first direction (X-axis direction).

[0098] The plurality of data lines DL may supply the plurality of pixels PX with data voltages received from the display driver 200. The plurality of data lines DL may extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction).

[0099] The plurality of second power lines VL2 may supply a source voltage received from the display driver 200 to the plurality of pixels PX. Here, the source voltage may be at least one of a driving voltage, an initialization voltage, and a reference voltage. The plurality of second power lines VL2 may extend in the second direction (Y-axis direction) and may be spaced apart from each other in the first direction (X-axis direction).

[0100] The display layer DPL included in the embodiment may include a first power line VL1 , a gate driver 210 , a plurality of fan-out lines FOL, and a gate control line GCL in a portion overlapping the non-display area NDA of the main area MA.

[0101] The gate driver 210 may generate a plurality of gate signals based on the gate control signal, and may sequentially supply the plurality of gate signals to the plurality of gate lines GL according to a set order.

[0102] The first power line VL1 may be disposed in the non-display area NDA so as to surround the display area DA. The first power line VL1 may supply a source voltage received from the display driver 200 to the plurality of pixels PX. The first power line VL1 may be electrically connected to various wiring lines positioned in the display area DA.

[0103] The plurality of fan-out lines FOL may extend from the display driver 200 to the display area DA. The fan-out lines FOL may supply a data voltage received from the display driver 200 to the plurality of data lines DL.

[0104] The gate control line GCL may extend from the display driver 200 to the gate driver 210. The gate control line GCL may provide the gate driver 210 with a gate control signal received from the display driver 200. Figure 4 It has been illustrated that the gate driver 210 is disposed only in the non-display area NDA disposed on the left side of the display area DA, but the present disclosure is not limited thereto. In an embodiment, the display device 10 may include a plurality of gate drivers 210 disposed on the left and right sides of the display area DA, respectively.

[0105] The display layer DPL included in the embodiment may include the display driver 200 and a plurality of display pads PD in a portion overlapping the sub area SBA.

[0106] The display driver 200 may output signals and voltages for driving a plurality of pixels PX to a plurality of fan-out lines FOL. The display driver 200 may supply data voltages to the data lines DL through the plurality of fan-out lines FOL. As a result, the data voltages may be supplied to the plurality of pixels PX, and the brightness of the plurality of pixels PX may be controlled. The display driver 200 may supply gate control signals to the gate driver 210 through the gate control lines GCL.

[0107] The plurality of display pads PD may be connected to a graphic system through the circuit board 300. The plurality of display pads PD may be connected to the circuit board 300 to receive digital video data, and may supply the digital video data to the display driver 200.

[0108] Figure 5 It is a graphic Figure 4 Schematic plan view of the arrangement of emission regions in the display area DA.

[0109] refer to Figure 5 , the display area DA may include first to third emission areas EA1 , EA2 , and EA3 and a non-emission area NLA.

[0110] The non-emission area NLA may be positioned to surround each of the first to third emission areas EA1, EA2, and EA3. The non-emission area NLA may help prevent each light emitted from the first to third emission areas EA1, EA2, and EA3 from being mixed with each other. The inorganic pixel defining layer 151 (see FIG. 1 ) to be described later may be arranged to surround each of the first to third emission areas EA1, EA2, and EA3. Figure 6 ) may be disposed in the non-emission area NLA. The inorganic pixel defining layer 151 may define an opening OP. The opening OP defined by the inorganic pixel defining layer 151 may be disposed inside the first to third emission areas EA1, EA2, and EA3. In other words, the opening OP may be completely surrounded by the first to third emission areas EA1, EA2, and EA3 in a plan view.

[0111] The plurality of pixels PX may include a first emission region EA1, a second emission region EA2, and a third emission region EA3 that emit light of different colors. The first to third emission regions EA1, EA2, and EA3 may emit red light, green light, and blue light, respectively, and the colors of the light emitted from the first to third emission regions EA1, EA2, and EA3 may be different from each other depending on the type of light emitting element ED to be described later. In an embodiment, the first emission region EA1 may emit red light as the first color of light, the second emission region EA2 may emit green light as the second color of light, and the third emission region EA3 may emit blue light as the third color of light, but the present disclosure is not limited thereto.

[0112] Figure 5 1 and 2 have been illustrated as the sizes and areas of the first to third emission areas EA1, EA2, and EA3 being the same, but the present disclosure is not limited thereto. As an example, the size and area of ​​the first emission area EA1 may be the smallest, and the size and area of ​​the third emission area EA3 may be the largest. For example, the size and area of ​​the first emission area EA1 may be the largest, and the size and area of ​​the third emission area EA3 may be the smallest. For example, the sizes, areas, and shapes of the first to third emission areas EA1, EA2, and EA3 may be freely adjusted according to the desired characteristics.

[0113] At least one first emission region EA1, at least one second emission region EA2, and at least one third emission region EA3 disposed adjacent to each other may constitute a pixel group PXG. The pixel group PXG may be the minimum unit for emitting white light. However, according to embodiments, the types and / or numbers of the first to third emission regions EA1, EA2, and EA3 constituting the pixel group PXG may be changed.

[0114] Figure 6 is along Figure 5 Schematic cross-sectional view of the display area DA taken along line X1 - X1 ′. Figure 7 yes Figure 6An enlarged cross-sectional view of the light-emitting element ED in FIG.

[0115] Figure 6 1 is a schematic cross-sectional view of the display device 10 overlapping the display area DA, and illustrates cross sections of the substrate 110, the thin film transistor layer 130, the display element layer 150, the thin film encapsulation layer 170, the touch sensor layer 180, and the color filter layer 190. Figure 3 The substrate 110 is described, and thus a description thereof will be omitted.

[0116] refer to Figure 6 , the thin film transistor layer 130 may be positioned on the substrate 110. The thin film transistor layer 130 may include a first buffer layer 111, a bottom metal layer BML, a second buffer layer 113, a thin film transistor TFT, a gate insulating layer 131, a first interlayer insulating layer 133, a capacitor electrode CPE, a second interlayer insulating layer 135, a first connection electrode CNE1, a first through hole layer 137, a second connection electrode CNE2, and a second through hole layer 139.

[0117] The first buffer layer 111 may be disposed on the substrate 110. The first buffer layer 111 may include an inorganic film capable of preventing penetration of air or moisture. For example, the first buffer layer 111 may include a plurality of inorganic films that may be alternately stacked on each other.

[0118] The bottom metal layer BML may be disposed on the first buffer layer 111. For example, the bottom metal layer BML may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0119] The second buffer layer 113 may cover the first buffer layer 111 and the bottom metal layer BML. The second buffer layer 113 may include an inorganic film capable of preventing penetration of air or moisture. For example, the second buffer layer 113 may include a plurality of inorganic films that may be alternately stacked on each other.

[0120] The thin film transistor TFT may be disposed on the second buffer layer 113 and may constitute a pixel circuit of each of the plurality of pixels. As an example, the thin film transistor TFT may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT may include an active layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0121] The active layer ACT may be disposed on the second buffer layer 113. The active layer ACT may overlap the bottom metal layer BML and the gate electrode GE in the thickness direction, and may be insulated from the gate electrode GE by the gate insulating layer 131. In a portion of the active layer ACT, a material of the active layer ACT may become a conductor to form a source electrode SE and a drain electrode DE.

[0122] The gate electrode GE may be disposed on the gate insulating layer 131. The gate electrode GE may overlap the active layer ACT with the gate insulating layer 131 interposed therebetween.

[0123] The gate insulating layer 131 may be disposed on the active layer ACT. For example, the gate insulating layer 131 may cover the active layer ACT and the second buffer layer 113 and may insulate the active layer ACT and the gate electrode GE from each other. The gate insulating layer 131 may include a contact hole through which the first connection electrode CNE1 passes.

[0124] The first interlayer insulating layer 133 may cover the gate electrode GE and the gate insulating layer 131. The first interlayer insulating layer 133 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the first interlayer insulating layer 133 may be connected to the contact hole of the gate insulating layer 131 and the contact hole of the second interlayer insulating layer 135.

[0125] The capacitor electrode CPE may be disposed on the first interlayer insulating layer 133. The capacitor electrode CPE may overlap the gate electrode GE in a thickness direction. The capacitor electrode CPE and the gate electrode GE may form a capacitor.

[0126] The second interlayer insulating layer 135 may cover the capacitor electrode CPE and the first interlayer insulating layer 133. The second interlayer insulating layer 135 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the second interlayer insulating layer 135 may be connected to the contact hole of the first interlayer insulating layer 133 and the contact hole of the gate insulating layer 131.

[0127] The first connection electrode CNE1 may be disposed on the second interlayer insulating layer 135. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT and the second connection electrode CNE2 to each other. The first connection electrode CNE1 may be inserted into a contact hole formed in the second interlayer insulating layer 135, the first interlayer insulating layer 133, and the gate insulating layer 131 to contact the drain electrode DE of the thin film transistor TFT.

[0128] The first via layer 137 may cover the first connection electrode CNE1 and the second interlayer insulating layer 135. The first via layer 137 may planarize the lower structure. The first via layer 137 may include a contact hole through which the second connection electrode CNE2 passes.

[0129] The second connection electrode CNE2 may be disposed on the first via layer 137. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 and the anode electrode AE ​​to each other. The second connection electrode CNE2 may be inserted into a contact hole formed in the first via layer 137 to contact the first connection electrode CNE1.

[0130] The second via layer 139 may cover the second connection electrode CNE2 and the first via layer 137. The second via layer 139 may include a contact hole through which the anode electrode AE ​​passes.

[0131] The display element layer 150 may be disposed on the thin film transistor layer 130. The display element layer 150 may include an inorganic pixel defining layer 151, a light emitting element ED, and a capping layer 159.

[0132] The inorganic pixel defining layer 151 may be disposed on the second through hole layer 139 in a portion overlapping the non-emission area NLA, and may be disposed on the first to third anode electrodes AE1, AE2, and AE3 in a portion overlapping the emission areas EA1, EA2, and EA3. The inorganic pixel defining layer 151 may define an opening OP, and may expose a portion of the anode electrode AE ​​in a portion overlapping the opening OP. The inorganic pixel defining layer 151 may allow the first to third anode electrodes AE1, AE2, and AE3 to be spaced apart from and insulated from each other.

[0133] The inorganic pixel defining layer 151 according to the embodiment may include a first portion 151a and a second portion 151b. The first portion 151a of the inorganic pixel defining layer 151 may be disposed in a portion overlapping the non-emission area NLA, and may be a majority of the inorganic pixel defining layer 151. The second portion 151b of the inorganic pixel defining layer 151 may be disposed in a portion overlapping the first to third emission areas EA1, EA2, and EA3, and may be disposed to be spaced apart from the first portion 151a in the first direction (X-axis direction).

[0134] The inorganic pixel defining layer 151 may include an inorganic insulating material. As an example, the inorganic pixel defining layer 151 may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride.

[0135] The light emitting element ED may include a first light emitting element ED1, a second light emitting element ED2, and a third light emitting element ED3 respectively overlapping the first to third emission areas EA1, EA2, and EA3. The first light emitting element ED1, the second light emitting element ED2, and the third light emitting element ED3 may emit light of different colors depending on the material included in the light emitting layer EL. For example, the first light emitting element ED1 may emit red light as the first color of light, the second light emitting element ED2 may emit green light as the second color of light, and the third light emitting element ED3 may emit blue light as the third color of light.

[0136] refer to Figure 6 and Figure 7 The light emitting element ED may include an anode electrode AE, a light emitting layer EL, a common electron transport layer mETL (also referred to as a common electron layer) and a common electrode CE. The light emitting layer EL may include a hole injection layer HIL, a hole transport layer HTL and an organic light emitting layer EML.

[0137] The anode electrode AE ​​may be disposed on the second through-hole layer 139. The anode electrode AE ​​may include a first anode electrode AE1 overlapping the first emission region EA1, a second anode electrode AE2 overlapping the second emission region EA2, and a third anode electrode AE3 overlapping the third emission region EA3. The first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 may be respectively disposed to be spaced apart from each other on the second through-hole layer 139. As described above, the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3 may be spaced apart from each other by the inorganic pixel defining layer 151, and may be exposed in a portion overlapping the opening OP. The anode electrode AE ​​may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first connection electrode CNE1 and the second connection electrode CNE2.

[0138] In an embodiment, the anode electrode AE ​​may have a structure in which a material having a high work function (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In 2 O 3 )) and a layer made of a reflective material (such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or a mixture thereof). For example, the anode electrode AE ​​may have ITO / Mg, ITO / MgF 2 , ITO / Ag and ITO / Ag / ITO multilayer structures, but not limited to these.

[0139] The light emitting layer EL may be disposed on the anode electrode AE. In the display device 10 according to the embodiment, the light emitting layer EL may be formed by a photolithography process. Since the photolithography process forms the light emitting layer EL without a mask, a high-resolution product in which a plurality of pixels PX adjacent to each other have a narrow interval may be easily manufactured. The manufacturing process will be described later.

[0140] The light emitting layer EL may include a first light emitting layer EL1, a second light emitting layer EL2, and a third light emitting layer EL3, respectively disposed in first to third emission regions EA1, EA2, and EA3. The first light emitting layer EL1, the second light emitting layer EL2, and the third light emitting layer EL3 may emit light of different colors depending on a material included in an organic light emitting layer EML to be described later. As an example, the first light emitting layer EL1 may emit red light as a first color of light, the second light emitting layer EL2 may emit green light as a second color of light, and the third light emitting layer EL3 may emit blue light as a third color of light, but the present disclosure is not limited thereto.

[0141] The light emitting layer EL may include a hole injection layer HIL, a hole transport layer HTL, and an organic light emitting layer EML. The hole injection layer HIL may be positioned on the anode electrode AE, the hole transport layer HTL may be positioned on the hole injection layer HIL, and the organic light emitting layer EML may be positioned on the hole transport layer HTL. According to an embodiment, the hole injection layer HIL and the hole transport layer HTL may be formed as a hole injection transport layer as one layer.

[0142] The hole injection layer HIL may have a single layer made of a single material, a single layer made of a plurality of different materials, or a multilayer structure including a plurality of layers each made of different materials. As an example, the hole injection layer HIL may include a phthalocyanine compound such as copper phthalocyanine, N,N'-diphenyl-N,N'-bis-[4-(phenyl-m-tolyl-amino)-phenyl]-biphenyl-4,4'-diamine (DNTPD), 4,4',4"-tris(3-methylphenylphenylamino)triphenylamine (m-MTDATA), 4,4',4"-tris(N,N-diphenylamino)triphenylamine (TDATA), 4,4',4"-tris{N,-(2-naphthyl)-N-phenylamino}-triphenylamine (2TNATA), poly(3,4-ethylenedioxythiophene) / poly(4-styrenesulfonate) (PEDOT / PSS), polyaniline / dodecylbenzenesulfonic acid (PANI / DBSA), polyaniline / camphorsulfonic acid (PANI / CSA), or polyaniline / poly(4-styrenesulfonate) (PANI / PSS), but is not limited thereto.

[0143] The hole transport layer HTL may have a single layer made of a single material, a single layer made of a plurality of different materials, or a multilayer structure including a plurality of layers each made of different materials. As an example, the hole transport layer HTL may include carbazole derivatives such as N-phenylcarbazole and polyvinylcarbazole, fluorene derivatives, N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1-biphenyl]-4,4'-diamine (TPD), triphenylamine derivatives such as 4,4',4"-tri(N-carbazolyl)triphenylamine (CTA), N,N'-di(1-naphthyl)-N,N'-diphenylbenzidine (NPB) or 4,4'-cyclohexylenebis[N,N-bis(4-methylphenyl)aniline) (TAPC), etc., but is not limited thereto.

[0144] The organic light emitting layer EML may include a first organic light emitting layer EML1, a second organic light emitting layer EML2, and a third organic light emitting layer EML3 respectively overlapping the first to third emission regions EA1, EA2, and EA3. The organic light emitting layer EML may include a host material and a dopant material. By using a phosphorescent material or a fluorescent material as a dopant in the host material and mixing the host material and the dopant material with each other, the first organic light emitting layer EML1, the second organic light emitting layer EML2, and the third organic light emitting layer EML3 may emit light of different colors.

[0145] The host material is not particularly limited as long as it is a commonly used material, but can be, for example, tris(8-hydroxyquinoline)aluminum (Alq 3 ), 4,4'-bis(N-carbazolyl)-1,1'-biphenyl (CBP), poly(n-vinylcarbazole) (PVK), 9,10-di(naphthalene-2-yl)anthracene (AND), 4,4',4"-tri(carbazol-9-yl)-triphenylamine (TCTA), 1,3,5-tri(N-phenylbenzimidazol-2-yl)benzene (TPBi), 3-tert-butyl-9,10-di(naphthalene-2-yl)anthracene (TBADN), distyrylarylene (DSA), 4,4'-bis(9-carbazolyl)-2,2"-dimethyl-biphenyl (CDBP) or 2-methyl-9,10-bis(naphthalene-2-yl)anthracene (MADN), etc.

[0146] As an example, in the case where the first organic light-emitting layer EML1 emits red light, the first organic light-emitting layer EML1 may include a fluorescent material including perylene or tris(dibenzoylmethane)phenanthroline europium (PBD:Eu(DBM)3(phen)). In this case, the dopant material included in the first organic light-emitting layer EML1 may be selected from metal complexes, for example, organic metal complexes such as bis(1-phenylquinoline)iridium acetylacetonate (PIQIr(acac)), bis(1-phenylquinoline)iridium acetylacetonate (PQIr(acac)), tris(1-phenylquinoline)iridium (PQIr), and platinum octaethylporphyrin (PtOEP).

[0147] As an example, in the case where the second organic light emitting layer EML2 emits green light, the second organic light emitting layer EML2 may include a layer including tris(8-hydroxyquinoline)aluminum (Alq 3 In this case, the dopant material included in the second organic light emitting layer EML2 may be selected from metal complexes, for example, organic metal complexes such as fac-tris(2-phenylpyridine)iridium (Ir(ppy) 3 ).

[0148] As an example, in the case where the third organic light-emitting layer EML3 emits blue light, the third organic light-emitting layer EML3 may include a fluorescent material including any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylbenzene (DSB), distyrylarylene (DSA), polyfluorene (PFO) polymers, and poly(p-phenylene vinylene) (PPV) polymers. In this case, the dopant material included in the third organic light-emitting layer EML3 may be selected from a metal complex, for example, an organic metal complex such as (4,6-F2ppy)2Irpic. However, the materials included in the organic light-emitting layer EML are merely examples, and the present disclosure is not limited thereto.

[0149] A common electron transport layer mETL may be disposed on the light emitting layer EL. The common electron transport layer mETL may be a common layer disposed to overlap the first to third emission regions EA1, EA2, and EA3 and the non-emission region NLA. In other words, the common electron transport layer mETL disposed to overlap the first to third emission regions EA1, EA2, and EA3 may extend to each other. The common electron transport layer mETL may cover the underlying structure along the underlying structure. The common electron transport layer mETL may contact and cover the two side surfaces of the first to third light emitting layers EL1, EL2, and EL3 facing the non-emission region NLA, the upper surface of the first to third light emitting layers EL1, EL2, and EL3 facing the common electron transport layer mETL, and the upper surface of the first portion 151a of the inorganic pixel defining layer 151.

[0150] The common electron transport layer mETL may be used to inject and transport electrons transmitted from the common electrode CE to the light emitting layer EL. As an example, the common electron transport layer mETL may include tris(8-hydroxyquinoline)aluminum (Alq 3 ), 1,3,5-tris(1-phenyl-1H-benzo[d]imidazol-2-yl)phenyl (TPBi), 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP), 4,7-diphenyl-1,10-phenanthroline (Bphen), 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ), 4-(naphthalen-1-yl)-3,5-diphenyl-4H-1,2,4- triazole (NTAZ), 2-(4-biphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (tBu-PBD), bis(2-methyl-8-hydroxyquinoline-N1,O8)-(1,1'-biphenyl-4-hydroxy)aluminum (BAlq), bis(benzoquinoline-10-hydroxy) (Bebq2), 9,10-di(naphthalene-2-yl)anthracene (AND) and mixtures thereof, such as LiF, lithium quinoline (LiQ), Li 2 O, BaO, NaCl, lanthanide metals of CsF and Yb, or halogenated metals such as RbCl and RbI, but are not limited thereto.

[0151] The common electrode CE may be disposed on the common electron transport layer mETL. The common electrode CE according to the embodiment may be a common layer disposed to overlap the first to third emission regions EA1, EA2, and EA3 and the non-emission region NLA.

[0152] The common electrode CE may include a transparent conductive material to emit light generated from the light emitting layer EL. The common electrode CE may receive a common voltage or a low potential voltage. When the anode electrode AE ​​receives a voltage corresponding to the data voltage and the common electrode CE receives a low potential voltage, holes and electrons may move to the organic light emitting layer EML through the hole transport layer HTL and the hole injection layer HIL and the common electron transport layer mETL, respectively, and may be combined with each other in the organic light emitting layer EML to emit light. For example, a potential difference is formed between the anode electrode AE ​​and the common electrode CE, so that the light emitting layer EL may emit light.

[0153] In an embodiment, the common electrode CE may include a material such as Li, Ca, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, Ba, or a compound thereof (e.g., LiF or BaF 2The common electrode CE may further include a transparent metal oxide layer disposed on the material layer having a small work function.

[0154] The capping layer 159 may be disposed on the common electrode CE. The capping layer 159 may be a common layer disposed to overlap the first to third emission regions EA1, EA2, and EA3 and the non-emission region NLA. The capping layer 159 may prevent the plurality of light emitting elements ED from being damaged by external air. As an example, the capping layer 159 may include aluminum oxide (Al 2 O 3 ), titanium oxide (Ti 2 O 3 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), zinc oxide (ZnO x , which may be ZnO and / or ZnO 2 ), silicon oxide (SiO 2 ), silicon nitride (Si 3 N 4 ) and silicon oxynitride (Si 2 N 2 O).

[0155] The thin film encapsulation layer 170 may be positioned on the capping layer 159. The thin film encapsulation layer 170 may be disposed in a portion overlapping the first to third emission regions EA1, EA2, and EA3 and the non-emission region NLA.

[0156] The thin film encapsulation layer 170 may include at least one inorganic film to prevent oxygen or moisture from penetrating into the display element layer 150. The thin film encapsulation layer 170 may include at least one organic film to protect the display element layer 150 from foreign matter such as dust. The thin film encapsulation layer 170 may include a first encapsulation layer 171, a second encapsulation layer 173, and a third encapsulation layer 175 that may be sequentially stacked. The first encapsulation layer 171 and the third encapsulation layer 175 may be inorganic encapsulation layers, and the second encapsulation layer 173 disposed between the first encapsulation layer 171 and the third encapsulation layer 175 may be an organic encapsulation layer.

[0157] Each of the first encapsulation layer 171 and the third encapsulation layer 175 may include one or more inorganic insulating materials. The inorganic insulating material may include aluminum oxide (Al 2 O 3 ), titanium oxide (Ti 2 O 3 ), Tantalum Oxide (Ta 2 O5 ), hafnium oxide (HfO 2 ), zinc oxide (ZnO x , which may be ZnO and / or ZnO 2 ), silicon oxide (SiO 2 ), silicon nitride (Si 3 N 4 ) and silicon oxynitride (Si 2 N 2 O).

[0158] The second encapsulation layer 173 may include a polymer material. The polymer material may include a silicone resin, an acrylic resin, an epoxy resin, and a mixture thereof. For example, the second encapsulation layer 173 may include an acrylic resin such as polymethyl methacrylate or polyacrylic acid. The second encapsulation layer 173 may be formed by curing a monomer or applying a polymer.

[0159] The touch sensor layer 180 may be disposed on the thin film encapsulation layer 170. The touch sensor layer 180 may include a touch buffer layer 181, a touch insulating layer 183, touch electrodes TE, and a touch protection layer 185.

[0160] The touch buffer layer 181 may be disposed on the thin film encapsulation layer 170. The touch buffer layer 181 may have an insulating function and an optical function. The touch buffer layer 181 may include at least one inorganic film. Alternatively, the touch buffer layer 181 may be omitted.

[0161] Although not shown in the drawings, a connection electrode that electrically connects the touch electrodes TE to each other may be provided on the touch buffer layer 181. The connection electrode may be formed as a single layer made of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or ITO, or may be formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO / APC / ITO). The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0162] The touch insulating layer 183 may cover the touch buffer layer 181. The touch insulating layer 183 may have an insulating function as well as an optical function. For example, the touch insulating layer 183 may be an inorganic film including at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0163] Some of the touch electrodes TE may be disposed on the touch insulating layer 183. Each of the touch electrodes TE may not overlap the first to third emission areas EA1, EA2, and EA3, and may be positioned in the non-emission area NLA. Each of the touch electrodes TE may be formed as a single layer made of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or ITO, or may be formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0164] The touch protection layer 185 may cover the touch electrode TE and the touch insulating layer 183 . The touch protection layer 185 may have an insulating function as well as an optical function. The touch protection layer 185 may be made of the example materials in the touch insulating layer 183 .

[0165] The light blocking layer BM may be disposed on the touch sensor layer 180. The light blocking layer BM may be disposed to overlap the inorganic pixel defining layer 151 in a portion overlapping the non-emission area NLA.

[0166] The light blocking layer BM may include a light absorbing material. For example, the light blocking layer BM may include an inorganic black pigment or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include at least one of lactam black, perylene black, and aniline black, but the present disclosure is not limited thereto. The light blocking layer BM may prevent color mixing caused by penetration of visible light between the first to third emission areas EA1, EA2, and EA3 to improve the color gamut of the display device 10.

[0167] The color filter layer 190 may be disposed on each of the touch protection layer 185 and the light blocking layer BM so as to overlap with the first to third emission areas EA1, EA2, and EA3. The color filter layer 190 may include a first color filter 191, a second color filter 193, and a third color filter 195 disposed to correspond to the first to third emission areas EA1, EA2, and EA3, respectively. The respective color filters 191, 193, and 195 that overlap with the first to third emission areas EA1, EA2, and EA3, respectively, may include a colorant such as a dye or a pigment that absorbs light of a wavelength band other than a given wavelength band, and may be disposed to correspond to the color of light emitted from the first to third emission areas EA1, EA2, and EA3. For example, the first color filter 191 may be a red color filter that is disposed to overlap with the first emission area EA1 and transmits only red light as the first color of light. The second color filter 193 may be a green color filter disposed to overlap with the second emission area EA2 and transmit only green light as the second color light, and the third color filter 195 may be a blue color filter disposed to overlap with the third emission area EA3 and transmit only blue light as the third color light. The present disclosure is not limited thereto.

[0168] According to an embodiment, the color filter layer 190 may also be omitted.

[0169] An overcoat layer OC may be disposed on the color filter layer 190 to planarize the upper end of the color filter layer 190. The overcoat layer OC may be a colorless light-transmitting layer having no color in the visible light band. For example, the overcoat layer OC may include a colorless light-transmitting organic material such as acrylic resin.

[0170] Figure 8 yes Figure 6 An enlarged cross-sectional view of the first emission area EA1 in FIG.

[0171] refer to Figure 8 , the inorganic pixel defining layer 151 according to the embodiment may define an opening OP, and the opening OP may overlap the first emission area EA1. The width of the opening OP in the first direction (X-axis direction) may be smaller than the width of the first emission area EA1 in the first direction (X-axis direction), and the opening OP may be positioned inside the first emission area EA1.

[0172] The first portion 151a of the inorganic pixel defining layer 151 included in the embodiment may be positioned on the second through hole layer 139 in a portion overlapping the non-emission area NLA, and may be disposed to cover a portion of the first anode electrode AE1 in a portion overlapping the first emission area EA1. The second portion 151b according to the embodiment may be disposed on the first anode electrode AE1 so as to contact the first anode electrode AE1 in a portion overlapping the first emission area EA1.

[0173] In an embodiment, a groove grv may be formed between the first portion 151a and the second portion 151b of the inorganic pixel defining layer 151. In other words, the first portion 151a and the second portion 151b may be spaced apart from each other, with the groove grv being between the first portion 151a and the second portion 151b. The groove grv formed between the first portion 151a and the second portion 151b may be a portion recessed toward the anode electrode AE. The first portion 151a and the second portion 151b of the inorganic pixel defining layer 151 included in the embodiment may be integral with each other, and may be formed to be spaced apart from each other by a subsequent etching process with the groove grv being between them. Accordingly, the first portion 151a and the second portion 151b according to the embodiment may include the same material. According to an embodiment, within the spirit and scope of the present disclosure, the groove grv may be referred to as a hole, a recessed portion, a groove portion, a recessed portion, or the like.

[0174] The first light-emitting layer EL1 may be disposed on a plurality of inorganic pixel defining layers 151 adjacent to each other and on the first anode electrode AE1. The first light-emitting layer EL1 may be formed to cover the first portion 151a and the second portion 151b of the inorganic pixel defining layer 151, and may be formed to fill the groove grv formed between the first portion 151a and the second portion 151b. The light-emitting layer EL according to the embodiment is formed to fill the groove grv included in the inorganic pixel defining layer 151, so that the bonding area between the light-emitting layer EL and the underlying structure may be increased. For example, the light-emitting layer EL according to the embodiment may increase the bonding strength with the underlying structure. As a result, the display device 10 according to the embodiment may solve the peeling defect of the light-emitting layer EL caused by the etching process and the cleaning process in the manufacturing process. This may help to form the common electron transport layer mETL and the common electrode CE in subsequent processes without disconnection defects.

[0175] The light emitting layer EL according to the embodiment may completely fill the groove grv, but is not limited thereto.

[0176] In an embodiment, the height H2 of the inorganic pixel defining layer 151 in the third direction (Z-axis direction) may be less than the height H1 of the first light emitting layer EL1 in the third direction (Z-axis direction). As an example, the height H2 of the inorganic pixel defining layer 151 may be less than half of the height H1 of the first light emitting layer EL1.

[0177] refer to Figure 6 and Figure 8, the common electron transport layer mETL and the common electrode CE according to the embodiment can be completely formed to overlap with the first to third emission regions EA1, EA2 and EA3 and the non-emission region NLA, and can cover the underlying structure along the contour of the underlying structure. In other words, the common electron transport layer mETL according to the embodiment can be positioned between the first portion 151a of the inorganic pixel defining layer 151 and the common electrode CE in the portion overlapping with the non-emission region NLA in the third direction (Z-axis direction), and can contact the first portion 151a of the inorganic pixel defining layer 151 and the common electrode CE in the portion overlapping with the non-emission region NLA in the third direction (Z-axis direction).

[0178] As described above, the light emitting layer EL according to the embodiment can be formed in the manufacturing process without using a mask, and therefore, the display device 10 according to the embodiment can solve the mask shadow defect. The mask shadow defect may refer to a phenomenon in which a portion of the material of the light emitting layer EL is formed in a portion overlapping the non-emission area NLA.

[0179] The capping layer 159, the first encapsulation layer 171, and the second encapsulation layer 173 may be sequentially stacked on the common electrode CE. Common descriptions will be omitted. For ease of explanation, the first anode electrode AE1 and the first light-emitting layer EL1 disposed to overlap the first emission area EA1 have been illustrated and described, but the first to third anode electrodes AE1, AE2, and AE3 and the first to third light-emitting layers EL1, EL2, and EL3 may have the same structure and characteristics.

[0180] Fig. 9 is an enlarged cross-sectional view of the first emission area EA1 according to an embodiment.

[0181] refer to Fig. 9 , the display device 30 according to the embodiment is different from the display device 10 according to the embodiment in that the second portion 151b of the inorganic pixel defining layer 151 may include a plurality of grooves grv. The inorganic pixel defining layer 151 according to the embodiment may include a first portion 151a and a second portion 151b that are integrated with each other in a manufacturing process, and are formed to overlap the non-emission area NLA and the first to third emission areas EA1, EA2, and EA3, respectively, through a photolithography process. A plurality of second portions 151b may be formed to overlap each of the first to third emission areas EA1, EA2, and EA3, and a groove grv may be formed between a plurality of second portions 151b adjacent to each other. Fig. 9The number of the second parts 151b is shown as two, but the present disclosure is not limited thereto. In an embodiment, a plurality of second parts 151b (such as two or more second parts 151b) may be formed, and the groove grv may be formed between the plurality of second parts 151b adjacent to each other, respectively.

[0182] The first light emitting layer EL1 according to the embodiment may be formed to fill the plurality of grooves grv included in the inorganic pixel defining layer 151 according to the embodiment. Accordingly, the bonding area and bonding strength between the first light emitting layer EL1 according to the embodiment and the underlying structure may be greater than the bonding area and bonding strength between the first light emitting layer EL1 and the underlying structure of the display device 10 according to the embodiment. Accordingly, the display device 30 according to the embodiment may solve the peeling defect of the light emitting layer EL caused in the manufacturing process. This may help to form the common electron transport layer mETL and the common electrode CE in the subsequent process without the disconnection defect.

[0183] The height H2 of the inorganic pixel defining layer 151 in the third direction (Z-axis direction) according to the embodiment may be less than the height H1 of the first light emitting layer EL1 in the third direction (Z-axis direction). As an example, the height H2 of the inorganic pixel defining layer 151 may be less than half of the height H1 of the first light emitting layer EL1. Repeated descriptions will be omitted.

[0184] Fig.10 According to the embodiment Figure 5 Schematic cross-sectional view of the display area taken along line X1-X1'. Fig.11 yes Fig.10 An enlarged cross-sectional view of region C in FIG.

[0185] refer to Fig.10 and Fig.11 , the display device 50 according to the embodiment may be different from the display device 10 according to the embodiment and the display device 30 according to the embodiment in the shape of the inorganic pixel defining layer 151 in the portion overlapping the non-emission area NLA. For example, the inorganic pixel defining layer 151 of each of the display device 10 and the display device 30 may increase the bonding area between the light emitting layer EL and the underlying structure by including a groove grv in a direction parallel to the substrate 110 (e.g., in the first direction (X-axis direction)), while the display device 50 according to the embodiment may increase the bonding area between the light emitting layer EL and the inorganic pixel defining layer 151 by including a plurality of grooves grv in a direction perpendicular to the substrate 110 (e.g., in the third direction (Z-axis direction)). The inorganic pixel defining layer 151 included in the display device 50 according to the embodiment may be formed in a multilayer structure including different materials. The groove grv included in the inorganic pixel defining layer 151 according to the embodiment may be referred to as an undercut according to the embodiment.

[0186] The inorganic pixel defining layer 151 according to the embodiment may be positioned on the second via layer 139 and the plurality of anode electrodes AE adjacent to each other. The inorganic pixel defining layer 151 according to the embodiment may allow the first to third anode electrodes AE1, AE2, and AE3 to be spaced apart and insulated from each other.

[0187] In an embodiment, the inorganic pixel defining layer 151 according to the embodiment may include a first portion 151p, a second portion 151q, a third portion 151r, and a fourth portion 151s stacked in a third direction (Z-axis direction). The first portion 151p and the third portion 151r of the inorganic pixel defining layer 151 may include the same inorganic material, and the second portion 151q and the fourth portion 151s of the inorganic pixel defining layer 151 may also include the same material. However, the first portion 151p of the inorganic pixel defining layer 151 may include a different inorganic material from the second portion 151q and the fourth portion 151s, and the second portion 151q of the inorganic pixel defining layer 151 may include a different inorganic material from the first portion 151p and the third portion 151r.

[0188] In an embodiment, the height H5 of the inorganic pixel defining layer 151 according to the embodiment in the third direction (Z-axis direction) may be less than the height H1 of the first to third light-emitting layers EL1, EL2, and EL3 in the third direction (Z-axis direction). As an example, the height H5 of the inorganic pixel defining layer 151 according to the embodiment may be less than half of the height H1 of the first to third light-emitting layers EL1, EL2, and EL3.

[0189] Fig.12 yes Fig.11 An enlarged cross-sectional view of region P in FIG.

[0190] Apart from Fig.10 and Fig.11 In addition, reference Fig.12 , the inorganic pixel defining layer 151 according to the embodiment may be formed using a dry etching process in the manufacturing process. The inorganic pixel defining layer 151 according to the embodiment may include different materials and, accordingly, may have different etching selectivities with respect to the etching solution. This will be described in detail later.

[0191] The first portion 151p included in the inorganic pixel defining layer 151 according to the embodiment may be positioned on the second through hole layer 139 and the plurality of anode electrodes AE adjacent to each other. The first portion 151p according to the embodiment may cover portions of the plurality of anode electrodes AE adjacent to each other. The first portion 151p according to the embodiment may allow the plurality of anode electrodes AE adjacent to each other to be spaced apart from each other and insulated from each other.

[0192] The first portion 151p according to the embodiment may include an inorganic material such as silicon nitride or silicon oxynitride. As described above, the first portion 151p according to the embodiment may include the same inorganic material as the third portion 151r, and may include a different inorganic material from the second portion 151q and the fourth portion 151s.

[0193] In an embodiment, the height Hp of the first portion 151p in the third direction (Z-axis direction) may be greater than the heights of the second portion 151q, the third portion 151r, and the fourth portion 151s in the third direction (Z-axis direction). The height Hp of the first portion 151p in the third direction (Z-axis direction) may be greater than the heights of the plurality of anode electrodes AE in the third direction (Z-axis direction). As an example, the height Hp of the first portion 151p may be about 0.1 μm, but is not limited thereto.

[0194] In an embodiment, the second portion 151q according to the embodiment may be positioned on the first portion 151p so as to contact the first portion 151p. The second portion 151q according to the embodiment may include an inorganic material such as silicon oxide. As described above, the second portion 151q may include the same inorganic material as the fourth portion 151s, and may include a different inorganic material from the first portion 151p and the third portion 151r.

[0195] In an embodiment, the height Hq of the second portion 151q in the third direction (Z-axis direction) may be less than the height Hp of the first portion 151p in the third direction (Z-axis direction). As an example, the height Hq of the second portion 151q may be about 0.02 μm, but is not limited thereto.

[0196] In the manufacturing process of the inorganic pixel defining layer 151 according to the embodiment, the etching selectivity of the second portion 151q may be less than the etching selectivity of the first portion 151p. This may mean that the etching rate of the first portion 151p is higher than the etching rate of the second portion 151q. Accordingly, the two side surfaces q1 of the second portion 151q facing the first to third light-emitting layers EL1, EL2 and EL3 may protrude toward each of the first to third emission regions EA1, EA2 and EA3 than the two side surfaces p1 of the first portion 151p facing the first to third light-emitting layers EL1, EL2 and EL3. This may mean that the two side surfaces p1 of the first portion 151p facing the first to third light-emitting layers EL1, EL2 and EL3 are recessed toward the non-emission region NLA than the two side surfaces q1 of the second portion 151q facing the first to third light-emitting layers EL1, EL2 and EL3. As a result, according to an embodiment, a groove grv1 may be formed between the first portion 151p and the second portion 151q in a portion overlapping each of the first to third emission areas EA1, EA2, and EA3.

[0197] In other words, in a portion overlapping with each of the first to third emission areas EA1, EA2, and EA3, the second portion 151q according to the embodiment may have a protruding portion protruding more than the first portion 151p in the first direction (X-axis direction), and an undercut may be formed between the protruding portion of the second portion 151q and the side surface p1 of the first portion 151p. The second portion 151q according to the embodiment may be spaced apart from the anode electrode AE ​​in the third direction (Z-axis direction) by the groove grv1 formed between the first portion 151p and the second portion 151q according to the embodiment.

[0198] The third portion 151r according to the embodiment may be positioned on the second portion 151q so as to contact the second portion 151q. The third portion 151r may include an inorganic material such as silicon nitride or silicon oxynitride. As described above, the third portion 151r according to the embodiment may include the same inorganic material as the first portion 151p, and may include a different inorganic material from the second portion 151q and the fourth portion 151s.

[0199] In an embodiment, the height Hr of the third portion 151r in the third direction (Z-axis direction) may be less than the height Hp of the first portion 151p in the third direction (Z-axis direction). As an example, the height Hr of the third portion 151r may be about 0.02 μm, but is not limited thereto.

[0200] The fourth portion 151s according to the embodiment may be positioned on the third portion 151r so as to contact the third portion 151r. The fourth portion 151s may include an inorganic material such as silicon oxide. As described above, the fourth portion 151s may include the same inorganic material as the second portion 151q, and may include a different inorganic material than the first portion 151p and the third portion 151r.

[0201] In an embodiment, the height Hs of the fourth portion 151s in the third direction (Z-axis direction) may be less than the height Hp of the first portion 151p in the third direction (Z-axis direction). As an example, the height Hs of the fourth portion 151s may be about 0.02 μm, but is not limited thereto.

[0202] In the manufacturing process of the inorganic pixel defining layer 151 according to the embodiment, the etching selectivity of the fourth portion 151s may be less than the etching selectivity of the third portion 151r. This may mean that the etching rate of the third portion 151r is higher than the etching rate of the fourth portion 151s. Accordingly, the two side surfaces s1 of the fourth portion 151s facing the first to third light-emitting layers EL1, EL2 and EL3 may protrude toward each of the first to third emission regions EA1, EA2 and EA3 than the two side surfaces r1 of the third portion 151r facing the first to third light-emitting layers EL1, EL2 and EL3. This may mean that the two side surfaces r1 of the third portion 151r facing the first to third light-emitting layers EL1, EL2 and EL3 are recessed toward the non-emission region NLA than the two side surfaces s1 of the fourth portion 151s facing the first to third light-emitting layers EL1, EL2 and EL3. As a result, according to an embodiment, a groove grv2 may be formed between the third portion 151 r and the fourth portion 151 s in a portion overlapping each of the first to third emission areas EA1 , EA2 , and EA3 .

[0203] In other words, in the portion overlapping with each of the first to third emission areas EA1, EA2 and EA3, the fourth portion 151s according to the embodiment may have a protruding portion that protrudes more than the third portion 151r in the first direction (X-axis direction), and an undercut may be formed between the protruding portion of the fourth portion 151s and the side surface r1 of the third portion 151r.

[0204] In an embodiment, the groove grv1 formed between the first portion 151p and the second portion 151q may have a width Wg1 in the first direction (X-axis direction), and the width Wg1 may be about 0.05 μm or less. The groove grv2 formed between the third portion 151r and the fourth portion 151s may have a width Wg2 in the first direction (X-axis direction), and the width Wg2 may be about 0.05 μm or less. The width Wg1 of the groove grv1 formed between the first portion 151p and the second portion 151q and the width Wg2 of the groove grv2 formed between the third portion 151r and the fourth portion 151s may be the same as or different from each other.

[0205] refer to Figures 10 to 12, the light emitting layer EL according to the embodiment may be formed to fill the outline formed by the first to fourth parts 151p, 151q, 151r and 151s of the inorganic pixel defining layer 151 in the portion overlapping each of the first to third emission areas EA1, EA2 and EA3. For example, the first light emitting layer EL1 according to the embodiment may fill the groove grv1 formed between the first part 151p and the second part 151q of the inorganic pixel defining layer 151 and the groove grv2 formed between the third part 151r and the fourth part 151s of the inorganic pixel defining layer 151. In other words, the first light emitting layer EL1 according to the embodiment may fill the undercut formed between the first part 151p and the second part 151q and the undercut formed between the third part 151r and the fourth part 151s.

[0206] For example, the first to third light-emitting layers EL1, EL2, and EL3 according to the embodiment may be formed to fill the plurality of grooves grv. As a result, the bonding area and bonding strength between the first to third light-emitting layers EL1, EL2, and EL3 and the inorganic pixel defining layer 151 may be increased. Accordingly, the display device 50 may solve the peeling defect of the first to third light-emitting layers EL1, EL2, and EL3 in the manufacturing process, which may help to form the common electron transport layer mETL and the common electrode CE in the subsequent process without disconnection defects.

[0207] Figures 13 to 22 It is a graphic manufacturing Figure 6 Schematic cross-sectional view of a method for displaying a layer of a display element in FIG. Figures 13 to 22 , the formation order of the inorganic pixel defining layer 151 overlapping the non-emission area NLA and the plurality of light emitting elements ED overlapping the first to third emission areas EA1, EA2 and EA3 is schematically illustrated. Hereinafter, the manufacturing process of the display device 10 will be described in conjunction with the formation order of each layer.

[0208] refer to Fig.13 , a plurality of anode electrodes AE are formed on the thin film transistor layer 130. The plurality of anode electrodes AE may include first to third anode electrodes AE1, AE2, and AE3, and the first to third anode electrodes AE1, AE2, and AE3 may be later disposed to overlap the first to third emission regions EA1, EA2, and EA3, respectively. Fig.13 Although not shown in the figure, a thin film transistor layer 130 may be provided on the substrate 110, and the structure of the thin film transistor layer 130 is the same as that of the above reference Figure 6 The structures described are the same and their detailed description will be omitted.

[0209] Then, refer to Fig.14 and Fig.15, the pixel defining material layer 151L is completely formed on the thin film transistor layer 130 and the plurality of anode electrodes AE. A photoresist PR is formed on the pixel defining material layer 151L, and a first etching process (first etching) is performed to etch a portion of the pixel defining material layer 151L using the photoresist PR as a mask. As an example, the first etching process (first etching) may be a dry etching process. By this process, a Fig.15 The first portion 151a and the second portion 151b of the inorganic pixel defining layer 151 are shown in FIG. 1 , and a groove grv may be formed between the first portion 151a and the second portion 151b of the inorganic pixel defining layer 151. The groove grv according to an embodiment may refer to a portion recessed toward the anode electrode AE, and may refer to a hole, a recessed portion, a groove portion, a concave portion, or the like according to an embodiment.

[0210] Then, refer to Fig.16 , the first light emitting material layer EL1L may be formed to completely cover the plurality of anode electrodes AE and the inorganic pixel defining layer 151. The first light emitting material layer EL1L may include Figure 7 , a hole injection layer HIL, a hole transport layer HTL and a first organic light-emitting layer EML1 are illustrated in the figure. A sacrificial layer SFL may be provided on the first light-emitting material layer EL1L. In the case where the first light-emitting material layer EL1L undergoes a photolithography process in a subsequent process, the sacrificial layer SFL may protect it from the etching solution. The sacrificial layer SFL may be formed directly on the first light-emitting material layer EL1L and may include a metal material. As an example, the sacrificial layer SFL may include aluminum (Al) and silver (Ag), etc., but is not limited thereto. In this process, the first light-emitting material layer EL1L may be formed to fill the groove grv included in the inorganic pixel defining layer 151. The first light-emitting material layer EL1L according to an embodiment may increase the bonding area and bonding strength with the underlying structure by filling the groove grv included in the inorganic pixel defining layer 151.

[0211] refer to Fig.17 , a photoresist PR is formed on the sacrificial layer SFL overlapping the first anode electrode AE1, and a second etching process (second etching) is performed using the photoresist PR as a mask to etch the sacrificial layer SFL and a portion of the first light-emitting material layer EL1L. In this process, the first light-emitting material layer EL1L may be exposed to the etching process and the cleaning process. Because the first light-emitting material layer EL1L according to the embodiment has a large bonding area and high bonding strength with the underlying structure due to the groove grv included in the inorganic pixel defining layer 151, even if the first light-emitting material layer EL1L undergoes the etching process and the cleaning process, the peeling defect of the first light-emitting material layer EL1L can be solved.

[0212] Through this process, it is possible to form Fig.18 The first light emitting layer EL1 and the sacrificial layer SFL illustrated in FIG. 2 are disposed to overlap with the first anode electrode AE1. As the second etching process, the dry etching process may be performed alone, or the dry etching process and the wet etching process may be alternately performed.

[0213] refer to Fig.18 , the second light emitting material layer EL2L and the sacrificial layer SFL are completely formed on the inorganic pixel defining layer 151, the second anode electrode AE2, the third anode electrode AE3, and the sacrificial layer SFL positioned on the first light emitting layer EL1. In this process, the second light emitting material layer EL2L may cover the first light emitting layer EL1 along the first light emitting layer EL1. The second light emitting material layer EL2L may include Figure 7 The hole injection layer HIL, the hole transport layer HTL and the second organic light emitting layer EML2 are shown in the figure.

[0214] Subsequently, a photoresist PR is formed on the sacrificial layer SFL overlapping the second anode electrode AE2, and a third etching process (third etching) is performed to etch the sacrificial layer SFL and a portion of the second light emitting material layer EL2L using the photoresist PR as a mask. The third etching process may be the same process as the second etching process. In this process, a Fig.19 1 and 2. The second light emitting layer EL2 and the sacrificial layer SFL are shown in the figure as being arranged to overlap with the second anode electrode AE2. In this process, the second light emitting material layer EL2L may be exposed to an etching process and a cleaning process. Because the second light emitting material layer EL2L according to the embodiment has a large bonding area and a high bonding strength with the underlying structure due to the groove grv included in the inorganic pixel defining layer 151, even if the second light emitting material layer EL2L undergoes an etching process and a cleaning process, the peeling defect of the second light emitting material layer EL2L can be solved.

[0215] The third light emitting layer EL3 and the sacrificial layer SFL overlapping the third anode electrode AE3 are formed by repeating the previously performed process. For example, the third light emitting layer EL3 and the sacrificial layer SFL overlapping the third light emitting layer EL3 may be formed by forming a third light emitting material layer on the sacrificial layer SFL overlapping the first light emitting layer EL1, the sacrificial layer SFL overlapping the second light emitting layer EL2, the inorganic pixel defining layer 151, and the third anode electrode AE3, and forming a photoresist PR on the sacrificial layer SFL overlapping the third anode electrode AE3. In this process, the third light emitting layer EL3 and the sacrificial layer SFL arranged to overlap the third anode electrode AE3 may be formed. Because the third light emitting material layer according to the embodiment has a large bonding area and a high bonding strength with the lower structure due to the groove grv included in the inorganic pixel defining layer 151, the peeling defect of the third light emitting material layer may be solved even if the third light emitting material layer undergoes an etching process and a cleaning process.

[0216] like Fig.19 As illustrated in FIG. 1 , the first light emitting layer EL1 , the second light emitting layer EL2 , and the third light emitting layer EL3 are formed by a photolithography process, and therefore, both side surfaces may be made clear in the first direction (X-axis direction) without a mask shadow defect.

[0217] refer to Fig. 20 and Fig.21 , a fourth etching process (fourth etching) of removing the sacrificial layer SFL disposed to overlap the corresponding light emitting layer EL is performed. As the fourth etching process, a wet etching process may be performed, and an acidic etching solution may be used as an etching solution. In this process, the etching solution may be limited to an acidic etching solution in order to minimize damage to the plurality of light emitting layers EL. In this process, the sacrificial layer SFL may be removed, and as shown in FIG. Fig.21 As shown in the figure, a first light-emitting layer EL1, a second light-emitting layer EL2 and a third light-emitting layer EL3 can be formed. In this process, it is possible to define Figure 6 FIG. 4 shows a plurality of emission areas EA and non-emission areas NLA illustrated in FIG.

[0218] Finally, reference Fig. 22 , a common electron transport layer mETL is completely formed to cover the first light emitting layer EL1, the second light emitting layer EL2, the third light emitting layer EL3 and the inorganic pixel defining layer 151. A common electrode CE and a capping layer 159 are completely formed on the common electron transport layer mETL. Subsequently, although Fig. 22Although not shown in the figure, the display device 10 may be manufactured by forming the first encapsulation layer 171, the second encapsulation layer 173, and the third encapsulation layer 175 to form the thin film encapsulation layer 170 and by forming the touch sensor layer 180, the light blocking layer BM, the color filter layer 190, and the overcoat layer OC. According to an embodiment, the color filter layer 190 may be omitted.

[0219] Various embodiments have been disclosed herein, and although terms are employed, they are used and interpreted in a general and descriptive sense only and not for purposes of limitation. In some cases, as will be apparent to one of ordinary skill in the art, features, characteristics, and / or elements described in connection with an embodiment may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise specifically indicated. Accordingly, one of ordinary skill in the art will understand that various modifications may be made to form and detail without departing from the spirit and scope of the present disclosure and as set forth in the claims.

Claims

1. A display device, comprising: a substrate including an emitting region and a non-emitting region; an anode electrode, disposed on the emission region of the substrate; A pixel defining layer, disposed on the non-emitting area of ​​the substrate, wherein the pixel defining layer defines an opening; A light-emitting layer is disposed on the anode electrode; A common electron layer, disposed on the light-emitting layer and the pixel defining layer; as well as A common electrode is arranged on the common electron layer, wherein: The pixel defining layer includes: a first portion overlapping the non-emitting area; and a second portion overlapping the emitting area and spaced apart from the first portion in a direction parallel to the substrate, a groove is provided between the first portion and the second portion, and the groove is recessed toward the substrate, The light emitting layer contacts the first portion and the second portion, and The light emitting layer fills the groove between the first portion and the second portion.

2. The display device according to claim 1, wherein: A height of the pixel defining layer in a direction perpendicular to the substrate is less than half of a height of the light emitting layer in the direction perpendicular to the substrate.

3. The display device according to claim 2, wherein: The second portion is completely surrounded by the anode electrode and the light emitting layer.

4. The display device according to claim 3, wherein: The pixel defining layer includes an inorganic material, and The first portion and the second portion include the same material.

5. The display device according to claim 4, wherein: The opening is completely surrounded by the emission area in plan view.

6. The display device according to claim 1, wherein: The common electron layer is disposed between the pixel defining layer and the common electrode in a portion overlapping the non-emission region.

7. The display device according to claim 6, wherein: The common electron layer contacts the first portion and the common electrode in the portion overlapping the non-emission region.

8. The display device according to claim 7, wherein: A side surface of the light emitting layer facing the non-emission region contacts the common electron layer.

9. The display device according to any one of claims 1 to 8, wherein: The light emitting layer is formed by photolithography.

10. The display device according to claim 1, wherein: The second portion includes a plurality of grooves recessed in a direction toward the substrate.

11. The display device according to claim 10, wherein: The light emitting layer fills the plurality of grooves included in the second portion.

12. A display device, comprising: a substrate including an emitting region and a non-emitting region; an anode electrode, disposed on the emission region of the substrate; a pixel defining layer including a first portion disposed on the non-emission region of the substrate and a second portion including a material different from that of the first portion, the second portion being disposed on the first portion; A light-emitting layer is disposed on the anode electrode; A common electron layer, disposed on the light-emitting layer and the pixel defining layer; as well as A common electrode is disposed on the common electron layer, wherein: A side surface of the second portion facing the emission region protrudes toward the emission region more than a side surface of the first portion facing the emission region, and An undercut is formed between the second portion and the side surface of the first portion in a portion overlapping the emission region.

13. The display device according to claim 12, wherein: The light emitting layer fills the undercut formed between the second portion and the side surface of the first portion.

14. The display device according to claim 13, wherein: A height of the first portion in a direction perpendicular to the substrate is greater than a height of the second portion in the direction perpendicular to the substrate.

15. The display device according to claim 12, wherein: The pixel defining layer further comprises: a third portion disposed on the second portion, the third portion and the first portion comprising the same material; and a fourth portion disposed on the third portion, the fourth portion and the second portion comprising the same material, and A side surface of the fourth portion facing the emission region protrudes toward the emission region more than a side surface of the third portion facing the emission region.

16. The display device according to claim 15, wherein: In the portion overlapping the emission region, an undercut is formed between the fourth portion and the side surface of the third portion, and The light emitting layer fills the undercut formed between the fourth portion and the side surface of the third portion.

17. The display device according to claim 16, wherein: In a direction parallel to the substrate, a width of the undercut formed between the first portion and the second portion and a width of the undercut formed between the third portion and the fourth portion are 0.05 μm or less.

18. The display device according to claim 17, wherein: The first portion and the third portion include silicon nitride or silicon oxynitride, and The second portion and the fourth portion include silicon oxide.

19. The display device according to claim 15, wherein: The common electron layer is disposed between the fourth portion and the common electrode in a portion overlapping the non-emission region, and The common electron layer contacts the fourth portion and the common electrode in the portion overlapping the non-emission region.

20. A method for manufacturing a display device, comprising: providing a substrate including an emitting region and a non-emitting region; forming a first anode electrode and a second anode electrode spaced apart from each other on the emission region of the substrate, and forming a pixel definition material layer completely covering the first anode electrode, the second anode electrode and the substrate; forming a pixel defining layer including a first portion and a second portion spaced apart from the first portion by removing a portion of the pixel defining material layer except a portion overlapping a portion of the emission region and the non-emission region by etching, wherein each of the grooves is disposed between the first portion and the second portion, and the grooves are recessed toward the substrate; forming a first light-emitting layer by forming a first light-emitting material layer that completely covers the first anode electrode, the second anode electrode, and the pixel defining layer, completely forming a sacrificial layer on the first light-emitting material layer, and removing the first light-emitting material layer and the sacrificial layer in a remaining portion except a portion overlapping the first anode electrode by etching; forming a second light-emitting layer by forming a second light-emitting material layer that completely covers the first light-emitting layer, the second anode electrode, and the pixel defining layer, completely forming a sacrificial layer on the second light-emitting material layer, and removing the second light-emitting material layer and the sacrificial layer in a remaining portion except a portion overlapping the second anode electrode by etching; as well as removing the sacrificial layer by wet etching to form a common electron layer that completely covers the first light-emitting layer, the second light-emitting layer, and the pixel defining layer, and completely forming a common electrode on the common electron layer, In the forming of the first light-emitting layer and the forming of the second light-emitting layer, the first light-emitting layer and the second light-emitting layer fill the groove disposed between the first portion and the second portion of the pixel defining layer.

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