Driving circuit, display panel and display device

Abstract

According to the driving circuit, the display panel and the display device, the driving circuit comprises N gate driving modules and a control module, each gate driving module is provided with a pre-charging unit, each pre-charging unit comprises a first thin film transistor and a second thin film transistor, and the control module is electrically connected with the N first thin film transistors and the N second thin film transistors. The control module is used for outputting a first level signal to the first thin film transistor and outputting a second level signal to the second thin film transistor according to the working condition of the driving circuit, and when the first level signal is a high level and the second level signal is a low level, the N gate driving modules are in a forward scanning mode; and otherwise, the N gate driving modules are in a reverse scanning mode, and the Nth gate driving module to the first gate driving module sequentially output the gate output signals, so that the stability of the driving circuit is improved.

Description

Technical Field

[0001] The present application relates to the technical field of display panels, and in particular to a driving circuit, a display panel and a display device. Background Art

[0002] As a flat panel display device, liquid crystal display is increasingly used in the field of high-performance display due to its small size, low power consumption, no radiation and relatively low production cost. It usually uses GDL drive to achieve pixel scanning, but there is a risk of threshold voltage change when the TFT in the GDL circuit is biased for a long time. Summary of the invention

[0003] The purpose of the present application is to provide a driving circuit, a display panel and a display device to solve the risk of threshold voltage change when the TFT in the GDL circuit is biased for a long time.

[0004] To achieve the purpose of this application, this application provides the following technical solutions:

[0005] In a first aspect, the present invention provides a driving circuit, comprising: N gate driving modules, each of which has a pre-charging unit, each of which includes a first thin film transistor and a second thin film transistor, N>1 and N is a positive integer; a control module, electrically connected to the N first thin film transistors and the N second thin film transistors, the control module being used to output a first level signal to the first thin film transistor and a second level signal to the second thin film transistor according to the working condition of the driving circuit, the working condition of the driving circuit including at least one of the ambient temperature, the working time of the first thin film transistor and the working time of the second thin film transistor; wherein, when the first level signal is high and the second level signal is low, the N gate driving modules are in a forward scanning mode, and the first gate driving module to the Nth gate driving module sequentially output the gate output signal; when the first level signal is low and the second level signal is high, the N gate driving modules are in a reverse scanning mode, and the Nth gate driving module to the first gate driving module sequentially output the gate output signal.

[0006] In one embodiment, the control module includes a detection unit, a conversion unit and a control unit, the detection unit is electrically connected to the conversion unit, the conversion unit is electrically connected to the control unit, and the control unit is electrically connected to N first thin film transistors and N second thin film transistors; wherein the detection unit is used to detect the working condition of the drive circuit and output a first detection signal and a second detection signal to the conversion unit, the conversion unit is used to convert the first detection signal and the second detection signal into a third level signal, and the control module is used to output a first level signal to the first thin film transistor and a second level signal to the second thin film transistor according to the third level signal; when the first detection signal is high, the third level signal is high, the first level signal is high, the second level signal is low, and the N gate driving modules are in a forward scanning mode; when the first detection signal is low, the third level signal is low, the first level signal is low, the second level signal is high, and the N gate driving modules are in a reverse scanning mode.

[0007] In one implementation, when the N gate driving modules are in the forward scanning mode, the first detection signal output by the detection unit is at a low level, and the second detection signal is at a high level, the third level signal output by the conversion unit is at a low level, the first level signal output by the control unit is at a low level, and the second level signal is at a high level, the N gate driving modules are switched to the reverse scanning mode;

[0008] When the N gate driving modules are in the reverse scanning mode, when the first detection signal and the second detection signal output by the detection unit are both high level, the third level signal output by the conversion unit is high level, the first level signal output by the control unit is high level, the second level signal is low level, and the N gate driving modules switch to the forward scanning mode.

[0009] In one embodiment, the driving circuit further includes a source driving module and M data lines, each of the data lines having a first end and a second end that are far away from each other, M>1 and M is a positive integer, the source driving module is electrically connected to the first end and the second end of the M data lines, the source driving module is electrically connected to the conversion unit, and the conversion unit is used to output the third level signal to the source driving module; wherein, when the third level signal is at a high level, the M data lines are in a forward scanning mode, and the source driving module outputs an analog voltage signal to the M first ends; when the third level signal is at a low level, the M data lines are in a reverse scanning mode, and the source driving module outputs the analog voltage signal to the M second ends.

[0010] In one embodiment, the control module also includes a first storage device and a second storage device, and the source driver module is electrically connected to both the first storage device and the second storage device; when the conversion unit outputs the first conversion signal to the source driver module, the first storage device outputs a first control signal to the source driver module so that the M data lines are in a forward scanning mode; when the conversion unit outputs the second conversion signal to the source driver module, the second storage device outputs a second control signal to the source driver module so that the M data lines are in a reverse scanning mode.

[0011] In one embodiment, the conversion unit includes a first input interface, a second input interface, an output interface, a NOT gate, a first AND gate, a second AND gate, a first NOR gate, and a second NOR gate. The first input interface and the second input interface are both electrically connected to the detection unit. The first input interface is both electrically connected to the input end of the NOT gate and the first input end of the second AND gate. The output end of the NOT gate is electrically connected to the first input end of the first AND gate. The second input interface is both electrically connected to the second input end of the first AND gate and the second input end of the second AND gate. The output end of the first AND gate is electrically connected to the first input end of the first NOR gate. The output end of the second AND gate is electrically connected to the first input end of the second NOR gate. The output end of the first NOR gate, the second input end of the first NOR gate, the output end of the second NOR gate, and the second input end of the second NOR gate are all electrically connected to the output interface. The output interface is electrically connected to the control module and the source driver module.

[0012] In one embodiment, each of the gate driving modules further includes an output unit, the output unit is electrically connected to the first thin film transistor and the second thin film transistor, and the output unit is used to output the gate output signal; the nth first thin film transistor is electrically connected to the n+ith output unit, and the gate of the nth second thin film transistor is electrically connected to the nith output unit, 1<n<N and n is a positive integer, 1≤i and i is a positive integer.

[0013] In one embodiment, each of the gate driving modules further includes a first pull-down unit and a second pull-down unit, both of which are electrically connected to the output unit, and are used to alternately control the output unit to output a low level.

[0014] In a second aspect, the present invention further provides a display panel, comprising a plurality of pixels, N scan lines and a driving circuit as described in any one of the embodiments of the first aspect, wherein the N scan lines are connected one-to-one with the N gate driving modules, and each scan line is electrically connected to at least one pixel.

[0015] In a third aspect, the present invention further provides a display device, comprising a housing and a display panel according to any one of the embodiments of the second aspect, wherein the display panel is installed in the housing.

[0016] By setting a control module, the control module is used to output a first level signal to the first thin film transistor and a second level signal to the second thin film transistor according to the working condition of the driving circuit. When the first level signal is high and the second level signal is low, the N gate driving modules are in a forward scanning mode, and the first gate driving module to the Nth gate driving module sequentially output gate output signals; when the first level signal is low and the second level signal is high, the N gate driving modules are in a reverse scanning mode, and the Nth gate driving module to the first gate driving module sequentially output gate output signals, so that the N gate driving modules can alternately realize forward scanning or reverse scanning through the first thin film transistor and the second thin film transistor, thereby reducing the time that the first thin film transistor and the second thin film transistor are continuously biased, reducing the risk of changes in the threshold voltages of the first thin film transistor and the second thin film transistor, and improving the stability of the driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 is a schematic diagram of a display device according to an embodiment;

[0019] Figure 2 is a schematic diagram of a display panel of an embodiment;

[0020] Figure 3 is a schematic diagram of a gate drive circuit of an embodiment;

[0021] Figure 4 is a schematic diagram of a conversion unit of an embodiment.

[0022] Description of reference numerals:

[0023] 10000-display device;

[0024] 1000-display panel;

[0025] 100-control module;

[0026] 10-detection unit, 20-conversion unit, 21-first input interface, 22-second input interface, 23-output interface, 24-NO gate, 25-first AND gate, 26-second AND gate, 27-first NOR gate, 28-second NOR gate, 30-control unit, 40-first storage, 50-second storage;

[0027] GDL-gate drive module, 60-pre-charge unit, T1-first thin film transistor, T2-second thin film transistor, 70-output unit, T3-third thin film transistor, 80-first pull-down unit, 90-second pull-down unit, V1-first power supply, V2-second power supply;

[0028] Gn-scan line;

[0029] A-display area, B-non-display area;

[0030] SOURCE I C-source driver module, S-data line;

[0031] P - pixel;

[0032] 2000-housing;

[0033] Z-first direction, X-second direction. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0035] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there can be a central component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there can be a central component at the same time.

[0036] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in this application and in the specification are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this application includes any and all combinations of one or more of the related listed items.

[0037] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0038] Please refer to Figure 1 The present invention also provides a display device 10000, including a housing 2000 and a display panel 1000 in an embodiment of the present invention, and the display panel 1000 is installed in the housing 2000. The display device 10000 can be an electronic reader, an electronic book, a display, a mobile phone, etc., without limitation. The display device 10000 provided by the present invention, through the housing 2000 and the display panel 1000 in an embodiment of the present invention, the display panel 1000 is installed in the housing 2000, and the display panel 1000 can perform a forward scanning mode or a reverse scanning mode to reduce the risk of a threshold voltage change of a thin film transistor in the display panel 1000 due to long-term bias, thereby improving the stability of the display device 10000.

[0039] Please refer to Figure 1 and Figure 2 The present invention further provides a display panel 1000, comprising a plurality of pixels P, N scan lines Gn and a driving circuit in an embodiment of the present invention, wherein the N scan lines Gn are connected to N gate driving modules GDL in a one-to-one correspondence, and each scan line Gn is electrically connected to at least one pixel P. The display panel 1000 may be a TFT-LCD panel, or may be other types of display panels 1000 such as an OLED display panel 1000.

[0040] Optionally, N gate driving modules GDL are arranged along the first direction Z, and N scanning lines Gn extend along the second direction X and are arranged along the first direction Z. Optionally, the display panel 1000 includes a display area A and a non-display area B, a plurality of pixels P and some wires and components connected to the pixels P are arranged in the display area A, and the remaining wires and components are arranged in the non-display area B.

[0041] The display panel 1000 provided by the present invention realizes the forward scanning mode and the reverse scanning mode of the display panel 1000 by adopting the driving circuit in the embodiment of the present invention, reduces the risk of threshold voltage change of the thin film transistor in the gate driving module GDL due to long-term bias, and improves the stability of the display panel 1000.

[0042] Please refer to Figure 2 and Figure 3The present invention provides a driving circuit, including N gate driving modules GDL and a control module 100, each gate driving module GDL has a pre-charging unit 60, each pre-charging unit 60 includes a first thin film transistor T1 and a second thin film transistor T2, N>1 and N is a positive integer, the control module 100 is electrically connected to the N first thin film transistors T1 and the N second thin film transistors T2, the control module 100 is used to output a first level signal to the first thin film transistor T1 and output a second level signal to the second thin film transistor T2 according to the working condition of the driving circuit, the working condition of the driving circuit includes At least one of the ambient temperature, the working time of the first thin film transistor T1 and the working time of the second thin film transistor T2, wherein, when the first level signal is high and the second level signal is low, the N gate driving modules GDL are in a forward scanning mode, and the first gate driving module GDL to the Nth gate driving module GDL sequentially output gate output signals, and when the first level signal is low and the second level signal is high, the N gate driving modules GDL are in a reverse scanning mode, and the Nth gate driving module GDL to the first gate driving module GDL sequentially output gate output signals.

[0043] Specifically, the control module 100 is electrically connected to the gates of the N first thin film transistors T1 and the gates of the N second thin film transistors T2. Each gate driving module GDL also has an output unit 70. Each output unit 70 has a third thin film transistor T3. In each gate driving module GDL, the drain of the first thin film transistor T1 and the drain of the second thin film transistor T2 are electrically connected to the gate of the third thin film transistor T3. The source of the first thin film transistor T1 and the source of the second thin film transistor T2 are respectively connected to the first power supply V1 and the second power supply V2. The first power supply V1 is used to output a high level to the source of the first thin film transistor T1, and the second power supply V2 is used to output a high level to the source of the second thin film transistor T2. When the first thin film transistor T1 or the second thin film transistor T2 is turned on, the high level is output from the drain of the first thin film transistor T1 or the drain of the second thin film transistor T2 to the gate of the third thin film transistor T3 to turn on the third thin film transistor T3, so that the drain of the third thin film transistor T3 outputs a gate output signal.

[0044] Among them, when the N gate driving modules GDL are in the forward scanning mode, the 1st gate driving module GDL to the Nth gate driving module GDL sequentially output the gate output signal, and the 1st scanning line Gn to the Nth scanning line Gn sequentially receive the gate output signal and transmit the gate output signal to the pixel P to turn on the electrode of the pixel P. Similarly, when the N gate driving modules GDL are in the reverse scanning mode, the Nth gate driving module GDL to the 1st gate driving module GDL sequentially output the gate output signal, and the Nth scanning line Gn to the 1st scanning line Gn sequentially receive the gate output signal.

[0045] Optionally, each of the two ends of each scanning line Gn is connected to a gate driving module GDL, and the two gate driving modules GDL on the same scanning line Gn are in the forward scanning mode or the reverse scanning mode at the same time. In the drawings of the specification of the present invention, the N gate driving modules GDL are labeled GDL from top to bottom. 1 , …, GDL n-i , …, GDL n , …, GDL n+i , …, GDL N The N scanning lines Gn are represented by horizontally arranged straight lines in the drawings of the specification of the present application, and the N scanning lines Gn are labeled Gn from top to bottom. 1 , …, Gn n-i , …, Gn n , …, Gn n+i , …, Gn N .

[0046] By setting the control module 100, the control module 100 is used to output a first level signal to the first thin film transistor T1 and a second level signal to the second thin film transistor T2 according to the working condition of the driving circuit. When the first level signal is high and the second level signal is low, the N gate driving modules GDL are in a forward scanning mode, and the first gate driving module GDL to the Nth gate driving module GDL sequentially output gate output signals; when the first level signal is low and the second level signal is high, the N gate driving modules GDL are in a reverse scanning mode, and the Nth gate driving module GDL to the first gate driving module GDL sequentially output gate output signals, so that the N gate driving modules GDL can alternately realize forward scanning or reverse scanning through the first thin film transistor T1 and the second thin film transistor T2, thereby reducing the time that the first thin film transistor T1 and the second thin film transistor T2 are continuously biased, reducing the risk of changes in the threshold voltages of the first thin film transistor T1 and the second thin film transistor T2, and improving the stability of the driving circuit.

[0047] Please refer to Figure 2 and Figure 3The control module 100 includes a detection unit 10, a conversion unit 20 and a control unit 30. The detection unit 10 is electrically connected to the conversion unit 20, the conversion unit 20 is electrically connected to the control unit 30, and the control unit 30 is electrically connected to N first thin film transistors T1 and N second thin film transistors T2; wherein the detection unit 10 is used to detect the working condition of the driving circuit and output a first detection signal and a second detection signal to the conversion unit 20, the conversion unit 20 is used to convert the first detection signal and the second detection signal into a third level signal, and the control module 100 is used to output a first level signal to the first thin film transistor T1 and a second level signal to the second thin film transistor T2 according to the third level signal; when the first detection signal is at a high level, the third level signal is at a high level, the first level signal is at a high level, the second level signal is at a low level, and the N gate driving modules GDL are in a forward scanning mode; when the first detection signal is at a low level, the third level signal is at a low level, the first level signal is at a low level, the second level signal is at a high level, and the N gate driving modules GDL are in a reverse scanning mode.

[0048] Optionally, the detection unit 10 includes a timer and a temperature sensor, etc. The timer is used to detect the working time of the first thin film transistor T1 and the working time of the second thin film transistor T2, and the temperature sensor is used to detect the ambient temperature.

[0049] Optionally, the control unit 30 is electrically connected to the gate driving modules GDL at both ends of each scanning line Gn, and the control unit 30 synchronously outputs a first level signal and a second level signal to the two gate driving modules GDL on the same scanning line Gn, so that the two gate driving modules GDL are in the forward scanning mode or the reverse scanning mode at the same time.

[0050] Specifically, taking the initial state of N gate driving modules GDL in the forward scanning mode as an example, when the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a high level to the conversion unit 20, or when the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a low level to the conversion unit 20, the conversion unit 20 outputs a third level signal of a high level to the control unit 30, and the control unit 30 continues to output the first level signal of a high level and the second level signal of a low level, and the N gate driving modules GDL continue to be in the forward scanning mode.

[0051] Taking the initial state of N gate driving modules GDL in the reverse scanning mode as an example, when the detection unit 10 outputs a first detection signal of a low level and a second detection signal of a low level to the conversion unit 20, the conversion unit 20 outputs a third level signal of a low level to the control unit 30, and the control unit 30 continues to output the first level signal of a low level and the second level signal of a high level, and the N gate driving modules GDL continue to be in the reverse scanning mode.

[0052] By setting the control module 100 to include a detection unit 10, a conversion unit 20 and a control unit 30, the control module 100 can detect the ambient temperature, the working time of the first thin film transistor T1 and the working time of the second thin film transistor T2 and other working conditions through the detection unit 10 and output the first detection signal and the second detection signal of the corresponding level to the conversion unit 20. The conversion unit 20 can convert the first detection signal and the second detection signal of the corresponding level into a third level signal of a high level or a low level to instruct the control module 100 to output the corresponding first level signal and the second level signal, so that the N gate driving modules GDL can be in a forward scanning mode and a reverse scanning mode, reducing the time that the first thin film transistor T1 and the second thin film transistor T2 are continuously biased, reducing the risk of changes in the threshold voltages of the first thin film transistor T1 and the second thin film transistor T2, and improving the stability of the driving circuit.

[0053] Please refer to Figure 2 and Figure 3 , when the N gate driving modules GDL are in the forward scanning mode, the first detection signal output by the detection unit 10 is at a low level, and the second detection signal is at a high level, the third level signal output by the conversion unit 20 is at a low level, the first level signal output by the control unit 30 is at a low level, and the second level signal is at a high level, and the N gate driving modules GDL switch to the reverse scanning mode; when the N gate driving modules GDL are in the reverse scanning mode, when the first detection signal and the second detection signal output by the detection unit 10 are both at a high level, the third level signal output by the conversion unit 20 is at a high level, the first level signal output by the control unit 30 is at a high level, and the second level signal is at a low level, and the N gate driving modules GDL switch to the forward scanning mode.

[0054] Specifically, when the N gate driving modules GDL are in the forward scanning mode, the detection unit 10 outputs a first detection signal of a low level and a second detection signal of a high level to the conversion unit 20, and the conversion unit 20 outputs a third level signal of a low level, so that the first level signal output by the control unit 30 to the first thin film transistor T1 is converted from a high level to a low level, and the second level signal output to the second thin film transistor T2 is converted from a low level to a high level. Since the N gate driving modules GDL are still in the forward scanning mode and are within a working cycle at this time, when the N gate driving modules GDL end the working cycle and enter the next working cycle, the N gate driving modules GDL can switch to the reverse scanning mode. Optionally, a working cycle of the N gate driving modules GDL can be one frame, one second, two seconds or any other time without limitation.

[0055] When the N gate driving modules GDL are in the reverse scanning mode, the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a high level to the conversion unit 20, and the conversion unit 20 outputs a third level signal of a high level, so that the first level signal output by the control unit 30 to the first thin film transistor T1 is converted from a low level to a high level, and the second level signal output to the second thin film transistor T2 is converted from a high level to a low level. Since the N gate driving modules GDL are still in the reverse scanning mode and are within a working cycle at this time, when the N gate driving modules GDL end the working cycle and enter the next working cycle, the N gate driving modules GDL can switch to the forward scanning mode.

[0056] By setting that when the N gate driving modules GDL are in the forward scanning mode, the first detection signal output by the detection unit 10 is at a low level, and the second detection signal is at a high level, the third level signal output by the conversion unit 20 is at a low level, the first level signal output by the control unit 30 is at a low level, and the second level signal is at a high level, the N gate driving modules GDL switch to the reverse scanning mode; when the N gate driving modules GDL are in the reverse scanning mode, when the first detection signal and the second detection signal output by the detection unit 10 are both at a high level, the third level signal output by the conversion unit 20 is at a high level, the first level signal output by the control unit 30 is at a high level, and the second level signal is at a low level, the N gate driving modules GDL switch to the forward scanning mode, so that the N gate driving modules GDL can switch between the forward scanning mode and the reverse scanning mode, and the normal working state of the N gate driving modules GDL will not be affected during the switching process, so that the N gate driving modules GDL will not cause display abnormality when switching the forward scanning mode or the reverse scanning mode.

[0057] Please refer to Figure 2 The driving circuit also includes a source driving module SOURCE IC and M data lines S, each data line S has a first end and a second end that are far away from each other, M>1 and M is a positive integer, the source driving module SOURCE IC is electrically connected to the first end and the second end of the M data lines S, the source driving module SOURCE IC is electrically connected to the conversion unit 20, and the conversion unit 20 is used to output a third level signal to the source driving module SOURCE IC; wherein, when the third level signal is a high level, the M data lines S are in a forward scanning mode, and the source driving module SOURCE IC outputs an analog voltage signal to the M first ends; when the third level signal is a low level, the M data lines S are in a reverse scanning mode, and the source driving module SOURCE IC outputs an analog voltage signal to the M second ends.

[0058] Optionally, the M data lines S extend along the first direction Z and are arranged along the second direction X, and each data line S intersects with the aforementioned N scan lines Gn and is electrically connected to a connection point where one or more pixels P are arranged. Optionally, the M data lines S and the N gate drive modules GDL are simultaneously in a forward scanning mode or simultaneously in a reverse scanning mode. The M scan lines Gn are represented by vertically arranged straight lines in the drawings of the specification of the present invention application, and the M scan lines Gn are labeled S from left to right. 1 ,…,S M .

[0059] Specifically, taking the initial state of M data lines S in the forward scanning mode as an example, when the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a high level to the conversion unit 20, or when the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a low level to the conversion unit 20, the conversion unit 20 outputs a third level signal of a high level to the source driver module SOURCE IC, and the M data lines S continue to be in the forward scanning mode.

[0060] When the M data lines S are in the forward scanning mode, the detection unit 10 outputs a first detection signal of a low level and a second detection signal of a high level to the conversion unit 20, and the conversion unit 20 outputs a third level signal of a low level, so that the source driver module SOURCE IC switches from outputting analog voltage signals to M first terminals to outputting analog voltage signals to M second terminals. Since the M data lines S are still in the forward scanning mode and are within a working cycle at this time, when the M data lines S end the working cycle and enter the next working cycle, the M data lines S can switch to the reverse scanning mode.

[0061] Taking the initial state of M data lines S in the reverse scan mode as an example, when the detection unit 10 outputs a first detection signal of a low level and a second detection signal of a low level to the conversion unit 20, the conversion unit 20 outputs a third level signal of a low level to the source driver module SOURCEIC, and the M data lines S continue to be in the reverse scan mode.

[0062] When the M data lines S are in the reverse scanning mode, the detection unit 10 outputs a first detection signal of a high level and a second detection signal of a high level to the conversion unit 20, and the conversion unit 20 outputs a third level signal of a high level, so that the source driver module SOURCE IC switches from outputting an analog voltage signal to the M second terminals to outputting an analog voltage signal to the M first terminals. Since the M data lines S are still in the reverse scanning mode and are within a working cycle at this time, when the M data lines S end the working cycle and enter the next working cycle, the M data lines S can switch to the forward scanning mode.

[0063] By setting the driving circuit to also include a source driving module SOURCE IC and M data lines S, each data line S has a first end and a second end that are far away from each other, M>1 and M is a positive integer, the source driving module SOURCE IC is electrically connected to the first end and the second end of the M data lines S, the source driving module SOURCE IC is electrically connected to the conversion unit 20, and the conversion unit 20 is used to output a third level signal to the source driving module SOURCE IC; wherein, when the third level signal is a high level, the M data lines S are in a forward scanning mode, and the source driving module SOURCE IC outputs an analog voltage signal to the M first ends; when the third level signal is a low level, the M data lines S are in a reverse scanning mode, and the source driving module SOURCE IC outputs an analog voltage signal to the M second ends, so that the source driving module SOURCE IC can control the M data lines S and the N gate driving modules GDL to be synchronously in the forward scanning mode or the reverse scanning mode, so that the display panel 1000 can display normally, and no display abnormality will occur due to the switching between the forward scanning mode and the reverse scanning mode.

[0064] Please refer to Figure 2 The control module 100 also includes a first storage 40 and a second storage 50. The source driver module SOURCE IC is electrically connected to the first storage 40 and the second storage 50. When the conversion unit 20 outputs a first conversion signal to the source driver module SOURCE IC, the first storage 40 outputs a first control signal to the source driver module SOURCE IC so that the M data lines S are in a forward scanning mode. When the conversion unit 20 outputs a second conversion signal to the source driver module SOURCE IC, the second storage 50 outputs a second control signal to the source driver module SOURCE IC so that the M data lines S are in a reverse scanning mode.

[0065] Optionally, the first storage 40 and the second storage 50 are both electrically erasable programmable read-only memories (EEPROMs), which are often used to store display-related setting parameters, calibration data, etc. These data may need to be adjusted or modified during the production, testing, and use of the display panel 1000. By using EEPROM, the storage and modification of these data can be easily achieved, thereby improving the flexibility and reliability of the display panel 1000. Optionally, the drive circuit can control and adjust the switching frequency, duration, etc. of the forward scanning mode and the reverse scanning mode by changing the first storage 40 and the second storage 50.

[0066] Optionally, the source driver module SOURCE IC receives the first control signal or the second control signal, and then outputs a level signal or an analog signal to the control unit 30 according to the first control signal or the second control signal, so that the control unit 30 controls the N gate driver modules GDL to be in the forward scanning mode or the reverse scanning mode.

[0067] Optionally, the first storage 40 is externally mounted on the source driver module SOURCE IC, or is also embedded in the source driver module SOURCE IC, without limitation. Optionally, the second storage 50 is externally mounted on the source driver module SOURCE IC, or is also embedded in the source driver module SOURCE IC, without limitation. Exemplarily, the first storage 40 is embedded in the source driver module SOURCE IC, that is, the first storage 40 is a part of the source driver module SOURCE IC, when the M data lines S are in the forward scanning mode, the source driver module SOURCE IC reads the program stored inside itself; the second storage 50 is externally mounted on the source driver module SOURCE IC, when the M data lines S are in the reverse scanning mode, the source driver module SOURCE IC reads the program in the external second storage 50.

[0068] By setting the first storage 40 and the second storage 50, the source driver module SOURCE IC is electrically connected to the first storage 40 and the second storage 50. When the conversion unit 20 outputs the first conversion signal to the source driver module SOURCE IC, the first storage 40 outputs the first control signal to the source driver module SOURCE IC to put the M data lines S in the forward scanning mode. When the conversion unit 20 outputs the second conversion signal to the source driver module SOURCE IC, the second storage 50 outputs the second control signal to the source driver module SOURCE IC to put the M data lines S in the reverse scanning mode, so that the source driver module SOURCE IC can read the first control signal and the second control signal to control the M data lines S to be in the forward scanning mode or the reverse scanning mode, and can control and adjust the switching frequency, duration, etc. of the forward scanning mode and the reverse scanning mode.

[0069] Please refer to Figure 4The conversion unit 20 includes a first input interface 21, a second input interface 22, an output interface 23, a NOT gate 24, a first AND gate 25, a second AND gate 26, a first NOR gate 27, and a second NOR gate 28. The first input interface 21 and the second input interface 22 are both electrically connected to the detection unit 10. The first input interface 21 is electrically connected to the input end of the NOR gate 24 and the first input end of the second AND gate 26. The output end of the NOR gate 24 is electrically connected to the first input end of the first AND gate 25. The second input interface 22 is electrically connected to the second input end of the first AND gate 25 and the second input end of the second AND gate 26. The output end of the first AND gate 25 is electrically connected to the first input end of the first NOR gate 27. The output end of the second AND gate 26 is electrically connected to the first input end of the second NOR gate 28. The output end of the first NOR gate 27, the second input end of the first NOR gate 27, the output end of the second NOR gate 28, and the second input end of the second NOR gate 28 are all electrically connected to the output interface 23. The output interface 23 is electrically connected to the control module 100 and the source driver module SOURCE The ICs are all electrically connected.

[0070] Specifically, when the first detection signal and the second detection signal are both high levels, the NOT gate 24 outputs a low level, the first AND gate 25 outputs a low level, the second AND gate 26 outputs a high level, the first NOR gate 27 outputs a third level signal of a high level, and the second NOR gate 28 receives the high level output by the second AND gate 26 and the third level signal of a high level output by the first NOR gate 27 and outputs a low level.

[0071] When the first detection signal is at a high level and the second detection signal is at a low level, the NOT gate 24 outputs a low level, the first AND gate 25 and the second AND gate 26 both output a low level, the first NOR gate 27 outputs a third level signal which is a high level, and the second NOR gate 28 receives the low level output by the second AND gate 26 and the third level signal which is a high level output by the first NOR gate 27 and outputs a low level.

[0072] When the first detection signal is at a low level and the second detection signal is at a high level, the NOT gate 24 outputs a high level, the first AND gate 25 outputs a high level, the second AND gate 26 outputs a low level, the second NOR gate 28 outputs a high level, and the first NOR gate 27 receives the high level output by the first AND gate 25 and the high level output by the second NOR gate 28 and outputs a third level signal of a low level.

[0073] When the first detection signal and the second detection signal are both low levels, the NOT gate 24 outputs a high level, the first AND gate 25 outputs a low level, the second AND gate 26 outputs a low level, the second NOR gate 28 outputs a high level, and the first NOR gate 27 receives the low level output by the first AND gate 25 and the high level output by the second NOR gate 28 and outputs a third level signal of a low level.

[0074] By setting the conversion unit 20 to include a first input interface 21, a second input interface 22, an output interface 23, a NOT gate 24, a first AND gate 25, a second AND gate 26, a first NOR gate 27, and a second NOR gate 28, the first input interface 21 and the second input interface 22 are both electrically connected to the detection unit 10, the first input interface 21 is electrically connected to the input end of the NOR gate 24 and the first input end of the second AND gate 26, the output end of the NOR gate 24 is electrically connected to the first input end of the first AND gate 25, the second input interface 22 is electrically connected to the second input end of the first AND gate 25 and the second input end of the second AND gate 26, the output end of the first AND gate 25 is electrically connected to the first input end of the first NOR gate 27, the output end of the second AND gate 26 is electrically connected to the first input end of the second NOR gate 28, the output end of the first NOR gate 27, the second input end of the first NOR gate 27, the output end of the second NOR gate 28, and the second input end of the second NOR gate 28 are all electrically connected to the output interface 23, and the output interface 23 is electrically connected to the control module 100 and the source driver module SOURCE The ICs are electrically connected, so that the conversion unit 20 can output a third-level signal of a high level or a third-level signal of a low level according to whether the first detection signal is at a high level or a low level and whether the second detection signal is at a high level or a low level, thereby controlling the M data lines S and the N gate driving modules GDL to be in a forward scanning mode or a reverse scanning mode. The structure is simple, which is beneficial to reducing the difficulty of the manufacturing process of the driving circuit.

[0075] Please refer to Figure 3 Each gate driving module GDL further includes an output unit 70, which is electrically connected to the first thin film transistor T1 and the second thin film transistor T2, and is used to output a gate output signal; the nth first thin film transistor T1 is electrically connected to the n+ith output unit 70, and the gate of the nth second thin film transistor T2 is electrically connected to the nith output unit 70, 1<n<N and n is a positive integer, 1≤i and i is a positive integer.

[0076] Exemplarily, i=6, that is, the nth first thin film transistor T1 is electrically connected to the n+6th output unit 70, and the gate of the nth second thin film transistor T2 is electrically connected to the n-6th output unit 70. When the N gate driving modules GDL are in the positive scanning mode, the gate output signal level output by the first gate driving circuit is transmitted to the first thin film transistor T1 of the seventh gate driving module GDL to pre-charge the seventh gate driving module GDL, and the gate output signal level output by the nth gate driving circuit is transmitted to the first thin film transistor T1 of the n+6th gate driving module GDL to pre-charge the n+6th gate driving module GDL, and so on. When N gate driving modules GDL are in the reverse scanning mode, the gate output signal level output by the Nth gate driving module GDL is transmitted to the first thin film transistor T1 of the N-6th gate driving module GDL to pre-charge the N-6th gate driving module GDL, and the gate output signal level output by the 7th gate driving circuit is transmitted to the first thin film transistor T1 of the 1st gate driving module GDL to pre-charge the 7th gate driving module GDL, and so on.

[0077] Optionally, the control unit 30 may start the forward scanning mode of the N gate driving modules GDL by inputting a first level signal of a high level and a second level signal of a low level to the first thin film transistor T1 of the first gate driving module GDL. The control unit 30 may start the reverse scanning mode of the N gate driving modules GDL by inputting a first level signal of a low level and a second level signal of a high level to the first thin film transistor T1 of the Nth gate driving module GDL.

[0078] By setting each gate driving module GDL to also include an output unit 70, the output unit 70 is electrically connected to the first thin film transistor T1 and the second thin film transistor T2, and the output unit 70 is used to output a gate output signal; the nth first thin film transistor T1 is electrically connected to the n+ith output unit 70, and the gate of the nth second thin film transistor T2 is electrically connected to the nith output unit 70, 1<n<N and n is a positive integer, 1≤i and i is a positive integer, so that the control module 100 can start the forward scanning mode or the reverse scanning mode by outputting the first level signal and the second level signal to the first gate driving signal or the Nth gate driving signal, thereby reducing the line setting of the driving circuit and reducing the control difficulty of the driving circuit.

[0079] Please refer to Figure 3 Each gate driving module GDL further includes a first pull-down unit 80 and a second pull-down unit 90, both of which are electrically connected to the output unit 70, and are used to alternately control the output unit 70 to output a low level.

[0080] Optionally, the first pull-down unit 80 and the second pull-down unit 90 are used to alternately output a low level to the gate of the third thin film transistor T3 of the output unit 70 to turn off the third thin film transistor T3 and realize the turning off of the gate driving module GDL. Optionally, the switching frequency of the first pull-down unit 80 and the second pull-down unit 90 may be consistent with the switching frequency of the forward scanning mode and the reverse scanning mode, or may be inconsistent, without limitation.

[0081] By setting each gate driving module GDL to also include a first pull-down unit 80 and a second pull-down unit 90, the first pull-down unit 80 and the second pull-down unit 90 are both electrically connected to the output unit 70, and the first pull-down unit 80 and the second pull-down unit 90 are used to alternately control the output unit 70 to output a low level, so that the time that the thin film transistors in the first pull-down unit 80 and the second pull-down unit 90 are continuously biased is reduced, and the risk of changes in the threshold voltage of the thin film transistors in the first pull-down unit 80 and the second pull-down unit 90 is reduced, so that the first pull-down unit 80 and the second pull-down unit 90 can both turn off the gate driving circuit in time, thereby improving the stability of the driving circuit and preventing display abnormalities of the display device 10000.

[0082] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship of terms such as "center", "up", "down", "left", "right", "vertical", "horizontal", "inside" and "outside" are based on the orientation or positional relationship described in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0083] What is disclosed above is only a preferred embodiment of the present application, and it certainly cannot be used to limit the scope of rights of the present application. Ordinary technicians in this field can understand that all or part of the processes of implementing the above embodiment and equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

Claims

1. A driving circuit, characterized in that: include: N gate driving modules, each of which has a pre-charging unit, each of which includes a first thin film transistor and a second thin film transistor, N>1 and N is a positive integer; a control module, electrically connected to the N first thin film transistors and the N second thin film transistors, the control module being configured to output a first level signal to the first thin film transistor and a second level signal to the second thin film transistor according to a working condition of the drive circuit, wherein the working condition of the drive circuit includes at least one of an ambient temperature, a working time of the first thin film transistor, and a working time of the second thin film transistor; Among them, when the first level signal is a high level and the second level signal is a low level, the N gate driving modules are in a forward scanning mode, and the first gate driving module to the Nth gate driving module sequentially output the gate output signal; when the first level signal is a low level and the second level signal is a high level, the N gate driving modules are in a reverse scanning mode, and the Nth gate driving module to the first gate driving module sequentially output the gate output signal.

2. The driving circuit according to claim 1, characterized in that: The control module includes a detection unit, a conversion unit and a control unit, the detection unit is electrically connected to the conversion unit, the conversion unit is electrically connected to the control unit, and the control unit is electrically connected to the N first thin film transistors and the N second thin film transistors; The detection unit is used to detect the working condition of the driving circuit and output a first detection signal and a second detection signal to the conversion unit, the conversion unit is used to convert the first detection signal and the second detection signal into a third level signal, and the control module is used to output a first level signal to the first thin film transistor and a second level signal to the second thin film transistor according to the third level signal; When the first detection signal is at a high level, the third level signal is at a high level, the first level signal is at a high level, the second level signal is at a low level, and the N gate driving modules are in a forward scanning mode; when the first detection signal is at a low level, the third level signal is at a low level, the first level signal is at a low level, the second level signal is at a high level, and the N gate driving modules are in a reverse scanning mode.

3. The driving circuit according to claim 2, characterized in that: When the N gate driving modules are in the forward scanning mode, the first detection signal output by the detection unit is at a low level, and the second detection signal is at a high level, the third level signal output by the conversion unit is at a low level, the first level signal output by the control unit is at a low level, and the second level signal is at a high level, and the N gate driving modules are switched to the reverse scanning mode; When the N gate driving modules are in the reverse scanning mode, when the first detection signal and the second detection signal output by the detection unit are both high level, the third level signal output by the conversion unit is high level, the first level signal output by the control unit is high level, the second level signal is low level, and the N gate driving modules switch to the forward scanning mode.

4. The driving circuit according to claim 2, characterized in that: The driving circuit further includes a source driving module and M data lines, each of the data lines having a first end and a second end that are far away from each other, M>1 and M is a positive integer, the source driving module is electrically connected to the first end and the second end of the M data lines, the source driving module is electrically connected to the conversion unit, and the conversion unit is used to output the third level signal to the source driving module; Among them, when the third level signal is at a high level, the M data lines are in a forward scanning mode, and the source driving module outputs an analog voltage signal to the M first ends; when the third level signal is at a low level, the M data lines are in a reverse scanning mode, and the source driving module outputs the analog voltage signal to the M second ends.

5. The driving circuit according to claim 4, characterized in that: The control module further includes a first storage and a second storage, and the source driving module is electrically connected to both the first storage and the second storage; When the conversion unit outputs the first conversion signal to the source driving module, the first storage outputs a first control signal to the source driving module to put the M data lines in a forward scanning mode; When the conversion unit outputs the second conversion signal to the source driving module, the second storage outputs a second control signal to the source driving module to put the M data lines in a reverse scan mode.

6. The driving circuit according to claim 4, characterized in that: The conversion unit includes a first input interface, a second input interface, an output interface, a NOT gate, a first AND gate, a second AND gate, a first NOR gate and a second NOR gate. The first input interface and the second input interface are both electrically connected to the detection unit. The first input interface is both electrically connected to the input end of the NOT gate and the first input end of the second AND gate. The output end of the NOT gate is electrically connected to the first input end of the first AND gate. The second input interface is both electrically connected to the second input end of the first AND gate and the second input end of the second AND gate. The output end of the first AND gate is electrically connected to the first input end of the first NOR gate. The output end of the second AND gate is electrically connected to the first input end of the second NOR gate. The output end of the first NOR gate, the second input end of the first NOR gate, the output end of the second NOR gate and the second input end of the second NOR gate are all electrically connected to the output interface. The output interface is electrically connected to the control module and the source driver module.

7. The driving circuit according to claim 1, characterized in that: Each of the gate driving modules further includes an output unit, the output unit is electrically connected to the first thin film transistor and the second thin film transistor, and the output unit is used to output the gate output signal; The nth first thin film transistor is electrically connected to the n+ith output unit, and the gate of the nth second thin film transistor is electrically connected to the nith output unit, 1<n<N and n is a positive integer, 1≤i and i is a positive integer.

8. The driving circuit according to claim 7, characterized in that: Each of the gate driving modules further includes a first pull-down unit and a second pull-down unit, both of which are electrically connected to the output unit, and are used to alternately control the output unit to output a low level.

9. A display panel, characterized in that: It comprises a plurality of pixels, N scan lines and a driving circuit as described in any one of claims 1 to 8, wherein the N scan lines are connected to the N gate driving modules in a one-to-one correspondence, and each scan line is electrically connected to at least one pixel.

10. A display device, characterized in that: The invention comprises a housing and the display panel as claimed in claim 9, wherein the display panel is installed in the housing.

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