A synchronous bidirectional transceiver based on a resistance-transconductance hybrid

Abstract

The application discloses a kind of synchronous bidirectional transceiver based on resistance-transconductance hybrid, solve the problem that the quantity of signal interface in prior art is many, and the signal transmission quantity of unit area is small, the circuit includes: transmitter circuit, resistance-transconductance hybrid circuit and receiver circuit;Wherein, transmitter circuit, for generating 16 pseudo-random signals according to first group differential clock signal, and 16 pseudo-random signals are serialized into analog single-ended outbound signal;Resistance-transconductance hybrid circuit is used to separate the inbound signal of channel analog signal according to analog single-ended outbound signal, obtains P inbound signal and N inbound signal;Receiver circuit is used for equalization processing to P inbound signal and N inbound signal, obtains 16 digital signals, and 16 digital signals are used as the output signal of receiver;Realize the quantity of signal interface is reduced and the signal transmission quantity of unit area is doubled.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuit design, and in particular to a synchronous bidirectional transceiver based on a resistor-transconductance mixer. Background Art

[0002] With the rapid development of computer and communication technologies, the demand for data processing and transmission has experienced exponential growth. Traditional transceivers are often limited to simplex and half-duplex communication, which not only takes up a lot of space but also has low bandwidth utilization, significantly reducing data transmission efficiency. Synchronous bidirectional transceivers are key components widely used in modern digital communication systems. They typically include a transmitter for data modulation, a receiver for data demodulation, and a mixer for bidirectional communication. They can support full-duplex communication, simultaneously sending and receiving data, and are commonly used in scenarios requiring high-speed data transmission. Their design and application background stem from the ever-increasing demand for data transmission rates and the pursuit of miniaturized hardware design and low power consumption.

[0003] However, increasing data rates also brings new challenges, such as effectively dealing with signal interference during bidirectional transmission, further compressing signal bandwidth without sacrificing performance, and addressing heat dissipation within a compact space. Synchronous bidirectional transceiver technology is widely used in various fields, such as mobile communications, satellite communications, and fiber-optic communications, as well as for information exchange between devices in automation systems.

[0004] There are various hybrid solutions for synchronous bidirectional transceivers, including driver replication, resistor-transconductance, and wideband solutions. Traditional synchronous bidirectional transceivers based on resistor-transconductance hybrids require differential data channels, using two pins to transmit one data path. This limits data transmission density and the use of current-mode drive, resulting in high circuit power consumption. Summary of the Invention

[0005] The present invention solves the problem of a large number of signal interfaces and a small signal transmission volume per unit area in the prior art by providing a synchronous bidirectional transceiver based on a resistance-transconductance mixer, thereby reducing the number of signal interfaces and doubling the signal transmission volume per unit area.

[0006] The present invention provides a synchronous bidirectional transceiver based on a resistor-transconductance mixer, wherein the single-ended synchronous bidirectional transceiver comprises: a transmitter circuit, a resistor-transconductance mixer circuit and a receiver circuit; wherein:

[0007] The transmitter circuit is configured to generate 16 pseudo-random signals according to the first set of differential clock signals, and serialize the 16 pseudo-random signals into an analog single-ended outbound signal;

[0008] The resistor-transconductance mixer circuit is used to separate the inbound signal of the channel analog signal according to the analog single-ended outbound signal to obtain a P-end inbound signal and an N-end inbound signal;

[0009] The receiver circuit is used to perform equalization processing on the P-end inbound signal and the N-end inbound signal to obtain and output 16 channels of digital signals.

[0010] In a possible implementation, the resistor-transconductance hybrid circuit includes: a transmitter clock generation circuit, a 16:1 serializer, a single-slip converter, and a voltage-mode driver;

[0011] The transmitter clock generation circuit is configured to generate a first divided-by-eight two-phase clock signal, a first divided-by-four two-phase clock signal, and a first divided-by-two four-phase clock signal based on the first group of differential clock signals;

[0012] The PRBS generator is used to generate 16 pseudo-random digital signals according to the first eight-frequency two-phase clock signal;

[0013] The 16:1 serializer is configured to perform serialization processing on the 16 pseudo-random digital signals according to the first divided-by-eight two-phase clock signal, the first divided-by-four two-phase clock signal, and the first divided-by-two four-phase clock signal to generate one digital signal;

[0014] The single-turn differential converter is used to convert the one-way digital signal into a single-ended signal to generate one-way digital differential signal;

[0015] The voltage analog driver is used to perform voltage driving processing on the one-way digital differential signal to generate one-way voltage-based analog single-ended outbound signal.

[0016] In one possible implementation, the input of the transmitter clock generation circuit is: the first group of differential clock signals; the output end of the transmitter clock generation circuit is connected to the input end of the PRBS generator and the input end of the 16:1 serializer;

[0017] The input end of the 16:1 serializer is connected to the output end of the PRBS generator and the output end of the transmitter clock generation circuit, and the output end of the 16:1 serializer is connected to the input end of the single-slip converter;

[0018] The single-slip converter and the voltage-mode driver are connected in sequence, and an output end of the voltage-mode driver outputs an analog single-ended outbound signal.

[0019] In a possible implementation, the resistor-transconductance mixer circuit includes: a resistor, a transconductance amplifier A1 and a transconductance amplifier A2;

[0020] The first end of the resistor is connected to the analog single-ended outbound signal, and the second end of the resistor is connected to the channel analog signal;

[0021] The input of the positive input terminal of the transconductance amplifier A1 is: the analog single-ended outbound signal; the input of the negative input terminal of the transconductance amplifier A1 is: the input DC signal; the positive output terminal of the transconductance amplifier A1 is connected to the negative output terminal of the transconductance amplifier A2;

[0022] The input of the positive input terminal of the transconductance amplifier A2 is: an input DC signal; the input of the negative input terminal of the transconductance amplifier A2 is: the channel analog signal; the positive output terminal of the transconductance amplifier A2 is the negative output terminal of the transconductance amplifier A1.

[0023] In one possible implementation, the receiver circuit includes: a continuous-time linear equalizer, a receiver clock generation circuit, and a 1:16 deserializer;

[0024] The continuous time linear equalizer is used to perform equalization processing on the P-end inbound signal and the N-end inbound signal to generate a balanced P-end output signal and a balanced N-end output signal;

[0025] The receiver clock generation circuit is configured to generate a second divided-by-eight two-phase clock signal, a second divided-by-four two-phase clock signal, and a second divided-by-two four-phase clock signal based on the second set of differential clock signals;

[0026] The 1:16 deserializer is used to deserialize the balanced P-end output signal and the balanced N-end output signal according to the second eight-divided two-phase clock signal, the second four-divided two-phase clock signal and the second two-divided four-phase clock signal to generate 16 digital signals and output the 16 digital signals.

[0027] In a possible implementation, the continuous time linear equalizer and the 1:16 deserializer are connected in sequence; the input end of the continuous time linear equalizer inputs the P-end inbound signal and the N-end inbound signal;

[0028] The input end of the 1:16 deserializer is connected to the output end of the receiver clock generation circuit, and the output end of the 1:16 deserializer outputs the 16 digital signals;

[0029] The input end of the receiver clock generation circuit receives the second differential clock signal; the output end of the receiver clock generation circuit outputs the second divided-by-eight two-phase clock signal, the second divided-by-four two-phase clock signal, and the second divided-by-two four-phase clock signal.

[0030] One or more technical solutions provided in the present invention have at least the following technical effects or advantages:

[0031] Based on the traditional resistor-transconductance hybrid, the present invention designs a resistor-transconductance hybrid circuit, reducing the number of signal interfaces and doubling the signal transmission per unit area compared to conventional resistor-transconductance hybrid-based synchronous bidirectional transceivers. Furthermore, the resistor-transconductance hybrid circuit uses a low power supply voltage to generate low-swing analog outbound signals, resulting in lower power consumption compared to conventional synchronous bidirectional transceivers. This suggests that the resistor-transconductance hybrid-based synchronous bidirectional transceiver proposed in the present invention is more suitable for high-density data transmission and low-power transmission, and has broader application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the structure of a synchronous bidirectional transceiver based on a resistor-transconductance hybrid provided by an embodiment of the present invention;

[0033] Figure 2 A schematic structural diagram of a transmitter circuit provided in an embodiment of the present invention;

[0034] Figure 3 A schematic structural diagram of a resistance-transconductance hybrid circuit provided by an embodiment of the present invention;

[0035] Figure 4 It is a structural diagram of a receiver circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0037] The present invention provides a synchronous bidirectional transceiver based on a resistor-transconductance hybrid, see Figure 1 The single-ended synchronous bidirectional transceiver includes: a transmitter circuit, a resistor-transconductance mixer circuit and a receiver circuit; wherein,

[0038] The transmitter circuit is configured to generate 16 pseudo-random signals according to the first group of differential clock signals, and serialize the 16 pseudo-random signals into an analog single-ended outbound signal OUTBOUND;

[0039] For details, see Figure 2The transmitter circuit includes: a transmitter clock generation circuit, a pseudo-random binary sequence (PRBS) generator, a 16:1 serializer, a single-slip differential converter, and a voltage-mode driver;

[0040] The transmitter clock generation circuit is used to generate an eight-divided two-phase clock signal CKT8[1:0], a first four-divided two-phase clock signal CKT4[1:0] and a first two-divided four-phase clock signal CKT2[3:0] based on the first group of differential clock signals; it should be noted that the first group of differential clock signals is a group of differential clock signals with the same frequency and a phase difference.

[0041] The PRBS generator is used to generate 16 pseudo-random digital signals according to the first eight-frequency two-phase clock signal CKT8[1:0];

[0042] The 16:1 serializer is used to serialize 16 pseudo-random digital signals according to the first divided-by-eight two-phase clock signal CKT8[1:0], the first divided-by-four two-phase clock signal CKT4[1:0], and the first divided-by-two four-phase clock signal CKT2[3:0] to generate one digital signal;

[0043] The single-turn differential converter is used to convert a single-ended digital signal into a differential signal to generate a digital differential signal;

[0044] The voltage analog driver is used to perform voltage driving processing on a digital differential signal to generate a voltage-based analog single-ended outbound signal OUTBOUND.

[0045] Specifically, the resistor-transconductance hybrid circuit includes: a transmitter clock generation circuit, a 16:1 serializer, a single-slip converter and a voltage-mode driver;

[0046] The input of the transmitter clock generation circuit is: the first group of differential clock signals, and the output end of the transmitter clock generation circuit is connected to the input end of the PRBS generator and the input end of the 16:1 serializer;

[0047] The input end of the 16:1 serializer is connected to the output end of the PRBS generator and the output end of the transmitter clock generation circuit, and the output end of the 16:1 serializer is connected to the input end of the single-slip converter;

[0048] The single-slip converter and the voltage-mode driver are connected in sequence, and an output end of the voltage-mode driver outputs an analog single-ended outbound signal OUTBOUND.

[0049] Exemplarily, the transmitter circuit in the embodiment of the present invention includes a transmitter clock generation circuit, a PRBS generator, a 16:1 serializer, a single-turn differential converter and a voltage-mode driver; wherein,

[0050] The transmitter clock generating circuit is used to generate a first differential clock signal CKT according to the input P and CKT N , generating a first eight-frequency two-phase clock signal CKT8[1:0], a first four-frequency two-phase clock signal CKT4[1:0] and a first two-frequency four-phase clock signal CKT2[3:0]; a PRBS generator, connected to the transmitter clock generation circuit, for generating 16 pseudo-random digital signals according to the first eight-frequency two-phase clock signal CKT8[1:0]; a 16:1 serializer, connected to the transmitter clock generation circuit and the PRBS generator, for generating 16 pseudo-random digital signals according to the first eight-frequency two-phase clock signal CKT8[1:0], the first The four-way two-phase clock signal CKT4[1:0] and the first two-way four-phase clock signal CKT2[3:0] serialize 16 pseudo-random digital signals to generate one digital signal; a single-turn differential converter is connected to the 16:1 serializer and is used to convert the single-ended signal into a differential signal according to the one digital signal to generate one digital differential signal; a voltage analog driver is connected to the single-turn differential converter and is used to perform voltage drive processing according to the one digital differential signal to generate one voltage-based analog single-ended outbound signal OUTBOUND.

[0051] a resistor-transconductance mixer circuit for separating an inbound signal of the channel analog signal according to the analog single-ended outbound signal OUTBOUND to obtain a P-end inbound signal and an N-end inbound signal;

[0052] For details, see Figure 3 The resistor-transconductance mixer circuit includes: a resistor, a transconductance amplifier A1 and a transconductance amplifier A2, a first end of the resistor is connected to the analog single-ended outbound signal OUTBOUND, and a second end of the resistor is connected to the channel analog signal;

[0053] The input of the positive input terminal of the transconductance amplifier A1 is: the analog single-ended outbound signal OUTBOUND; the input of the negative input terminal of the transconductance amplifier A1 is: the input DC signal VCM; the positive output terminal of the transconductance amplifier A1 is connected to the negative output terminal of the transconductance amplifier A2;

[0054] The input of the positive input terminal of the transconductance amplifier A2 is: the input DC signal VCM; the input of the negative input terminal of the transconductance amplifier A2 is: the channel analog signal; the positive output terminal of the transconductance amplifier A2 is the negative output terminal of the transconductance amplifier A1.

[0055] Exemplarily, one end of the resistor is connected to the analog single-ended outbound signal OUTBOUND, one end of the resistor is also connected to the positive input terminal of the transconductance amplifier A1, the other end of the resistor is connected to the bidirectional port INOUT, the other end of the resistor is also connected to the negative input terminal of the transconductance amplifier A2, the negative input terminal of the transconductance amplifier A1 is connected to the input DC signal VCOM, the positive input terminal of the transconductance amplifier A2 is connected to the input DC signal VCOM, the positive output terminal of the transconductance amplifier A1 is connected to the negative output terminal of the transconductance amplifier A2, the positive output terminal of the transconductance amplifier A1 outputs the N-terminal inbound signal INBOUNDN, the negative output terminal of the transconductance amplifier A1 is connected to the positive output terminal of the transconductance amplifier A2, and the negative output terminal of the transconductance amplifier A1 outputs the P-terminal inbound signal INBOUNDP.

[0056] The receiver circuit is used to perform equalization processing on the P-end incoming signal and the N-end incoming signal to obtain and output 16-channel digital signals.

[0057] For details, see Figure 4 ,The receiver circuit includes: a continuous time linear equalizer, a receiver clock generation circuit and a 1:16 deserializer;

[0058] The continuous time linear equalizer is used to perform equalization processing according to the P-end inbound signal and the N-end inbound signal to generate a balanced P-end output signal OUTP and a balanced N-end output signal OUTN;

[0059] The receiver clock generation circuit generates a second eight-divided two-phase clock signal CKR8[1:0], a second four-divided two-phase clock signal CKR4[1:0] and a second two-divided four-phase clock signal CKR2[3:0] according to the second set of differential clock signals; it should be noted that the second set of differential clock signals have the same frequency and a phase difference.

[0060] The 1:16 deserializer is used to deserialize the balanced P-end output signal OUTP and the balanced N-end output signal OUTN according to the second eight-divided two-phase clock signal CKR8[1:0], the second four-divided two-phase clock signal CKR4[1:0] and the second two-divided four-phase clock signal CKR2[3:0], generate 16 digital signals DDES[15:0], and use the 16 digital signals as the output signals of the receiver.

[0061] Specifically, the continuous time linear equalizer and the 1:16 deserializer are connected in sequence; the input end of the continuous time linear equalizer is the P-end inbound signal and the N-end inbound signal;

[0062] The input end of the 1:16 deserializer is connected to the output end of the receiver clock generation circuit, and the output end of the 1:16 deserializer outputs 16 digital signals DDES[15:0];

[0063] The input end of the receiver clock generation circuit is inputted with: a second set of differential clock signals, and the output end of the receiver clock generation circuit outputs a second eight-divided two-phase clock signal CKR8[1:0], a second four-divided two-phase clock signal CKR4[1:0] and a second two-divided four-phase clock signal CKR2[3:0].

[0064] Exemplarily, a continuous time linear equalizer is connected to a resistor-transconductance mixer, and is used to perform equalization processing according to the analog P-end inbound signal INBOUNDP and the N-end inbound signal INBOUNDN to generate an equalized P-end output signal OUTP and an equalized N-end output signal OUTN; a receiver clock generation circuit is used to generate an equalized P-end output signal OUTP and an equalized N-end output signal OUTN according to the input second differential clock signal CKR P and CKR N , generating a second eight-frequency two-phase clock signal CKR8[1:0], a second four-frequency two-phase clock signal CKR4[1:0] and a second two-frequency four-phase clock signal CKR2[3:0]; a 1:16 deserializer, connected to the continuous-time linear equalizer and the receiver clock generation circuit, is used to deserialize the equalizer P-end output signal OUTP and the equalizer N-end output signal OUTN according to the eight-frequency two-phase clock signal CKR8[1:0], the four-frequency two-phase clock signal CKR4[1:0] and the two-frequency four-phase clock signal CKR2[3:0] to generate 16 digital signals DDES[15:0].

[0065] The proposed synchronous bidirectional transceiver based on a resistor-transconductance hybrid reduces the number of signal interfaces compared to conventional resistor-transconductance hybrids, doubling the signal transmission capacity per unit area. Furthermore, by using a low power supply voltage in voltage-mode drive to generate low-swing analog outbound signals, the proposed transceiver has lower power consumption compared to conventional synchronous bidirectional transceivers. This makes the proposed synchronous bidirectional transceiver based on a resistor-transconductance hybrid more suitable for high-density data transmission and low-power transmission, thus offering broader application prospects.

[0066] The various embodiments in this specification are described in a progressive manner. References to the same or similar parts between the various embodiments are sufficient. Each embodiment focuses on the differences from other embodiments. All or part of the present invention can be used in a variety of general or specialized computer system environments or configurations. For example, personal computers, server computers, handheld or portable devices, tablet devices, mobile communication terminals, multiprocessor systems, microprocessor-based systems, programmable electronic devices, network PCs, minicomputers, mainframe computers, and distributed computing environments that include any of the above systems or devices.

[0067] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, it should be understood by those skilled in the art that the technical solutions described in the aforementioned embodiments may still be modified, or some or all of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the present invention.

Claims

1. A synchronous bidirectional transceiver based on a resistor-transconductance hybrid, characterized in that: include: A transmitter circuit, a resistor-transconductance mixer circuit, and a receiver circuit; wherein, The transmitter circuit is configured to generate 16 pseudo-random signals according to a first set of differential clock signals, and serialize the 16 pseudo-random signals into analog single-ended outbound signals; the transmitter circuit comprises: a transmitter clock generation circuit, a PRBS generator, a 16:1 serializer, a single-turn differential converter, and a voltage-mode driver; The transmitter clock generation circuit is configured to generate a first divided-by-eight two-phase clock signal, a first divided-by-four two-phase clock signal, and a first divided-by-two four-phase clock signal based on the first group of differential clock signals; The PRBS generator is used to generate 16 pseudo-random digital signals according to the first eight-frequency two-phase clock signal; The 16:1 serializer is configured to perform serialization processing on the 16 pseudo-random digital signals according to the first divided-by-eight two-phase clock signal, the first divided-by-four two-phase clock signal, and the first divided-by-two four-phase clock signal to generate one digital signal; The single-turn differential converter is used to convert the one-way digital signal into a single-ended signal to generate one-way digital differential signal; The voltage analog driver is used to perform voltage driving processing on the one-way digital differential signal to generate one-way voltage-based analog single-ended outbound signal; The resistor-transconductance mixer circuit is used to separate the inbound signal of the channel analog signal according to the analog single-ended outbound signal to obtain a P-end inbound signal and an N-end inbound signal; the resistor-transconductance mixer circuit includes: a resistor, a transconductance amplifier A1 and a transconductance amplifier A2; The first end of the resistor is connected to the analog single-ended outbound signal, and the second end of the resistor is connected to the channel analog signal; The input of the positive input terminal of the transconductance amplifier A1 is: the analog single-ended outbound signal; the input of the negative input terminal of the transconductance amplifier A1 is: the input DC signal; the positive output terminal of the transconductance amplifier A1 is connected to the negative output terminal of the transconductance amplifier A2; The input of the positive input terminal of the transconductance amplifier A2 is: the input DC signal; the input of the negative input terminal of the transconductance amplifier A2 is: the channel analog signal; the positive output terminal of the transconductance amplifier A2 is the negative output terminal of the transconductance amplifier A1; The receiver circuit is used to perform equalization processing on the P-end inbound signal and the N-end inbound signal to obtain and output 16 digital signals; the receiver circuit includes: a continuous time linear equalizer, a receiver clock generation circuit and a 1:16 deserializer; The continuous time linear equalizer is used to perform equalization processing on the P-end inbound signal and the N-end inbound signal to generate a balanced P-end output signal and a balanced N-end output signal; The receiver clock generation circuit is configured to generate a second divided-by-eight two-phase clock signal, a second divided-by-four two-phase clock signal, and a second divided-by-two four-phase clock signal based on the second set of differential clock signals; The 1:16 deserializer is used to deserialize the balanced P-end output signal and the balanced N-end output signal according to the second eight-divided two-phase clock signal, the second four-divided two-phase clock signal and the second two-divided four-phase clock signal to generate 16 digital signals and output the 16 digital signals.

2. The synchronous bidirectional transceiver based on a resistor-transconductance hybrid according to claim 1, characterized in that: The input of the transmitter clock generation circuit is: the first group of differential clock signals; the output end of the transmitter clock generation circuit is connected to the input end of the PRBS generator and the input end of the 16:1 serializer; The input end of the 16:1 serializer is connected to the output end of the PRBS generator and the output end of the transmitter clock generation circuit, and the output end of the 16:1 serializer is connected to the input end of the single-slip converter; The single-slip converter and the voltage-mode driver are connected in sequence, and an output end of the voltage-mode driver outputs an analog single-ended outbound signal.

3. The synchronous bidirectional transceiver based on a resistor-transconductance hybrid according to claim 1, wherein: The continuous time linear equalizer is connected to the 1:16 deserializer in sequence; the input end of the continuous time linear equalizer inputs the P-end inbound signal and the N-end inbound signal; The input end of the 1:16 deserializer is connected to the output end of the receiver clock generation circuit, and the output end of the 1:16 deserializer outputs the 16 digital signals; The input of the input end of the receiver clock generation circuit is: a second set of differential clock signals; The output end of the receiver clock generation circuit outputs the second divided-by-eight two-phase clock signal, the second divided-by-four two-phase clock signal, and the second divided-by-two four-phase clock signal.

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