Display panel, preparation method and display device

Abstract

The invention discloses a display panel, a preparation method and a display device.The display panel comprises a substrate and a plurality of light-emitting elements located on one side of the substrate, and each light-emitting element comprises a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer and a third electrode which are arranged in a stacked mode; orthographic projections of the first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer and the third electrode on the substrate are at least partially overlapped; the display state of the display panel comprises a first display state and a second display state; in the first display state, the voltage received by the second electrode is larger than that received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light. In the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light. A dual-pixel light emitting mode is utilized, so that the pixel light emitting mode is switched between single-layer light emitting and series light emitting, high and low gray scale brightness adjustment is realized, and meanwhile, high efficiency, long service life and low gray scale display effects can be taken into consideration.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular, to a display panel, a preparation method and a display device. Background Art

[0002] The market demand for organic light-emitting diode display (OLED) panels has expanded from conventional small-sized mobile phones to medium-sized ones. For example, the demand for medium-sized OLEDs in tablet computers and car-mounted devices has increased rapidly, and thus Tandem OLED (Tandem Organic Light-Emitting Diode) display panels have come into being.

[0003] Generally, Tandem devices can significantly improve luminous efficiency and extend the service life of the device. However, due to the improved efficiency of Tandem devices, the driving current is significantly reduced at the same display brightness. Especially for low-brightness and low-grayscale images, due to the reduced driving current, the difference caused by the change in the characteristics of the same thin film transistor (TFT) will be magnified, and the brightness of the low-grayscale display will deteriorate. In addition, due to the serious lateral leakage of Tandem, the leakage crosstalk of low grayscale is serious, which will affect the color gamut and overall display effect of low grayscale. Summary of the invention

[0004] Based on the above problems, the present invention provides a display panel, a preparation method and a display device. By utilizing a dual-pixel light-emitting method, the pixel light-emitting mode can be adjusted between single-layer light-emitting and series light-emitting, which can not only achieve high and low grayscale brightness adjustment, but also take into account high efficiency, long life and low grayscale display effects.

[0005] In order to solve the above technical problems, an embodiment of the present application provides a display panel, including:

[0006] substrate substrate;

[0007] A plurality of light-emitting elements are located on one side of the base substrate, the light-emitting elements include a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer and a third electrode which are stacked; the first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer and the third electrode have at least a partial overlap in their orthographic projections on the base substrate; the display state of the display panel includes a first display state and a second display state;

[0008] In the first display state, the voltage received by the second electrode is greater than the voltage received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light;

[0009] In the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light.

[0010] Based on the same inventive concept, in a second aspect, an embodiment of the present application further provides a method for preparing a display panel, which is used to prepare the display panel provided in the first aspect, and the preparation method includes:

[0011] providing a substrate base plate;

[0012] Preparing a first electrode and a first light-emitting layer on one side of the base substrate;

[0013] Providing a first mask, and using the first mask to form a second electrode on a side of the first light-emitting layer away from the base substrate;

[0014] forming a second light-emitting layer on a side of the second electrode away from the base substrate;

[0015] The third electrode is formed on a side of the second light emitting layer away from the base substrate by using the first mask.

[0016] In a third aspect, an embodiment of the present application further provides a display device, comprising the display panel provided in the first aspect.

[0017] The display panel provided in the embodiment of the present application adopts a light-emitting element connected in series, and the light-emitting mode of the light-emitting element can be switched according to the display brightness. In the first display state, by controlling the voltage received by the second electrode of the light-emitting element to be greater than the voltage received by the third electrode, the light-emitting layer connected in series is realized to meet the needs of high-brightness display; in the second display state, by controlling the voltage received by the second electrode to be equal to the voltage received by the third electrode, the light-emitting layer connected in series is realized to meet the needs of high-brightness display. Compared with the technical solution of the Tandem OLED device in the prior art that uses a smaller driving current to drive the series light-emitting layer to display low grayscale brightness, the embodiment of the present application can use a larger driving current to drive the single-layer light-emitting layer to emit light, realize high and low brightness DBV light-emitting adjustment, improve the display brightness of low grayscale, and at the same time improve the problem that the difference caused by the change of the same thin film transistor characteristics caused by the smaller driving current in the prior art is amplified, causing the brightness of low grayscale display to deteriorate. In this way, the present application can realize the precise adjustment of the display brightness of low grayscale and improve the problem of low grayscale stealing brightness, ensure the display effect and color gamut of low grayscale, and thus meet the scene application of low grayscale brightness display. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0019] Figure 2 yes Figure 1A schematic diagram of a cross-sectional structure of a display panel along the AA' direction;

[0020] Figure 3 yes Figure 1 A voltage diagram of electrodes of a light emitting element in first and second display states is provided;

[0021] Figure 4 is a schematic diagram of the cross-sectional structure of another light-emitting element provided in an embodiment of the present application;

[0022] Figure 5 yes Figure 1 A voltage diagram of an electrode of a light emitting element in a third display state is provided;

[0023] Figure 6 is a schematic diagram of a power bus of a display panel provided in an embodiment of the present application;

[0024] Figure 7 yes Figure 1 A schematic diagram of a cross-sectional structure of another display panel along the AA' direction;

[0025] Figure 8 yes Figure 1 A schematic diagram of a cross-sectional structure of another display panel along the AA' direction;

[0026] Fig. 9 yes Figure 1 A schematic diagram of a cross-sectional structure of another display panel along the AA' direction;

[0027] Fig.10 is a flow chart of a method for preparing a display panel provided in an embodiment of the present application;

[0028] Fig.11 It is a structural schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0030] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application, Figure 2 yes Figure 1 A schematic diagram of a cross-sectional structure of a display panel along the AA' direction, Figure 3 yes Figure 1 The voltage diagram of the electrodes of the light emitting element in the first and second display states is provided, with reference to Figure 1-Figure 3A display panel 200 provided in an embodiment of the present application includes a base substrate 20 and a plurality of light-emitting elements 40 located on one side of the base substrate 20. The light-emitting element 40 includes a first electrode 41, a first light-emitting layer 42, a second electrode 43, a second light-emitting layer 44, and a third electrode 45 which are stacked; the orthographic projections of the first electrode 41, the first light-emitting layer 42, the second electrode 43, the second light-emitting layer 44, and the third electrode 45 on the base substrate 20 at least partially overlap.

[0031] Specifically, refer to Figure 1 As shown, the display panel 200 may be an organic light emitting display panel (OLED), an active-matrix organic light emitting diode display panel (AMOLED), etc. The embodiment of the present application does not limit the specific light emitting type of the display panel. The display area AA (Active Area, AA) can display images normally, and the non-display area NA at least partially surrounds the display area AA, and is used to set signal routing and protect the display area AA.

[0032] refer to Figure 2 The material of the substrate 20 includes but is not limited to rigid materials such as glass or silicon wafers, and can also be flexible materials such as ultra-thin glass, metal foil or polymer plastic materials. The flexible or rigid substrate 20 can block oxygen and moisture, preventing moisture or impurities from diffusing into the display panel through the substrate 20.

[0033] The structure of the light emitting element 40 is a Tandem OLED, which can be understood as a high-efficiency OLED device structure formed by stacking a plurality of traditional OLED devices in series through a connecting layer. Figure 2, taking the light-emitting element 40 as an example of two light-emitting units connected in series, the first electrode 41, the first light-emitting layer 42, the second electrode 43 can constitute the first light-emitting unit, and the second electrode 43, the second light-emitting layer 44 and the third electrode 45 can constitute the second light-emitting unit. The first electrode 41 serves as the anode of the first light-emitting unit, and the second electrode 43 serves as the cathode of the first light-emitting unit. At the same time, the second electrode 43 can also serve as the anode of the second light-emitting unit, and the third electrode 45 serves as the cathode of the second light-emitting unit. The materials of the second electrode 43 and the third electrode 45 include but are not limited to one or more of silver, indium tin oxide, indium zinc oxide or magnesium silver alloy. For example, the second electrode 43 uses silver (Ag), which has a good carrier injection effect as the cathode and anode of the light-emitting element 40. The material of the first electrode 41 can be a metal material or a transparent conductive material, such as ITO (indium tin oxide), IZO (indium zinc oxide), ITO / Ag / ITO, etc. The materials of the first light-emitting layer 42 and the second light-emitting layer 44 can be low-molecular or high-molecular organic materials.

[0034] The display state of the display panel 200 includes at least a first display state and a second display state. The light emission mode of the first display state is Tandem light emission, and the light emission mode of the second display state is Single light emission. Figure 3 , specifically:

[0035] refer to Figure 2 and Figure 3 In the middle (a) figure, in the first display state, the voltage PV2 received by the second electrode 43 is greater than the voltage PV3 received by the third electrode 45, and the first light-emitting layer 42 and the second light-emitting layer 44 emit light. Specifically, the light-emitting element 40 works in series light emission, and different voltages can be provided to the first electrode 41, the second electrode 43 and the third electrode 45 respectively, and PV2>PV3 is controlled to generate a potential difference between the first electrode 41 and the second electrode 43, and a potential difference is generated between the second electrode 43 and the third electrode 45. Holes are injected into the first light-emitting layer 42 from the first electrode 41, electrons are injected into the first light-emitting layer 42 from the second electrode 43, and electrons are injected into the second light-emitting layer 44 from the third electrode 45. Electrons and holes are respectively combined in the first light-emitting layer 42 and the second light-emitting layer 44 to form excited excitons. The excited excitons decay and release energy in the form of light. The first light-emitting layer 42 and the second light-emitting layer 44 emit light simultaneously. The light-emitting element 40 has a high display brightness and can meet the scene application of high brightness display.

[0036] refer to Figure 2 and Figure 3In the middle (b) figure, in the second display state, the voltage received by the second electrode 43 is equal to the voltage received by the third electrode 45, and the first light-emitting layer 42 emits light. Specifically, the light-emitting element 40 works in a single-layer light-emitting mode, providing the same voltage to the second electrode 43 and the third electrode 45, and controlling PV2=PV3, the potential difference between the second electrode 43 and the third electrode 45=0, and providing different voltages to the first electrode 41 and the second electrode 43, and a potential difference is generated between the first electrode 41 and the second electrode 43. Holes are injected into the first light-emitting layer 42 from the first electrode 41, and electrons are injected into the first light-emitting layer 42 from the second electrode 43. Electrons and holes recombine in the first light-emitting layer 42 to form excited excitons, and the excited excitons decay and release energy in the form of light. Only the first light-emitting layer 42 emits light, and the second light-emitting layer 44 does not emit light. Compared to the technical solution of the prior art that the Tandem OLED device uses a smaller driving current to drive the series light-emitting layer to display low grayscale brightness, the embodiment of the present application can use a larger driving current to drive only the first light-emitting layer 42 to emit light according to the low grayscale luminous brightness, so as to achieve high and low brightness DBV (Dynamic Backlight Volume, DBV) luminous adjustment. The larger driving current is conducive to improving the display brightness of the low grayscale, while improving the problem that the same thin film transistor characteristic changes caused by the smaller driving current in the prior art bring about the difference being amplified, causing the low grayscale display brightness to deteriorate. In this way, the present application can also realize the precise adjustment of the low grayscale display brightness and improve the problem of low grayscale stealing brightness, thereby ensuring the display effect and color gamut of the low grayscale and meeting the scene application of low grayscale brightness display.

[0037] Among them, DBV is a dynamic backlight adjustment technology that can automatically adjust the screen brightness according to the ambient light to reduce eye fatigue and save power.

[0038] The display panel 200 of the present application utilizes a dual-pixel series connection method. According to different DBV display brightnesses, different pixel light-emitting methods are selected to switch between single-layer light-emitting and series light-emitting, thereby realizing high and low brightness DBV light-emitting adjustment. Such a setting can take into account the high efficiency, long life and low grayscale display effect of the light-emitting element, and meet the display effects in different scene applications.

[0039] In order to further explain the light-emitting principle of the light-emitting element provided in the embodiment of the present application, Figure 4 is a schematic diagram of the cross-sectional structure of another light-emitting element provided in an embodiment of the present application, with reference to Figure 4In the embodiment of the present application, the light emitting element 20 can be formed by stacking a plurality of conventional light emitting units in series through a charge generation layer CGL. Specifically, the light emitting element 20 includes an anode Anode (first electrode 41), a first hole injection layer HIL1, a first hole transport layer HTL1, a first compensation layer Prime1, a first light emitting layer EML1 (42), a first hole blocking layer HBL1, a first electron transport layer ETL1, an N-type charge generation layer NCGL, a first cathode Cathode1 (second electrode 43), a P-type charge generation layer PCGL, a second hole transport layer HTL2, a second compensation layer Prime2, a second light emitting layer EML2 (44), a second hole blocking layer HBL2, a second electron transport layer ETL2, a first electron injection layer EIL, a second cathode Cathode2 (third electrode 45), a cover plate CPL and a second electron injection layer LiF (Lithium Fluoride) stacked in sequence. Among them, LiF is used to improve the efficiency of electron injection. The N-type charge generation layer NCGL is used to generate electrons, and the P-type charge generation layer PCGL is used to generate holes. Among them, the hole blocking layer HBL is used to block holes from passing through the light-emitting layer EML into the electron transport layer ETL, so that holes and electrons are combined in the light-emitting layer EML to form excited excitons, and the excited excitons decay and release energy in the form of light, and the light-emitting layer EML emits light.

[0040] When the light-emitting unit 10 emits light in a Tandem (series) manner, the light-emitting principle is as follows: a certain voltage is applied to the first cathode Cathode1 (second electrode 43), the second cathode Cathode2 (second electrode 45) and the anode Anode (first electrode 41), respectively, and the voltage received by the first cathode Cathode1 (second electrode 43) is greater than the voltage received by the second cathode Cathode2 (second electrode 45). Holes from the anode Anode are injected into the first hole transport layer HTL1 through the first hole injection layer HIL1, and electrons generated by the N-type charge generation layer NCGL are injected into the first electron transport layer ETL1 and pass through the first hole blocking layer HBL1, and holes and electrons migrate to the first light-emitting layer EML1 through the first hole transport layer HTL1 and the first electron transport layer ETL1, respectively, and form excitons in the first light-emitting layer EML1, and the excitons excite the light-emitting molecules in the first light-emitting layer EML1 to emit light. At the same time, the holes generated by the P-type charge generation layer PCGL are injected into the second light-emitting layer EML2 through the second hole transport layer HTL2, and the electrons in the second cathode Cathode2 (the third electrode 45) are injected into the second light-emitting layer EML2 from the first electron injection layer EIL, the second electron transport layer ETL2, and the second hole blocking layer HBL2, and excitons are formed in the second light-emitting layer EML2. The excitons excite the light-emitting molecules in the second light-emitting layer EML2 to emit light, which can meet the application scenarios of high-brightness display.

[0041] When the light-emitting unit 10 is in Single (single-layer) light-emitting mode, the light-emitting principle is that the same voltage is applied to the first cathode Cathode1 and the second cathode Cathode2, the second light-emitting layer EML2 does not emit light, and a certain voltage is applied to the first cathode Cathode1 (second electrode 45) and the anode Anode (first electrode 41) respectively. Holes from the anode Anode are injected into the first hole transport layer HTL1 through the first hole injection layer HIL1, and electrons generated by the N-type charge generation layer NCGL are injected into the first electron transport layer ETL1 and pass through the first hole blocking layer HBL1. Holes and electrons migrate to the first light-emitting layer EML1 through the first hole transport layer HTL1 and the first electron transport layer ETL1, and form excitons in the first light-emitting layer EML1. The excitons excite the light-emitting molecules in the first light-emitting layer EML1 to emit light, which can meet the scene application of low grayscale brightness display.

[0042] Among them, reference Figure 4 The light-emitting element 20 includes a red sub-pixel, a green sub-pixel and a blue sub-pixel. The first compensation layer Prime1 and the second compensation layer Prime2 respectively include a red first compensation layer R-Prime1, a blue first compensation layer B-Prime1, a green first compensation layer G-Prime1, a red second compensation layer R-Prime2, a blue second compensation layer B-Prime2 and a green second compensation layer G-Prime2 at the corresponding positions of each sub-pixel, respectively, which are used to adjust the cavity length of each sub-pixel, thereby adjusting the optical performance. The first light-emitting layer EML1 and the second light-emitting layer EML2 respectively include a red first light-emitting layer R-EML1, a blue first light-emitting layer B-EML1, a green first light-emitting layer G-EML1, a red second light-emitting layer R-EML2, a blue second light-emitting layer B-EML2 and a green second light-emitting layer G-EML2 at the corresponding positions of each sub-pixel. The compensation layer Prime and the light-emitting layer EML are stacked.

[0043] It should be noted that the display device provided in this embodiment also includes other film layers, such as a pixel defining layer 50, a thin film encapsulation layer (not shown in the figure), etc., which work together to realize the display function of the display device. Technical personnel in this field, based on their familiarity with the structure and function of the display panel, can clearly understand the structure and function of each film layer, and the embodiments of this application will no longer show them one by one.

[0044] Based on the above embodiments, Figure 3In the first display state and the second display state, the voltage PV2 received by the second electrode 43 is different from the voltage PV1 received by the first electrode 41. That is, PV2≠PV1, that is, when the light-emitting element 40 switches between single-layer light emission and series light emission in the pixel light-emitting mode, it is also necessary to ensure that there is a potential difference between the second electrode 43 and the first electrode 41, so that holes and electrons migrate to the light-emitting layer.

[0045] Based on the above embodiments, Figure 2 and Figure 5 The display state of the display panel 200 also includes a third display state. The third display state is another single light emitting mode, that is, only the second light emitting layer 44 emits light.

[0046] refer to Figure 2 and Figure 5 In the third display state, the voltage PV2 received by the second electrode 43 is equal to the voltage PV1 received by the first electrode 41, and the voltage PV2 received by the second electrode 43 is different from the voltage PV3 received by the third electrode 45, and the second light-emitting layer 44 emits light, that is, PV2=PV1, PV2≠PV3.

[0047] Specifically, refer to Figure 2 and Figure 4 In some display scenarios between low grayscale display brightness and high display brightness, the second light-emitting layer 44 on the top layer can be controlled to emit light by controlling the second electrode 43 and the first electrode 41 to have the same potential, so as to meet various needs of display brightness.

[0048] Figure 6 is a schematic diagram of a power bus of a display panel provided in an embodiment of the present application. Based on the above embodiment, reference is made to Figure 6 The display panel 200 also includes a positive power bus BUS 正 , the first negative power bus BUS1 负 and the second negative power bus BUS2 负 The first electrode 41 is connected to the positive power bus BUS 正 The second electrode 43 is electrically connected to the first negative power bus BUS1 负 The third electrode 45 is electrically connected to the second negative power bus BUS2 负 Electrical connection.

[0049] Specifically, refer to Figure 6 In the embodiment of the present application, a plurality of positive power buses BUS surrounding the display area AA may be provided. 正 , the first negative power bus BUS1 负 and the second negative power bus BUS2 负 , multiple power buses along Figure 6The binding area NA' extending in the Y direction to the display panel 200 is electrically connected to the power chip (POWER IC) (not shown in the figure). The binding area NA' can be turned to the back of the display area AA after the display panel 200 is packaged, which is conducive to realizing a narrow frame design. Each power bus can output a corresponding voltage signal to transmit to the light-emitting element. For example, the positive power bus BUS 正 The first negative power bus BUS1 is configured to output an anode reference voltage to the first electrode 41 of the light emitting element 20. 负 The second negative power bus BUS2 is configured to output a cathode reference voltage to the second electrode 43 of the light emitting element 20. 负 It is configured to output a cathode reference voltage to the third electrode 45 of the light emitting element 20. In this way, the light emitting element 20 can be switched between the first display state, the second display state and the third display state to meet the display needs of different display brightness.

[0050] Based on the above embodiments, continue to refer to Figure 1 , Figure 2 and Figure 6 The display panel 200 further includes a driving circuit layer 30, and the driving circuit layer 30 includes a second electrode signal line PVEE1 and a third electrode signal line PVEE2. The second electrode signal line PVEE1 is connected to the second electrode 43 and the first negative power bus BUS1 respectively. 负 The third electrode signal line PVEE2 is electrically connected to the third electrode 45 and the second negative power bus BUS2. 负 Electrically connected, at least a portion of the third electrode signal line PVEE2 is located in the non-display area NA.

[0051] Specifically, refer to Figure 2 , the display panel 200 also includes a driving circuit layer 30 located between the base substrate 20 and the multiple light-emitting elements 40. The driving circuit layer 30 includes a pixel circuit, and the pixel circuit can be a 2T1C, 4T1C, 7T1C, 7T2C, 8T1C, 8T2C and other circuit structures. The pixel circuit includes multiple thin film transistors (TFT), storage capacitors (not shown in the figure) and metal wiring and other film layer structures (not shown in the figure). The second electrode signal line PVEE1 and the third electrode signal line PVEE2 are located in any one metal film layer or multiple metal film layers in the driving circuit layer 30. For example, before the second electrode 43 and the third electrode 45 are prepared into a film, a laser process can be used to punch holes in the display panel 200 and fill the holes with connecting metal to form a first metal column P1 and a second metal column P2, so that the second electrode 43, the first metal column P1, the second electrode signal line PVEE1 and the first negative power bus BUS1 负Electrical connection, the third electrode 45, the second metal pillar P2, the third electrode signal line PVEE2 and the second negative power bus BUS2 负 Such an arrangement is beneficial to reducing the impedance of the second electrode 43 and the third electrode 45 (cathode) and improving the voltage signal transmission efficiency.

[0052] Furthermore, at least a portion of the second electrode signal line PVEE1 and the third electrode signal line PVEE2 is disposed in the non-display area NA, which is beneficial to realizing a narrow frame design.

[0053] Figure 7 yes Figure 1 A schematic diagram of a cross-sectional structure of another display panel along the AA' direction is shown in FIG. Figure 8 yes Figure 1 A schematic diagram of a cross-sectional structure of another display panel along the AA' direction is shown in FIG. Fig. 9 yes Figure 1 Schematic diagram of a cross-sectional structure of another display panel along the AA' direction.

[0054] Based on the above embodiments, continue to refer to Figure 1 , Figure 2 , Figure 7-Figure 9 The driving circuit layer 30 includes a first metal layer M1, a second metal layer M2, and a third metal layer M3 which are stacked. The driving circuit layer 30 includes a pixel circuit, and the pixel circuit is electrically connected to the light-emitting element 40. The pixel circuit includes at least one transistor 31, the gate 313 of the transistor 31 is located in the first metal layer M1, and the source 315 and / or drain 316 of the transistor 31 is located in the second metal layer M2. The third metal layer M3 is a connecting electrode layer between the source 315 and the drain 316 of the transistor 31 and the light-emitting element 40.

[0055] For example, refer to Figure 1 , Figure 2 , Figure 7-Figure 9, taking the transistor 31 of the display panel as a top-gate thin-film transistor TFT as an example, the structure of the film layer of the driving circuit layer 30 is described. The driving circuit layer 30 of the display panel includes an active layer 311 located on one side of the substrate 20, and a gate insulating layer 312 located on the active layer 311. A gate 313 located on the gate insulating layer 312, and an interlayer insulating layer 314 located on the gate 313. Among them, the metal layer where the gate 313 is located is the first metal layer M1, and the interlayer insulating layer can be formed by an inorganic layer insulation such as silicon oxide or silicon nitride. A source electrode 315 and a drain electrode 316 are located on the interlayer insulating layer 314. Among them, the metal layer where the source 315 and the drain 316 are located is the second metal layer M2, the source 315 and the drain 316 are electrically connected to the source region and the drain region respectively through contact holes (not shown in the figure), and the source 315 and the drain 316 can be metals of Cr, Pt, Ru, Au, Ag, Mo, Al, W, Cu and / or AlNd, or metals or conductive oxides including ITO, GIZO, GZO, IZO (InZnO) or AZO (AlZnO). The passivation layer 317 located on the source 315 and the drain 316 of the transistor 31 plays the role of passivation and protection of the transistor 31. The drain 315 of the transistor 31 is electrically connected to the first electrode 41 (anode) of the light-emitting element 40 through the third metal layer M3, and the driving circuit layer 30 provides a driving voltage to the light-emitting element 40 through the transistor 31, which is used to drive the light-emitting element 40 to emit light.

[0056] The second electrode signal line PVEE1 and the third electrode signal line PVEE2 are located in at least one of the second metal layer M2 and the third metal layer M3. Figure 2 , the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be in the same layer as the source 315 and the drain 316 of the transistor 31. In some embodiments, referring to Figure 7 , the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be in the same layer as the third metal layer M3. Figure 8 , the second electrode signal line PVEE1 can be in the same layer as the source 315 and the drain 316 of the transistor 31, and the third electrode signal line PVEE2 can be in the same layer as the third metal layer M3. More embodiments are not shown here one by one. That is to say, the embodiment of the present application can reasonably set the film layer positions of the second electrode signal line PVEE1 and the third electrode signal line PVEE2 according to the existing circuit design of the driving circuit layer 30 without affecting the pixel circuit structure design, so as to realize the reception of the voltage signal of the second electrode 43 and the voltage signal of the third electrode 45, and finally realize the switching of the pixel light emitting mode of the display panel.

[0057] Based on the above embodiments, Figure 2 , Figure 7-Figure 9The display panel 200 also includes a pixel defining layer 50, which is located on one side of the base substrate 20. The pixel defining layer 50 includes a plurality of pixel openings, and the light-emitting element 40 is located in the pixel openings. The pixel defining layer 50 is clamped between the anode and the cathode of the light-emitting element 20, and the pixel defining layer 50 can prevent or reduce color mixing between pixels. Optionally, the material of the pixel defining layer 50 may include at least one of organic insulating materials such as polyimide, polyamide, acrylic resin, cyclobutene and phenolic resin; the pixel defining layer 50 may also include SiO2, SiNx, Al2O3, CuO x , Tb4O7, Y2O3, Nb2O5 and Pr2O3 and other inorganic insulating materials; moreover, the pixel defining layer 50 may also have a multilayer structure formed by alternating organic insulating materials and inorganic insulating materials.

[0058] In some embodiments, reference Figure 2 , Figure 7-Figure 8 In the area where the space between two adjacent light emitting elements 40 is large, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be arranged on opposite sides of the pixel opening to reduce the crosstalk between the voltage signals in the light emitting element 40. For example, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 are symmetrically distributed on both sides of the light emitting element 20.

[0059] In some embodiments, reference Fig. 9 In the area where the space between two adjacent light-emitting elements 40 is small, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 can be set on the same side of the pixel opening, saving the film layer space occupied by the electrode signal lines and reducing the crosstalk between the voltage signals between the two adjacent light-emitting elements 40.

[0060] Based on the above embodiments, Figure 2 , Figure 7-Figure 9 , the thickness of the third electrode 45 is set to be greater than or equal to the thickness of the second electrode 43. Optionally, the thickness of the second electrode 43 is 10A to 100A, and the thickness of the third electrode 45 is 70A to 200A. In the implementation of the present application, the second electrode 43 can be made of Ag with a relatively thin thickness, and the third electrode 45 can be made of ITO, IZO, ITO / Ag / ITO, etc. with good transmittance, and the thickness of the second electrode 43 is less than or equal to the thickness of the third electrode 45. Such a setting is conducive to improving the electron injection efficiency of the second electrode 43 and the transmittance of the second electrode 43 and the third electrode 45, and improving the luminous brightness of the light-emitting element 20.

[0061] Based on the above embodiments, Figure 2 , Figure 7-Figure 9An organic layer 60 is further included between the second electrode 43 and the third electrode 45 to avoid electrical contact between the second electrode 43 and the third electrode 45. For example, at least one of organic insulating materials such as polyimide, polyamide, acrylic resin, cyclobutene and phenolic resin is used.

[0062] Based on the same inventive concept, the embodiment of the present application further provides a method for preparing a display panel, which is used to prepare the display panel provided in the above embodiment. Fig.10 is a flow chart of a method for preparing a display panel provided in an embodiment of the present application, with reference to Figure 1-Figure 10 , the method for preparing a display panel provided in an embodiment of the present application includes:

[0063] S101, providing a substrate.

[0064] For example, reference Figure 2 , for example, a rigid substrate base plate 20 is used.

[0065] S102, preparing a first electrode and a first light-emitting layer on one side of the base substrate.

[0066] refer to Figure 2 Before preparing the light-emitting element 20, it is also necessary to prepare a driving circuit layer 30 and a pixel defining layer 50 in sequence on one side of the rigid substrate 20. Among them, the second electrode signal line PVEE1 and the third electrode signal line PVEE2 are prepared in the second metal layer M2 and / or the third metal layer M3 of the driving circuit layer 30. A plurality of pixel openings are opened in the pixel defining layer 50, and the first electrode 41 and the first light-emitting layer 42 of the light-emitting element 20 are prepared in sequence in the pixel openings. The first electrode 41 is electrically connected to the pixel circuit in the driving circuit layer 30, and the driving circuit layer 30 is used to provide an anode driving voltage to the first electrode 41 of the light-emitting element 20.

[0067] S103, providing a first mask, and using the first mask to form a second electrode on a side of the first light-emitting layer away from the base substrate.

[0068] Specifically, refer to Figure 2 , using a "patterning" preparation process, using a first mask to perform a first evaporation deposition on the side of the first light-emitting layer 42 away from the base substrate 20 to prepare the second electrode 43. At the same time, using a laser process to punch a hole in the driving circuit layer 30 to prepare a first metal column P1, the second electrode 43 is electrically connected to the second electrode signal line PVEE1 through the first metal column P1, and the second electrode signal line PVEE1 is electrically connected to the first negative power bus BUS1 of the display panel 200. 负 Electrical connection. First negative power bus BUS1 负 It is configured to provide a cathode driving voltage to the second electrode 43 .

[0069] S104, forming a second light-emitting layer on a side of the second electrode away from the base substrate.

[0070] Specifically, refer to Figure 2 A second light-emitting layer 44 is prepared on a side of the second electrode 43 away from the base substrate 20 .

[0071] S105 , using a first mask to form a third electrode on a side of the second light-emitting layer away from the base substrate.

[0072] Specifically, refer to Figure 2 , the "patterning" preparation process is used again, and the third electrode 45 is prepared by a second evaporation on the side of the second light-emitting layer 44 away from the base substrate 20 using the first mask. At the same time, a second metal column P2 is punched in the driving circuit layer 30 using a laser process, and the third electrode 45 is connected to the second negative power bus BUS2 through the second metal column P2. 负 Electrically connect the second negative power bus BUS2 负 The second negative power bus BUS2 of the display panel 200 负 Electrical connection, second negative power bus BUS2 负 It is configured to supply a cathode driving voltage to the third electrode 45 .

[0073] It should be noted that the present application adopts a first mask plate to prepare the second electrode 43 and the third electrode 45 in two evaporation processes, which can ensure the overlapping area of ​​the second electrode 43 and the third electrode 45 on the light-emitting layer, while reducing the preparation cost and preparation process difficulty of the light-emitting element 20.

[0074] Furthermore, the "patterning" in this article specifically refers to a non-whole-layer structure, that is, a structure in which a whole layer of material is first formed and then a specific shape is engraved during the manufacturing process. The method for preparing a display panel provided in the embodiment of the present application also includes the preparation of other film layers, such as preparing an encapsulation layer on the side of the light-emitting element away from the substrate, etc. Multiple film layers work together to achieve normal display of the display panel. Those skilled in the art can clearly understand and comprehend it based on the prior art, and will not be explained one by one here.

[0075] The display panel prepared by the preparation method provided in the embodiment of the present application has the technical effect of the technical solution in any of the above embodiments, and the explanation of the structure and terminology that are the same or corresponding to the above embodiments will not be repeated here.

[0076] Based on the same inventive concept, an embodiment of the present application also provides a display device. Fig.11 This is a schematic diagram of the structure of a display device provided in an embodiment of the present application. Fig.11As shown, the display device 300 includes the display panel 200 described in any embodiment of the present invention. Therefore, the display device 300 provided in the embodiment of the present application has the technical effect of the technical solution in any of the above embodiments, and the explanation of the structure and terms that are the same or corresponding to the above embodiments will not be repeated here. The display device 300 provided in the embodiment of the present application can be Fig.11 The mobile phone shown can also be any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present application do not specifically limit this.

[0077] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: substrate substrate; A plurality of light-emitting elements are located on one side of the base substrate, the light-emitting elements include a first electrode, a first light-emitting layer, a second electrode, a second light-emitting layer and a third electrode which are stacked; the first electrode, the first light-emitting layer, the second electrode, the second light-emitting layer and the third electrode have at least a partial overlap in their orthographic projections on the base substrate; the display state of the display panel includes a first display state and a second display state; In the first display state, the voltage received by the second electrode is greater than the voltage received by the third electrode, and the first light-emitting layer and the second light-emitting layer emit light; In the second display state, the voltage received by the second electrode is equal to the voltage received by the third electrode, and the first light-emitting layer emits light.

2. The display panel according to claim 1, characterized in that: In the first display state and the second display state, a voltage received by the second electrode is different from a voltage received by the first electrode.

3. The display panel according to claim 1, characterized in that: The display state of the display panel further includes a third display state; In the third display state, the voltage received by the second electrode is equal to the voltage received by the first electrode, and the voltage received by the second electrode is different from the voltage received by the third electrode, and the second light-emitting layer emits light.

4. The display panel according to claim 1, characterized in that: The display panel further includes a positive power bus, a first negative power bus, and a second negative power bus; The first electrode is electrically connected to the positive power bus, the second electrode is electrically connected to the first negative power bus, and the third electrode is electrically connected to the second negative power bus.

5. The display panel according to claim 4, characterized in that: The display panel includes a display area and a non-display area; the non-display area at least partially surrounds the display area; Also includes a driving circuit layer, the driving circuit layer includes a second electrode signal line and a third electrode signal line; The second electrode signal lines are electrically connected to the second electrodes and the first negative power bus, respectively, and at least part of the second electrode signal lines are located in the non-display area; The third electrode signal line is electrically connected to the third electrode and the second negative power bus, respectively, and at least a portion of the third electrode signal line is located in the non-display area.

6. The display panel according to claim 5, characterized in that: The driving circuit layer includes a first metal layer, a second metal layer and a third metal layer which are stacked; The driving circuit layer includes a pixel circuit, and the pixel circuit is electrically connected to the light emitting element; The pixel circuit includes at least one transistor, the gate of the transistor is located in the first metal layer, and the source and / or drain of the transistor is located in the second metal layer; the third metal layer is a connection electrode layer between the source and drain of the transistor and the light-emitting element; The second electrode signal line and the third electrode signal line are located in at least one of the second metal layer and the third metal layer.

7. The display panel according to claim 5, characterized in that: Also includes a pixel defining layer, The pixel defining layer is located on one side of the base substrate; the pixel defining layer includes a plurality of pixel openings; the light emitting element is located in the pixel opening; The second electrode signal line and the third electrode signal line are located at the same side of the pixel opening, or the second electrode signal line and the third electrode signal line are located at two opposite sides of the pixel opening, respectively.

8. The display panel according to claim 1, characterized in that: The thickness of the third electrode is greater than or equal to the thickness of the second electrode.

9. The display panel according to claim 8, characterized in that: The film thickness of the second electrode is 10A to 100A, and the film thickness of the third electrode is 70A to 200A.

10. The display panel according to claim 1, characterized in that: An organic layer is further included between the second electrode and the third electrode.

11. The display panel according to claim 1, characterized in that: The materials of the second electrode and the third electrode include one or more of silver, indium tin oxide, indium zinc oxide or magnesium silver alloy.

12. A method for preparing a display panel, characterized in that: Used to prepare the display panel according to any one of claims 1 to 11, characterized in that the preparation method comprises: providing a substrate base plate; Preparing a first electrode and a first light-emitting layer on one side of the base substrate; Providing a first mask, and using the first mask to form a second electrode on a side of the first light-emitting layer away from the base substrate; forming a second light-emitting layer on a side of the second electrode away from the base substrate; The third electrode is formed on a side of the second light emitting layer away from the base substrate by using the first mask.

13. A display device, characterized in that: A display panel comprising any one of claims 1 to 11.

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