Display panel, preparation method of display panel and display device

Abstract

The invention relates to a display panel, a display panel manufacturing method and a display device, the display panel is provided with a display area and a binding area arranged outside the display area, and the display panel comprises a substrate; the array layer is arranged on the substrate and comprises a plurality of pixel driving circuits located in the display area and at least one binding connection structure located in the binding area; the light-emitting devices are arranged on the side, away from the substrate, of the array layer and located in the display area; the first packaging layer is located in the display area and the binding area and arranged on the sides, away from the substrate, of the multiple light-emitting devices and the at least one binding connection structure, and the first packaging layer comprises multiple first via holes located in the display area. Thus, the binding connection structure of the binding area is also covered and protected by the first packaging layer, the binding connection structure is prevented from being damaged by the process of manufacturing the first via hole, the packaging effect of the display panel is improved, and the binding connection structure is protected.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel, a method for preparing a display panel, and a display device. Background Art

[0002] Display panels are an indispensable component in modern electronic devices, used to display images and text information. The packaging technology of display panels is an indispensable part of display panel manufacturing, but the display panels in related technologies have the problem of poor packaging effect.

[0003] In some display panels, auxiliary electrode technology is introduced to effectively improve their performance. Patents CN118742138A, PCT / CN2024 / 107011, and 202411175069.8 record relevant contents of auxiliary electrode technology for reference. Summary of the invention

[0004] Based on this, it is necessary to provide a display panel, a method for preparing a display panel, and a display device to address the problem of poor packaging effect of the display panel.

[0005] A display panel, the display panel having a display area and a binding area arranged outside the display area, and comprising:

[0006] substrate;

[0007] an array layer, disposed on the substrate, comprising a plurality of pixel driving circuits located in the display area and at least one binding connection structure located in the binding area;

[0008] A plurality of light-emitting devices are arranged on a side of the array layer away from the substrate and located in the display area, the light-emitting devices comprising a light-emitting functional layer and a first electrode sequentially stacked in a direction away from the substrate, and the light-emitting devices are electrically connected to the corresponding pixel driving circuits;

[0009] A first encapsulation layer, located in the display area and the binding area, and disposed on a side of the plurality of light-emitting devices and the at least one binding connection structure away from the substrate, the first encapsulation layer comprising a plurality of first via holes located in the display area;

[0010] The conductive layer includes at least one auxiliary electrode located in the display area, wherein the at least one auxiliary electrode is arranged on a side of the first encapsulation layer away from the substrate and is electrically connected to the first electrodes of the plurality of light-emitting devices through the plurality of first via holes.

[0011] In the above-mentioned display panel, the first encapsulation layer is located in the display area and the binding area, and is arranged on the side of the multiple light-emitting devices and at least one binding connection structure away from the substrate. The first encapsulation layer includes multiple first vias located in the display area. The conductive layer includes at least one auxiliary electrode located in the display area, and the at least one auxiliary electrode is arranged on the side of the first encapsulation layer away from the substrate, and is electrically connected to the first electrodes of the multiple light-emitting devices through the multiple first vias. In this way, the first encapsulation layer is arranged above the multiple light-emitting devices in the display area, and the first encapsulation layer is provided with multiple first vias in the display area. The conductive layer includes at least one auxiliary electrode located in the display area, and the at least one auxiliary electrode can be connected to the first electrode of the light-emitting device through the first via. After the auxiliary electrode and the first electrode are electrically connected and turned on, the area of ​​the first electrode can be increased, thereby reducing the voltage drop of the display panel and improving the uniformity of the display.

[0012] Moreover, a first packaging layer is arranged above the multiple light-emitting devices and at least one binding connection structure. The first packaging layer not only packages the multiple light-emitting devices in the display area, but also extends to the binding area and packages the binding connection structure at the same time. In this way, when a first via hole is opened in the first packaging layer located in the display area and a whole-surface etching process is required, the binding connection structure in the binding area is also covered and protected by the first packaging layer to prevent the binding connection structure from being damaged by the process of making the first via hole. In this way, the packaging effect of the display panel is improved and the binding connection structure is protected.

[0013] In some embodiments, the first encapsulation layer further includes at least one second via hole located in the binding area, and the display panel further includes:

[0014] at least one lead-out structure, located in the binding region, disposed on a side of the first packaging layer away from the substrate, and electrically connected to the at least one binding connection structure through the at least one second via hole;

[0015] Preferably, the at least one lead structure and the at least one auxiliary electrode are made of the same material;

[0016] Preferably, the at least one lead-out structure is located in the conductive layer.

[0017] In some embodiments, an outer edge of an orthographic projection of the first encapsulation layer on the substrate surrounds an outer edge of an orthographic projection of the at least one binding connection structure on the substrate.

[0018] In some embodiments, the array layer includes a plurality of insulating sublayers, and the pixel driving circuit includes a plurality of thin film transistors, wherein:

[0019] The thin film transistor comprises a semiconductor layer, a gate, and an optional first electrode and / or a second electrode, wherein the semiconductor layer, the gate, and the optional first electrode and / or the second electrode are arranged between the plurality of insulating sublayers in an intermittent manner;

[0020] The at least one binding connection structure is disposed in the same layer as the gate and optionally at least one of the first electrode and / or the second electrode;

[0021] Preferably, at least one of the plurality of insulating sublayers is disposed between the at least one binding connection structure and the first encapsulation layer.

[0022] In some embodiments, it also includes:

[0023] A pixel definition layer, the pixel definition layer is arranged on one side of the substrate, a plurality of pixel openings are opened on the pixel definition layer, and parts of the light emitting device are located in corresponding pixel openings;

[0024] Preferably, the light emitting device further comprises a second electrode located on a side of the light emitting functional layer close to the substrate, a portion of the second electrode is located between the substrate and the pixel definition layer, and another portion is exposed from the corresponding pixel opening;

[0025] Preferably, the display panel further comprises an isolation structure, the isolation structure is arranged on a side of the pixel definition layer away from the substrate, the isolation structure comprises a plurality of isolation openings, the isolation openings are connected to the corresponding pixel openings, and a portion of the light emitting device is located in the corresponding isolation openings;

[0026] Preferably, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the isolation opening on the substrate.

[0027] In some embodiments, it also includes:

[0028] A second packaging layer is provided on a side of the first packaging layer away from the substrate;

[0029] A third packaging layer is provided on a side of the second packaging layer away from the substrate;

[0030] Optionally, a material of the second encapsulation layer includes an organic material, and a material of the first encapsulation layer and the third encapsulation layer includes an inorganic material.

[0031] A method for preparing a display panel, comprising:

[0032] Providing a substrate, the substrate having a display area and a binding area arranged outside the display area;

[0033] forming an array layer on the substrate, the array layer comprising a plurality of pixel driving circuits located in the display area and at least one binding connection structure located in the binding area;

[0034] A plurality of light-emitting devices located in the display area are formed on a side of the array layer away from the substrate, the light-emitting devices comprising a light-emitting functional layer and a first electrode sequentially stacked in a direction away from the substrate, and the light-emitting devices are electrically connected to the corresponding pixel driving circuits;

[0035] forming a first encapsulation layer located in the display area and the binding area on a side of the plurality of light emitting devices and the at least one binding connection structure away from the substrate;

[0036] forming a plurality of first via holes located in the display area on the first encapsulation layer;

[0037] At least one auxiliary electrode is formed in the display area on a side of the first encapsulation layer away from the substrate to obtain a conductive layer, and the at least one auxiliary electrode is electrically connected to the first electrodes of the plurality of light-emitting devices through the plurality of first via holes.

[0038] In some embodiments, the step of forming a plurality of first via holes located in the display area on the first encapsulation layer includes: forming a plurality of first via holes located in the display area and at least one second via hole located in the binding area on the first encapsulation layer;

[0039] The step of forming at least one auxiliary electrode located in the display area on a side of the first packaging layer away from the substrate to obtain a conductive layer includes: forming at least one auxiliary electrode located in the display area and at least one lead-out structure located in the binding area on a side of the first packaging layer away from the substrate, wherein the at least one auxiliary electrode is electrically connected to the first electrodes of the multiple light-emitting devices through the multiple first vias, and the at least one lead-out structure is electrically connected to the at least one binding connection structure through the at least one second via.

[0040] A display device comprises the above-mentioned display panel.

[0041] In some embodiments, it also includes:

[0042] a driving device, electrically connected to the at least one binding connection structure;

[0043] Preferably, the driving device is a flexible circuit board;

[0044] Preferably, the driving device is a chip-on-film. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is a schematic diagram of a region of a display panel in some embodiments of the present application;

[0046] Figure 2 This is a schematic diagram of the structure of the substrate and the array layer in some embodiments of the present application;

[0047] Figure 3 A schematic cross-sectional view of a display area of ​​a display panel in some embodiments of the present application;

[0048] Figure 4 A schematic cross-sectional view of a binding area of ​​a display panel in some embodiments of the present application;

[0049] Figure 5 It is a cross-sectional schematic diagram of a binding area of ​​a display panel in some other embodiments of the present application;

[0050] Figure 6 It is a cross-sectional schematic diagram of a light emitting device in some embodiments of the present application;

[0051] Figure 7 This is a top view of an auxiliary cathode on a display panel in some embodiments of the present application.

[0052] Explanation of the accompanying drawings: 100, display panel; 101, display area; 103, binding area; 10, substrate; 20, array layer; 21, insulating sublayer; 22, pixel driving circuit; 23, thin film transistor; 231, semiconductor layer; 233, gate; 235, first electrode; 237, second electrode; 25, binding connection structure; 30, pixel definition layer; 32, pixel opening; 34, isolation structure; 341, isolation opening; 40, light-emitting device; 41, light-emitting functional layer; 43, first electrode; 45, second electrode; 50, first encapsulation layer; 51, first via hole; 53, second via hole; 71, auxiliary electrode; 73, lead-out structure; 80, second encapsulation layer; 90, third encapsulation layer. DETAILED DESCRIPTION

[0053] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0054] As described in the background technology, the display panel in the related art has the problem of poor packaging effect. Specifically, in some display panels, an auxiliary cathode is set on the cathode to increase the area of ​​the cathode, reduce the voltage drop of the display panel, and improve the uniformity of the display. However, when making an auxiliary cathode above the cathode, it is necessary to first make an insulating layer above the cathode, then etch the insulating layer to form a through hole, and finally set the auxiliary cathode on the insulating layer and electrically connect the auxiliary cathode and the cathode through the through hole on the insulating layer. When etching the insulating layer, if the entire surface is etched, etching damage will be caused to the insulating layer and the conductive layer in the binding area, which will affect the insulation and binding performance of the binding area, and the packaging effect of the display panel is not good.

[0055] In order to solve this technical problem, the present application provides a display panel 100 , which can improve the packaging effect of the display panel 100 and prevent the insulation and binding performance of the binding area 103 from being damaged and affected.

[0056] See also Figure 1-Figure 4 According to some embodiments of the present application, the present application provides a display panel 100, the display panel 100 having a display area 101 and a binding area 103 arranged outside the display area 101, the display panel 100 includes a base, an array layer 20, and a plurality of light-emitting devices 40, the array layer 20 is arranged on a substrate 10, and includes a plurality of pixel driving circuits 22 located in the display area 101 and at least one binding connection structure 25 located in the binding area 103; the plurality of light-emitting devices 40 are arranged on a side of the array layer 20 away from the substrate 10, and are located in the display area 101, the light-emitting device 40 includes a light-emitting functional layer 41 and a first electrode 43 stacked in sequence in a direction away from the substrate 10, and the light-emitting device 40 is electrically connected to the corresponding pixel driving circuit 22.

[0057] An array layer 20 is formed on a substrate 10. The array layer 20 includes a plurality of pixel driving circuits 22 in a display area 101. The array layer 20 includes at least one binding connection structure 25 in a binding area 103. The pixel driving circuit 22 in the display area 101 is electrically connected to a light-emitting device 40 above the array layer 20. The light-emitting device 40 is controlled to emit light through the pixel driving circuit 22. The binding connection structure 25 is located in the binding area 103 and is used to bind the display panel 100 to the control circuit.

[0058] In addition, the display panel 100 further includes a first encapsulation layer 50 and a conductive layer. The first encapsulation layer 50 is located in the display area 101 and the binding area 103, and is disposed on a side of the plurality of light-emitting devices 40 and at least one binding connection structure 25 away from the substrate 10. The first encapsulation layer 50 includes a plurality of first via holes 51 located in the display area 101. The conductive layer includes at least one auxiliary electrode 71 located in the display area 101. The at least one auxiliary electrode 71 is disposed on a side of the first encapsulation layer 50 away from the substrate 10, and is electrically connected to the first electrodes 43 of the plurality of light-emitting devices 40 through the plurality of first via holes 51.

[0059] In this way, a first packaging layer 50 is arranged above the multiple light-emitting devices 40 in the display area 101, and the first packaging layer 50 is provided with multiple first via holes 51 in the display area 101. The conductive layer includes at least one auxiliary electrode 71 located in the display area 101. The at least one auxiliary electrode 71 can be connected to the first electrode 43 of the light-emitting device 40 through the first via hole 51. After the auxiliary electrode 71 and the first electrode 43 are electrically connected, the area of ​​the first electrode 43 can be increased, thereby reducing the voltage drop of the display panel 100 and improving the uniformity of the display.

[0060] Moreover, a first packaging layer 50 is arranged above the multiple light-emitting devices 40 and at least one binding connection structure 25. The first packaging layer 50 not only packages the multiple light-emitting devices 40 in the display area 101, but also extends to the binding area 103 and packages the binding connection structure 25 at the same time. In this way, when the first via hole 51 is opened in the first packaging layer 50 located in the display area 101 and a process such as full-surface etching is required, the binding connection structure 25 in the binding area 103 is also covered and protected by the first packaging layer 50 to prevent the binding connection structure 25 from being damaged by the process of making the first via hole 51. In this way, the packaging effect of the display panel 100 is improved and the binding connection structure 25 is protected.

[0061] In some embodiments, the array layer 20 includes a plurality of insulating sublayers 21, the pixel driving circuit 22 includes a plurality of thin film transistors 23, the thin film transistor 23 includes a semiconductor layer 231, a gate 233, and an optional first electrode 235 and / or a second electrode 237, the semiconductor layer 231, the gate 233, and the optional first electrode 235 and / or the second electrode 237 are arranged at intervals between the plurality of insulating sublayers 21, and the semiconductor layer 231, the gate 233, and the optional first electrode 235 and / or the second electrode 237 are insulated and isolated by the plurality of sub-insulating layers. One of the first electrode 235 and the second electrode 237 is a source electrode, and the other is a drain electrode. After a voltage is applied to the gate 233 in the thin film transistor 23, the charge distribution in the semiconductor layer 231 is changed to form a conductive channel, so that a current flows between the first electrode 235 and the second electrode 237, thereby being able to control the light-emitting function layer 41 in the corresponding light-emitting device 40 to be excited and emit light.

[0062] Moreover, at least one binding connection structure 25 is disposed in the same layer as the gate 233 and at least one of the optional first pole 235 and / or the second pole 237. The binding connection structure 25 is made of a conductive material, and the gate 233, the optional first pole 235 and / or the second pole 237 are also made of a conductive material, so the binding connection structure 25 can be prepared in the same layer as any one of the gate 233, the optional first pole 235 and / or the second pole 237. Therefore, when forming the thin film transistor 23 in the array layer 20, any one of the gate 233, the optional first pole 235 and / or the second pole 237 is prepared in the same layer as the binding connection structure 25, and there is no need to separately set a process for preparing the binding connection structure 25 in the binding area 103, thereby simplifying the overall process steps.

[0063] It is understandable that in some other embodiments, the binding connection structure 25 can also be manufactured separately, and the binding connection structure 25 and the metal layer in the thin film transistor 23 are not manufactured on the same layer. The manufacturing method of the binding connection structure 25 is not limited here.

[0064] In some embodiments, at least one of a plurality of insulating sublayers 21 is disposed between at least one binding connection structure 25 and the first packaging layer 50, so that while the thin film transistor 23 is formed in the array layer 20 of the display area 101, the binding connection structure 25 and at least one insulating sublayer 21 covering the binding connection structure 25 are formed in the array layer 20 of the binding area 103, so that the binding connection structure 25 is initially covered and protected by at least one insulating sublayer 21, and then the first packaging layer 50 is formed, and the first packaging layer 50 covers at least one insulating sublayer 21 in the binding area 103. In this way, the binding connection structure 25 is multiplexed and protected by at least one insulating sublayer 21 and the first packaging layer 50, so that the packaging performance of the binding area 103 of the display panel 100 is further improved.

[0065] Specifically, at least one insulating sublayer 21 and a first packaging layer 50 are arranged above the binding connection structure 25. If a full-surface etching process is required to open a first via 51 in the first packaging layer 50 in the display area 101, the top of the first packaging layer 50 facing away from the substrate 10 may be etched, but at least one insulating sublayer 21 and the binding connection structure 25 below the first packaging layer 50 will not be etched. In this way, the first packaging layer 50 in the binding area 103 protects at least one insulating sublayer 21 and the binding connection structure 25, thereby improving the packaging performance of the display panel 100 and preventing the insulation and binding performance of the binding area 103 from being damaged by etching.

[0066] See also Figure 6-Figure 7In some embodiments, the display panel 100 further includes a pixel definition layer 30, which is disposed on one side of the substrate 10. A plurality of pixel openings 32 are formed on the pixel definition layer 30. Part of the light-emitting device 40 is located in the corresponding pixel openings 32, so that a light-emitting area is defined by the pixel definition layer 30. Part of the light-emitting device 40 is confined in the corresponding pixel openings 32, and the light-emitting device 40 emits light in the corresponding pixel openings 32 for display.

[0067] Furthermore, the light-emitting device 40 also includes a second electrode 45 located on the side of the light-emitting functional layer 41 close to the substrate 10. The light-emitting functional layer 41 is located between the first electrode 43 and the second electrode 45. Electrons are injected from one of the first electrode 43 and the second electrode 45, and holes are injected from the other of the first electrode 43 and the second electrode 45. The holes and electrons combine with each other in the light-emitting functional layer 41 to form excitons. When the excitons release energy, they emit light, thereby realizing the display function of the display panel 100.

[0068] Furthermore, a portion of the second electrode 45 is located between the substrate 10 and the pixel definition layer 30, and another portion is exposed from the corresponding pixel opening 32, so that a portion of the second electrode 45 is covered by the pixel definition layer 30, and another portion is exposed in the pixel opening 32. Subsequently, the light-emitting functional layer 41 can be deposited on top of the second electrode 45 in the pixel opening 32 to prepare a plurality of light-emitting devices 40.

[0069] Specifically, the positive projection of the auxiliary electrode 71 toward the pixel defining layer surrounds the periphery of the plurality of pixel openings 32, so that the auxiliary electrode 71 is staggered with the light-emitting functional layer 41 in the pixel opening 32 in the light-emitting direction, preventing the auxiliary electrode 71 from affecting the light-emitting effect of the light-emitting functional layer 41. Optionally, the first electrode 43 is a transparent layer, the auxiliary electrode 71 is a metal layer, and the first electrode 43 covering the light-emitting functional layer 41 is a transparent layer, preventing the cathode from affecting the light-emitting effect of the light-emitting functional layer 41; at the same time, after the auxiliary electrode 71 is staggered with the pixel opening 32 in the light-emitting direction, the auxiliary electrode 71 does not need to be a light-transmitting material and can be set as a metal layer, which will not affect the light-emitting effect while reducing the electrode resistance.

[0070] In some embodiments, the display panel 100 also includes an isolation structure 34, which is disposed on the side of the pixel definition layer 30 facing away from the substrate 10, and the isolation structure 34 includes a plurality of isolation openings 341, which are connected to the corresponding pixel openings 32, and a portion of the light-emitting device 40 is located in the corresponding isolation openings 341.

[0071] An isolation structure 34 is provided at a portion of the pixel definition layer 30 facing away from the substrate 10. The isolation structure 34 has an isolation opening 341 for defining the light-emitting device 40. During the manufacturing process of the light-emitting device 40, each film layer in the light-emitting device 40 can be vapor-deposited on the entire surface. At the edge of the isolation structure 34, each film layer of the light-emitting device 40 can be disconnected due to the presence of a step difference, thereby forming an independent light-emitting device 40 in each isolation opening 341. In this way, the preparation of the light-emitting device 40 does not require a precision mask plate, thereby reducing the preparation cost.

[0072] Furthermore, the orthographic projection of the pixel opening 32 on the substrate 10 is located within the orthographic projection of the isolation opening 341 on the substrate 10, that is, the isolation opening 341 is larger, allowing the second electrode 45 in the pixel opening 32 to be exposed in the isolation opening 341, so as to facilitate the subsequent formation of the light-emitting functional layer 41 and the first electrode 43 above the second electrode 45.

[0073] In some embodiments, the outer edge of the orthographic projection of the first encapsulation layer 50 on the substrate 10 surrounds the outer edge of the orthographic projection of at least one binding connection structure 25 on the substrate 10, so that the coverage of the first encapsulation layer 50 in the binding area 103 exceeds the binding connection structure 25, and the encapsulation area of ​​the first encapsulation layer 50 is larger to effectively encapsulate and protect the binding connection structure 25.

[0074] See also Figure 2-Figure 5 In some embodiments, the first encapsulation layer 50 further includes at least one second via hole 53 located in the binding area 103, and the display panel 100 further includes at least one lead-out structure 73. The at least one lead-out structure 73 is located in the binding area 103, and is disposed on a side of the first encapsulation layer 50 away from the substrate 10, and is electrically connected to at least one binding connection structure 25 through the at least one second via hole 53. In this way, the lead-out structure 73 is disposed above the first encapsulation layer 50 in the binding area 103, and the second via hole 53 is opened on the first encapsulation layer 50 to electrically connect the lead-out structure 73 and the binding connection structure 25. The display panel 100 can be subsequently bound through the lead-out structure 73 located above the first encapsulation layer 50, thereby improving the convenience of binding.

[0075] Optionally, at least one lead-out structure 73 is made of the same material as at least one auxiliary electrode 71 . Both the auxiliary electrode 71 and the lead-out structure 73 are conductive structures, and the same material can be used during the manufacturing process to facilitate molding and manufacturing.

[0076] Also optionally, at least one lead-out structure 73 is located in the conductive layer, so that the lead-out structure 73 and the auxiliary electrode 71 are prepared in the same layer. When the auxiliary electrode 71 is manufactured above the first packaging layer 50 located in the display area 101, the lead-out structure 73 can be simultaneously manufactured above the first packaging layer 50 located in the binding area 103, and there is no need to reserve a separate process for preparing the lead-out structure 73. This can simplify the manufacturing process of the display panel 100 and improve the manufacturing efficiency.

[0077] Furthermore, the first via hole 51 and the second via hole 53 are opened in the same process. After the preparation of the first encapsulation layer 50 is completed, the first via hole 51 can be opened on the first encapsulation layer 50 of the display area 101, and the second via hole 53 can be opened on the first encapsulation layer 50 of the binding area 103. The opening of the first via hole 51 and the second via hole 53 is completed in the same process, which further simplifies the manufacturing process. Moreover, after the opening of the first via hole 51 and the second via hole 53 is completed, the auxiliary electrode 71 and the lead-out structure 73 can be prepared on the first encapsulation layer 50 at the same time, so that the various structures of the display area 101 and the binding area 103 are prepared at the same time, and there is no need to prepare the structure of the binding area 103 separately after the preparation of the display area 101 is completed, making the manufacturing process of the display panel 100 simpler and more efficient.

[0078] In some embodiments, the display panel 100 further includes a second encapsulation layer 80 , which is disposed on a side of the first encapsulation layer 50 away from the substrate 10 , so that the auxiliary electrode 71 disposed above the first encapsulation layer 50 can be covered and protected by the second encapsulation layer 80 to prevent the auxiliary electrode 71 from being corroded and damaged.

[0079] Optionally, the material of the first encapsulation layer 50 includes organic material, so the first encapsulation layer 50 is prepared as an organic layer. The function of the organic layer is mainly reflected in planarization, barrier performance improvement, stress improvement, increase in contact area and reduction in peeling possibility, and process adaptability. These functions jointly ensure the overall quality and performance of the encapsulation layer, and provide a strong guarantee for the long-term stable operation of the display panel 100.

[0080] Furthermore, the display panel 100 also includes a third encapsulation layer 90, which is arranged on the side of the second encapsulation layer 80 away from the substrate 10, and another third encapsulation layer 90 is made above the second encapsulation layer 80. By combining the third encapsulation layer 90 with the second encapsulation layer 80 and combining the respective advantages of the second encapsulation layer 80 and the third encapsulation layer 90, the barrier performance of the display panel 100 is further improved to form a more effective encapsulation barrier.

[0081] Optionally, the material of the second encapsulation layer 80 includes organic material, and the material of the first encapsulation layer 50 and the third encapsulation layer 90 includes inorganic material, thus forming an overall encapsulation structure in which an organic layer is sandwiched between two inorganic layers. The inorganic layer usually has good electrical insulation properties and a certain mechanical strength, while the organic layer has flexibility and a certain adhesion. Combining the two can form an effective barrier to prevent external harmful substances such as moisture and oxygen from invading the interior of the display panel 100. This composite encapsulation structure can significantly improve the encapsulation effect of the display panel 100 and extend its service life and stability.

[0082] According to some embodiments of the present application, the present application also provides a method for preparing a display panel 100, comprising:

[0083] Step S100, providing a substrate 10, wherein the substrate 10 has a display area 101 and a binding area 103 disposed outside the display area 101;

[0084] Step S300 , forming an array layer 20 on the substrate 10 , wherein the array layer 20 includes a plurality of pixel driving circuits 22 located in the display area 101 and at least a binding connection structure 25 located in the binding area 103 ;

[0085] Step S500, forming a plurality of light-emitting devices 40 located in the display area 101 on a side of the array layer 20 away from the substrate 10, wherein the light-emitting devices 40 include a light-emitting functional layer 41 and a first electrode 43 sequentially stacked in a direction away from the substrate 10, and the light-emitting devices 40 are electrically connected to the corresponding pixel driving circuit 22;

[0086] Step S700, forming a first encapsulation layer 50 located in the display area 101 and the binding area 103 on a side of the plurality of light-emitting devices 40 and at least one binding connection structure 25 away from the substrate 10;

[0087] Step S800 , forming a plurality of first via holes 51 located in the display area 101 on the first encapsulation layer 50 ;

[0088] In step S900 , at least one auxiliary electrode 71 is formed on the side of the first encapsulation layer 50 away from the substrate 10 and located in the display area 101 to obtain a conductive layer. The at least one auxiliary electrode 71 is electrically connected to the first electrodes 43 of the plurality of light-emitting devices 40 through the plurality of first via holes 51 .

[0089] That is to say, an array layer 20 is formed on the substrate 10, and the array layer 20 includes a plurality of pixel driving circuits 22 in the display area 101. The array layer 20 includes at least one binding connection structure 25 in the binding area 103. The pixel driving circuit 22 in the display area 101 is electrically connected to the light-emitting device 40 above the array layer 20, and the light-emitting device 40 is controlled to emit light through the pixel driving circuit 22. The binding connection structure 25 is located in the binding area 103 and is used to bind the display panel 100 to the control circuit.

[0090] A first encapsulation layer 50 is formed on a side of the light emitting device 40 and the binding connection structure 25 away from the substrate 10. The first encapsulation layer 50 is located in the display area 101 and the binding area 103. A plurality of first via holes 51 located in the display area 101 are formed on the first encapsulation layer 50. In addition, at least one auxiliary electrode 71 located in the display area 101 is formed on a side of the first encapsulation layer 50 away from the substrate 10 to obtain a conductive layer. The at least one auxiliary electrode 71 is provided on a side of the first encapsulation layer 50 away from the substrate 10 and is electrically connected to the first electrodes 43 of the plurality of light emitting devices 40 through the plurality of first via holes 51.

[0091] In this way, a first packaging layer 50 is arranged above the multiple light-emitting devices 40 in the display area 101, and the first packaging layer 50 is provided with multiple first via holes 51 in the display area 101. The conductive layer includes at least one auxiliary electrode 71 located in the display area 101. The at least one auxiliary electrode 71 can be connected to the first electrode 43 of the light-emitting device 40 through the first via hole 51. After the auxiliary electrode 71 and the first electrode 43 are electrically connected, the area of ​​the first electrode 43 can be increased, thereby reducing the voltage drop of the display panel 100 and improving the uniformity of the display.

[0092] Moreover, a first packaging layer 50 is arranged above the multiple light-emitting devices 40 and at least one binding connection structure 25. The first packaging layer 50 not only packages the multiple light-emitting devices 40 in the display area 101, but also extends to the binding area 103 and packages the binding connection structure 25 at the same time. In this way, when the first via hole 51 is opened in the first packaging layer 50 located in the display area 101 and a whole-surface etching process is required, the binding connection structure 25 in the binding area 103 is also covered and protected by the first packaging layer 50 to prevent the binding connection structure 25 from being damaged by the process of making the first via hole 51. In this way, the packaging effect of the display panel 100 is improved and the binding connection structure 25 is protected.

[0093] Further, step S800 includes forming a plurality of first via holes 51 located in the display area 101 and at least one second via hole 53 located in the binding area 103 on the first packaging layer 50; step S900 includes forming at least one auxiliary electrode 71 located in the display area 101 and at least one lead-out structure 73 located in the binding area 103 on the side of the first packaging layer 50 away from the substrate 10, at least one auxiliary electrode 71 is electrically connected to a plurality of light-emitting devices 40 through a plurality of first via holes 51, and at least one lead-out structure 73 is electrically connected to at least one binding connection structure 25 through at least one second via hole 53.

[0094] In this way, a first via hole 51 is opened on the first encapsulation layer 50 located in the display area 101, a second via hole 53 is opened on the first encapsulation layer 50 located in the binding area 103, and then a conductive layer is made above the first encapsulation layer 50, an auxiliary electrode 71 electrically connected to the first electrode 43 of the light-emitting device 40 through the first via hole 51 is prepared in the display area 101, and a lead-out structure 73 electrically connected to the binding connection structure 25 through the second via hole 53 is prepared in the binding area 103. In this way, in the binding area 103, a lead-out structure 73 electrically connected to the binding connection structure 25 is arranged above the first encapsulation layer 50, and when the display panel 100 is subsequently bound, the binding connection operation can be directly performed at the lead-out structure 73, thereby improving the convenience of binding.

[0095] Furthermore, when the first via hole 51 is formed on the packaging layer of the display area 101 , the second via hole 53 may also be formed on the packaging layer of the binding area 103 . The first via hole 51 and the second via hole 53 are formed in the same process to simplify the manufacturing process.

[0096] In addition, at least one auxiliary electrode 71 and at least one lead-out structure 73 are both located in the conductive layer, so that the lead-out structure 73 is prepared in the same layer as the auxiliary electrode 71. When the auxiliary electrode 71 is made above the first encapsulation layer 50 located in the display area 101, the lead-out structure 73 can be made above the first encapsulation layer 50 located in the binding area 103 at the same time, and there is no need to reserve a separate process for preparing the lead-out structure 73, which can simplify the manufacturing process of the display panel 100 and improve the manufacturing efficiency. Optionally, the material of at least one lead-out structure 73 is the same as that of at least one auxiliary electrode 71, and the auxiliary electrode 71 and the lead-out structure 73 are both conductive structures, and the same material can be used in the manufacturing process to facilitate molding and manufacturing.

[0097] That is to say, after the first via hole 51 and the second via hole 53 are opened, the auxiliary electrode 71 and the lead-out structure 73 can be prepared simultaneously on the first packaging layer 50. In this way, the various structures of the display area 101 and the binding area 103 can be prepared at the same time. There is no need to prepare the structure of the binding area 103 separately after completing the preparation of the display area 101, which makes the manufacturing process of the display panel 100 simpler and more efficient.

[0098] According to some embodiments of the present application, the present application provides a display device, which includes the display panel 100 described in any of the above embodiments.

[0099] The display device can be a laptop computer, a mobile phone, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc.

[0100] Furthermore, the display device includes a driving device, which is electrically connected to at least one binding connection structure 25, which is equivalent to binding the driving device to the binding area 103 of the display panel 100, so that the driving device is electrically connected to the binding connection structure 25 inside the display panel 100. The driving device can transmit signals to the display panel 100 to realize the assembly and corresponding control of the display panel 100.

[0101] Optionally, the driving device is a flexible circuit board, which can serve as a connection bridge between the display panel 100 and other electronic components (such as a driving chip, a touch chip, etc.), and is responsible for transmitting various control signals and data signals, which ensure that the display panel 100 can correctly display images, respond to touch operations, etc. In addition, in a display device, a flexible circuit board is usually used to connect the display panel 100 with key components such as a mainboard, a camera, and a sensor to achieve collaborative work between the components.

[0102] Optionally, the driving device is a chip-on-chip film. The chip-on-chip film technology mainly bonds the gold bump on the chip with the inner lead on the circuit of the flexible substrate 10 by thermal compression. This technology enables the chip to be directly mounted on the flexible substrate 10, thereby achieving a more compact and thinner packaging structure. The chip-on-chip film is selected as the driving device bound and connected to the display panel 100, so that the overall integration of the display device is higher and the assembly is more compact. At the same time, the stability and accuracy of the signal during the transmission process can be ensured, thereby meeting the high performance requirements of the display device.

[0103] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A display panel, characterized in that: The display panel has a display area and a binding area arranged outside the display area, and includes: substrate; an array layer, disposed on the substrate, comprising a plurality of pixel driving circuits located in the display area and at least one binding connection structure located in the binding area; A plurality of light-emitting devices are arranged on a side of the array layer away from the substrate and located in the display area, the light-emitting devices comprising a light-emitting functional layer and a first electrode sequentially stacked in a direction away from the substrate, and the light-emitting devices are electrically connected to the corresponding pixel driving circuits; A first encapsulation layer, located in the display area and the binding area, and disposed on a side of the plurality of light-emitting devices and the at least one binding connection structure away from the substrate, the first encapsulation layer comprising a plurality of first via holes located in the display area; The conductive layer includes at least one auxiliary electrode located in the display area, wherein the at least one auxiliary electrode is arranged on a side of the first encapsulation layer away from the substrate and is electrically connected to the first electrodes of the plurality of light-emitting devices through the plurality of first via holes.

2. The display panel according to claim 1, characterized in that: The first encapsulation layer further includes at least one second via hole located in the binding area, and the display panel further includes: at least one lead-out structure, located in the binding region, disposed on a side of the first packaging layer away from the substrate, and electrically connected to the at least one binding connection structure through the at least one second via hole; Preferably, the at least one lead structure and the at least one auxiliary electrode are made of the same material; Preferably, the at least one lead-out structure is located in the conductive layer.

3. The display panel according to claim 1, characterized in that: An outer edge of an orthographic projection of the first encapsulation layer on the substrate surrounds an outer edge of an orthographic projection of the at least one binding connection structure on the substrate.

4. The display panel according to claim 1, characterized in that: The array layer includes a plurality of insulating sublayers, and the pixel driving circuit includes a plurality of thin film transistors, wherein: The thin film transistor comprises a semiconductor layer, a gate, and an optional first electrode and / or a second electrode, wherein the semiconductor layer, the gate, and the optional first electrode and / or the second electrode are arranged between the plurality of insulating sublayers in an intermittent manner; The at least one binding connection structure is disposed in the same layer as the gate and optionally at least one of the first electrode and / or the second electrode; Preferably, at least one of the plurality of insulating sublayers is disposed between the at least one binding connection structure and the first encapsulation layer.

5. The display panel according to claim 1, characterized in that: Also includes: A pixel definition layer, the pixel definition layer is arranged on one side of the substrate, a plurality of pixel openings are opened on the pixel definition layer, and parts of the light emitting device are located in corresponding pixel openings; Preferably, the light emitting device further comprises a second electrode located on a side of the light emitting functional layer close to the substrate, a portion of the second electrode is located between the substrate and the pixel definition layer, and another portion is exposed from the corresponding pixel opening; Preferably, the display panel further comprises an isolation structure, the isolation structure is arranged on a side of the pixel definition layer away from the substrate, the isolation structure comprises a plurality of isolation openings, the isolation openings are connected to the corresponding pixel openings, and a portion of the light emitting device is located in the corresponding isolation openings; Preferably, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the isolation opening on the substrate.

6. The display panel according to claim 1, characterized in that: Also includes: A second packaging layer is provided on a side of the first packaging layer away from the substrate; A third packaging layer is provided on a side of the second packaging layer away from the substrate; Optionally, a material of the second encapsulation layer includes an organic material, and a material of the first encapsulation layer and the third encapsulation layer includes an inorganic material.

7. A method for preparing a display panel, characterized in that: include: Providing a substrate, the substrate having a display area and a binding area arranged outside the display area; forming an array layer on the substrate, the array layer comprising a plurality of pixel driving circuits located in the display area and at least one binding connection structure located in the binding area; A plurality of light-emitting devices located in the display area are formed on a side of the array layer away from the substrate, the light-emitting devices comprising a light-emitting functional layer and a first electrode sequentially stacked in a direction away from the substrate, and the light-emitting devices are electrically connected to the corresponding pixel driving circuits; forming a first encapsulation layer located in the display area and the binding area on a side of the plurality of light emitting devices and the at least one binding connection structure away from the substrate; forming a plurality of first via holes located in the display area on the first encapsulation layer; At least one auxiliary electrode is formed in the display area on a side of the first encapsulation layer away from the substrate to obtain a conductive layer, and the at least one auxiliary electrode is electrically connected to the first electrodes of the plurality of light-emitting devices through the plurality of first via holes.

8. The preparation method according to claim 7, characterized in that: The step of forming a plurality of first via holes located in the display area on the first encapsulation layer comprises: forming a plurality of first via holes located in the display area and at least one second via hole located in the binding area on the first encapsulation layer; The step of forming at least one auxiliary electrode located in the display area on a side of the first packaging layer away from the substrate to obtain a conductive layer includes: forming at least one auxiliary electrode located in the display area and at least one lead-out structure located in the binding area on a side of the first packaging layer away from the substrate, wherein the at least one auxiliary electrode is electrically connected to the first electrodes of the multiple light-emitting devices through the multiple first vias, and the at least one lead-out structure is electrically connected to the at least one binding connection structure through the at least one second via.

9. A display device, characterized in that: A display panel comprising any one of claims 1 to 8.

10. The display device according to claim 9, characterized in that: Also includes: a driving device, electrically connected to the at least one binding connection structure; Preferably, the driving device is a flexible circuit board; Preferably, the driving device is a chip-on-film.

Images