A forward error correction system and method

Abstract

This invention relates to the field of computer network transmission technology and discloses a forward error correction system and method. The system is applied to a software-defined wide area network (SDW). The system includes: a controller for receiving user configuration data, calculating encoding parameters based on the user configuration data, and sending the encoding parameters to a forward error correction encoding module; a forward error correction flow selection module for filtering target traffic matching the session based on the user configuration data and sending the target traffic to the forward error correction encoding module; and a forward error correction encoding module for performing forward error correction encoding on the target traffic based on the encoding parameters to generate target packets. This invention uses the controller to generate encoding parameters and corresponding decoding parameters, and sends them to the intelligent gateway after creating the forward error correction tunnel. This saves the intelligent gateway's computing resources, reduces latency fluctuations in forward error correction decoding, and improves the transmission quality of the application without affecting the processing performance of packets not involved in forward error correction.

Description

Technical Field

[0001] This invention relates to the field of computer network transmission technology, and specifically to a forward error correction system and method. Background Technology

[0002] With the development of SD-WAN, more and more enterprises are choosing to use SD-WAN to build their corporate intranets. SD-WAN can easily enable enterprise applications to migrate to the cloud and interconnect branches. Enterprises can conduct video conferencing and file transfer through SD-WAN. As enterprise applications continue to increase, the amount of data that needs to be transmitted in the process of implementing various business operations is increasing. This raises two main issues. The first is the need for bandwidth expansion, as high-definition video and file transfer both require large bandwidth. The second is the need for link quality. The electromagnetic propagation latency for cross-border video conferencing can reach hundreds of milliseconds, and when combined with device latency, the actual propagation latency is approximately two to three hundred milliseconds. Excessive latency will reduce the user experience and affect transmission speed; in addition to latency, packet loss often occurs in the underlying link.

[0003] The mainstream networking mode for SD-WAN is currently the terminal device plus core device model. The main problem encountered when running forward error correction methods in the existing SD-WAN architecture is low transmission performance, which cannot meet user bandwidth requirements. Forward error correction processing also increases the processing latency of other data packets. Existing methods to improve forward error correction performance include: First, upgrading the SD-WAN processor performance; high-end devices have better processor performance than low-end devices, which can improve the processing capability of forward error correction. Second, optimizing the forward error correction encoding algorithm by decomposing the existing encoding / decoding matrix to obtain a multi-step operation matrix with lower computational complexity. Third, using dedicated hardware for forward error correction encoding operations, embedding different operations into a dedicated hardware module, thus improving forward error correction performance. Remote interconnection accounts for a significant proportion of SD-WAN application scenarios.

[0004] However, the above methods for forward error correction optimization of SDWAN traffic all have limitations. Upgrading the performance of the SDWAN processor is mainly expensive, which contradicts the cost-effectiveness of SDWAN. Optimizing the forward error correction encoding algorithm faces the dilemma of complex algorithm implementation and high development costs. Using dedicated hardware to improve forward error correction performance requires dedicated hardware to implement the forward error correction decoding function, which is not universal. Summary of the Invention

[0005] In view of this, the present invention provides a forward error correction system and method to solve the problems of high price, high algorithm development cost and lack of universality of hardware improvement currently faced in forward error correction function optimization.

[0006] In a first aspect, the present invention provides a forward error correction method, which is executed by a controller in a software-defined wide area network, the method comprising:

[0007] Obtain user configuration data; the user configuration data includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters;

[0008] Based on user configuration data, calculate the encoding parameters and the corresponding decoding parameters;

[0009] Based on the encoding parameters, a forward error correction tunnel is established between the first smart gateway and the second smart gateway.

[0010] The target traffic and encoding parameters are sent to the first smart gateway for forward error correction encoding to generate the target packet.

[0011] The control target message is sent to the second smart gateway through the forward error correction tunnel, so that the second smart gateway can perform forward error correction decoding based on the decoding parameters.

[0012] The forward error correction method provided in this embodiment of the invention uses a controller to generate encoding parameters and corresponding decoding parameters, and sends the encoding parameters and corresponding inverse matrix to the smart gateway after creating a forward error correction tunnel. This saves the computing resources of the smart gateway, reduces the latency fluctuation of forward error correction decoding, and improves the transmission quality of the application without affecting the packet processing performance that does not participate in forward error correction.

[0013] In one alternative implementation, network parameters include at least one of redundancy, bandwidth, and latency.

[0014] The forward error correction method provided in this embodiment of the invention takes into account the redundancy, bandwidth and latency set by the user when generating the encoding parameters, so that the algorithm can fit the user's actual use scenario and improve the encoding performance. In addition, since the latency parameter can be obtained from historical data, this also makes full use of the monitoring characteristics of software-defined wide area networks.

[0015] In one alternative implementation, the method further includes:

[0016] Obtain the user matching policy; the user policy includes at least one of the following: source IP, destination IP, source port, destination port, and protocol type.

[0017] Based on the user matching strategy, the target traffic is determined from the various traffic flows corresponding to the first smart gateway.

[0018] The forward error correction method provided in this embodiment of the invention configures the forward error correction flow selection rules by obtaining the user matching strategy. The configuration is sent to the forward error correction flow selection module by the controller. When the traffic matches the user strategy, it is determined as the target traffic and handed over to the forward error correction coding module to accurately match the user traffic and select the flow for each forward error correction tunnel.

[0019] In one optional implementation, the target traffic and the encoding parameters are sent to the forward error correction coding module for forward error correction coding to generate the target packet, including:

[0020] The forward error correction coding module is switched to the first optional processor, and forward error correction coding is specifically performed on the target traffic based on the coding parameters to generate the target packet;

[0021] The target message is sent to the source processor in the forward error correction coding module.

[0022] The forward error correction method provided in this embodiment of the invention switches to a separate processor to process data packets, while keeping the original forwarding process on the original processor. In this way, the two processors have different processing queues. This switching function is highly efficient and requires less code modification.

[0023] Secondly, this invention provides a forward error correction system applied to software-defined wide area networks, the system comprising:

[0024] The controller is used to acquire user configuration data, which includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters. Based on the user configuration data, the controller calculates the encoding parameters and the corresponding decoding parameters. Based on the encoding parameters, the controller establishes a forward error correction tunnel between the first smart gateway and the second smart gateway.

[0025] A forward error correction coding module is used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target packet;

[0026] The forward error correction decoding module is used to perform forward error correction decoding based on decoding parameters when the second smart gateway receives the target message sent by the first smart gateway.

[0027] The forward error correction system provided in this embodiment of the invention includes a controller, a forward error correction encoding module, and a forward error correction decoding module. Specifically, the controller is responsible for calculating encoding parameters and decoding parameters, and sending these parameters to the smart gateway when establishing the forward error correction tunnel. Then, message encoding and decoding are performed based on the forward error correction encoding module and the forward error correction decoding module, respectively. This design reduces the computational burden on the smart gateway, allowing the smart gateway to focus more on data forwarding and processing, thereby improving the overall system efficiency and optimizing the transmission of video traffic and other traffic.

[0028] In one alternative implementation, the system further includes:

[0029] The forward error correction flow selection module is used to determine the target traffic from the various traffic corresponding to the first smart gateway based on the user matching strategy, and send the target traffic to the forward error correction coding module.

[0030] The forward error correction system provided in this embodiment of the invention selects traffic with matching strategies from user traffic as target traffic and finally sends it to the forward error correction coding module, making the traffic selection action more accurate and more suitable for point-to-point forward error correction tunnels, so as to better meet user needs.

[0031] In one optional implementation, the forward error correction coding module further includes:

[0032] A first optional processor is configured to specifically perform the operation of sending target traffic to the forward error correction coding module when there is target traffic that matches the user matching policy.

[0033] The forward error correction system provided in this embodiment of the invention places all forward encoding functions on a dedicated processor, which can not only give full play to computing performance and improve cache hit probability, but also place the original processing logic on the original processing core, ensuring that the original forwarding logic and latency remain unchanged, and the development cost is low.

[0034] In one optional implementation, the forward error correction decoding module further includes:

[0035] The second optional processor is used to perform forward error correction decoding operation through decoding parameters when the second smart gateway receives the target message sent by the first smart gateway, obtain the original message data, and then send the original message data to the original processor in the forward error correction decoding module.

[0036] The forward error correction system provided in this embodiment of the invention also has a forward error correction decoding module that runs independently on another processing core. This ensures that one processor is dedicated to handling the forward error correction decoding function, while another processor handles other logic. This ensures that the original forwarding logic and latency remain unchanged, which can greatly speed up data processing without affecting the processing speed of other packets.

[0037] Thirdly, the present invention provides a controller, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the forward error correction method described in the first aspect or any corresponding embodiment thereof.

[0038] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to perform the forward error correction method described in the first aspect or any corresponding embodiment thereof. Attached Figure Description

[0039] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0040] Figure 1 This is a flowchart illustrating the forward error correction method according to an embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram of the architecture of a forward error correction system according to an embodiment of the present invention;

[0042] Figure 3 This is a flowchart illustrating the controller of a forward error correction system according to an embodiment of the present invention;

[0043] Figure 4 This is a flowchart illustrating the forward error correction selection module of the forward error correction system according to an embodiment of the present invention.

[0044] Figure 5 This is a schematic diagram of the hardware structure of the controller according to an embodiment of the present invention. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] As enterprise applications continue to grow, the amount of data that needs to be transmitted in the process of implementing various business operations is increasing daily. This raises two main issues. The first is the need for bandwidth expansion; high-definition video and file transfer require high bandwidth. The second is the need for link quality; video conferencing is particularly sensitive to packet loss, and retransmission of data packets in high-latency scenarios can lead to a decline in transmission performance, even if the overall bandwidth is increased, the forwarding rate cannot be improved.

[0047] According to an embodiment of the present invention, a forward error correction method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0048] This embodiment provides a forward error correction method. Figure 1 This is a flowchart of a forward error correction method according to an embodiment of the present invention, such as... Figure 1 As shown, the process includes the following steps:

[0049] Step S101: Obtain user configuration data; the user configuration data includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters.

[0050] Specifically, users input configuration data through the smart gateway configuration platform. The data includes the smart gateway's identifier to specify which two sites need to be selected to establish a forward error correction tunnel.

[0051] Furthermore, the identifier of a smart gateway includes: IP address, MAC address, or device name.

[0052] In some alternative implementations, the network parameters mentioned above include at least one of redundancy, bandwidth, and latency.

[0053] During user configuration, a redundancy parameter can be specified, which determines the number of redundant data packets generated during the forward error correction coding process. Redundancy is usually expressed as the ratio between the number of original data packets and the number of redundant data packets, such as 20:5, which means that for every 20 original data packets, 5 redundant data packets will be generated, thus mitigating a 20% packet loss scenario.

[0054] Optionally, users also need to configure the maximum acceptable latency for the forward error correction tunnel. The latency parameter is closely related to the choice of encoding strategy. Higher redundancy can provide better packet loss recovery capability, but may increase the latency of encoding and decoding. For example, in the above embodiment, when the traffic is low, there may be a situation where less than 20 packets are received, and the user's latency will be non-negligible. Therefore, users need to limit the upper limit of latency according to the requirements of the application scenario.

[0055] Optionally, users need to configure the bandwidth used by the forward error correction tunnel. This parameter affects the size and range of the encoding matrix, and thus the efficiency of encoding and decoding.

[0056] In summary, the forward error correction method in this embodiment takes into account the user's personalized redundancy, bandwidth, and latency, so that the algorithm can better fit the user's actual usage scenario and improve coding performance. In addition, the latency parameter can be obtained from historical data, which also makes full use of the monitoring features of SDWAN.

[0057] Step S102: Calculate the encoding parameters and corresponding decoding parameters based on the user configuration data.

[0058] Specifically, the number of rows and columns of the Vandermonde matrix is ​​determined based on the redundancy configured by the user, and the size range of the matrix is ​​calculated based on bandwidth and latency. Then, using the construction principle of the Vandermonde matrix, a positive matrix is ​​generated as encoding parameters based on the determined dimensions.

[0059] Furthermore, based on the generated Vandermonde forward matrix, its inverse matrix is ​​calculated and used as the decoding parameter.

[0060] Step S103: Based on the encoding parameters, establish a forward error correction tunnel between the first smart gateway and the second smart gateway.

[0061] Specifically, the identification information of the first and second smart gateways is extracted from the user configuration data to create a forward error correction tunnel. In addition to creating the tunnel itself, a large buffer area is also needed to cache data packets. Finally, the generated tunnel configuration information is sent to the first and second smart gateways through the controller command configuration interface.

[0062] Furthermore, since a point-to-point tunnel is created, multiple tunnels need to be created when a user needs to protect data from multiple sites.

[0063] Furthermore, if multiple tunnels exist, a tunnel number is generated, which corresponds one-to-one with each tunnel to distinguish different forward error correction tunnels and ensure that data packets can be correctly sent to the target smart gateway.

[0064] Step S104: Send the target traffic and encoding parameters to the first smart gateway for forward error correction encoding to generate the target packet.

[0065] Specifically, the forward error correction coding module receives the target traffic, i.e. the data packets that need to be forward error correction encoded, and the encoding parameters from the controller or other relevant modules.

[0066] Furthermore, for each received data packet, the first smart gateway encodes it according to the encoding parameters and the current encoding state, and combines the encoded data packets into a target message. The target message also includes a forward error correction header, which contains the tunnel number and other necessary metadata so that the receiving end can correctly identify and process it.

[0067] Optionally, after generating the target message, the first smart gateway may choose to cache it and wait for an appropriate time to send it, or send it immediately to the forward error correction tunnel.

[0068] Step S105: Control the target message to be sent to the second smart gateway through the forward error correction tunnel, so that the second smart gateway can perform forward error correction decoding through the decoding parameters.

[0069] Specifically, the target message arrives at the receiving end of the second intelligent gateway after being transmitted through the network. The receiving end identifies the tunnel to which the message belongs and the encoding / decoding parameters, i.e., the decoding inverse matrix, based on the information from the tunnel header.

[0070] Furthermore, the decoding module of the second smart gateway uses a pre-cached decoding inverse matrix and the received target message to perform forward error correction decoding in order to recover the original data packet.

[0071] In summary, the forward error correction method provided in this embodiment of the invention first receives and parses user configuration data. The user configuration data includes the identifiers of two smart gateways specified by the user (as data senders and receivers, respectively), and sets a series of network parameters, such as redundancy, bandwidth, and latency, to optimize the reliability and efficiency of data transmission.

[0072] Next, the system controller calculates the encoding parameters and their corresponding decoding inverse matrix based on the configuration data provided by the user and the construction principle of the Vandermonde matrix. The encoding parameters are used to guide the data sender on how to generate redundant data packets, while the decoding inverse matrix is ​​used to restore the received target message to the original data.

[0073] Subsequently, based on the calculated encoding parameters, a forward error correction tunnel is established between the first and second smart gateways. When a user needs to protect data from multiple sites, multiple tunnels need to be created. If multiple tunnels exist, a tunnel number is generated, which corresponds one-to-one with each tunnel to distinguish different forward error correction tunnels and ensure that data packets can be correctly sent to the target smart gateway.

[0074] Next, the controller or other modules send the target traffic and encoding parameters to the forward error correction coding module. Based on the encoding parameters, the target traffic is forward error corrected and encoded to generate a target message containing the original data and redundant information, which is then transmitted to the receiving end through the forward error correction tunnel.

[0075] Finally, after the target message arrives at the second smart gateway, it enters the forward error correction and decoding module. This module uses the previously issued decoding inverse matrix to decode the message, restore the original data, and transmit it to the end user.

[0076] In some alternative implementations, the method further includes:

[0077] Obtain the user matching policy; the user policy includes at least one of the following: source IP, destination IP, source port, destination port, and protocol type.

[0078] Based on the user matching strategy, the target traffic is determined from the various traffic flows corresponding to the first smart gateway.

[0079] By acquiring the session table and user matching policies within the smart gateway device, such as source IP, destination IP, source port, destination port, protocol type, and application information (application being a more flexible dimension), successfully matched traffic will enter the subsequent flow selection logic, while specific forward error correction tunnel information will be synchronized to the flow selection module. Data packets that fail to match will directly enter the forwarding logic.

[0080] In some optional implementations, the target traffic and the encoding parameters are sent to the forward error correction coding module for forward error correction coding to generate the target packet, including:

[0081] The forward error correction coding module is switched to the first optional processor, and forward error correction coding is specifically performed on the target traffic based on the coding parameters to generate the target packet;

[0082] The target message is sent to the source processor in the forward error correction coding module.

[0083] Existing devices typically have two processor cores, and a single processor is sufficient for handling ordinary forwarding traffic. However, if the processor needs to handle both ordinary traffic forwarding and forward error correction encoding / decoding, two significant problems arise: firstly, the forward error correction processing performance is poor; secondly, it affects the original forwarding process, causing unpredictable latency. Therefore, this invention addresses this by switching processors, placing the encoding operation on a dedicated processing core while keeping the original forwarding process on the original processor. When target traffic matching the user's matching policy is present, the data packet is forwarded to the other processor. The two processors have different processing queues. The processor switching process involves first acquiring the queue of the other processor and then transferring the data packet index there.

[0084] This embodiment provides a forward error correction system applied to software-defined wide area networks (SDWs), and the system architecture is as follows: Figure 2 As shown, it includes:

[0085] The controller is used to acquire user configuration data, which includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters. Based on the user configuration data, the controller calculates the encoding parameters and the corresponding decoding parameters. Based on the encoding parameters, the controller establishes a forward error correction tunnel between the first smart gateway and the second smart gateway.

[0086] A forward error correction coding module is used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target packet;

[0087] The forward error correction decoding module is used to perform forward error correction decoding based on decoding parameters when the second smart gateway receives the target message sent by the first smart gateway.

[0088] This system can be used as a smart gateway configuration management platform to configure different types of forward error correction flow selection strategies and forward error correction encoding / decoding strategies. The configuration is translated and sent to the user-side smart gateway node by the controller. The controller command configuration interface shares variables with the various module processes in the gateway node. User cloud access and interconnection traffic data packets are connected to the user-side gateway node. The gateway node first uses the data transceiver module under the Data Plane Development Kit (DPDK) framework to store the user data packets into the Linux user space memory using zero-copy technology. The forward error correction encoding module generates corresponding redundant data packets based on the user-set strategy and the currently accumulated data packets. After receiving the data packets sent by the local end, the peer smart gateway device will enter the forward error correction decoding module, and the decoded data will then be transmitted to the end user.

[0089] Specifically, the controller's workflow diagram is as follows: Figure 3 As shown, the controller is mainly responsible for translating the forward error correction algorithm. The encoding uses the Vandermonde matrix. During decoding, the data can be restored by solving the inverse matrix of the corresponding data packet and performing operations with the received data packet.

[0090] The first step is to receive the user configuration. The user needs to select which two sites to establish the forward error correction tunnel. Therefore, the user configuration includes the identifiers of the first and second smart gateways. In addition to tunnel information, redundancy, bandwidth, and latency parameters also need to be sent. The redundancy information needs to match the link packet loss rate. Users can monitor and query historical packet loss rates for better adaptation.

[0091] The second step is to calculate the encoding and decoding parameters. Specific encoding and decoding parameters are calculated based on the user-configured redundancy, bandwidth, and latency. The calculation of encoding and decoding parameters mainly involves calculating the forward and inverse matrices of the Vandermonde matrix. The redundancy allows us to determine the matrix size ratio. Bandwidth and latency allow us to calculate the range of the matrix size.

[0092] The third step is to create a forward error correction tunnel. Creating a forward error correction tunnel requires sending configurations to the smart gateways at both ends to enable the corresponding forward error correction function. In addition to creating the tunnel itself, a large buffer area needs to be allocated to cache data packets. When a user needs to protect data from multiple sites, multiple tunnels need to be created. When multiple tunnels exist, tunnel codes are generated, with each tunnel code corresponding to a specific tunnel. Simultaneously, a forward error correction header needs to be added to the existing traffic, distinguished by the tunnel number. The encoding and decoding ends align encoding and decoding parameters using the tunnel number. Besides tunnel information, redundancy, bandwidth, and latency parameters also need to be sent. Redundancy information needs to match the link packet loss rate; users can monitor and query historical packet loss rates for better adaptation.

[0093] The fourth step is to distribute the encoding parameters. One of the core issues facing forward error correction is latency. After the user distributes the redundancy, an appropriate ratio of redundant packets is determined. This encoding rule also considers the forward error correction bandwidth set by the user and the maximum tolerable latency. Finally, the resulting encoding rule is distributed to the smart gateway responsible for encoding. The smart gateway itself generates the final encoding matrix and caches it.

[0094] The fifth step is to send out the decoding parameters. Based on its powerful computing capabilities, the controller can simultaneously generate the corresponding inverse matrix when determining the encoding parameters and transmit the data to the decoding smart gateway. The decoding parameters can be cached when creating the forward error correction tunnel, reducing the computational load on the smart gateway and not affecting normal traffic forwarding at that time.

[0095] The forward error correction coding module has two main processing logics: determining when to encode cached data packets and selecting the correct coding matrix for data encoding. A series of coding parameters and latency parameters are issued when the forward error correction tunnel is created. The latency parameter represents the maximum latency the user can tolerate, so data processing cannot exceed this latency. Due to propagation latency between points, the actual waiting time will be shorter than the user-configured time. When the data volume is low, redundant packets are generated from the packets received at the timeout and sent out. When the data volume is large, redundant packets are generated with the maximum possible parameters to improve processing performance. Therefore, when the data volume is large, redundant messages are sent before the timeout. The sent messages carry tunnel information and packet information. The packet information includes the total number of data packets in this forward error correction coding, the actual number of data packets, and the number of redundant packets.

[0096] The forward error correction decoding module operates at the other end of the tunnel. It is used to perform forward error correction decoding based on decoding parameters when the second smart gateway receives the target message sent by the first smart gateway.

[0097] In one alternative implementation, the system further includes:

[0098] The forward error correction flow selection module is used to determine the target traffic from the various traffic corresponding to the first smart gateway based on the user matching strategy, and send the target traffic to the forward error correction coding module.

[0099] The flowchart of the forward error correction and stream selection module is as follows: Figure 4 As shown, this module primarily selects traffic from user traffic that matches the chosen strategy, and finally sends it to the forward error correction coding module. Point-to-point tunneling requires precise traffic selection, so it provides a 5-tuple and application matching condition. The 5-tuple and application are ANDed, allowing for more accurate location of the target traffic.

[0100] Specifically, the first step is session matching. For rule-based matching algorithms, using session records is a good approach. Smart gateway devices have a large internal session table that tracks traffic with consistent 5-tuples. This session indicates the lifespan of the connection and also records related processing actions, which speeds up the processing flow. If a session is matched, flow selection can be performed directly.

[0101] The second step is to match the user policy. If no match is found with the session, the user policy needs to be rematched. The user policy includes a five-tuple and application information. Application is a more flexible dimension, and users are advised to configure application conditions as much as possible. Successfully matched traffic will enter the subsequent traffic selection logic, and the specific forward error correction tunnel information will be synchronized to the traffic selection module. Data packets that fail to match will directly enter the forwarding logic.

[0102] The third step is to switch processors. Existing economy-version devices all have two processor cores. For ordinary forwarding traffic, one processor is perfectly adequate. However, using the same processor to handle both ordinary traffic forwarding and forward error correction encoding / decoding will create two serious problems. First, forward error correction processing performance will be poor. Second, it will affect the original forwarding process, causing unpredictable latency. The specific solution is to keep the original forwarding process on the original processor. When a data packet matches the user-defined forward error correction rules, it is forwarded to the other processor. The two processors have different processing queues. The process of switching processors involves first obtaining the queue from the other processor and then transferring the packet index there.

[0103] The fourth step involves transferring the process to the forward error correction (FEC) module. During the processor switching process, not only is the processing queue modified, but also the packet processing function nodes are altered. When processing a corresponding packet, the processor calls the corresponding node's function to perform FEC. This switching process is highly efficient and requires minimal code modifications.

[0104] In one optional implementation, the forward error correction coding module further includes:

[0105] A first optional processor is configured to specifically perform the operation of sending target traffic to the forward error correction coding module when there is target traffic that matches the user matching policy.

[0106] To improve processing performance, all forwarding functions are run on a dedicated processor, while the original forwarding functions remain on the original processor. This greatly speeds up data processing without affecting the processing speed of other packets.

[0107] In one optional implementation, the forward error correction decoding module further includes:

[0108] The second optional processor is used to perform forward error correction decoding operation through decoding parameters when the second smart gateway receives the target message sent by the first smart gateway, obtain the original message data, and then send the original message data to the original processor in the forward error correction decoding module.

[0109] The forward error correction decoding module also runs independently on a separate processing core. When the smart gateway receives the encapsulated forward error correction message, it forwards it to another processor. The processed original message is then forwarded back to the original processor, ensuring that one processor is dedicated to handling the forward error correction decoding function while the other processor handles other logic, thus maintaining the original forwarding logic and latency. The decoding module stores the received encoded messages according to different tunnels and packets. Once a packet has been received, decoding can begin.

[0110] Optionally, a timer can be set according to the user-defined timeout period, with the timer duration matching that of the encoding module. Upon timer expiration, the inverse decoding matrix can be determined based on the lost packets, and the original data can be reconstructed using both. If the number of lost packets exceeds the reconstruction capacity, a warning is issued and reported to the user. The user can then consider resetting the redundancy.

[0111] This invention also provides a controller; please refer to [link / reference]. Figure 5 , Figure 5 This is a schematic diagram of the structure of a computer device provided in an optional embodiment of the present invention, such as... Figure 5As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces). In some alternative implementations, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 5 Take a processor 10 as an example.

[0112] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.

[0113] The memory 20 stores instructions executable by at least one processor 10 to cause the at least one processor 10 to perform the method shown in the above embodiments.

[0114] The memory 20 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the computer device. Furthermore, the memory 20 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, the memory 20 may optionally include memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0115] The memory 20 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk or solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0116] The computer device also includes an input device 30 and an output device 40. The processor 10, memory 20, input device 30, and output device 40 can be connected via a bus or other means. Figure 5 Taking the example of a connection between China and Israel via a bus.

[0117] Input device 30 can receive input numerical or character information, and generate key signal inputs related to user settings and function control of the computer device, such as a touchscreen, keypad, mouse, trackpad, touchpad, joystick, one or more mouse buttons, trackball, joystick, etc. Output device 40 may include display devices, auxiliary lighting devices (e.g., LEDs), and haptic feedback devices (e.g., vibration motors). The aforementioned display devices include, but are not limited to, liquid crystal displays, light-emitting diodes, displays, and plasma displays. In some alternative embodiments, the display device may be a touchscreen.

[0118] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code, which, when accessed and executed by the computer, processor, or hardware, implements the methods shown in the above embodiments.

[0119] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0120] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A forward error correction method, characterized in that, The method is executed by a controller in a software-defined wide area network, and the method includes: Obtain user configuration data; the user configuration data includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters; Based on the user configuration data, calculate the encoding parameters and the corresponding decoding parameters; Based on the encoding parameters, a forward error correction tunnel is established between the first smart gateway and the second smart gateway; Sending the target traffic and the encoding parameters to the first smart gateway for forward error correction encoding to generate a target packet includes: switching to a first optional processor, performing forward error correction encoding specifically on the target traffic based on the encoding parameters, generating the target packet, and sending the target packet to the original processor; The target message is controlled to be sent to the second smart gateway through the forward error correction tunnel, so that the second smart gateway performs forward error correction decoding using the decoding parameters.

2. The method according to claim 1, characterized in that, The network parameters include at least one of redundancy, bandwidth, and latency.

3. The method according to claim 2, characterized in that, The method further includes: Obtain the user matching policy; the user matching policy includes at least one of the following: source IP, destination IP, source port, destination port, and protocol type; Based on the user matching strategy, the target traffic is determined from each type of traffic corresponding to the first smart gateway.

4. A forward error correction system, characterized in that, The system, applied to software-defined wide area networks, includes: The controller is used to acquire user configuration data, which includes the identifier of the first smart gateway, the identifier of the second smart gateway, and network parameters. Based on the user configuration data, the controller calculates encoding parameters and corresponding decoding parameters. Based on the encoding parameters, the controller establishes a forward error correction tunnel between the first smart gateway and the second smart gateway. A forward error correction coding module is used to perform forward error correction coding on the target traffic based on the coding parameters to generate a target packet; The forward error correction decoding module is used to perform forward error correction decoding using the decoding parameters when the second smart gateway receives the target message sent by the first smart gateway. The forward error correction coding module further includes a first optional processor, which is used to perform forward error correction coding operation on the target traffic based on the coding parameters when the target traffic is received. The forward error correction decoding module further includes a second optional processor, which is used to perform a forward error correction decoding operation specifically through the decoding parameters when the second smart gateway receives the target message sent by the first smart gateway, and after obtaining the original message data, send the original message data to the original processor in the forward error correction decoding module.

5. The system according to claim 4, characterized in that, The system also includes: The forward error correction flow selection module is used to determine the target traffic from the various traffic corresponding to the first smart gateway based on the user matching strategy, and send the target traffic to the forward error correction coding module.

6. A controller, characterized in that, include: A memory and a processor are communicatively connected, the memory stores computer instructions, and the processor executes the forward error correction method according to any one of claims 1 to 3 by executing the computer instructions.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing the computer to perform the forward error correction method according to any one of claims 1 to 3.

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