Message error injection method and device based on IB protocol

Abstract

The invention provides a message error injection method and device based on an IB protocol, and the method comprises the steps: configuring an error injection mode in an error injection register according to a test target, configuring an error injection switch, an error injection random degree and an error injection message domain segment value when the error injection mode is configured to be a free error injection mode, and configuring the error injection switch to be started; when the error injection mode is configured to be a protocol error injection mode or a retransmission verification mode, directly configuring the error injection switch to be started; and based on the configuration information of the error injection register, performing an error injection test on the detected IB message, reading the error injection register after the error injection is completed, and querying the execution information of the error injection test. According to the scheme of the invention, the convenience and authenticity of message error injection are improved.

Description

Technical Field

[0001] The present application belongs to the field of message testing, and in particular to a message error annotation method and device based on the IB protocol. Background Art

[0002] In the field of high-performance computing, the InfiniBand (IB) protocol is a leading computer network communication standard and is widely used due to its excellent performance. The protocol is designed to provide lossless data transmission, ultra-low latency, and high bandwidth, and is suitable for efficient communication within a smaller connection domain. In particular, its lossless feature ensures data integrity and reliability through a complex retransmission mechanism, maintaining a stable data flow even when there are transient problems in the network.

[0003] In the process of developing network cards based on the IB protocol, it is crucial to verify the effectiveness of this retransmission mechanism. Traditional testing methods rely on waiting for actual errors to occur to evaluate the system's response and recovery capabilities, but this method is inefficient and difficult to control. In order to more effectively verify the rationality and correctness of the retransmission mechanism, the industry generally adopts a more proactive method - the so-called "error injection" technology. This technology allows developers or testers to deliberately introduce specific types of errors into the system, so as to observe and analyze the system's response to these preset abnormal situations. However, how to ensure the accuracy of IB's error injection test has become a problem that technicians in this field need to solve urgently. Summary of the invention

[0004] The purpose of this application is to provide a message error annotation method and device based on the IB protocol, aiming to ensure the accuracy of IB error annotation testing and improve the convenience and authenticity of message error annotation.

[0005] According to a first aspect of the present application, a message error annotation method based on the IB protocol is provided, comprising:

[0006] According to the test target, the error injection mode is configured in the error injection register. When the error injection mode is configured as the free error injection mode, the error injection switch, the error injection randomness and the error injection message field value are configured, and the error injection switch is configured to be enabled;

[0007] When the error injection mode is configured as a protocol error injection mode or a retransmission check mode, directly configuring the error injection switch to be enabled;

[0008] Based on the configuration information of the error injection register, an error injection test is performed on the detected IB message, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

[0009] When the error injection mode is configured as the free error injection mode, configuring the error injection switch, the error injection randomness and the error injection message field value further includes:

[0010] The error injection switch is configured by selecting to inject errors into the messages of any one or more combinations of the preset QPN, the preset PSN or the preset opcode through software.

[0011] In an optional implementation manner, when the error injection mode is configured as a free error injection mode, configuring the error injection switch, the error injection randomness and the error injection message field value further includes:

[0012] The randomness of the error injection is configured by selecting random error injection, time interval error injection or message interval error injection through software.

[0013] In an optional embodiment, in the random error injection, the error injection configured by the system time or software enables the error injection, in the time interval error injection, the message error injection is performed after a period of time preset by the software, and in the message interval error injection, the message error injection is performed after a period of packet volume preset by the software.

[0014] In an optional implementation manner, the querying of error injection test execution information further includes:

[0015] The error injection register is read by software to query the number of errors, the information of the first error injection message and the information of the most recent error injection message, or the relevant information of the chip is read by software to obtain the current chip execution status.

[0016] According to a second aspect of the present application, a message error annotation device based on the IB protocol is provided, comprising:

[0017] A first configuration unit is used to configure an error injection mode in an error injection register according to a test target, and when the error injection mode is configured as a free error injection mode, configure an error injection switch, an error injection randomness, and an error injection message field value, and configure the error injection switch to be enabled;

[0018] A second configuration unit is used to directly configure the error injection switch to be started when the error injection mode is configured as a protocol error injection mode or a retransmission check mode;

[0019] The message error injection unit is used to perform an error injection test on the detected IB message based on the configuration information of the error injection register, and read the error injection register after completing the error injection to query the error injection test execution information.

[0020] Compared with the related art, the technical solution of this application has the following advantages:

[0021] This application can simulate the abnormal message scenarios listed in the IB protocol on a real chip only through software configuration, without the need for external error injection equipment, to achieve the purpose of verifying the implementation of the chip IB protocol, and realize the convenience and authenticity of message error injection. The combination of multiple error injection modes and error injection switches can meet the verification of error injection scenarios from simple to complex, so that the chip can be fully tested and the scalability of message error injection is improved.

[0022] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained through the structures and processes indicated in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. It is obvious that the drawings described below are certain embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 It is a schematic diagram of the relevant staggered means according to the related technology.

[0025] Figure 2 It is a schematic diagram of an error injection architecture based on IB messages according to an exemplary embodiment of the present application.

[0026] Figure 3 It is a flowchart of the message error annotation method based on the IB protocol according to the present application.

[0027] Figure 4 It is a schematic diagram of the error injection process according to an exemplary embodiment of the present application.

[0028] Figure 5 It is a logic diagram of judging whether an error annotation condition is satisfied by an IB message error annotation device according to an exemplary embodiment of the present application.

[0029] Figure 6 It is a schematic diagram of a message interval calculation strategy of an IB message error annotation device according to an exemplary embodiment of the present application.

[0030] Figure 7 It is a schematic diagram of the time interval calculation strategy of the IB message error annotation device according to the exemplary embodiment of the present application.

[0031] Figure 8 It is a schematic diagram of packet header validity verification according to an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] There are two types of error injection methods. One is to inject errors using simulation models in the simulation platform. The disadvantage of this error injection method is that the simulation system lacks complexity and authenticity. The other error injection method is to connect an error injection device to the chip. However, this error injection method is expensive and it is difficult to find a device that complies with the protocol. Figure 1 In addition, there is no message error injection device based on the IB protocol in the traditional technology. Therefore, how to make the error injection test more in line with the actual situation of the IB protocol and ensure the accuracy of the IB error injection test while reducing the test cost has become an urgent problem to be solved in this field.

[0034] Based on the above analysis, the present application exemplarily provides a message error annotation method and device based on the IB protocol, such as Figure 2 As shown in the figure, according to the verification rules and exception handling strategies specified by the IB protocol, the corresponding IB message error injection means (protocol verification mode) are customized, and the mode (retransmission verification mode) that can test the chip to achieve the completeness of IB retransmission (key function) is customized to positively verify the chip protocol logic implementation. On the basis of the previous two modes, a free error injection mode is added (adding multiple error injection switches for free configuration by software) to provide a more complete and effective IB error injection solution, making the error injection message more random and close to the actual scene.

[0035] See also Figure 3 , illustratively, the message error annotation method based on the IB protocol provided by the present application includes:

[0036] Step 301: configure the error injection mode in the error injection register according to the test target. When the error injection mode is configured as the free error injection mode, configure the error injection switch, error injection randomness and error injection message field value, and configure the error injection switch to start.

[0037] For example, Figure 4 The detailed process shown mainly includes software configuration of the error injection register, the error injection device startup, and then the error injection judgment, and the completion of the error injection and recording. First, the software configures the error injection register according to the test target.

[0038] In a further embodiment, configuring the error injection switch, error injection randomness and error injection message field value further includes: selecting through software to inject errors into messages of any one or more combinations of preset QPN, preset PSN or preset opcode to configure the error injection switch.

[0039] For example, if the free error injection mode (mode 3) is configured, the specified error injection switch is configured. The software can select one or more combinations of the specified IB message queue number QPN, the specified IB message packet sequence number PSN, and the specified IB message operation code opcode to configure the register to inject errors into the specified message, or configure not to inject errors.

[0040] In a further embodiment, configuring the error injection switch, error injection randomness and error injection message field value further includes: selecting random error injection, time interval error injection or message interval error injection through software to configure the error injection randomness.

[0041] Exemplarily, when configuring the randomness of error injection, the software can select three kinds of randomness of error injection, including random error injection, time interval error injection and message interval error injection. Among them, the random error injection is configured by the system time or the software to configure the random error injection switch. The time interval error injection is to inject message errors after a period of time preset by the software. The message interval error injection is to inject message errors after a period of packet volume preset by the software.

[0042] Furthermore, the software configures predefined error-annotated message fields and corresponding error-annotated values ​​according to test requirements.

[0043] After the software configures the error injection register, the error injection device is started.

[0044] Step 302: When the error injection mode is configured as the protocol error injection mode or the retransmission check mode, the error injection switch is directly configured to be enabled.

[0045] If the error injection register is configured as the protocol error injection mode (mode 1) or the retransmission check mode (mode 2), the error injection switch is directly configured. That is, after the software configures the error injection register, the error injection switch is configured to start. Exemplarily, according to the test scenario shown in Table 1, the error injection code shown in Table 1 can be directly configured to perform the error injection test.

[0046] Step 303: Based on the configuration information of the error injection register, an error injection test is performed on the detected IB message, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

[0047] Determine whether the error injection condition is met. According to the configured error injection register, when the target message is detected, an error injection is performed. For example, Figure 5-Figure 7As shown, the randomness of the injection error is first judged, and then the specified message is judged. When the injection error condition is met, the injection error is completed and recorded.

[0048] Among them, when the error injection randomness is the message interval error injection, the current message interval cnt starts counting. If the current time interval cnt>=cfg software configuration interval, or the current time interval cnt<cfg software configuration interval but the current message meets the error injection condition, it is judged whether the current message injection is successful. If so, the message interval cnt is cleared to 0, otherwise continue to wait; if the current time interval cnt<cfg software configuration interval and the current time does not meet the error injection condition, the time interval cnt+1.

[0049] When the error injection randomness is time interval injection error, the current time interval T starts counting. If the current time interval cnt>=cfg software configuration interval, or the current time interval cnt<cfg software configuration interval but the current time meets the error injection condition, it is determined whether the current message is successfully injected. If so, the time interval T is cleared to 0, otherwise continue to wait; if the current time interval cnt<cfg software configuration interval and the current time does not meet the error injection condition, the time interval T+software specified time plus.

[0050] After the error injection is completed, the software can query the number of errors injected, the first and the most recent error injection message information, etc. by reading the error injection register. And the software can obtain whether the current chip execution status meets expectations by reading relevant information of the chip.

[0051] IB's message verification processing rules are mainly divided into packet header validity verification, requester anomaly verification and responder anomaly verification.

[0052] For packet header validity check, for example, Figure 8 As shown, the corresponding message domain segment verification failed to silently discard the message, the message receiving end can not perceive the request. According to the characteristics of the inbound check, the software can select the abnormal error code, the hardware can perform the error, and check whether the receiving end is executed correctly. The error configuration is shown in Table 1.

[0053] Exemplarily, if the software needs to test whether the chip can process the message whose BTH TVer field is not 0 as expected (query table 1, columns 2 and 3), the error injection coding register can be configured to 1 (query table 1, column 1), and the message whose BTH TVer field is not 0 in the protocol error injection mode is selected for error injection test (query table 1, column 6). The error injection device automatically identifies the IB message whose opcode (operation code) matches the error injection target message opcode configured by the software, and whose qpn matches the qpn to which the error injection target message configured by the software belongs as the target error injection message (query table 1, column 7). After the error injection device determines that the packet interval is met (query table 1, column 8), the tver field of the target message is rewritten to 1 (query table 1, column 9), and then the rewritten message is sent to the downstream according to the original process. The software can query whether the chip's processing of the message meets expectations according to columns 4 and 5 of Table 1.

[0054] Exemplarily, when the BTH TVer field is not 0, the packet is silently discarded, ACK / NAK is not generated, the responder client is not notified, the error injection mode is set to protocol verification, the error injection switch is specified as the specified OPCODE=software configuration value, the specified QPN=software configuration value, the error injection randomness is the packet interval error injection, and the error injection field is bth_Tver=non-zero value. When the destination QP specified in the BTH does not exist, or is not in a correct state of receiving data packets, or is inconsistent with the requested service configuration, the packet is silently discarded, ACK / NAK is not generated, the responder client is not notified, the error injection mode is set to protocol verification, the error injection switch is specified as the specified OPCODE=software configuration value, the specified QPN=software configuration value, the error injection randomness is the packet interval error injection, and the error injection field is bth_dqpn=software configuration value. When the BTH:P Key does not match the value associated with the receive queue or EE-Context, it is silently discarded without generating ACK / NAK and not notifying the responder client. The error injection mode is set to protocol verification, the error injection switch is specified as OPCODE=software configuration value, the specified QPN=software configuration value, the error injection randomness is packet interval error injection, and the error injection domain is bth_pkey=software configuration value.

[0055] Table 1

[0056]

[0057]

[0058]

[0059]

[0060]

[0061] For the requester exception check, when the requester parses and executes the message, if an exception is detected, it will trigger the queue pair (QP) to silently discard, anomaly or retransmit. The software can configure the exception error code to annotate the destination message field to check whether the responder correctly performs the exception report or sends the expected response. For example, the peer end processing message status can be obtained by querying the peer end register, as shown in Table 2.

[0062] Exemplarily, if the software needs to test whether the chip can handle the NAK-Sequence Error PSN error (not exceeding the retransmission limit) request message as expected (columns 2 and 3 of Table 2), the error injection coding register can be configured to 18 (column 1 of Table 2), and the NAK-Sequence Error PSN error (not exceeding the retransmission limit) error injection test in the retransmission verification mode is selected (column 6 of Table 2). The error injection device will automatically identify the IB message whose opcode (operation code) is ack and the psn (message sequence number) matches the message sequence number of the error injection target message configured by the software as the target error injection message (column 7 of Table 2). After the error injection device determines that the packet interval is met (column 8 of Table 2), the aeth_syndrome field of the target message is rewritten to psn_Sequence Error (column 9 of Table 2), and then the rewritten message is sent to the downstream according to the original process. The software can query whether the chip's processing of the message meets expectations based on columns 4 and 5 of Table 2.

[0063] Exemplarily, when the local ACK timer times out and no ACK response is received within the time interval, the request is retransmitted and the retransmission counter is decremented. The error injection mode is set to protocol verification, the error injection switch is specified as the specified opcode=ack, the error injection randomness is the message interval error injection, and the error injection field is bth_Tver=non-zero value. When a NAK-Sequence Error PSN error occurs and the responder detects that the PSN of the request packet is greater than the ePSN, the request is retransmitted and the retransmission counter is decremented. The error injection mode is set to retransmission verification, the error injection switch is specified as the specified opcode=ack and the specified psn, the error injection randomness is the time interval error injection, and the error injection field is aeth_syndrome=psn_Sequence Error.

[0064] Table 2

[0065]

[0066]

[0067]

[0068]

[0069]

[0070]

[0071]

[0072]

[0073]

[0074]

[0075] Exemplarily, the responder anomaly check is shown in Table 3.

[0076] Exemplarily, if the software needs to test whether the chip can handle the request message whose PSN is not in the valid area of ​​the responder's PSN as expected (columns 2 and 3 of Table 3), the error injection coding register can be configured to 25 (column 1 of Table 3), and the error injection test of the request packet PSN disordered in the protocol error injection mode is selected (column 6 of Table 3). The error injection device automatically identifies the IB message whose psn (message sequence number) matches the message sequence number of the error injection target message configured by the software as the target error injection message (column 7 of Table 3). After the error injection device determines that the packet interval is met (column 8 of Table 3), the bth_psn field of the target message is rewritten to the original message psn+8M. The rewritten message is then sent to the downstream according to the original process. The software can query whether the chip's processing of the message meets expectations based on columns 4 and 5 of Table 3.

[0077] For example, when the request packet PSN disorder event occurs, and the request packet PSN is not in the valid area of ​​the responder's PSN, the previous request must be executed and completed before NAK, and NAK-Sequence Error is returned. All other requests except the expected request and repeated request are ignored, and NAK cannot be returned to respond to repeated requests. The error injection mode is protocol verification, the specified error injection switch is the specified psn, the error injection randomness is the message interval error injection, and the error injection field is bth_psn = original message psn + 8M. When the input SEND request message exceeds the valid buffer space of the responder, the previous request must be executed and completed before NAK, and NAK-Invalid Request is returned. The QP is converted to the Error state, and all WQEs are Completed Flushed in Error. The error is related to a specific QP, but not to a specific RQWQE: the error reported through Affiliated AsynchronousError is related to a specific WQE, or the WQE must be Completed in Error. The error injection mode is protocol verification, the specified error injection switch is OPCODE=SEND ONLY, the error injection randomness is message interval error injection, and the error injection field is 4B of 0 data added to the payload.

[0078] Table 3

[0079]

[0080]

[0081]

[0082]

[0083]

[0084]

[0085]

[0086]

[0087]

[0088]

[0089]

[0090] It can be seen that the message error annotation method based on the IB protocol provided by the present application has the following advantages compared with the related technologies:

[0091] The abnormal message scenarios listed in the IB protocol can be simulated on the real chip only through software configuration, without the need for external error injection equipment, to achieve the purpose of verifying the chip IB protocol implementation, and realize the convenience and authenticity of message error injection. The combination of multiple error injection modes and error injection switches can meet the verification of error injection scenarios from simple to complex, so that the chip can be fully tested and the scalability of message error injection is improved.

[0092] Accordingly, in a second aspect, the present application provides a message error annotation device based on the IB protocol, comprising:

[0093] A first configuration unit is used to configure an error injection mode in an error injection register according to a test target, and when the error injection mode is configured as a free error injection mode, configure an error injection switch, an error injection randomness, and an error injection message field value, and configure the error injection switch to be enabled;

[0094] The second configuration unit is used to directly configure the error injection switch to be started when the error injection mode is configured as the protocol error injection mode or the retransmission check mode;

[0095] The message error annotation unit is used to perform an error annotation test on the detected IB message based on the configuration information of the error annotation register, and read the error annotation register after completing the error annotation to query the error annotation test execution information.

[0096] In an optional implementation manner, the first configuration unit is further configured to:

[0097] The error injection switch is configured by selecting to inject errors into the messages of any one or more combinations of the preset QPN, the preset PSN or the preset opcode through software.

[0098] In an optional implementation manner, the first configuration unit is further configured to:

[0099] The randomness of error injection can be configured by selecting random error injection, time interval error injection, or message interval error injection through software.

[0100] In an optional implementation, in random error injection, error injection is enabled by system time or software configuration, in time interval error injection, message error injection is performed after a period of time preset by the software, and in message interval error injection, message error injection is performed after a period of packet volume preset by the software.

[0101] In an optional implementation manner, the message error annotation unit is further used for:

[0102] The error register is read through software to query the number of errors, the information of the first error message and the information of the most recent error message, or the relevant information of the chip is read through software to obtain the current chip execution status.

[0103] The above-mentioned device can be implemented by the message error annotation method based on the IB protocol provided by the embodiment of the above-mentioned first aspect. The specific implementation method can be found in the description of the embodiment of the first aspect, which will not be repeated here.

[0104] It is understood that the device structures, names and parameters described in the above embodiments are only examples. Those skilled in the art can also easily think of combinations and adjustments to the structural features of the above embodiments according to the use requirements, and should not limit the concept of the present application to the specific details of the above examples.

[0105] Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that he or she may still modify the technical solutions described in the aforementioned embodiments, or make equivalent substitutions for some of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A message error annotation method based on the IB protocol, characterized in that: include: According to the test target, the error injection mode is configured in the error injection register. When the error injection mode is configured as the free error injection mode, the error injection switch, the error injection randomness and the error injection message field value are configured, and the error injection switch is configured to be enabled; When the error injection mode is configured as a protocol error injection mode or a retransmission check mode, directly configuring the error injection switch to be enabled; Based on the configuration information of the error injection register, an error injection test is performed on the detected IB message, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

2. The message error annotation method based on the IB protocol according to claim 1, characterized in that: When the error injection mode is configured as the free error injection mode, configuring the error injection switch, the error injection randomness and the error injection message field value further includes: The error injection switch is configured by selecting to inject errors into the messages of any one or more combinations of the preset QPN, the preset PSN or the preset opcode through software.

3. The message error annotation method based on the IB protocol according to claim 1, characterized in that: When the error injection mode is configured as the free error injection mode, configuring the error injection switch, the error injection randomness and the error injection message field value further includes: The randomness of the error injection is configured by selecting random error injection, time interval error injection or message interval error injection through software.

4. The message error annotation method based on the IB protocol according to claim 3 is characterized in that: In the random error injection, the error injection configured by the system time or software enables the error injection. In the time interval error injection, the message error injection is performed after a period of time preset by the software. In the message interval error injection, the message error injection is performed after a period of packet volume preset by the software.

5. The message error annotation method based on the IB protocol according to claim 1, characterized in that: The querying of error injection test execution information further includes: The error injection register is read by software to query the number of errors, the information of the first error injection message and the information of the most recent error injection message, or the relevant information of the chip is read by software to obtain the current chip execution status.

6. A message error annotation device based on the IB protocol, characterized in that: include: A first configuration unit is used to configure an error injection mode in an error injection register according to a test target, and when the error injection mode is configured as a free error injection mode, configure an error injection switch, an error injection randomness, and an error injection message field value, and configure the error injection switch to be enabled; A second configuration unit is used to directly configure the error injection switch to start when the error injection mode is configured as a protocol error injection mode or a retransmission check mode; The message error injection unit is used to perform an error injection test on the detected IB message based on the configuration information of the error injection register, and read the error injection register after completing the error injection to query the error injection test execution information.

7. The message error annotation device based on the IB protocol according to claim 6, characterized in that: The first configuration unit is further configured to: The error injection switch is configured by selecting to inject errors into the messages of any one or more combinations of the preset QPN, the preset PSN or the preset opcode through software.

8. The message error annotation device based on the IB protocol according to claim 6, characterized in that: The first configuration unit is further configured to: The randomness of the error injection is configured by selecting random error injection, time interval error injection or message interval error injection through software.

9. The message error annotation device based on the IB protocol according to claim 8, characterized in that: In the random error injection, the error injection configured by the system time or software enables the error injection. In the time interval error injection, the message error injection is performed after a period of time preset by the software. In the message interval error injection, the message error injection is performed after a period of packet volume preset by the software.

10. The message error annotation device based on the IB protocol according to claim 6, characterized in that: The message error annotation unit is further used for: The error injection register is read by software to query the number of errors, the information of the first error injection message and the information of the most recent error injection message, or the relevant information of the chip is read by software to obtain the current chip execution status.

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