Selection-only memory

Abstract

The invention provides a selection-only memory which comprises a first memory unit and a second memory unit which are stacked in a first direction, and the first memory unit comprises a first electrode layer, a first memory layer and a second electrode layer which are sequentially stacked in the first direction. The second storage unit comprises a third electrode layer, a second storage layer and a fourth electrode layer which are sequentially stacked in the first direction. In the driving process, the second electrode layer is close to the current end relative to the first electrode layer, the third electrode layer is close to the current end relative to the fourth electrode layer, the doping concentration of nitrogen in the second electrode layer and the doping concentration of nitrogen in the third electrode layer are both lower than 5 at%, and the doping concentration of nitrogen in the first electrode layer is larger than or equal to 5 at%. Or, the first electrode layer is close to the current end relative to the second electrode layer, the fourth electrode layer is close to the current end relative to the third electrode layer, the doping concentration of nitrogen in the first electrode layer and the fourth electrode layer is lower than 5 at%, and the doping concentration of nitrogen in the third electrode layer is larger than or equal to 5 at%. Therefore, the influence of diffusion of nitrogen on the first storage layer and the second storage layer is reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a selection-only memory. Background Art

[0002] Compared with 3D X-point memory, Selector Only Memory (SOM) has the advantages of simple structure, high miniaturization (down to 10nm), fast read and write speed (~30ns), good cycle life, vertical stacking, and no write crosstalk caused by thermal effects. It is a very promising non-volatile memory with obvious advantages in CXL, HBM and other fields.

[0003] Unlike 3D cross-point memory, select-only memory uses the difference in threshold voltage to store data. The results of the memory cell prototype design showed that even with a processing size of 15nm, the high threshold voltage state (RESET) and the low threshold voltage state (SET) can be maintained. In addition, the write time of select-only memory is short, and the write time can be basically consistent between the high threshold voltage state and the low threshold voltage state.

[0004] For a select-only memory including multi-layer memory cells, doped particles in the electrode near the current end are easily diffused to the memory layer far from the current end, thus affecting the electrical performance of the memory layer. Since the operating voltages of the upper and lower memory cells are in opposite directions during operation, and the doping conditions of the electrodes near the current end in the upper and lower memory cells are different, the electrical performance of the upper and lower memory cells (or upper and lower memory layers) will be significantly different, thereby increasing the difficulty of operating system design. Summary of the invention

[0005] The embodiment of the present application provides a selective memory only, so that the nitrogen doping concentration in the electrode layer near the current end is lower than 5at%, so as to reduce the influence of nitrogen diffusion on the first storage layer and the second storage layer, and the influence of nitrogen diffusion on the first storage layer and the second storage layer is equivalent, thereby reducing the difference in electrical performance between the first storage unit and the second storage unit, so as to at least partially solve the above technical problems.

[0006] An embodiment of the present application provides a selection-only memory, comprising: a first storage unit and a second storage unit stacked along a first direction, the first storage unit comprising a first electrode layer, a first storage layer, and a second electrode layer stacked in sequence along the first direction, and the second storage unit comprising a third electrode layer, a second storage layer, and a fourth electrode layer stacked in sequence along the first direction; during a driving process, the second electrode layer is a near-current end relative to the first electrode layer, and the third electrode layer is a near-current end relative to the fourth electrode layer, and the nitrogen doping concentrations in the second electrode layer and the third electrode layer are both lower than 5at%, and the nitrogen doping concentration in the first electrode layer is greater than or equal to 5at%; or, the first electrode layer is a near-current end relative to the second electrode layer, and the fourth electrode layer is a near-current end relative to the third electrode layer, and the nitrogen doping concentrations in the first electrode layer and the fourth electrode layer are both lower than 5at%, and the nitrogen doping concentration in the third electrode layer is greater than or equal to 5at%.

[0007] In some embodiments, during the driving process, the second electrode layer is near the current end relative to the first electrode layer, and the third electrode layer is near the current end relative to the fourth electrode layer. The nitrogen doping concentration in the second electrode layer is 0, and the nitrogen doping concentration in the third electrode layer is 0.

[0008] In some embodiments, the second storage unit further includes a fifth electrode layer, the fifth electrode layer is located on a side of the third electrode layer away from the second storage layer, and a nitrogen doping concentration in the fifth electrode layer is 5 at % to 20 at %.

[0009] In some embodiments, a doping concentration of nitrogen in the fifth electrode layer is greater than or equal to a doping concentration of nitrogen in the first electrode layer.

[0010] In some embodiments, the second storage unit further includes a sixth electrode layer, the sixth electrode layer is located on a side of the fifth electrode layer away from the second storage layer, and a nitrogen doping concentration in the sixth electrode layer is lower than 5 at %.

[0011] In some embodiments, during the driving process, the first electrode layer is near the current end relative to the second electrode layer, and the fourth electrode layer is near the third electrode layer. The nitrogen doping concentration in the fourth electrode layer is 0, and the nitrogen doping concentration in the first electrode layer is greater than or equal to 0.

[0012] In some embodiments, the third electrode layer and the first electrode layer respectively include the same base material and nitrogen particles doped in the base material with different doping concentrations.

[0013] In some embodiments, the first electrode layer has a first thickness along the first direction, the third electrode layer has a second thickness along the first direction, and the first thickness is different from the second thickness.

[0014] In some embodiments, a difference between the first thickness and the second thickness is greater than 0 and less than or equal to 5 nm.

[0015] In some embodiments, it also includes: a first conductive line connecting the first electrode layer; a second conductive line connecting the first storage unit and the second storage unit; a third conductive line connecting the fourth electrode layer; the first conductive line, the second conductive line and the third conductive line are used to drive the first storage unit and the second storage unit.

[0016] In the embodiment of the present application, only the memory is selected to make the nitrogen doping concentration in the electrode layers near the current end (the second electrode layer and the third electrode layer, or the first electrode layer and the fourth electrode layer) lower than 5at%, so as to reduce the influence of nitrogen diffusion on the first storage layer and the second storage layer, and the influence of nitrogen diffusion on the first storage layer and the second storage layer is equivalent, thereby reducing the difference in electrical properties between the first storage layer and the second storage layer, and then achieving electrical performance matching between the first storage layer and the second storage layer, that is, achieving electrical performance matching between the first storage unit and the second storage unit.

[0017] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0019] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0020] Figure 1 This is a schematic diagram of a structure of only selecting a memory provided by an embodiment of the present application;

[0021] Figure 2 yes Figure 1 Only the cross-sectional structural diagram of the memory is selected;

[0022] Figure 3 is a schematic cross-sectional structure diagram of only selecting a memory provided in some embodiments of the present application;

[0023] Figure 4 is a schematic cross-sectional structure diagram of only selecting a memory provided in some embodiments of the present application;

[0024] Figure 5 is a schematic cross-sectional structure diagram of only selecting a memory provided in some embodiments of the present application;

[0025] Figure 6 is a schematic cross-sectional structure diagram of only selecting a memory provided in some embodiments of the present application;

[0026] Figure 7 It is a schematic diagram of a cross-sectional structure of only selecting a memory provided in some embodiments of the present application. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0028] See also Figure 1 and Figure 2 , Figure 1 is a schematic diagram of a structure of selecting only a memory provided by an embodiment of the present application, Figure 2 yes Figure 1 Only the cross-sectional structure diagram of the memory is selected. It should be noted that Figure 1 The embodiment only shows two layers of stacked memory cells in a memory cell group, and the memory cells in the lower layer are odd-numbered layer memory cells, and the memory cells in the upper layer are even-numbered layer memory cells, wherein the odd-numbered layers and the even-numbered layers are counted from the substrate, the 1st, 3rd, 5th layers, etc. are odd-numbered layers, and the 2nd, 4th, 6th layers, etc. are even-numbered layers.

[0029] The select-only memory includes from bottom to top (along the first direction Z): a first bit line BL1, a first memory cell C1, a word line WL, a second memory cell C2, and a second bit line BL2. The first memory cell C1 includes from bottom to top a first bottom electrode BE1, a first memory layer O1, and a first top electrode TE1, and the second memory cell C2 includes from bottom to top a second bottom electrode BE2, a second memory layer O2, and a second top electrode TE2. The first direction Z represents the stacking direction of the film layers, the second direction X represents the extending direction of the first bit line BL1, and the third direction Y represents the extending direction of the word line WL. The first direction Z, the second direction X, and the third direction Y may be perpendicular to each other.

[0030] In some embodiments, Figure 2As shown, the first bottom electrode BE1 is doped with doping particles (e.g., nitrogen particles) to increase the resistivity of the first bottom electrode BE1 and prevent the operation failure of the first memory cell C1 caused by the overshoot current or spike current flowing through the first memory cell C1. The second bottom electrode BE2 is doped with the doping particles (e.g., nitrogen particles) to increase the resistivity of the second bottom electrode BE2 and prevent the operation failure of the second memory cell C2 caused by the overshoot current or spike current flowing through the second memory cell C2. The first top electrode TE1 and the second top electrode TE2 do not need to be doped with nitrogen particles, because doping in the top electrode will increase the difficulty of the etching process of the top electrode. Therefore, by doping nitrogen in the two bottom electrodes, this embodiment can not only reduce the spike current of the two memory cells, but also reduce the difficulty of the etching process.

[0031] In some embodiments, the doping concentration of nitrogen in the first bottom electrode BE1 is greater than or equal to 5 at %, and the doping concentration of nitrogen in the second bottom electrode BE2 is greater than or equal to 5 at %.

[0032] like Figure 1 As shown, the first memory cell C1 and the second memory cell C2 share a word line WL. When operating the first memory cell C1 and the second memory cell C2, a word line voltage V_WL is applied to the word line WL, and the same bit line voltage V_BL is applied to the first bit line BL1 and the second bit line BL2, and the word line voltage V_WL is greater than the bit line voltage V_BL, so the current direction of the first memory cell C1 is opposite to the current direction of the second memory cell C2. Among them, the second bottom electrode BE2 is a near current end relative to the second top electrode TE2, and the first top electrode TE1 is a near current end relative to the first bottom electrode BE1.

[0033] It has been experimentally verified that, since the current (or voltage) operation directions of the first memory cell C1 and the second memory cell C2 are opposite, for the second memory cell C2, the nitrogen particles in the second bottom electrode BE2 will diffuse to the second memory layer O2 along the direction of the electric field (upward), thus affecting its electrical performance; for the first memory cell C1, since the first bottom electrode BE1 is located below the first memory layer O1 and the direction of the electric field is downward, the nitrogen particles in the first bottom electrode BE1 will not move upward, that is, will not diffuse into the first memory layer O1; for the first top electrode TE1, since there is no nitrogen doping in it, it is different from the nitrogen doping in the second bottom electrode BE2 which is also near the current end, so it will not affect the first memory layer O1. Therefore, this difference will lead to significant differences in the electrical parameters of the two layers of memory cells. Among them, the electrical parameters include threshold voltage, threshold voltage difference in different states, leakage current, etc. This difference in electrical parameters will also lead to inconsistent operating voltages of the two layers of memory cells, increasing the difficulty of operating the system.

[0034] Therefore, an embodiment of the present application provides a selection-only memory, comprising: a first storage unit and a second storage unit stacked along a first direction, the first storage unit comprising a first electrode layer, a first storage layer, and a second electrode layer stacked in sequence along the first direction, and the second storage unit comprising a third electrode layer, a second storage layer, and a fourth electrode layer stacked in sequence along the first direction; during a driving process, the second electrode layer is near the current end relative to the first electrode layer, and the third electrode layer is relative to the fourth electrode layer, the nitrogen doping concentrations in the second electrode layer and the third electrode layer are both lower than 5at%, and the nitrogen doping concentration in the first electrode layer is greater than 0; or, the first electrode layer is near the current end relative to the second electrode layer, and the fourth electrode layer is relative to the third electrode layer, the nitrogen doping concentrations in the first electrode layer and the fourth electrode layer are both lower than 5at%, and the nitrogen doping concentration in the third electrode layer is greater than 0.

[0035] In the embodiment of the present application, since the nitrogen doping concentration in the electrode layers near the current end (the second electrode layer and the third electrode layer, or the first electrode layer and the fourth electrode layer) is lower than 5at%, that is, the nitrogen doping concentration in the electrode layers near the current end is low and the doping concentration range is the same, the influence of nitrogen diffusion on the first storage layer and the second storage layer can be reduced, and the influence of nitrogen diffusion on the first storage layer and the second storage layer is equivalent, thereby reducing the difference in electrical properties between the first storage layer and the second storage layer, and then achieving electrical property matching between the first storage layer and the second storage layer, that is, achieving electrical property matching between the first storage unit and the second storage unit.

[0036] In addition, when the second electrode layer and the third electrode layer are near the current end, the nitrogen doping concentration in the first electrode layer (as the bottom electrode of the first memory cell) is greater than or equal to 5at%, which can compensate for the lower nitrogen doping concentration in the second electrode layer (as the top electrode of the first memory cell), increase the resistance of the first memory cell, and prevent the operation failure of the first memory cell caused by the overshoot current or spike current flowing through the first memory cell. When the first electrode layer and the fourth electrode layer are near the current end, the nitrogen doping concentration in the third electrode layer (as the bottom electrode of the second memory cell) is greater than or equal to 5at%, which can compensate for the lower nitrogen doping concentration in the fourth electrode layer (as the top electrode of the second memory cell), increase the resistance of the second memory cell, and prevent the operation failure of the first memory cell caused by the overshoot current or spike current flowing through the first memory cell.

[0037] The structure of the selection-only memory provided in the embodiments of the present application is described below with reference to the accompanying drawings.

[0038] See also Figure 3 , Figure 3It is a schematic diagram of a cross-sectional structure of only selecting a memory provided in some embodiments of the present application.

[0039] The select-only memory 100 includes a first memory cell 21 and a second memory cell 22 stacked along a first direction (Z), wherein the first memory cell 21 includes a first electrode layer 211, a first memory layer 212, and a second electrode layer 213 stacked in sequence along the first direction (Z), and the second memory cell 22 includes a third electrode layer 221, a second memory layer 222, and a fourth electrode layer 223 stacked in sequence along the first direction; during a driving process, the second electrode layer 213 is relatively close to the first electrode layer 211, the third electrode layer 221 is relatively close to the fourth electrode layer 223, and the third electrode layer 222 is relatively close to the fourth electrode layer 223. The electrode layers 223 are all near current ends, the nitrogen doping concentrations in the second electrode layer 213 and the third electrode layer 221 are both lower than 5at%, and the nitrogen doping concentration in the first electrode layer 211 is greater than or equal to 5at%; or, the first electrode layer 211 is near current ends relative to the second electrode layer 213, and the fourth electrode layer 223 is relative to the third electrode layer 221, the nitrogen doping concentrations in the first electrode layer 211 and the fourth electrode layer 223 are both lower than 5at%, and the nitrogen doping concentration in the third electrode layer 221 is greater than or equal to 5at%.

[0040] In some embodiments, Figure 3 As shown, the first direction (Z) is from bottom to top, so the second storage unit 22 is located on the first storage unit 21 , the second electrode layer 213 is located above the first electrode layer 211 , and the fourth electrode layer 223 is located above the third electrode layer 221 .

[0041] The select-only memory 100 may include 1, 2, 3, 4 or more sequentially stacked memory cell groups 20, wherein one memory cell group 20 includes two layers of stacked memory cells, two memory cell groups 20 include four layers of stacked memory cells, three memory cell groups 20 include six layers of stacked memory cells, and four memory cell groups 20 include eight layers of stacked memory cells. In each memory cell group 20, the second memory cell 22 is an odd-numbered layer memory cell, and the first memory cell 21 is an even-numbered layer memory cell. That is, starting from the substrate 10, one odd-numbered layer memory cell and one even-numbered layer memory cell thereon constitute one memory cell group 20.

[0042] In some embodiments, the fourth electrode layer 223 , the third electrode layer 221 , the second electrode layer 213 and the first electrode layer 211 are all carbon layers.

[0043] In some embodiments, the fourth electrode layer 223 and the second electrode layer 213 do not contain nitrogen particles, that is, the nitrogen doping concentration is 0. The fourth electrode layer 223 and the second electrode layer 213 are both carbon layers without doping, which is relatively friendly to the preparation process. For example, it can avoid that the plasma doping process of the fourth electrode layer 223 and the second electrode layer 213 affects the first storage layer 212 and the second storage layer 222 respectively.

[0044] The material of the first storage layer 212 may be the same as the material of the second storage layer 222 and may include chalcogenides, including compounds of arsenic (As), selenium (Se) and germanium (Ge), such as compounds of AsSeGe and silicon (Si), compounds of AsSeGeSi and indium (In), and compounds of AsSeGe and indium (In).

[0045] In some embodiments, the first storage layer 212 and the second storage layer 222 have the same elemental composition and the atomic percentage concentration of each element particle is the same, so that the first storage layer 212 and the second storage layer 222 have the same electrical parameters, which include threshold voltage, threshold voltage difference between different states (also called read-write window) and leakage current.

[0046] The select-only memory 100 may further include a first conductive line 31, a second conductive line 32, and a third conductive line 33, wherein the first conductive line 31 is connected to the first electrode layer 211; the second conductive line 32 is connected to the first storage unit 21 and the second storage unit 22; and the third conductive line 33 is connected to the fourth electrode layer 223. The first conductive line 31, the second conductive line 32, and the third conductive line 33 are used to drive the first storage unit 21 and the second storage unit 22.

[0047] Specifically, the first conductive line 31 and the third conductive line 33 are respectively located on both sides of the storage cell group 20 along the first direction Z, that is, the first conductive line 31 is located on the side of the first storage cell 21 away from the second storage cell 22, and the third conductive line 33 is located on the side of the second storage cell 22 away from the first storage cell 21. The second conductive line 32 is located between the first storage cell 21 and the second storage cell 22 in the same storage cell group 20. Therefore, the first storage cell 21 and the second storage cell 22 in the same storage cell group 20 share the second conductive line 32.

[0048] In some embodiments, the first conductive line 31 and the third conductive line 33 are the same and are one of a bit line and a word line, and the second conductive line 32 is the other of a bit line and a word line. The first memory cell 21 is located at the intersection of the second conductive line 32 and the first conductive line 31, and the second memory cell 22 is located at the intersection of the second conductive line 32 and the third conductive line 33. The material of the first conductive line 31, the second conductive line 32 and the third conductive line 33 can be tungsten.

[0049] The working principle of the selection-only memory 100 is described below by taking the second storage unit 22 as an example.

[0050] The first storage unit 21 is operated by using SET and RESET voltage or current pulses in opposite directions to obtain a SET state and a RESET state with different threshold voltages, and a read voltage between the threshold voltages of the two states is used to distinguish the two states. The current flows from the second conductive line 32 to the second storage unit 22, and from the second conductive line 32 to the first storage unit 21. The second electrode layer 213 is a near current end relative to the first electrode layer 211, which means that the current flows from the second electrode layer 213 to the first electrode layer 211; the third electrode layer 221 is a near current end relative to the fourth electrode layer 223, which means that the current flows from the third electrode layer 221 to the fourth electrode layer 223.

[0051] Specifically, when a positive voltage pulse is applied between the third electrode layer 221 and the fourth electrode layer 223 (i.e., the voltage of the fourth electrode layer 223 is less than the voltage of the third electrode layer 221), the first storage unit 21 is in a low resistance state (SET state) with a lower first threshold voltage. When a voltage pulse in the opposite direction is applied to the first storage unit 21 (i.e., the voltage of the fourth electrode layer 223 is greater than the voltage of the third electrode layer 221), the first storage unit 21 will be transformed into a high resistance state (RESET state) with a higher second threshold voltage. In the reading process of the first storage unit 21, by applying a reading voltage between the first threshold voltage and the second threshold voltage between the third electrode layer 221 and the fourth electrode layer 223, it is possible to read whether the first storage unit 21 is in a high resistance state or a low resistance state, so the first threshold voltage and the second threshold voltage determine the reading voltage of the first storage unit 21.

[0052] The read and write operation of the second storage unit 22 is the same as that of the first storage unit 21. Figure 1 As shown, the current operation direction of the second storage unit 22 is opposite to that of the first storage unit 21, that is, the voltage operation direction is opposite.

[0053] In some embodiments, the nitrogen doping concentration in the second electrode layer 213 is 0, and the nitrogen doping concentration in the third electrode layer 221 is 0. That is, the second electrode layer 213 and the third electrode layer 221 are not doped with nitrogen.

[0054] The nitrogen doping concentration in the second electrode layer 213 is 0, which can not only prevent the doping process of the second electrode layer 213 from affecting the first storage layer 212 below, but also prevent the nitrogen in the second electrode layer 213 from diffusing into the first storage layer 212. The nitrogen doping concentration in the third electrode layer 221 is 0, which can prevent the nitrogen in the third electrode layer 221 from diffusing into the second storage layer 222, thereby reducing the impact on the electrical properties of the second storage layer 222, thereby reducing the difference in electrical properties between the second storage layer 222 and the first storage layer 212, and achieving electrical property matching between the second storage layer 222 and the first storage layer 212.

[0055] In some embodiments, the nitrogen doping concentration in the fourth electrode layer 223 is 0, thereby preventing the doping process of the fourth electrode layer 223 from affecting the second storage layer 222 therebelow and reducing the difficulty of the etching process of the fourth electrode layer 223 .

[0056] Experimental verification shows that, on the current path passing through each memory cell, the electrical performance of the structure before the current passes through the storage layer has a greater impact on the electrical performance of the entire memory cell, while the electrical performance of the structure after the current passes through the storage layer has a smaller impact on the electrical performance of the entire memory cell.

[0057] For example, Figure 3 As shown, for the first storage unit 21, the structure before the current passes through the first storage layer 212 is the second electrode layer 213, and the structure after the current passes through the first storage layer 212 is the first electrode layer 211; for the second storage unit 22, the structure before the current passes through the second storage layer 222 is the third electrode layer 221, and the structure after the current passes through the first storage layer 212 is the fourth electrode layer 223.

[0058] Since the electrical properties of the first electrode layer 211 have little effect on the electrical properties of the first memory cell 21, the first electrode layer 211 may be fully doped, undoped, or partially doped with the nitrogen particles. The partially doped portion may be located at the top of the first electrode layer 211, in the middle of the first electrode layer 211, or at the bottom of the first electrode layer 211.

[0059] The partially doped portion is located at the bottom of the first electrode layer 211 , so the distribution of nitrogen particles in the first electrode layer 211 is the same as the distribution of nitrogen particles in the third electrode layer 221 , which can further improve the electrical parameter matching of different memory cells in the same memory cell group 20 .

[0060] In some embodiments, when the nitrogen doping concentrations in the second electrode layer 213 and the third electrode layer 221 are both 0, the first electrode layer 211 may be fully or partially doped with nitrogen, thereby reducing the peak current of the first memory cell.

[0061] In other words, the third electrode layer 221 and the first electrode layer 211 respectively include the same base material and nitrogen particles doped in the base material at different doping concentrations, that is, the doping concentration of the nitrogen particles in the third electrode layer 221 is different from the doping concentration of the nitrogen particles in the first electrode layer 211.

[0062] like Figure 3 As shown, nitrogen is partially doped in the first electrode layer 211. Specifically, the first electrode layer 211 includes a first electrode intercalation layer 2111 and a second electrode intercalation layer 2112, wherein the first electrode intercalation layer 2111 is located between the first storage layer 212 and the second electrode intercalation layer 2112. The first electrode intercalation layer 2111 is not doped with nitrogen, and the second electrode intercalation layer 2112 is doped with nitrogen.

[0063] Since the first electrode layer 211 is doped with nitrogen and the third electrode layer 221 is not doped with nitrogen, the nitrogen doping concentrations of the two are different. Therefore, the materials of the first electrode layer 211 and the third electrode layer 221 are different, which will also cause differences in electrical parameters between the first storage unit 21 and the second storage unit 22.

[0064] It can be understood that the material of the first electrode layer 211 is different from the material of the third electrode layer 221 , including any difference in base material, doping concentration and distribution of nitrogen particles between the two.

[0065] In some embodiments, the third electrode layer 221 has a first thickness along the first direction Z, the first electrode layer 211 has a second thickness along the first direction Z, and the first thickness is different from the second thickness. In order to reduce the difference in electrical parameters caused by the different materials of the third electrode layer 221 and the first electrode layer 211, the resistance of the third electrode layer 221 and the first electrode layer 211 can be adjusted by fine-tuning the thickness of the third electrode layer 221 and the first electrode layer 211, so that the resistances of the two are substantially the same, thereby making the electrical parameters of the first storage unit 21 and the second storage unit 22 substantially consistent.

[0066] It is understood that the greater the thickness, the greater the resistance of the electrode. For example, when the resistivity of the third electrode layer 221 is small due to the different materials of the first electrode layer 211 and the third electrode layer 221, the resistance of the third electrode layer 221 can be increased by increasing the thickness of the third electrode layer 221 or reducing the thickness of the first electrode layer 211.

[0067] In some embodiments, the difference between the first thickness and the second thickness is greater than 0 and less than or equal to 5 nm. Experimental test results show that the difference between the first thickness and the second thickness within this range is sufficient to match the electrical parameters of the first storage unit 21 and the second storage unit 22.

[0068] In other embodiments, when a relatively low voltage is applied to the second conductive line 32, and a relatively high voltage is applied to the first conductive line 31 and the third conductive line 33, the first electrode layer 211 is close to the current end relative to the second electrode layer 213, and the fourth electrode layer 223 is close to the third electrode layer 221. Setting the nitrogen doping concentration in the first electrode layer 211 and the fourth electrode layer 223 to be lower than 5at%, the diffusion of nitrogen into the first storage layer and the second storage layer can be reduced, and the diffusion of nitrogen in the first electrode layer 211 and the fourth electrode layer 223 has a similar effect on the first storage layer 212 and the second storage layer 222, thereby achieving electrical performance matching between the first storage layer 212 and the second storage layer 222. Setting the nitrogen doping concentration in the third electrode layer to be greater than 0 can increase the resistance of the second storage unit 22 and reduce the overshoot current or peak current flowing through the first storage unit.

[0069] When the first electrode layer 211 is close to the current end relative to the second electrode layer 213 and the fourth electrode layer 223 is close to the third electrode layer 221, the nitrogen doping concentration in the fourth electrode layer 223 is 0, and the nitrogen doping concentration in the first electrode layer 211 is greater than or equal to 0. That is, the fourth electrode layer 223 is not doped with nitrogen, and the nitrogen doping concentration in the first electrode layer 211 is greater than or equal to 0 and less than 5at%.

[0070] The nitrogen doping concentration in the fourth electrode layer 223 is 0, which can not only prevent the doping process of the fourth electrode layer 223 from affecting the second storage layer 222 below, but also prevent the nitrogen in the fourth electrode layer 223 from diffusing into the second storage layer 222. The nitrogen doping concentration in the first electrode layer 211 is greater than or equal to 0 and less than 5at%, that is, the first electrode layer 211 may not be doped with nitrogen or may be doped with nitrogen at a low concentration, thereby reducing the diffusion of nitrogen in the first electrode layer 211 into the first storage layer 212, thereby reducing the impact on the electrical properties of the first storage layer 212, and further reducing the difference in electrical properties between the second storage layer 222 and the first storage layer 212. When the first electrode layer 211 and the fourth electrode layer 223 are near the current end, the nitrogen doping concentration in the second electrode layer 213 is 0, thereby preventing the doping process of the second electrode layer 213 from affecting the first storage layer 212 below, and also reducing the difficulty of the etching process of the second electrode layer 213.

[0071] In some embodiments, the select-only memory 100 may further include a first buffer layer 41, a second buffer layer 42, and a third buffer layer 43, wherein the first buffer layer 41 is located between the first conductive line 31 and the first storage unit 21, and the third buffer layer 43 is located between the third conductive line 33 and the second storage unit 22. The second buffer layer 42 is located between the second conductive line 32 and the first storage unit 21, and between the second conductive line 32 and the second storage unit 22. That is, the first conductive line 31 is indirectly connected to the first electrode layer 211 through the first buffer layer 41, the second conductive line 32 is indirectly connected to the first storage unit 21 and the second storage unit 22 through the second buffer layer 42, respectively, and the third conductive line 33 is indirectly connected to the fourth electrode layer 223 through the third buffer layer 43. These buffer layers can improve the adhesion between the conductive lines and the electrode layers.

[0072] In some embodiments, nitrogen is not doped in the second electrode layer 213 and the fourth electrode layer 223, but nitrogen particles are doped in the third electrode layer 221 and the first electrode layer 211 to increase the resistivity and thus reduce the peak current, because in the etching process, the etching process of the third electrode layer 221 can stop on the second buffer layer 42, and the etching process of the first electrode layer 211 can stop on the first buffer layer 41. Compared with the embodiment in which nitrogen particles are doped in the fourth electrode layer 223 and the second electrode layer 213 to increase the resistivity, doping nitrogen particles in the third electrode layer 221 and the first electrode layer 211 is more friendly to the etching process of the electrodes, and the doping process of doping nitrogen particles will not affect the first storage layer 212 and the second storage layer 222.

[0073] See also Figure 4 , see Figure 4 , Figure 4 is a schematic cross-sectional structure diagram of a select-only memory provided in some embodiments of the present application, wherein the select-only memory 200 and Figure 3 The only difference between the selected memory 100 and the second storage unit 22 is that in this embodiment, only the difference from the above embodiment is described in detail.

[0074] The second storage unit 22 further includes a fifth electrode layer 224 . The fifth electrode layer 224 is located on a side of the third electrode layer 221 away from the second storage layer 222 . The nitrogen doping concentration in the fifth electrode layer 224 is 5 at % to 20 at %.

[0075] For example, the nitrogen doping concentration in the third electrode layer 221 may be 0 at %, 1 at %, 2 at % or 4 at %, and the nitrogen doping concentration in the fifth electrode layer 224 may be 5 at %, 10 at %, 15 at % or 20 at %.

[0076] The third electrode layer 221 and the fifth electrode layer 224 together serve as the bottom electrode of the second storage unit 22. The third electrode layer 221 can reduce the diffusion of nitrogen into the second storage layer 222, and the fifth electrode layer 224 can increase the resistivity of the bottom electrode and reduce the peak current flowing through the second storage unit 22. Therefore, this embodiment can simultaneously match the electrical performance of the second storage layer 222 with the first storage layer 212 and reduce the peak current of the second storage unit 22.

[0077] In some embodiments, the doping concentration of nitrogen in the third electrode layer 221 is 0 to isolate nitrogen in the fifth electrode layer 224 from diffusing into the second storage layer 222 .

[0078] In some embodiments, in the same storage cell group 20, the material of the first electrode layer 211 is the same as the material of the third electrode layer 221, which is conducive to achieving symmetry in structure and electrical properties in the same storage cell group 20, and further improving the electrical parameter matching of different storage cells in the same storage cell group 20.

[0079] Specifically, the third electrode layer 221 and the first electrode layer 211 both include a matrix material and nitrogen particles doped in the matrix material, and the matrix material and the concentration and distribution of the nitrogen particles in the first electrode layer 211 are the same as those in the third electrode layer 221. The matrix material may be a carbon layer.

[0080] It can be understood that the material of the first electrode layer 211 is the same as that of the third electrode layer 221 , which means that the base material, nitrogen particle concentration and distribution of the two are the same.

[0081] For example, Figure 4 As shown, the first electrode layer 211 includes a first electrode intercalation layer 2111 and a second electrode intercalation layer 2112, and the first electrode intercalation layer 2111 is located between the first storage layer 212 and the second electrode intercalation layer 2112. The third electrode layer 221 and the first electrode layer 211 both include the matrix material and nitrogen particles doped in the matrix material, and the matrix materials of the third electrode layer 221, the fifth electrode layer 224, the first electrode intercalation layer 2111 and the second electrode intercalation layer 2112 are all carbon layers. The doping concentration of the nitrogen particles in the second electrode intercalation layer 2112 is the same as the doping concentration of the nitrogen particles in the fifth electrode layer 224, and the doping concentration of the nitrogen particles in the first electrode intercalation layer 2111 is the same as the doping concentration of the nitrogen particles in the third electrode layer 221.

[0082] See also Figure 5 , Figure 5 is a schematic cross-sectional structure diagram of a select-only memory provided in some embodiments of the present application, wherein the select-only memory and Figure 4Only the memory 200 is different in the first electrode layer 211 .

[0083] like Figure 5 As shown, the first electrode layer 211 is entirely doped with nitrogen particles to increase the resistivity of the first electrode layer 211 and reduce the peak current of the first memory cell 21 .

[0084] In some embodiments, the doping concentration of nitrogen in the fifth electrode layer 224 is greater than or equal to the doping concentration of nitrogen in the first electrode layer 211 .

[0085] Since the third electrode layer 221 is not doped with nitrogen, while the first electrode layer 211 is completely doped with nitrogen, the nitrogen doping concentration in the fifth electrode layer 224 is set to be greater than the nitrogen doping concentration in the first electrode layer 211, so as to maximize the combined nitrogen doping effect of the fifth electrode layer 224 and the third electrode layer 221, that is, the combined resistivity is the same as the resistivity of the first electrode layer 211.

[0086] See also Figure 6 , Figure 6 is a schematic cross-sectional structure diagram of a select-only memory provided in some embodiments of the present application, wherein the select-only memory and Figure 4 Only the memory 200 is different in the first electrode layer 211 .

[0087] like Figure 6 As shown, the first electrode layer 211 is not doped with nitrogen.

[0088] See also Figure 7 , Figure 7 2 is a schematic diagram of a cross-sectional structure of a select-only memory provided in some embodiments of the present application. The select-only memory 300 is mainly different from the above embodiments in that the second storage unit 22 is provided.

[0089] The second storage unit 22 includes not only the third electrode layer 221 and the fifth electrode layer 224, but also the sixth electrode layer 225, which is located on the side of the fifth electrode layer 224 away from the third electrode layer 221. The nitrogen doping concentration in the sixth electrode layer 225 is lower than the nitrogen doping concentration in the fifth electrode layer 224, that is, lower than 5at%.

[0090] That is, the fifth electrode layer 224 has the highest doping concentration of nitrogen particles, and the third electrode layer 221 and the sixth electrode layer 225 may not contain the nitrogen particles or have a lower doping concentration. The third electrode layer 221 can reduce the diffusion of nitrogen particles into the first storage layer 212, and the sixth electrode layer 225 can reduce the influence of the doping process of nitrogen particles in the third electrode layer 221 on the second conductive line 32 below.

[0091] In some embodiments, the first electrode layer 211 may be fully doped, partially doped, or undoped with the nitrogen particles. The partially doped portion may be located at the top of the first electrode layer 211, in the middle of the first electrode layer 211, or at the bottom of the first electrode layer 211.

[0092] like Figure 7 As shown, the first electrode layer 211 is entirely doped with the nitrogen particles.

[0093] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0094] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0095] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0096] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A memory-only selection method, characterized in that: include: A first storage unit and a second storage unit stacked along a first direction, wherein the first storage unit comprises a first electrode layer, a first storage layer, and a second electrode layer sequentially stacked along the first direction, and the second storage unit comprises a third electrode layer, a second storage layer, and a fourth electrode layer sequentially stacked along the first direction; During the driving process, the second electrode layer is close to the current end relative to the first electrode layer, and the third electrode layer is close to the fourth electrode layer, the nitrogen doping concentration in the second electrode layer and the third electrode layer is lower than 5at%, and the nitrogen doping concentration in the first electrode layer is greater than or equal to 5at%; Alternatively, the first electrode layer is near the current end relative to the second electrode layer, and the fourth electrode layer is near the third electrode layer, the nitrogen doping concentration in the first electrode layer and the fourth electrode layer is lower than 5at%, and the nitrogen doping concentration in the third electrode layer is greater than or equal to 5at%.

2. The select-only memory according to claim 1, characterized in that During the driving process, the second electrode layer is near the current end relative to the first electrode layer, and the third electrode layer is near the current end relative to the fourth electrode layer. The nitrogen doping concentration in the second electrode layer is 0, and the nitrogen doping concentration in the third electrode layer is 0.

3. The select-only memory according to claim 2, characterized in that The second storage unit further includes a fifth electrode layer, the fifth electrode layer is located at a side of the third electrode layer away from the second storage layer, and the nitrogen doping concentration in the fifth electrode layer is 5 at % to 20 at %.

4. The select-only memory according to claim 3, characterized in that The doping concentration of nitrogen in the fifth electrode layer is greater than or equal to the doping concentration of nitrogen in the first electrode layer.

5. The select-only memory according to claim 3, characterized in that The second storage unit further includes a sixth electrode layer, the sixth electrode layer is located at a side of the fifth electrode layer away from the second storage layer, and a nitrogen doping concentration in the sixth electrode layer is lower than 5 at %.

6. The select-only memory according to claim 1, characterized in that During the driving process, the first electrode layer is near the current end relative to the second electrode layer, and the fourth electrode layer is near the third electrode layer. The nitrogen doping concentration in the fourth electrode layer is 0, and the nitrogen doping concentration in the first electrode layer is greater than or equal to 0.

7. The select-only memory according to claim 1, characterized in that The third electrode layer and the first electrode layer respectively include the same base material and nitrogen particles doped in the base material with different doping concentrations.

8. The select-only memory according to claim 7, characterized in that The first electrode layer has a first thickness along the first direction, the third electrode layer has a second thickness along the first direction, and the first thickness is different from the second thickness.

9. The select-only memory according to claim 8, characterized in that A difference between the first thickness and the second thickness is greater than 0 and less than or equal to 5 nm.

10. The select-only memory according to claim 1, wherein: Also includes: A first conductive line connected to the first electrode layer; a second conductive line, connecting the first storage unit and the second storage unit; a third conductive line connected to the fourth electrode layer; The first conductive line, the second conductive line, and the third conductive line are used to drive the first storage unit and the second storage unit.

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