Display device and mother substrate for display device

Abstract

The invention relates to a display device and a mother substrate for the display device. A display device is provided with: a substrate having a display region and a peripheral region; an organic insulating layer disposed over the substrate; a lower electrode disposed over the organic insulating layer in the display area; a rib layer covering the organic insulating layer and the lower electrode and having a pixel opening overlapping the lower electrode; a first partition wall disposed above the rib layer in the display region; an organic layer in contact with the lower electrode through the pixel opening; an upper electrode covering the organic layer and in contact with the first partition wall; and a second partition wall disposed above the rib layer in the peripheral region. Each of the first partition wall and the second partition wall includes a lower portion disposed above the rib layer and an upper portion having an end portion protruding from a side surface of the lower portion. The second partition wall includes a plurality of segments separated from each other. In addition, the rib layer has a slit that surrounds at least one of the plurality of segments.

Description

[0001] Cross-references to related applications

[0002] This application claims priority based on Japanese Patent Application No. 2023-179399 filed on October 18, 2023, and cites all the contents described in the Japanese Patent Application. Technical Field

[0003] Embodiments of the present invention relate to a display device and a mother substrate for a display device. Background Art

[0004] In recent years, display devices using organic light emitting diodes (OLEDs) as display elements have been put into practical use. In such display devices, a technology capable of improving yield is required. Summary of the invention

[0005] In summary, according to an embodiment, a display device includes: a substrate having a display area for displaying an image and a peripheral area around the display area; an organic insulating layer formed of an organic insulating material and arranged above the substrate; a lower electrode arranged above the organic insulating layer in the display area; a rib layer formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping with the lower electrode; a first partition wall arranged above the rib layer in the display area; an organic layer contacting the lower electrode through the pixel opening and emitting light in response to the application of a voltage; an upper electrode covering the organic layer and contacting the first partition wall; and a second partition wall arranged above the rib layer in the peripheral area. Each of the first partition wall and the second partition wall includes a lower portion arranged above the rib layer and an upper portion having an end protruding from a side surface of the lower portion. The second partition wall includes a plurality of segments separated from each other. In addition, the rib layer has a slit that surrounds at least one of the plurality of segments.

[0006] According to another aspect of the embodiment, the display device comprises: a substrate having a display area for displaying an image and a peripheral area around the display area; an inorganic insulating layer formed of an inorganic insulating material and arranged above the substrate; an organic insulating layer formed of an organic insulating material and arranged above the inorganic insulating layer; a lower electrode arranged above the organic insulating layer in the display area; a rib layer formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping with the lower electrode; an organic layer in contact with the lower electrode through the pixel opening and emitting light in response to the application of a voltage; and an upper electrode covering the organic layer. In addition, an overhang structure is formed in the peripheral area, in which the edge of the rib layer protrudes from the edge of the inorganic insulating layer.

[0007] In summary, according to an embodiment, a mother substrate for a display device includes: a substrate having a plurality of panel parts each including a display area and a peripheral area around the display area, and a blank area around the plurality of panel parts; an organic insulating layer formed of an organic insulating material and arranged above the substrate; a lower electrode arranged above the organic insulating layer in the display area; a rib layer formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping with the lower electrode; a first partition wall arranged above the rib layer in the display area; an organic layer contacting the lower electrode through the pixel opening and emitting light in response to application of a voltage; an upper electrode covering the organic layer and contacting the first partition wall; and a second partition wall arranged above the rib layer in at least one of the peripheral area and the blank area. Each of the first partition wall and the second partition wall includes a lower portion arranged above the rib layer and an upper portion having an end protruding from a side surface of the lower portion. The second partition wall includes a plurality of segments separated from each other. Furthermore, the rib layer has a slit surrounding at least one of the plurality of segments.

[0008] According to another aspect of the embodiment, a mother substrate for a display device comprises: a substrate having a plurality of panel parts including a display area and a peripheral area around the display area, and a blank area around the plurality of panel parts; an inorganic insulating layer formed of an inorganic insulating material and arranged above the substrate; an organic insulating layer formed of an organic insulating material and arranged above the inorganic insulating layer; a lower electrode arranged above the organic insulating layer in the display area; a rib layer formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping with the lower electrode; an organic layer contacting the lower electrode through the pixel opening and emitting light in response to the application of a voltage; and an upper electrode covering the organic layer. In addition, an overhanging structure in which an edge of the rib layer protrudes from an end of the inorganic insulating layer is formed in at least one of the peripheral area and the blank area.

[0009] According to another aspect of the embodiment, a mother substrate for a display device comprises: a substrate having a plurality of panel parts each including a display area and a peripheral area around the display area, and a blank area around the plurality of panel parts; an organic insulating layer formed of an organic insulating material and arranged above the substrate; a lower electrode arranged above the organic insulating layer in the display area; a rib layer formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping the lower electrode; an organic layer contacting the lower electrode through the pixel opening and emitting light in response to the application of a voltage; and an upper electrode covering the organic layer. In addition, the rib layer has a first slit surrounding the display area in at least one of the plurality of panel parts.

[0010] According to the above-mentioned configurations, the yield rate of the display device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a diagram showing a configuration example of a display device according to the first embodiment.

[0012] Figure 2 It is a schematic plan view showing an example of the layout of sub-pixels.

[0013] Figure 3 It is along Figure 2 Schematic cross-sectional view of the display panel taken along line III-III.

[0014] Figure 4 This is a schematic plan view of the mother substrate according to the first embodiment.

[0015] Figure 5 This is a schematic plan view of a portion of the mother substrate according to the first embodiment.

[0016] Figure 6 It is a schematic plan view showing an example of partition walls arranged in the blank area, the peripheral area, and the inspection area.

[0017] Figure 7 It is along Figure 6 Schematic cross-sectional view of the mother substrate along line VII-VII.

[0018] Figure 8 This is a rough top view of the cutting line between the blank area and the inspection area and its vicinity.

[0019] Fig. 9 It is along Figure 8 Schematic cross-sectional view of the mother substrate along line IX-IX.

[0020] Fig.10 It is along Figure 8Schematic cross-sectional view of the mother substrate along line XX in FIG.

[0021] Fig.11A It is a schematic cross-sectional view showing the process of forming a panel portion on a mother substrate.

[0022] Fig. 11B It shows that Fig.11A A schematic cross-sectional diagram of the process.

[0023] Fig. 11C It shows that Fig. 11B A schematic cross-sectional diagram of the process.

[0024] Fig.11D It shows that Fig. 11C A schematic cross-sectional diagram of the process.

[0025] Fig.11E It shows that Fig.11D A schematic cross-sectional diagram of the process.

[0026] Fig.11F It shows that Fig.11E A schematic cross-sectional diagram of the process.

[0027] Fig.11G It shows that Fig.11F A schematic cross-sectional diagram of the process.

[0028] Fig.11H It shows that Fig.11G A schematic cross-sectional diagram of the process.

[0029] Fig.11I It shows that Fig.11H A schematic cross-sectional diagram of the process.

[0030] Fig.12 It is shown Figure 7 A schematic cross-sectional view showing the effect of the overhang structure.

[0031] Fig.13 It is shown Fig. 9 A schematic cross-sectional view showing the effect of the overhang structure.

[0032] Fig.14 It is shown Fig.10 A schematic cross-sectional view showing the effect of the overhang structure.

[0033] Fig.15 It is a schematic plan view showing the structure of a mother substrate or a display device according to the second embodiment.

[0034] Fig.16 It is along Fig.15 Schematic cross-sectional view of the mother substrate along line XVI-XVI in FIG.

[0035] Fig.17 This is a schematic cross-sectional view showing the effects of the second embodiment. DETAILED DESCRIPTION

[0036] Several embodiments are described with reference to the accompanying drawings.

[0037] The disclosed content is only an example, and appropriate changes that can be easily thought of by those skilled in the art while maintaining the main idea of ​​the invention are certainly included in the scope of the present invention. In addition, in order to make the description clearer, the drawings sometimes roughly show the width, thickness, shape, etc. of each part compared with the actual way, but it is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, the same reference numerals are marked for the constituent elements that perform the same or similar functions as the constituent elements previously described in the figures that have appeared, and repeated detailed descriptions are sometimes appropriately omitted.

[0038] It should be noted that in the drawings, mutually orthogonal X-axis, Y-axis and Z-axis are recorded as needed for easy understanding. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction of the plane including the X-direction and the Y-direction. In addition, observing various elements parallel to the Z-direction is called a top view.

[0039] The display device involved in each embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be mounted on various electronic devices such as televisions, personal computers, vehicle-mounted equipment, tablet terminals, smartphones, mobile phone terminals, wearable terminals, etc.

[0040] [First embodiment]

[0041] Figure 1 1 is a diagram showing a configuration example of a display device DSP according to the first embodiment. The display device DSP includes a display panel PNL including an insulating substrate 10. The display panel PNL includes a display area DA for displaying an image and a peripheral area SA around the display area DA. The substrate 10 may be glass or a flexible resin film.

[0042] In the present embodiment, the shape of the substrate 10 in plan view is a rectangle, but the shape of the substrate 10 in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0043] The display area DA has a plurality of pixels PX arranged in a matrix in the X direction and the Y direction. The pixel PX includes a plurality of sub-pixels SP that display different colors. In the present embodiment, it is assumed that the pixel PX includes a blue sub-pixel SP1, a green sub-pixel SP2, and a red sub-pixel SP3. However, the pixel PX may also include a sub-pixel SP of another color such as white together with the sub-pixels SP1, SP2, and SP3 or instead of any of the sub-pixels SP1, SP2, and SP3.

[0044] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0045] In the display area DA, a plurality of scanning lines GL for supplying scanning signals to the pixel circuits 1 of the sub-pixels SP, a plurality of signal lines SL for supplying video signals to the pixel circuits 1 of the sub-pixels SP, and a plurality of power supply lines PL are arranged. Figure 1 In the example of FIG. 5 , the scanning lines GL and the power lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0046] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4. In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0047] It should be noted that the configuration of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0048] Figure 2 is a schematic top view showing an example of the layout of sub-pixels SP1, SP2, and SP3. Figure 2 In the example of FIG. 1 , the sub-pixels SP2 and SP3 are arranged in the X direction with the sub-pixel SP1. In addition, the sub-pixel SP2 and the sub-pixel SP3 are arranged in the Y direction.

[0049] When the sub-pixels SP1, SP2, and SP3 are arranged in this way, columns in which the sub-pixels SP2 and SP3 are alternately arranged in the Y direction and columns in which a plurality of sub-pixels SP1 are repeatedly arranged in the Y direction are formed in the display area DA. These columns are alternately arranged in the X direction. It should be noted that the layout of the sub-pixels SP1, SP2, and SP3 is not limited to Figure 2 Example.

[0050] The rib layer 5 is disposed in the display area DA. The rib layer 5 has pixel openings AP1, AP2, and AP3 in the sub-pixels SP1, SP2, and SP3, respectively. Figure 2 In the example, the pixel opening AP1 is larger than the pixel opening AP2, and the pixel opening AP2 is larger than the pixel opening AP3. That is, among the sub-pixels SP1, SP2, and SP3, the sub-pixel SP1 has the largest aperture ratio, and the sub-pixel SP3 has the smallest aperture ratio.

[0051] The sub-pixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1 respectively overlapping with the pixel opening AP1. The sub-pixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2 respectively overlapping with the pixel opening AP2. The sub-pixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3 respectively overlapping with the pixel opening AP3.

[0052] The lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 that overlaps with the pixel opening AP1 constitute the display element DE1 of the sub-pixel SP1. The lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 that overlaps with the pixel opening AP2 constitute the display element DE2 of the sub-pixel SP2. The lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 that overlaps with the pixel opening AP3 constitute the display element DE3 of the sub-pixel SP3. The display elements DE1, DE2, and DE3 may also include a cover layer described later. The rib layer 5 surrounds each of these display elements DE1, DE2, and DE3.

[0053] A conductive partition wall 6A (first partition wall) is disposed above the rib layer 5. The partition wall 6A overlaps the rib layer 5 as a whole and has the same planar shape as the rib layer 5. That is, the partition wall 6A has openings in the sub-pixels SP1, SP2, and SP3, respectively. From another point of view, the rib layer 5 and the partition wall 6A are lattice-shaped when viewed from above, and surround each of the display elements DE1, DE2, and DE3. The partition wall 6A has the function of serving as a wiring for supplying a common voltage to the upper electrodes UE1, UE2, and UE3.

[0054] Figure 3 is along Figure 2 A schematic cross-sectional view of the display panel PNL taken along line III-III in FIG. A circuit layer 11 is disposed on the substrate 10. The circuit layer 11 includes Figure 1 The circuit layer 11 is covered with an organic insulating layer 12. The organic insulating layer 12 functions as a planarizing film that planarizes the unevenness generated by the circuit layer 11.

[0055] The lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. The rib layer 5 is disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the rib layer 5. The lower electrodes LE1, LE2, and LE3 are connected to the pixel circuit 1 of the circuit layer 11 through contact holes provided in the organic insulating layer 12. Figure 3 The cross section is not shown.

[0056] The partition wall 6A includes a conductive lower portion 61 disposed on the rib layer 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a greater width than the lower portion 61. Thus, both ends of the upper portion 62 protrude from the side surfaces of the lower portion 61. Such a shape of the partition wall 6A is called an overhang.

[0057] exist Figure 3 In the example of the embodiment, the lower portion 61 has a bottom layer 63 disposed on the rib layer 5, and a shaft layer 64 disposed on the bottom layer 63. For example, the bottom layer 63 is formed thinner than the shaft layer 64. Figure 3 In the example, both ends of the bottom layer 63 protrude from the side surfaces of the shaft layer 64 .

[0058] The organic layer OR1 passes through the pixel opening AP1 and covers the lower electrode LE1. The upper electrode UE1 covers the organic layer OR1 and is opposite to the lower electrode LE1. The organic layer OR2 passes through the pixel opening AP2 and covers the lower electrode LE2. The upper electrode UE2 covers the organic layer OR2 and is opposite to the lower electrode LE2. The organic layer OR3 passes through the pixel opening AP3 and covers the lower electrode LE3. The upper electrode UE3 covers the organic layer OR3 and is opposite to the lower electrode LE3. The upper electrodes UE1, UE2, and UE3 are in contact with the side surface of the lower portion 61 of the partition wall 6A.

[0059] The display element DE1 includes a cover layer CP1 covering the upper electrode UE1. The display element DE2 includes a cover layer CP2 covering the upper electrode UE2. The display element DE3 includes a cover layer CP3 covering the upper electrode UE3. The cover layers CP1, CP2, and CP3 respectively function as optical adjustment layers for improving the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3.

[0060] In the following description, the multilayer body including the organic layer OR1, the upper electrode UE1 and the cover layer CP1 is referred to as the stacked film FL1, the multilayer body including the organic layer OR2, the upper electrode UE2 and the cover layer CP2 is referred to as the stacked film FL2, and the multilayer body including the organic layer OR3, the upper electrode UE3 and the cover layer CP3 is referred to as the stacked film FL3.

[0061] A portion of the laminate film FL1 is located above the upper portion 62. This portion is separated from the portion of the laminate film FL1 located around the partition wall 6A (the portion constituting the display element DE1). Similarly, a portion of the laminate film FL2 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL2 located around the partition wall 6A (the portion constituting the display element DE2). In addition, a portion of the laminate film FL3 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL3 located around the partition wall 6A (the portion constituting the display element DE3).

[0062] Seal layers SE11, SE12, and SE13 are respectively arranged in sub-pixels SP1, SP2, and SP3. Seal layer SE11 continuously covers cap layer CP1 and partition walls 6A around sub-pixel SP1. Seal layer SE12 continuously covers cap layer CP2 and partition walls 6A around sub-pixel SP2. Seal layer SE13 continuously covers cap layer CP3 and partition walls 6A around sub-pixel SP3.

[0063] exist Figure 3 In the example, the laminated film FL1 and the sealing layer SE11 on the partition wall 6A between the sub-pixels SP1 and SP2 are separated from the laminated film FL2 and the sealing layer SE12 on the partition wall 6A. In addition, the laminated film FL1 and the sealing layer SE11 on the partition wall 6A between the sub-pixels SP1 and SP3 are separated from the laminated film FL3 and the sealing layer SE13 on the partition wall 6A.

[0064] The sealing layers SE11, SE12, and SE13 are covered by the resin layer RS1. The resin layer RS1 is covered by the sealing layer SE2. The sealing layer SE2 is covered by the resin layer RS2. The resin layers RS1, RS2, and the sealing layer SE2 are continuously provided at least over the entire display area DA, and a part of them also reaches the peripheral area SA.

[0065] A cover member such as a polarizing plate, a touch panel, a protective film or a cover glass may be further disposed on the resin layer RS2. Such a cover member may be bonded to the resin layer RS2 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0066] The organic insulating layer 12 is formed of an organic insulating material such as polyimide. The rib layer 5 and the sealing layers SE11, SE12, SE13, SE2 are formed of inorganic insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx) or silicon oxynitride (SiON). In one example, the rib layer 5 is formed of silicon oxynitride, and the sealing layers SE11, SE12, SE13, SE2 are formed of silicon nitride. The resin layers RS1 and RS2 are formed of resin materials (organic insulating materials) such as epoxy resin and acrylic resin.

[0067] The lower electrodes LE1, LE2, and LE3 include a reflective layer formed of, for example, silver, and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer may be formed of, for example, a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0068] The upper electrodes UE1, UE2, UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg), etc. For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrodes UE1, UE2, UE3 correspond to cathodes.

[0069] The organic layers OR1, OR2, and OR3 are composed of a plurality of thin films including a light-emitting layer. In one example, the organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer are sequentially stacked along the Z direction. However, the organic layers OR1, OR2, and OR3 may also have other structures such as a so-called tandem structure including a plurality of light-emitting layers.

[0070] The cover layers CP1, CP2, and CP3, for example, have a stacked structure formed by overlapping multiple transparent layers. These transparent layers may include layers formed by inorganic materials and layers formed by organic materials. In addition, these transparent layers have different refractive indices from each other. For example, the refractive indices of these transparent layers are different from the refractive indices of the upper electrodes UE1, UE2, and UE3 and the refractive indices of the sealing layers SE11, SE12, and SE13. It should be noted that at least one of the cover layers CP1, CP2, and CP3 may also be omitted.

[0071] The bottom layer 63 and the shaft layer 64 of the next wall 6A are formed of metal materials. As the metal material of the bottom layer 63, for example, molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW) or molybdenum-niobium alloy (MoNb) can be used. As the metal material of the shaft layer 64, for example, aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY) or aluminum-silicon alloy (AlSi) can be used. It should be noted that the shaft layer 64 can also be formed of an insulating material.

[0072] For example, the upper portion 62 of the partition wall 6A has a laminated structure of a lower layer formed of a metal material and an upper layer formed of a conductive oxide. As the metal material forming the lower layer, for example, titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy or molybdenum-niobium alloy can be used. As the conductive oxide forming the upper layer, for example, ITO or IZO can be used. It should be noted that the upper portion 62 may also have a single-layer structure of a metal material. In addition, the upper portion 62 may include a layer formed of an insulating material.

[0073] The common voltage is supplied to the partition wall 6A. The common voltage is supplied to the upper electrodes UE1, UE2, UE3 in contact with the side surface of the lower portion 61. The lower electrodes LE1, LE2, LE3 are supplied with pixel voltages corresponding to the video signals of the signal lines SL through the pixel circuits 1 of the sub-pixels SP1, SP2, SP3, respectively.

[0074] The organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, when a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer of the organic layer OR1 emits light in the blue band. When a potential difference is formed between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer of the organic layer OR2 emits light in the green band. When a potential difference is formed between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer of the organic layer OR3 emits light in the red band.

[0075] As another example, the light-emitting layers of the organic layers OR1, OR2, and OR3 may also emit light of the same color (for example, white). In this case, the display device DSP may also include a color filter that converts the light emitted by the light-emitting layer into light of a color corresponding to the sub-pixels SP1, SP2, and SP3. In addition, the display device DSP may also include a layer including quantum dots that are excited by the light emitted by the light-emitting layer to generate light of a color corresponding to the sub-pixels SP1, SP2, and SP3.

[0076] When manufacturing the display device DSP, a large mother substrate is produced on which a plurality of regions (panel portions) corresponding to the display panels PNL are formed. The following description is applicable to the configuration of the mother substrate.

[0077] Figure 4 This is a schematic top view of the mother substrate MB (mother substrate for display device) of this embodiment. The mother substrate MB is rectangular, for example, as shown in the figure, but can also be other shapes such as circular. The mother substrate MB has a plurality of panel parts PP arranged in a matrix and blank areas BA around these panel parts PP.

[0078] exist Figure 4 In the example of FIG. 1 , a blank area BA is provided between the panel parts PP adjacent to each other in the X direction and between the panel parts PP adjacent to each other in the Y direction. As another example, the panel parts PP arranged in the X direction may be adjacent to each other without the blank area BA. In addition, the panel parts PP arranged in the Y direction may be adjacent to each other without the blank area BA.

[0079] Figure 5 It is a schematic plan view of a part of the mother substrate MB. The outer shape of each panel unit PP corresponds to the cutting line CL1 for cutting the panel unit PP from the mother substrate MB.

[0080] Each panel portion PP has the above-mentioned display area DA and peripheral area SA. In addition, each panel portion PP has an inspection area TA. An inspection pad for inspecting the operation of the display panel PNL is arranged in the inspection area TA (see Figure 8 ).

[0081] A cutting line CL2 is formed between the peripheral area SA and the inspection area TA. When manufacturing the display device DSP, the panel portion PP is first cut out from the mother substrate MB along the cutting line CL1. Then, the cut panel portion PP is subjected to the above-mentioned inspection. After the inspection, the inspection area TA is cut out from the panel portion PP along the cutting line CL2.

[0082] In the present embodiment, partition walls 6B (second partition walls) are arranged in the blank area BA, the peripheral area SA, and the inspection area TA. Figure 5 In FIG. 1 , a grid-like pattern is indicated in the region where the partition 6B can be arranged. It should be noted that the grid-like pattern does not represent the shape of the partition 6B itself.

[0083] From the viewpoint of efficiently cutting out the panel portion PP, it is preferable that the partition wall 6B is not provided on the cutting line CL1. Similarly, it is preferable that the partition wall 6B is not provided on the cutting line CL2.

[0084] Figure 6 1 is a schematic plan view showing an example of a partition wall 6B arranged in the blank area BA, the peripheral area SA, and the inspection area TA. The partition wall 6B has a plurality of sections SG separated from each other. Figure 6 In the example of , these segments SG have the same shape and are arranged in the X direction and the Y direction. The segment SG is a quadrilateral (rectangle or square) having two sides extending in the X direction and two sides extending in the Y direction.

[0085] The segment SG has three openings APa, APb, and APc. The openings APa, APb, and APc are arranged in the same layout as the pixel openings AP1, AP2, and AP3, for example. Figure 6 In the example, the openings APb and APc are arranged in the X direction with the opening APa. In addition, the openings APb and APc are arranged in the Y direction. In addition, the openings APb and APc are smaller than the opening APa. The sizes of the openings APb and APc are, for example, the same, but may be different from each other.

[0086] The segment SG has a width Wx in the X direction and a width Wy in the Y direction. The widths Wx and Wy are, for example, respectively greater than the width of the pixel PX in the X direction and the width in the Y direction, but are not limited to this example. The widths Wx and Wy may be the same or different from each other.

[0087] It should be noted that it is not necessary to configure the blank area BA, the surrounding area SA, and the inspection area TA as a whole. Figure 6 Segments SG of other shapes may be arranged in at least a part of the blank area BA, the peripheral area SA, and the inspection area TA.

[0088] In addition, the shape of the segment SG is not limited to Figure 6 The quadrilateral shown may be other polygons or may include a curved outline. The number and shape of the openings in the segment SG are also not limited to Figure 6 Example.

[0089] exist Figure 6 In FIG. 5 , the region with the dot pattern corresponds to the rib layer 5 . The rib layer 5 is formed not only in the display area DA but also in the blank area BA, the peripheral area SA and the inspection area TA. Each segment SG is provided on the rib layer 5 .

[0090] The rib layer 5 has slits SLa between adjacent segments SG. Figure 6 In the example of FIG. 1 , the slits SLa are lattice-shaped and include a portion extending in the X direction and a portion extending in the Y direction. The slits SLa surround each of the plurality of segments SG. However, a part of the plurality of segments SG may not be surrounded by the slits SLa.

[0091] The rib layer 5 also has Figure 4 The slit SLb and Figure 5 The slit SLc shown in FIG. 1 is provided along the edge Emb of the mother substrate MB, surrounding the plurality of panel portions PP. The slit SLc is provided along the cutting line CL1 of the panel portion PP, surrounding at least the display area DA. Figure 5 In the example shown in FIG. 5 , the slit SLc also surrounds most of the surrounding area SA and the inspection area TA.

[0092] Figure 7 It is along Figure 6 Schematic cross-sectional view of the mother substrate MB taken along line VII-VII in FIG. Figure 3 The circuit layer 11 shown includes a plurality of metal layers and semiconductor layers, and a plurality of insulating layers disposed therebetween. Figure 7 In the example of FIG. 1 , as an example of a plurality of insulating layers included in the circuit layer 11 , inorganic insulating layers 31 and 32 and an organic insulating layer 33 stacked in sequence in the Z direction are shown.

[0093] The inorganic insulating layers 31 and 32 may be formed of inorganic insulating materials such as silicon nitride, silicon oxide, or silicon oxynitride. In one example, the inorganic insulating layer 31 is formed of silicon nitride or silicon oxide, and the inorganic insulating layer 32 is formed of silicon nitride. The organic insulating layer 33 is formed of an organic insulating material such as polyimide, similarly to the organic insulating layer 12.

[0094] The partition walls 6B are arranged on the rib layer 5 in the same manner as the partition walls 6A. Figure 7 In the example of FIG. 6B, the inorganic insulating layers 31 and 32 and the organic insulating layers 12 and 33 are arranged below the partition wall 6B. However, in at least a portion of the blank area BA, the peripheral area SA, and the inspection area TA, at least one of the inorganic insulating layers 31 and 32 and the organic insulating layers 12 and 33 may not be arranged below the partition wall 6B.

[0095] Similar to the partition wall 6A, the partition wall 6B includes a lower portion 61 and an upper portion 62. The lower portion 61 of the partition wall 6B includes a bottom layer 63 and an axial layer 64. In the partition wall 6B, the end of the upper portion 62 also protrudes from the side surface of the lower portion 61 (axial layer 64).

[0096] In the openings APa, APb, and APc, no opening is provided in the rib layer 5. In the slits SLa, the organic insulating layer 12 is exposed from the rib layer 5.

[0097] The organic insulating layer 12 has a groove 12a (concave portion) overlapping the slit SLa. The planar shape of the groove 12a is similar to Figure 6 The planar shapes of the slits SLa shown are the same.

[0098] For example, the edge E5a of the rib layer 5 along the slit SLa is tapered in a manner that the thickness decreases as it approaches the front end. Figure 7 In the example of FIG. 1 , the edge portion E5a protrudes above the groove 12a. That is, the overhang structure OH1 along the slit SLa is formed by the edge portion E5a and the groove 12a.

[0099] Figure 4 The slit SLb and Figure 5 The cross-sectional structure of the slit SLc shown is similar to Figure 7 The cross-sectional structure of the slit SLa shown is the same. That is, the organic insulating layer 12 has a groove 12a overlapping the slits SLb and SLc, and the edge E5a of the rib layer 5 along the slits SLb and SLc protrudes upward from the groove 12a. Thus, an overhang structure OH1 is formed along the slits SLb and SLc.

[0100] It should be noted that the overhang structure OH1 along the slits SLa and SLc also remains in the panel portion PP cut out from the mother substrate MB and in the display panel PNL after the inspection area TA of the panel portion PP is cut along the cutting line CL2.

[0101] Figure 8 1 is a schematic plan view of the cutting line CL1 between the blank area BA and the inspection area TA and its vicinity. The area with the dot pattern corresponds to the rib layer 5.

[0102] In the inspection area TA, a plurality of inspection pads PD used for the above inspection are arranged. The rib layer 5 has an opening APr overlapping with the inspection pad PD. In addition, the organic insulating layer 12, 33 has an opening APo overlapping with the opening APr.

[0103] In addition, the rib layer 5 has slits SLd along the cutting line CL1. Figure 8 The illustration is omitted, but Figure 5 The slit SLc shown can be located between the inspection pad PD and the cutting line CL1, or can be located between the inspection pad PD and the cutting line CL1. Figure 8 Above the inspection pad PD (between the inspection pad PD and the display area DA).

[0104] Fig. 9 It is along Figure 8 Schematic cross-sectional view of the mother substrate MB taken along line IX-IX in FIG. The circuit layer 11 has a metal layer ML in addition to the inorganic insulating layers 31 and 32 and the organic insulating layer 33. The metal layer ML is disposed on the inorganic insulating layer 32 to form the inspection pad PD.

[0105] The metal layer ML is exposed through the openings APo of the organic insulating layers 12 and 33 and the openings APr of the rib layer 5. Fig. 9 In the example of FIG. 1 , the edge portion of the organic insulating layer 33 located near the opening APo is covered by the organic insulating layer 12 . As another example, the edge portion of the organic insulating layer 33 may be exposed from the organic insulating layer 12 .

[0106] The edge portion E5b of the rib layer 5 along the opening APr is tapered in thickness as it approaches the front end, and is located above the organic insulating layer 12. The organic insulating layer 12 has a recess 12b that overlaps the opening APr. The edge portion E5b protrudes above the recess 12b. That is, the overhang structure OH2 along the opening APr is formed by the edge portion E5b and the recess 12b.

[0107] Fig.10 It is along Figure 8 Schematic cross-sectional view of the mother substrate MB taken along line XX in FIG. The organic insulating layers 12 and 33 are not provided near the cut line CL1. The rib layer 5 is in contact with the inorganic insulating layer 32 near the slit SLd.

[0108] The edge E5c of the rib layer 5 along the slit SLd is tapered in a manner that decreases in thickness as it approaches the front end. Fig.10In the example of FIG. 5 , the inorganic insulating layer 32 is not provided in the slit SLd. The edge portion E5c of the rib layer 5 protrudes from the edge portion E32 of the inorganic insulating layer 32 along the slit SLd. That is, the overhang structure OH3 along the slit SLd is formed by the edge portion E5c and the inorganic insulating layer 32.

[0109] In the mother substrate MB, the overhang structure OH3 is formed along the outer shape (cutting line CL1) of each of the plurality of panel parts PP. In addition, the overhang structure OH3 also remains in the panel part PP cut out from the mother substrate MB, and in the display panel PNL after the inspection area TA of the panel part PP is cut along the cutting line CL2. Specifically, in the display panel PNL, the overhang structure OH3 is formed along the outer shape (cutting line CL1) of each of the plurality of panel parts PP. Figure 5 An overhang structure OH3 is formed at the edge of the substrate 10 corresponding to the cut line CL1 shown.

[0110] It should be noted that the inorganic insulating layer 32 does not have to be completely removed in the slit SLd. For example, the thickness of the portion of the inorganic insulating layer 32 overlapping the slit SLd may be reduced compared to other portions. Even in this case, the overhang structure OH3 can be formed by making the edge portion E5c protrude above the inorganic insulating layer 32 whose thickness has been reduced.

[0111] exist Fig.10 In the example of FIG. 1 , the inorganic insulating layer 31 is formed in the slit SLd. As another example, the inorganic insulating layer 31 may be removed in the slit SLd. Alternatively, the thickness of the inorganic insulating layer 31 may be reduced in the slit SLd.

[0112] Next, an example of a method for manufacturing the display device DSP is described. FIG. 11A to FIG. 11I 2 is a schematic cross-sectional view showing a process of forming a panel portion PP on a mother substrate MB. FIG. 11A to FIG. 11I In FIG. 1 , the focus is mainly on the display area DA, and elements below the organic insulating layer 12 are omitted.

[0113] When forming the panel portion PP, first, a circuit layer 11 and an organic insulating layer 12 are formed on the substrate 10 of the mother substrate MB. Fig.11A As shown, lower electrodes LE1 , LE2 , and LE3 are formed on the organic insulating layer 12 .

[0114] Then, if Fig. 11B As shown, the rib layer 5 covering the organic insulating layer 12 and the lower electrodes LE1, LE2, LE3 is formed on the entire mother substrate MB. The rib layer 5 can be formed by, for example, CVD (Chemical Vapor Deposition).

[0115] In addition, if Fig. 11CAs shown, the partition wall 6A is formed on the rib layer 5. Specifically, first, a layer that becomes the base of the bottom layer 63, the shaft layer 64 and the upper layer 62 is formed, and these layers are patterned by etching. It should be noted that Figure 7 The partition wall 6B shown is formed by the same process as the partition wall 6A.

[0116] After the formation of the partition walls 6A and 6B, Fig.11D As shown, pixel openings AP1, AP2, and AP3 are formed on the rib layer 5 by dry etching. It should be noted that, in addition to this process, multiple dry etchings are also performed on the rib layer 5. For example, these dry etchings include: etching for forming contact holes in the rib layer 5, the contact holes are used to connect the partition wall 6A to the power supply line on the same layer as the lower electrodes LE1, LE2, and LE3 in the peripheral area SA; Figure 8 The slits SLa, SLb, SLc, and SLd of the rib layer 5 can be formed by any of these etching methods.

[0117] After the rib layer 5 and the partitions 6A and 6B are formed, a process for forming display elements DE1, DE2, and DE3 is performed. In this embodiment, it is assumed that the display element DE1 is formed first, the display element DE2 is formed next, and the display element DE3 is formed last. However, the order of forming the display elements DE1, DE2, and DE3 is not limited to this example.

[0118] In forming the display element DE1, firstly Fig.11E As shown in FIG. 1 , a laminated film FL1 and a sealing layer SE11 are formed. Figure 3 As shown, the laminated film FL1 includes an organic layer OR1 in contact with the lower electrode LE1 through the pixel opening AP1, an upper electrode UE1 covering the organic layer OR1, and a cap layer CP1 covering the upper electrode UE1. The organic layer OR1, the upper electrode UE1, and the cap layer CP1 are formed by evaporation. In addition, the sealing layer SE11 is formed by CVD.

[0119] The laminate film FL1 and the sealing layer SE11 are formed not only in the display area DA of each panel part PP, but also in the entire mother substrate MB including the peripheral area SA, the inspection area TA and the blank area BA. The laminate film FL1 is cut into a plurality of parts by the overhanging partitions 6A and 6B. The sealing layer SE11 continuously covers the cut parts of the laminate film FL1 and the partitions 6A and 6B.

[0120] Next, the laminate film FL1 and the sealing layer SE11 are patterned. In this patterning, Fig.11F As shown in FIG. 1 , a resist R is disposed on the sealing layer SE11 . The resist R covers the sub-pixel SP1 and a part of the partition wall 6A around it.

[0121] After that, by etching with the resist R as a mask, as Fig.11G As shown, the portions of the laminated film FL1 and the sealing layer SE11 exposed from the resist R are removed. In other words, the portions of the laminated film FL1 and the sealing layer SE11 overlapping with the lower electrode LE1 are left, and the other portions are removed. Thus, a display element DE1 is formed in the sub-pixel SP1. For example, in the peripheral area SA, the inspection area TA, and the blank area BA, the laminated film FL1 and the sealing layer SE11 are removed by the etching. The etching may include wet etching and dry etching sequentially performed on the sealing layer SE11, the cover layer CP1, the upper electrode UE1, and the organic layer OR1. After these etchings, the resist R is removed.

[0122] The display element DE2 is formed in the same steps as the display element DE1. That is, in the formation of the display element DE2, the stacked film FL2 and the sealing layer SE12 are formed on the entire mother substrate MB. Figure 3 As shown, the stacked film FL2 includes an organic layer OR2 in contact with the lower electrode LE2 through the pixel opening AP2, an upper electrode UE2 covering the organic layer OR2, and a cap layer CP2 covering the upper electrode UE2.

[0123] The organic layer OR2, the upper electrode UE2 and the cap layer CP2 are formed by evaporation. In addition, the sealing layer SE12 is formed by CVD. The laminate film FL2 is cut into a plurality of parts by the overhanging partition walls 6A and 6B. The sealing layer SE12 continuously covers the cut parts of the laminate film FL2 and the partition walls 6A and 6B. By patterning the laminate film FL2 and the sealing layer SE2, as shown in FIG. Fig.11H As shown, the display element DE2 is formed in the sub-pixel SP2. For example, in the peripheral area SA, the inspection area TA, and the blank area BA, the laminated film FL2 and the sealing layer SE12 are removed by etching during the patterning.

[0124] The display element DE3 is formed in the same steps as the display elements DE1 and DE2. That is, in the formation of the display element DE3, the stacked film FL3 and the sealing layer SE13 are formed on the entire mother substrate MB. Figure 3 As shown, the stacked film FL3 includes an organic layer OR3 in contact with the lower electrode LE3 through the pixel opening AP3, an upper electrode UE3 covering the organic layer OR3, and a cap layer CP3 covering the upper electrode UE3.

[0125] The organic layer OR3, the upper electrode UE3 and the cap layer CP3 are formed by evaporation. In addition, the sealing layer SE13 is formed by CVD. The laminate film FL3 is cut into a plurality of parts by the overhanging partition walls 6A and 6B. The sealing layer SE13 continuously covers the cut parts of the laminate film FL3 and the partition walls 6A and 6B. By patterning the laminate film FL3 and the sealing layer SE13, as shown in FIG. Fig.11I As shown, the display element DE3 is formed in the sub-pixel SP3. For example, in the peripheral area SA, the inspection area TA, and the blank area BA, the laminated film FL3 and the sealing layer SE13 are removed by etching during the patterning.

[0126] After forming the display elements DE1, DE2, and DE3, Figure 3 The resin layer RS1, the sealing layer SE2 and the resin layer RS2 are shown. Furthermore, each panel portion PP is cut out from the mother substrate MB along the cutting line CL1.

[0127] Then, each panel unit PP is inspected. This inspection includes lighting inspection of each display element DE1, DE2, DE3 using the inspection pads arranged in the inspection area TA. After the inspection, the inspection area TA is cut along the cutting line CL2. Thus, the display panel PNL is completed.

[0128] In addition, in the peripheral area SA, the inspection area TA, and the blank area BA, at least one of the laminated films FL1, FL2, and FL3 may not be removed but may remain.

[0129] As described above, the rib layer 5 is dry-etched a plurality of times. Figure 7 , Fig. 9 and Fig.10 The overhang structures OH1, OH2, and OH3 respectively shown in FIG. 5 are formed, for example, by any of these dry etchings.

[0130] That is, in the formation of Figure 7 In the dry etching of the slit SLa shown in FIG. 1 , the organic insulating layer 12 below the rib layer 5 is also eroded by the slit SLa, thereby forming a groove 12a in the organic insulating layer 12. Thus, an overhang structure OH1 is formed. Figure 4 and Figure 5 Similarly, regarding the slits SLb and SLc shown, the organic insulating layer 12 is corroded by dry etching when forming these slits SLb and SLc, thereby forming the overhang structure OH1.

[0131] In addition, in the formation of Fig. 9In the dry etching of the opening APr shown, the organic insulating layer 12 below the rib layer 5 is also eroded through the opening APr, thereby forming a recess 12b in the organic insulating layer 12. Thus, an overhang structure OH2 is formed.

[0132] In addition, in the formation of Fig.10 In the dry etching of the slit SLd shown, the inorganic insulating layer 32 below the rib layer 5 is also eroded through the slit SLd. Thus, an overhang structure OH3 is formed. It should be noted that in order to form an overhang structure OH3 with a good shape, the rib layer 5 and the inorganic insulating layer 32 are preferably formed of different inorganic insulating materials so that the etching rate of the inorganic insulating layer 32 in the dry etching is higher than the etching rate of the rib layer 5. In one example, such a difference in etching rate can be achieved by forming the inorganic insulating layer 32 from silicon nitride and forming the rib layer 5 from silicon oxynitride.

[0133] It should be noted that the overhang structures OH1, OH2, and OH3 can also be formed by a combination of dry etching and other etching for processing the rib layer 5. That is, the groove 12a of the overhang structure OH1 can also be formed by other etching performed after the slits SLa, SLb, and SLc are formed in the rib layer 5. In addition, the recess 12b of the overhang structure OH2 can also be formed by other etching performed after the opening APr is formed in the rib layer 5. In addition, the overhang structure OH3 can also be formed by corroding the inorganic insulating layer 32 by other etching performed after the slit SLd is formed in the rib layer 5.

[0134] Here, some effects achieved by this embodiment are described. When forming the display elements DE1, DE2, and DE3, the laminated films FL1, FL2, and FL3 are formed on the entire mother substrate MB. The laminated films FL1, FL2, and FL3 formed by evaporation have weak adhesion to the substrate, so they may peel off from the substrate during the manufacturing process of the display device DSP. If the peeling is extended, the laminated films FL1, FL2, and FL3 and the sealing layers SE11, SE12, and SE13 thereon may peel off and may become undesirable particles.

[0135] In the display area DA, the laminated films FL1, FL2, and FL3 are finely interrupted by the grid-shaped partition walls 6A. Therefore, the laminated films FL1, FL2, and FL3 are not easily peeled off from the substrate. In addition, in the present embodiment, the partition walls 6B and the overhanging structures OH1, OH2, and OH3 can also suppress the peeling of the laminated films FL1, FL2, and FL3 in the peripheral area SA, the inspection area TA, and the blank area BA.

[0136] Fig.12 , Fig.13 and Fig.14The schematic cross-sectional views are respectively schematic cross-sectional views showing the effects of the overhang structures OH1, OH2, and OH3. Figure 7 , Fig. 9 and Fig.10 The laminated film FL1 is formed in the same position.

[0137] like Fig.12 As shown in FIG. 1 , the laminated film FL1 is divided into a plurality of parts by the partition wall 6B. Figure 6 As shown, the partition 6B includes a plurality of segments SG, and each segment SG has a plurality of openings APa, APb, and APc. According to such a configuration, the laminate film FL1 is finely divided in the region where the partition 6B is arranged, so that the effect of suppressing the laminate film FL1 from peeling is improved.

[0138] In addition, Fig.12 In the example of FIG. 5 , the laminated film FL1 is divided by the overhang structure OH1 . In this way, by dividing the laminated film FL1 also in the region between the segments SG, the effect of suppressing the peeling of the laminated film FL1 is further improved.

[0139] It should be noted that along Figure 4 The slit SLb and Figure 5 The overhang structure OH1 formed by the slit SLc shown in the figure also cuts off the stacked film FL1 in the same manner. Figure 4 In the peripheral portion of the mother substrate MB shown, it is difficult to form a layer that serves as a basis for the partition walls 6A and 6B and an etching resist for patterning these layers with a stable thickness. Therefore, the partition walls 6B cannot be formed in the peripheral portion of the mother substrate MB. Even in such a case, as long as the slits SLb surrounding the plurality of panel portions PP are provided, the laminated film FL1 can be cut in the peripheral portion of the mother substrate MB.

[0140] exist Fig.13 In the example of FIG. 1 , the laminated film FL1 is cut by the overhang structure OH2 . Thus, the laminated film FL1 can be cut along the outer shape of the inspection pad PD.

[0141] exist Fig.14 In the example, the laminated film FL1 is cut by the overhang structure OH3. In this way, even in a portion where the organic insulating layers 12 and 33 are not provided, such as near the cut line CL1, the laminated film FL1 can be cut by the overhang structure OH3 using the rib layer 5 and the inorganic insulating layer 32.

[0142] exist Figure 12 to Figure 14 2 shows an example in which the laminated film FL1 is divided, but the laminated films FL2 and FL3 are similarly divided by the partition walls 6B and the overhang structures OH1 , OH2 , and OH3 .

[0143] In the peripheral area SA, the inspection area TA and the blank area BA, if a large area conductor is formed by the partition 6B and the upper electrodes UE1, UE2, UE3, electrostatic discharge (ESD) is easily generated by the conductor. If electrostatic discharge occurs, the surrounding elements may be damaged.

[0144] In this regard, in the present embodiment, the partition wall 6B is divided into a plurality of segments SG, and the stacked films FL1, FL2, FL3 (upper electrodes UE1, UE2, UE3) are further divided by the overhang structures OH1, OH2, OH3. Therefore, during the manufacturing process of the display device DSP, it is possible to suppress the formation of a large-area conductor in the peripheral area SA, the inspection area TA, and the blank area BA.

[0145] As described above, according to the configuration of this embodiment, it is possible to suppress peeling of the laminated films FL1 , FL2 , and FL3 and electrostatic discharge, thereby improving the yield rate during the manufacture of the display device DSP and the mother substrate MB.

[0146] [Second embodiment]

[0147] Fig.15 1 is a schematic plan view showing the structure of the mother substrate MB or the display device DSP of the second embodiment. Figure 6 Similarly, the segments SG (partition walls 6B) arranged in the blank area BA, the peripheral area SA, and the inspection area TA are shown.

[0148] Fig.15 The shape and configuration of the segment SG shown are similar to Figure 6 The example is the same. However, in Fig.15 In the example of FIG. 5 , intersection portions 50 formed by the rib layer 5 are arranged at each intersection of the grid-shaped slits SLa. The rib layer 5 has a plurality of portions 51 divided by the grid-shaped slits SLa. Segments SG are arranged in each of the plurality of portions 51. The intersection portions 50 are separated from each of the plurality of portions 51.

[0149] exist Fig.15 In the example of FIG. 5 , the intersection portion 50 is a square. However, the intersection portion 50 may have other shapes such as a rectangle, a circle, or an ellipse. In addition, the intersection portion 50 does not necessarily have to be arranged at all the intersections of the slits SLa.

[0150] Fig.16 It is along Fig.15 Schematic cross-sectional view of the mother substrate MB taken along line XVI-XVI in FIG. As described above, the organic insulating layer 12 has the groove 12a overlapping the slit SLa.

[0151] For example, the edge E50 of the intersection 50 is tapered with a decreasing thickness as it approaches the front end. In addition, the edge E50 protrudes above the groove 12a. That is, the edge E50 and the groove 12a form an overhang structure OH4 along the outer shape of the intersection 50. For example, the overhang structure OH4 is formed on the entire periphery of the intersection 50.

[0152] Fig.17 is a schematic cross-sectional view showing the effect of this embodiment, showing Fig.16 The intersection 50 and its surroundings are formed with the laminated film FL1. Fig.12 Similar to the overhang structure OH1 shown, the stacked film FL1 is divided by the overhang structure OH4. The stacked films FL2 and FL3 are also divided by the overhang structure OH4.

[0153] In the first embodiment, the slits SLa surrounding the plurality of segments SG are continuous in a grid pattern (see Figure 6 ). In this case, the laminated films FL1, FL2, and FL3 formed during the manufacture of the display device DSP also become the same lattice shape as the slit SLa. Therefore, when the laminated films FL1, FL2, and FL3 are peeled off in the slit SLa, the range thereof is likely to expand within the slit SLa. In addition, the upper electrodes UE1, UE2, and UE3 included in the laminated films FL1, FL2, and FL3 also become large in area, and the possibility of electrostatic discharge is increased.

[0154] In contrast, in the present embodiment, the laminated films FL1, FL2, FL3 formed in the slit SLa are cut off by the intersection 50. Thus, peeling of the laminated films FL1, FL2, FL3 in the slit SLa can be suppressed. In addition, since it is difficult to form large-area upper electrodes UE1, UE2, UE3 in the slit SLa, electrostatic discharge near the slit SLa can also be suppressed.

[0155] Based on the display device, mother substrate and manufacturing method disclosed in the above embodiments, all display devices, mother substrates and manufacturing methods that can be implemented by technical personnel in this field through appropriate design changes also fall within the scope of the present invention as long as they include the main purpose of the present invention.

[0156] Within the scope of the present invention, those skilled in the art can think of various variations, which also belong to the scope of the present invention. For example, for the above-mentioned embodiments, those skilled in the art appropriately perform an embodiment in which constituent elements are added, deleted or the design is changed, or perform an embodiment in which a process is added, omitted or the condition is changed, and as long as they have the gist of the present invention, they are included in the scope of the present invention.

[0157] In addition, regarding other effects brought about by the methods described in the above embodiments, effects that are clear from the description of this specification, or effects that can be appropriately conceived by those skilled in the art are of course understood as effects brought about by the present invention.

Claims

1. A display device comprising: A substrate having a display area for displaying an image and a peripheral area around the display area; an organic insulating layer, formed of an organic insulating material and disposed above the substrate; A lower electrode, which is arranged above the organic insulating layer in the display area; a rib layer, formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping the lower electrode; a first partition wall disposed above the rib layer in the display region; an organic layer, which contacts the lower electrode through the pixel opening and emits light in response to application of a voltage; an upper electrode covering the organic layer and contacting the first partition wall; and a second partition wall disposed above the rib layer in the peripheral region, Each of the first partition wall and the second partition wall includes a lower portion disposed above the rib layer and an upper portion having an end portion protruding from a side surface of the lower portion. The second partition wall includes a plurality of sections separated from each other, The rib layer has a slit surrounding at least one of the plurality of segments.

2. The display device according to claim 1, wherein: The organic insulating layer has a groove overlapping the slit.

3. The display device according to claim 2, wherein: A first overhang structure is formed along the slit, in which an edge portion of the rib layer protrudes upward from the groove.

4. The display device according to claim 3, wherein: The organic layer and the upper electrode are arranged in the peripheral area, The organic layer and the upper electrode disposed in the peripheral region are interrupted by the first overhang structure.

5. The display device according to claim 1, wherein: Each of the plurality of sections has a plurality of openings.

6. The display device according to claim 1, wherein: The slits are in a grid shape including a plurality of intersections. The rib layer has an intersection portion arranged at at least one of the plurality of intersections.

7. The display device according to claim 6, wherein: The rib layer has a plurality of parts interrupted by the lattice-shaped slits, The intersection portion of the rib layer is separated from each of the plurality of portions.

8. The display device according to claim 6, wherein: The organic insulating layer has a groove overlapping the slit, The intersection of the rib layer is formed into an island shape in a plan view. A second overhang structure is formed on the outer periphery of the intersection portion, in which an edge portion of the intersection portion protrudes upward from the groove.

9. The display device according to claim 8, wherein: The second overhang structure is formed on the entire outer periphery of the intersection portion of the rib layer.

10. The display device according to claim 8, wherein: The organic layer and the upper electrode are arranged in the peripheral area, The organic layer and the upper electrode disposed in the peripheral region are interrupted by the second overhang structure.

11. A mother substrate for a display device, comprising: A substrate having a plurality of panel portions each including a display area and a peripheral area around the display area, and a blank area around the plurality of panel portions; an organic insulating layer, formed of an organic insulating material and disposed above the substrate; A lower electrode, which is arranged above the organic insulating layer in the display area; a rib layer, formed of an inorganic insulating material, covering the organic insulating layer and the lower electrode, and having a pixel opening overlapping the lower electrode; a first partition wall disposed above the rib layer in the display region; an organic layer, which contacts the lower electrode through the pixel opening and emits light in response to application of a voltage; an upper electrode covering the organic layer and contacting the first partition wall; and a second partition wall disposed above the rib layer in at least one of the peripheral region and the blank region, Each of the first partition wall and the second partition wall includes a lower portion disposed above the rib layer and an upper portion having an end portion protruding from a side surface of the lower portion. The second partition wall includes a plurality of sections separated from each other, The rib layer has a slit surrounding at least one of the plurality of segments.

12. The mother substrate for a display device according to claim 11, wherein: The organic insulating layer has a groove overlapping the slit.

13. The mother substrate for a display device according to claim 12, wherein: A first overhang structure is formed along the slit, in which an edge portion of the rib layer protrudes upward from the groove.

14. The mother substrate for a display device according to claim 13, wherein: The organic layer and the upper electrode are arranged in the peripheral area, The organic layer and the upper electrode disposed in the peripheral region are interrupted by the first overhang structure.

15. The mother substrate for a display device according to claim 11, wherein: Each of the plurality of sections has a plurality of openings.

16. The mother substrate for a display device according to claim 11, wherein: The slits are in a grid shape including a plurality of intersections. The rib layer has an intersection portion arranged at at least one of the plurality of intersections.

17. The mother substrate for a display device according to claim 16, wherein: The rib layer has a plurality of parts interrupted by the lattice-shaped slits, The intersection portion of the rib layer is separated from each of the plurality of portions.

18. The mother substrate for a display device according to claim 16, wherein: The organic insulating layer has a groove overlapping the slit, The intersection of the rib layer is formed into an island shape in a plan view. A second overhang structure is formed on the outer periphery of the intersection portion, in which an edge portion of the intersection portion protrudes upward from the groove.

19. The mother substrate for a display device according to claim 18, wherein: The second overhang structure is formed on the entire outer periphery of the intersection portion of the rib layer.

20. The mother substrate for a display device according to claim 18, wherein: The organic layer and the upper electrode are arranged in the peripheral area, The organic layer and the upper electrode disposed in the peripheral region are interrupted by the second overhang structure.

Images