Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a display area and a non-display area, and the non-display area comprises a first functional area, a wiring area and a second functional area which are sequentially close to the display area in the first direction; the wiring area comprises a plurality of first wires, at least part of the first wires comprise first conductive parts and second conductive parts, the first ends of the first conductive parts are electrically connected with the output end of the first functional area, the second ends of the first conductive parts are electrically connected with the first ends of the second conductive parts, and the second ends of the second conductive parts are electrically connected with the input end of the second functional area; the first conductive part and the second conductive part are located on different film layers. According to the embodiment of the invention, the routing design in the routing area can be optimized.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more common. The display panel includes a display area, in which sub-pixels and data lines are arranged. At least one side of the display area includes a non-display area, in which a driver chip and some functional areas, a wiring area, etc. are arranged, and wiring is arranged in the wiring area. The wiring in the wiring area is electrically connected to the driver chip and the data line, and the wiring in the wiring area is used to transmit the data signal provided by the driver chip to the data line.

[0003] How to optimize the routing of the routing area is an important issue faced by those skilled in the art. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a display device, which can optimize the wiring design in a wiring area.

[0005] In a first aspect, an embodiment of the present application provides a display panel, comprising a display area and a non-display area, the non-display area comprising a first functional area, a routing area, and a second functional area sequentially close to the display area in a first direction; the routing area comprises a plurality of first routings, at least some of the first routings comprise a first conductive part and a second conductive part, the first end of the first conductive part is electrically connected to the output end of the first functional area, the second end of the first conductive part is electrically connected to the first end of the second conductive part, the second end of the second conductive part is electrically connected to the input end of the second functional area, and the first conductive part and the second conductive part are located in different film layers.

[0006] In a second aspect, an embodiment of the present application provides a display device, comprising a display panel as described in the embodiment of the first aspect.

[0007] According to the display panel and the display device provided by the embodiments of the present application, the first routing line in the routing area includes a first conductive part and a second conductive part, and the first conductive part and the second conductive part are located in different film layers. That is to say, the first routing line is no longer limited to the same film layer. In this way, the routing form of the first routing line can be designed more flexibly to optimize the routing design in the routing area. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Other features, objects and advantages of the present application will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals represent the same or similar features and the accompanying drawings are not drawn to scale.

[0009] Figure 1 A schematic diagram showing the structure of a display panel provided in an embodiment of the present application is shown;

[0010] Figure 2 A schematic diagram showing a wiring diagram of a local area of ​​a display panel provided in an embodiment of the present application;

[0011] Figure 3 Show Figure 2 A schematic diagram of a layout structure of the middle area C1;

[0012] Figure 4 A schematic diagram showing a wiring diagram of a local area of ​​a display panel in a comparative example;

[0013] Figure 5 Another schematic diagram showing wiring of a local area of ​​a display panel provided by an embodiment of the present application;

[0014] Figure 6 Show Figure 5 A schematic diagram of a layout structure of the middle area C2;

[0015] Figure 7 Another schematic diagram showing wiring of a local area of ​​a display panel provided by an embodiment of the present application;

[0016] Figure 8 Show Figure 7 A schematic diagram of a layout structure of the middle area C3;

[0017] Fig. 9 Another schematic diagram showing wiring of a local area of ​​a display panel provided by an embodiment of the present application;

[0018] Fig.10 Another schematic diagram showing wiring of a local area of ​​a display panel provided by an embodiment of the present application;

[0019] Fig.11 Another schematic diagram of the structure of a display panel provided in an embodiment of the present application is shown;

[0020] Fig.12 A schematic diagram showing a structure of a test circuit in a display panel provided in an embodiment of the present application is shown;

[0021] Fig.13 Another schematic diagram showing wiring of a local area of ​​a display panel provided by an embodiment of the present application;

[0022] Fig.14 A schematic diagram showing a film layer structure of a display panel provided in an embodiment of the present application is shown;

[0023] Fig.15 Another schematic diagram of a film layer structure of a display panel provided in an embodiment of the present application is shown;

[0024] Fig.16 A schematic diagram of the structure of a display device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0025] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present application and are not configured to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0026] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0027] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean that it is directly on the other layer or another region, or that other layers or regions are included between it and the other layer or another region. Moreover, if the component is turned over, the layer or a region will be "below" or "beneath" another layer or another region.

[0028] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0029] In the embodiments of the present application, the term "electrically connected" may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components. The term "portion" may refer to a "local portion". The term "end" may refer to an "end segment" or an "end edge". The display panel may be a display device or a module / part of a display device.

[0030] It is obvious to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit or scope of the present application. Therefore, the present application is intended to cover modifications and changes of the present application that fall within the scope of the corresponding claims (technical solutions for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of the present application can be combined with each other without contradiction.

[0031] Embodiments of the present application provide a display panel and a display device. Embodiments of the display panel and the display device will be described below in conjunction with the accompanying drawings.

[0032] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present application is shown. Figure 2 A schematic diagram of wiring in a local area of ​​a display panel provided by an embodiment of the present application is shown. Figure 1 and Figure 2 , the display panel 100 provided in the embodiment of the present application includes a display area AA and a non-display area NA. The non-display area NA includes a first functional area Q1, a wiring area fanout2, and a second functional area Q2, which are adjacent to the display area AA in the first direction X. In other words, in the first direction X, the wiring area fanout2 is located between the first functional area Q1 and the second functional area Q2, and the second functional area Q2 is located between the display area AA and the wiring area fanout2.

[0033] The wiring area fanout2 includes a plurality of first wirings 1, and at least part of the first wirings 1 includes a first conductive portion 11 and a second conductive portion 12. A first end of the first conductive portion 11 is electrically connected to an output end of the first functional area Q1, a second end of the first conductive portion 11 is electrically connected to a first end of the second conductive portion 12, a second end of the second conductive portion 12 is electrically connected to an input end of the second functional area Q2, and the first conductive portion 11 and the second conductive portion 12 are located in different film layers.

[0034] In some embodiments, the second functional area Q2 and the display area AA include a first fan-out area fanout1. A driver chip IC is disposed on a side of the first functional area Q1 away from the wiring area fanout2, and the first functional area Q1 and the driver chip IC are electrically connected.

[0035] Exemplarily, the first functional area Q1 includes a third line 3, a first end of the third line 3 is electrically connected to the data signal output end of the driver chip IC, and a second end of the third line 3 is electrically connected to the first end of the first conductive portion 11. The second end of the third line 3 is the output end of the first functional area Q1.

[0036] The second functional area Q2 includes a fourth line 4, the first fan-out area fanout1 includes a fifth line 5, a first end of the fourth line 4 is electrically connected to a second end of the second conductive portion 12, and a second end of the fourth line 4 is electrically connected to a first end of the fifth line 5. The first end of the fourth line 4 is an input end of the second functional area Q2.

[0037] The second end of the fifth wiring 5 is electrically connected to the data line data.

[0038] The driver chip IC is electrically connected to the third wiring 3 , and the data signal provided by the data signal output terminal of the driver chip IC is sequentially transmitted to the data line data via the third wiring 3 , the first wiring 1 , the fourth wiring 4 , and the fifth wiring 5 .

[0039] It should be noted that, in order to distinguish the first conductive part 11 from the second conductive part 12, the wiring schematic diagram of the present application uses a dotted line to indicate the first conductive part 11, and a solid line to indicate the second conductive part 12. In addition, the gray filled area in the wiring schematic diagram of the present application represents the first functional area Q1 and the second functional area Q2.

[0040] For example, Figure 3 As shown, Figure 3 Graphics with the same fill pattern represent structures located in the same film layer, and graphics with different fill patterns represent structures located in different film layers. Figure 3 The first metal layer M1, the capacitor metal layer MC and the source-drain metal layer SD are schematically shown. The first metal layer M1, the capacitor metal layer MC and the source-drain metal layer SD are different metal film layers. For example, the first conductive portion 11 is located in the source-drain metal layer SD, some second conductive portions 12 are located in the first metal layer M1, and other second conductive portions 12 are located in the capacitor metal layer MC. It is understandable that the first conductive portion 11 and the second conductive portion 12 are located in different film layers, and the two are connected by a connecting hole hole. It should be noted that although the fourth wiring 4 and the first conductive portion 11 are illustrated as being located in the same film layer in each layout of the present application, this is not intended to limit the present application. For example, in other examples, the fourth wiring 4 and the first conductive portion 11 are located in different film layers.

[0041] According to the display panel provided in the embodiment of the present application, the first routing line in the routing area includes a first conductive part and a second conductive part, and the first conductive part and the second conductive part are located in different film layers. That is to say, the first routing line is no longer limited to the same film layer. In this way, the routing form of the first routing line can be designed more flexibly to optimize the routing design in the routing area.

[0042] With the development of display technology, large-sized display panels have emerged. The larger the size of the display panel, the more sub-pixels there are, and the more data lines are required. Correspondingly, the number of routing lines in the routing area is also more, so the routing area needs a certain height to arrange a large number of routing lines, which increases the space occupied by the routing area in the first direction.

[0043] For this, please refer to Figure 1 and Figure 2 In the second direction Y, the second end of at least one first conductive portion 11 is closer to the edge of the display panel than the first functional area Q1, and the first direction X intersects the second direction Y. For example, the second direction Y is the arrangement direction of the plurality of third traces 3 in the first functional area Q1.

[0044] It should be noted that the second end of at least one first conductive portion 11 is closer to the edge of the display panel than the first functional area Q1, which refers to the area on either side of the first center line L1 in the second direction Y. The first center line L1 is the center line of the first functional area Q1 extending along the first direction X, and the distance between the first center line L1 and the edge e3 is equal to the distance between the first center line L1 and the edge e4. The edge e3 and the edge e4 are two opposite edges of the first functional area Q1 in the first direction X.

[0045] It should also be noted that the first center line and the subsequent second center line in this article do not represent the actual routing of the display panel. The center line can be understood as the virtually defined position center line, that is, the center line is used to indicate the position. In addition, the two or more parameters defined in this article as "equal", "equal to", and "=" are not absolutely equal, and a certain error is allowed. It should be noted that the equal distance mentioned in this disclosure refers to the distance value being equal within the allowable error range (±5%).

[0046] Exemplarily, the display panel includes a first edge e1 and a second edge e2 opposite to each other in the second direction Y, and the first functional area Q1 includes a third edge e3 and a fourth edge e4 opposite to each other in the second direction Y. The first edge e1 and the third edge e3 are on a first side of the first center line L1, and the second edge e2 and the fourth edge e4 are on a second side of the first center line L1.

[0047] For the first side of the first center line L1 , the second end of the at least one first conductive portion 11 is closer to the first edge e1 than the third edge e3 of the first functional region Q1 .

[0048] For the second side of the first center line L1 , the second end of the at least one first conductive portion 11 is closer to the second edge e2 than the fourth edge e4 of the first functional region Q1 .

[0049] Figure 2The solid black dots indicate the connection holes between the first conductive part 11 and the second conductive part 12. For example, 8 first wirings 1 are provided on the first side and the second side of the first center line L1, and the 8 first wirings 1 each include a first conductive part 11 and a second conductive part 12, and 8 connection holes are provided on the first side and the second side of the first center line L1, respectively marked as h1 to h8. For any first wiring 1, the second end of the first conductive part 11 overlaps with the connection hole in the thickness direction of the display panel. In other words, Figure 2 In the embodiment, the second end of the first conductive part 11 is located at the same position as the connection hole. On the first side of the first center line L1, the connection holes h1-h4 are closer to the first edge e1 than the third edge e3; on the second side of the first center line L1, the connection holes h1-h4 are closer to the second edge e2 than the fourth edge e4. That is, in this embodiment, at least part of the connection holes of the first conductive part 11 and the second conductive part 12 are moved to both sides of the first functional area Q1 in the second direction Y.

[0050] To better understand the beneficial effects of the embodiments of the present application, please refer to Figure 4 , Figure 4 The plurality of routing lines 1' in the middle routing area fanout2' are arranged in a fan-shaped manner as a whole.

[0051] In the second direction Y, the width of the first functional area Q1 is smaller than the width of the second functional area Q2. In some examples, the width of the first functional area Q1 is much smaller than the width of the second functional area Q2. When the trace 1' extends from the second functional area Q2 toward the first functional area Q1, the trace 1' needs to move toward the center of the first functional area Q1. To avoid cross short circuits between traces 1', Figure 4 It is necessary to increase the height of the wiring area fanout2' in the first direction X, which results in a larger height of the wiring area fanout2' in the first direction X.

[0052] In the embodiment of the present application, the connection position of the first conductive portion 11 and the second conductive portion 12 in at least part of the first routing is designed to be closer to the edge, which is equivalent to widening the width of the routing area fanout2 in the second direction Y and increasing the arrangement space of the routing in the routing area fanout2 in the second direction Y. In this way, the height of the routing area fanout2 in the first direction X can be reduced, thereby reducing the space occupied by the routing area fanout2 in the first direction X.

[0053] Exemplarily, the space saved in the wiring area fanout2 in the first direction X can be used to place other structures of the display panel, such as a battery structure.

[0054] In some embodiments, Figure 2As shown, the first conductive part 11 at least includes a first segment 111 and a second segment 112, and the second segment 112 is electrically connected between the first segment 111 and the second conductive part 12. In the second direction Y, in the same first trace 1, the first segment 111 and the second segment 112 are closer to the first center line L1 of the first functional area Q1 than the second conductive part 12.

[0055] For example, on the first side of the first center line L1 , in the second direction Y, in any first trace 1 , the first segment 111 and the second segment 112 are located on a side of the second conductive portion 12 close to the first center line L1 .

[0056] For another example, on the second side of the first center line L1 , in the second direction Y, in any first trace 1 , the first segment 111 and the second segment 112 are located on a side of the second conductive portion 12 close to the first center line L1 .

[0057] As described above, the second end of at least one first conductive portion 11 is closer to the edge of the display panel than the first functional area Q1. In the second direction Y, the first segment 111 and the second segment 112 are closer to the first center line L1 of the first functional area Q1 than the second conductive portion 12. This ensures that at least part of the second conductive portion 12 does not have to extend to the area directly opposite the first functional area Q1 in the first direction X. In other words, at least part of the second conductive portion 12 is misaligned with the first functional area Q1 in the first direction X. These second conductive portions 12 are arranged on both sides of the first functional area Q1 in the second direction Y, thereby ensuring that the arrangement space of the wiring in the wiring area fanout2 in the second direction Y can be increased and the height of the wiring area fanout2 in the first direction X can be reduced.

[0058] For example, please refer to Figure 2 and Figure 4 , Figure 2 The routing method in fanout2 in the middle routing area and Figure 4 The routing method in the fanout2' area is different, and the structure of other areas is the same. Figure 4 The height of the middle wiring area fanout2' in the first direction X is about 9500um, and Figure 2 The height of the middle wiring area fanout2 in the first direction X can be compressed to about 5000 um.

[0059] In some embodiments, the first section 111 and the second section 112 are located in the same film layer.

[0060] It is understandable that the first section 111 and the second conductive portion 12 are located in different film layers, and the second section 112 and the second conductive portion 12 are located in different film layers. Figure 3As shown, the first segment 111 and the second segment 112 are located in the source-drain metal layer SD, some second conductive portions 12 are located in the first metal layer M1, and other second conductive portions 12 are located in the capacitor metal layer MC.

[0061] In this embodiment, the first section 111 and the second section 112 are designed in the same film layer, and the first section 111 and the second section 112 do not need to be connected through a connecting hole, which can reduce the occupied space; in addition, the first section 111 and the second section 112 can be prepared in an integrated manner to simplify the process.

[0062] In some embodiments, Figure 2 or Figure 3 As shown, the first section 111 extends along the first direction X, and the second section 112 extends along the second direction Y. The second section 112 is located on the side of the first section 111 away from the first center line L1. The first section 111 and the second section 112 together constitute the first conductive portion 11 in a "square zigzag" trend, so that the first end of the second conductive portion 12 on the first side of the first center line L1 moves toward the direction close to the first edge e1, and the first end of the second conductive portion 12 on the second side of the first center line L1 moves toward the direction close to the second edge e2, thereby increasing the wiring arrangement space of the wiring area fanout2 in the second direction Y, so as to reduce the height of the wiring area fanout2 in the first direction X.

[0063] In some embodiments, please refer to Figure 3 The display panel includes a substrate (not shown in the figure), a first metal layer M1, and a capacitor metal layer MC are sequentially arranged away from the substrate. The first metal layer M1 is located between the substrate and the capacitor metal layer MC. Among them, the first conductive portion 11 is located on a side of the capacitor metal layer MC away from the first metal layer M1. For example, the side of the capacitor metal layer MC away from the first metal layer M1 includes at least one source-drain metal layer SD, and the first conductive portion 11 is located on at least one source-drain metal layer SD.

[0064] The capacitor metal layer MC is located between the first metal layer M1 and the source-drain metal layer SD. An insulating layer is provided between different metal layers. In addition, a semiconductor layer may be provided between the first metal layer M1 and the substrate, and an insulating layer may be provided between the first metal layer M1 and the semiconductor layer.

[0065] Exemplarily, the first metal layer M1 includes a gate portion of a transistor. For example, in the display area, the first metal layer M1 includes a scan signal line, a light emitting control signal line, and the like.

[0066] The capacitor metal layer MC includes a plate of a capacitor, a reset signal line, etc. For example, in the display area, the capacitor metal layer MC includes a plate of a storage capacitor of a pixel circuit and a reset signal line. The reset signal on the reset signal line is used to reset the anode potential of the light-emitting element and / or the gate potential of the driving transistor in the pixel circuit.

[0067] The source-drain metal layer SD includes some signal wirings. For example, in the display area, the source-drain metal layer SD includes data lines data and the like.

[0068] In some embodiments, please refer to Figure 1 , Figure 5 and Figure 6 The first conductive part 11 further includes a third segment 113, the second segment 112 electrically connects the first segment 111 and the third segment 113, and the third segment 113 electrically connects the second conductive part 12. In the first direction X, the first segment 111 and the third segment 113 are located on a side of the second segment 112 away from the display area AA.

[0069] Exemplarily, the first segment 111 and the third segment 113 extend along the first direction X, and the second segment 112 extends along the second direction Y.

[0070] In this embodiment, since the third segment 113 is farther away from the display area AA, and the first end of the second conductive portion 12 is electrically connected to the third segment 113, it is equivalent to moving the first end of the second conductive portion 12 in a direction away from the display area, and also moving the connecting holes (for example, h1 to h5) between the second conductive portion 12 and the first conductive portion 11 in a direction away from the display area. In this way, the areas on both sides of the first functional area Q1 in the second direction Y can be utilized.

[0071] For example, please refer to Figure 5 and Figure 4 , Figure 5 The routing method in fanout2 in the middle routing area and Figure 4 The routing method in the fanout2' area is different, and the structure of other areas is the same. Figure 4 The height of the middle wiring area fanout2' in the first direction X is about 9500um, and Figure 5 The height of the middle wiring area fanout2 in the first direction X can be compressed to about 4000 um.

[0072] For example, please refer to Figure 1 and Figure 5 , in at least one first routing line 1, in the second direction Y, the third segment 113 is closer to the edge of the display panel than the first functional area Q1. For example, on the first side of the first center line L1, the third segment 113 is closer to the first edge e1 than the third edge e3, and the connection holes h1~h5 are located between the third edge e3 and the first edge e1. On the second side of the first center line L1, the third segment 113 is closer to the second edge e2 than the fourth edge e4, and the connection holes h1~h5 are located between the fourth edge e4 and the second edge e2. In this way, the areas on both sides of the first functional area Q1 in the second direction Y are used as the routing area of ​​the first routing line 1.

[0073] In some embodiments, Figure 6 As shown, the first section 111, the second section 112 and the third section 113 are located in the same film layer.

[0074] It is understandable that the first segment 111, the second segment 112, the third segment 113 and the second conductive portion 12 are located in different film layers. Figure 6 As shown, the first segment 111 , the second segment 112 and the third segment 113 are located in the source-drain metal layer SD, some second conductive portions 12 are located in the first metal layer M1 , and other second conductive portions 12 are located in the capacitor metal layer MC.

[0075] In this embodiment, the first section 111, the second section 112 and the third section 113 are designed in the same film layer, and the first section 111, the second section 112 and the third section 113 do not need to be connected by connecting holes, which can reduce the occupied space; in addition, the first section 111, the second section 112 and the third section 113 can be prepared in an integrated manner to simplify the process.

[0076] In some embodiments, please refer to Figure 1 , Figure 5 and Figure 6 The second conductive portion 12 includes a fourth segment 124 , the fourth segment 124 is electrically connected to the third segment 113 , and an extension direction of the fourth segment 124 intersects with an extension direction of the third segment 113 .

[0077] The fourth section 124 and the third section 113 are located in different film layers, and the fourth section 124 and the third section 113 are connected via a connecting hole.

[0078] Exemplarily, the third section 113 extends along the first direction X, and the extension direction of the fourth section 124 intersects both the first direction X and the second direction Y.

[0079] In other embodiments, please refer to Figure 1 , Figure 7 and Figure 8 The second conductive portion 12 includes a fourth segment 124 and a fifth segment 125, and the fourth segment 124 is electrically connected to the fifth segment 125 and the third segment 113. The fourth segment 123 and the third segment 113 extend in the same direction.

[0080] For example, the fourth segment 123 and the third segment 113 both extend along the first direction X, and the extending direction of the fifth segment 125 intersects with the extending direction of the fourth segment 124 .

[0081] Exemplarily, the extension direction of the fifth segment 125 intersects both the first direction X and the second direction Y.

[0082] In the same first routing line 1, the fourth section 124 and the fifth section 125 are located in the same film layer, and the fourth section 124 and the third section 113 are located in different film layers. In the same first routing line 1, the fourth section 124 and the fifth section 125 are one structure.

[0083] For example, Figure 8 As shown, the orthographic projections of the third segment 113 and the fourth segment 124 on the plane where the display panel is located at least partially overlap. In this embodiment, the third segment and the fourth segment are designed to overlap in the thickness direction of the display panel, which can reduce the area occupied by the first routing line from a top view.

[0084] Exemplarily, the third segment 113 and the fourth segment 124 have the same length in the first direction X.

[0085] Figures 5 to 8 The example shown introduces that the connection hole between the first conductive part and the second conductive part is placed away from the display area by adding the third segment. In other examples, the connection hole between the first conductive part and the second conductive part can be placed away from the display area by designing the extension direction of the second segment.

[0086] In some embodiments, please refer to Figure 1 and Fig. 9 , or in conjunction with reference Figure 1 and Fig.10 The first conductive part 11 includes a first segment 111 and a second segment 112, a first end of the second segment 112 is electrically connected to the first segment 111, and a second end of the second segment 112 is electrically connected to the second conductive part 12. From the first end of the second segment 112 to the second end of the second segment 112, the distance between the second segment 112 and the display area AA in the first direction X gradually increases.

[0087] As an example, Fig. 9 As shown, the first section 111 extends along the first direction X, the extension direction of the second section 112 intersects both the first direction X and the second direction Y, and the second section 112 extends from the first end to the second end of the second section 112 in a direction away from the second functional area Q2.

[0088] As another example, Fig.10As shown, the extension direction of the first segment 111 intersects both the first direction X and the second direction Y, and from the first end of the first segment 111 to the second end of the first segment 111, the first segment 111 extends in a direction away from the first center line L1. The first end of the first segment 111 is electrically connected to the third trace 3, and the second end of the first segment 111 is electrically connected to the second segment 112. In addition, the extension direction of the second segment 112 intersects both the first direction X and the second direction Y, and, from the first end of the second segment 112 to the second end of the second segment 112, the second segment 112 extends in a direction away from the second functional area Q2.

[0089] For example, Fig. 9 and Fig.10 In the example shown, the first section 111 and the second section 112 are located in the same film layer.

[0090] In some embodiments, please refer to Figure 5 , Figure 7 , Fig. 9 and Fig.10 In any of the figures in the figure, the first functional area Q1 includes a fifth edge e5, and the fifth edge e5 is the edge of the first functional area Q1 facing the second functional area Q2. In the first direction X, the first end of at least part of the first conductive part 11 is farther away from the second functional area Q2 than the fifth edge e5. The first end of the first conductive part 11 and the second conductive part 12 are electrically connected through a connecting hole, that is, in the first direction X, at least one connecting hole (for example, h1 to h5) between the first conductive part 11 and the second conductive part 12 is farther away from the second functional area Q2 than the fifth edge e5. In this way, the areas on both sides of the first functional area Q1 in the second direction Y can be fully utilized.

[0091] Exemplarily, in the first direction X, the first end of at least part of the first conductive portion 11 is located between the fifth edge e5 and the sixth edge e6 , and the sixth edge e6 is an edge of the first functional region Q1 away from the second functional region Q2 .

[0092] In some embodiments, please refer to Figures 2 to 10 In any of the figures in FIG. 1 , the routing area fanout2 further includes a second routing line 2, and the second routing line 2 is electrically connected to the output end of the first functional area Q1 and the input end of the second functional area Q2. The second routing line 2 and the first routing line 1 are electrically connected to different output ends of the first functional area Q1, and the second routing line 2 and the first routing line 1 are electrically connected to different input ends of the second functional area Q2.

[0093] In the second direction Y, the second trace 2 is closer to the first center line L1 of the first functional region Q1 than the second conductive portion 12 .

[0094] Exemplarily, the plurality of first routing lines 1 and the plurality of third routing lines 3 of the first functional area Q1 are electrically connected in a one-to-one correspondence, and the plurality of second routing lines 2 and the plurality of third routing lines 3 of the first functional area Q1 are electrically connected in a one-to-one correspondence. In the second direction Y, the third routing lines 3 electrically connected to the first routing lines 1 are located on both sides of the third routing lines 3 electrically connected to the second routing lines 2. In other words, the second routing lines 2 are electrically connected to the third routing lines 3 in the middle area of ​​the first functional area Q1, and the first routing lines 1 are electrically connected to the third routing lines 3 in the edge area of ​​the first functional area Q1.

[0095] In this embodiment, only the first line 1 connected to the third line 3 in the edge area in the second direction Y is changed, so that at least part of the line segments of the first line 1 can be arranged by using the areas on both sides of the first functional area Q1.

[0096] In some embodiments, Figure 3 , Figure 6 and Figure 8 As shown, the second wiring 2 and the first conductive portion 11 are located in different film layers. In this way, even if the first conductive portion 11 and the second wiring 2 intersect, the signals of the two will not crosstalk.

[0097] In some embodiments, Figure 3 , Figure 6 and Figure 8 As shown, adjacent second wirings 2 are located in different film layers, and / or adjacent second conductive portions 12 are located in different film layers. In this way, signal interference between adjacent wirings can be reduced.

[0098] For example, the plurality of second conductive portions 12 arranged in the second direction Y alternately occupy the first metal layer M1 and the capacitor metal layer MC, and / or the plurality of second traces 2 arranged in the second direction Y alternately occupy the first metal layer M1 and the capacitor metal layer MC.

[0099] Exemplarily, the adjacent second conductive portion 12 and second trace 2 are located in different film layers.

[0100] In some embodiments, the first functional area includes a first output end to an nth output end that are sequentially close to a first center line of the first functional area, and the first center line is at the same distance from two edges of the first functional area in the second direction; the second functional area includes a first input end to an nth input end that are sequentially close to a second center line of the second functional area, and the second center line is at the same distance from two edges of the second functional area in the second direction; the output end and the input end are electrically connected through a first routing line; the first output end to the nth output end are sequentially connected to the first input end to the nth input end.

[0101] like Figure 2As shown, the first functional area Q1 includes a plurality of third traces 3 arranged in the second direction Y, the second end of the third trace 3 is electrically connected to the first end of the first conductive portion 11 , and the second end of the third trace 3 serves as the output end of the first functional area Q1 . Figure 2 Taking the example of 8 first routing lines 1 arranged on both sides of the first center line L1 (i.e., n is 8), on the first side of the first center line L1, the first third routing line 3(1) to the eighth third routing line 3(8) are arranged close to the first center line L1 in sequence; and, on the second side of the first center line L1, the first third routing line 3(1) to the eighth third routing line 3(8) are arranged close to the first center line L1 in sequence.

[0102] The second functional area Q2 includes a plurality of fourth routing lines 4 arranged in the second direction Y. The first end of the fourth routing line 4 is electrically connected to the second end of the second conductive portion 12. The first end of the fourth routing line 4 serves as an input end of the second functional area Q2. On the first side of the second center line L2, the first fourth routing line 4(1) to the eighth fourth routing line 4(8) are sequentially arranged close to the second center line L2; and, on the second side of the second center line L2, the first fourth routing line 4(1) to the eighth fourth routing line 4(8) are sequentially arranged close to the second center line L2.

[0103] The first third routing line 3(1) to the eighth third routing line 3(8) on the first side of the first center line L1 and the first fourth routing line 4(1) to the eighth fourth routing line 4(8) on the first side of the second center line L2 are connected in sequence. In other words, the first third routing line 3(1) on the first side of the first center line L1 is electrically connected to the first fourth routing line 4(1) on the first side of the second center line L2, the second third routing line 3(2) on the first side of the first center line L1 is electrically connected to the second fourth routing line 4(2) on the first side of the second center line L2, and so on, the eighth third routing line 3(8) on the first side of the first center line L1 is electrically connected to the eighth fourth routing line 4(8) on the first side of the second center line L2.

[0104] The first third routing line 3(1) to the eighth third routing line 3(8) on the second side of the first center line L1 and the first fourth routing line 4(1) to the eighth fourth routing line 4(8) on the second side of the second center line L2 are connected in sequence. In other words, the first third routing line 3(1) on the second side of the first center line L1 is electrically connected to the first fourth routing line 4(1) on the second side of the second center line L2, the second third routing line 3(2) on the second side of the first center line L1 is electrically connected to the second fourth routing line 4(2) on the second side of the second center line L2, and so on, the eighth third routing line 3(8) on the second side of the first center line L1 is electrically connected to the eighth fourth routing line 4(8) on the second side of the second center line L2.

[0105] Exemplarily, the first center line L1 and the second center line L2 are on the same straight line.

[0106] Herein, the first side of the first center line L1 and the first side of the second center line L2 are the same side (for example, both are the left side), and the second side of the first center line L1 and the second side of the second center line L2 are the same side (for example, both are the right side).

[0107] In some embodiments, when the plurality of third routing lines are electrically connected to the plurality of fourth routing lines in sequence through the plurality of first routing lines, as Figure 2 As shown, the first conductive part 11 includes a first section 111 and a second section 112 electrically connected to each other, and the second section 112 is electrically connected between the first section 111 and the second conductive part 12. In the first direction, the second sections electrically connected from the first output end to the nth output end are sequentially arranged close to the second functional area, and the length of the second sections electrically connected from the first output end to the nth output end gradually decreases.

[0108] Figure 2 Taking n as 8 as an example, taking the first side of the first center line L1 as an example, the first third routing line 3(1) to the eighth third routing line 3(8) are sequentially electrically connected to the first first conductive part 11 to the eighth first conductive part 11, wherein the connection holes h1 to h8 are sequentially electrically connected to the first first conductive part 11 to the eighth first conductive part 11, and the second sections 112 of the first first conductive part 11 to the eighth first conductive part 11 are sequentially arranged close to the second functional area Q2, and the lengths of the second sections 112 of the first first conductive part 11 to the eighth first conductive part 11 gradually decrease. In this embodiment, while avoiding the intersection of the multiple second conductive parts, the multiple third routing lines can be sequentially electrically connected to the multiple fourth routing lines through the multiple first routing lines.

[0109] In some embodiments, the first functional area includes a first output end to an nth output end sequentially close to a first center line of the first functional area, and the first center line is at the same distance from two edges of the first functional area in the second direction; the second functional area includes a first input end to an nth input end sequentially close to a second center line of the second functional area, and the second center line is at the same distance from two edges of the second functional area in the second direction; the output end and the input end are electrically connected through a first routing line; the first output end to the nth output end are sequentially connected to the nth input end to the first input end.

[0110] like Figure 5 As shown, the first functional area Q1 includes a plurality of third traces 3 arranged in the second direction Y, the second end of the third trace 3 is electrically connected to the first end of the first conductive portion 11 , and the second end of the third trace 3 serves as the output end of the first functional area Q1 . Figure 5Taking the example of 5 first routing lines 1 arranged on both sides of the first center line L1 (i.e., n is 5), on the first side of the first center line L1, the first third routing line 3(1) to the fifth third routing line 3(5) are arranged close to the first center line L1 in sequence; and, on the second side of the first center line L1, the first third routing line 3(1) to the fifth third routing line 3(5) are arranged close to the first center line L1 in sequence.

[0111] The second functional area Q2 includes a plurality of fourth lines 4 arranged in the second direction Y. The first end of the fourth line 4 is electrically connected to the second end of the second conductive portion 12. The first end of the fourth line 4 serves as an input end of the second functional area Q2. On the first side of the second center line L2, the first fourth line 4(1) to the fifth fourth line 4(5) are sequentially arranged close to the second center line L2; and, on the second side of the second center line L2, the first fourth line 4(1) to the fifth fourth line 4(5) are sequentially arranged close to the second center line L2.

[0112] The first third routing line 3(1) to the fifth third routing line 3(5) on the first side of the first center line L1 and the fifth fourth routing line 4(5) to the first fourth routing line 4(1) on the first side of the second center line L2 are electrically connected in sequence. In other words, the first third routing line 3(1) on the first side of the first center line L1 is electrically connected to the fifth fourth routing line 4(5) on the first side of the second center line L2, the second third routing line 3(2) on the first side of the first center line L1 is electrically connected to the fourth fourth routing line 4(4) on the first side of the second center line L2, and so on, the fifth third routing line 3(5) on the first side of the first center line L1 is electrically connected to the first fourth routing line 4(1) on the first side of the second center line L2.

[0113] The first third routing line 3(1) to the fifth third routing line 3(5) on the second side of the first center line L1 and the fifth fourth routing line 4(5) to the first fourth routing line 4(1) on the second side of the second center line L2 are electrically connected in sequence. In other words, the first third routing line 3(1) on the second side of the first center line L1 is electrically connected to the fifth fourth routing line 4(5) on the second side of the second center line L2, the second third routing line 3(2) on the second side of the first center line L1 is electrically connected to the fourth fourth routing line 4(4) on the second side of the second center line L2, and so on, the fifth third routing line 3(5) on the second side of the first center line L1 is electrically connected to the first fourth routing line 4(1) on the second side of the second center line L2.

[0114] Understandably, Figure 5 In the example shown, the plurality of third routing lines are electrically connected to the plurality of fourth routing lines in reverse order through the plurality of first routing lines.

[0115] In some embodiments, when the plurality of third routing lines are electrically connected to the plurality of fourth routing lines in reverse order through the plurality of first routing lines, as Figure 5 As shown, the first conductive part 11 includes a first section 111 and a second section 112 electrically connected to each other, and the second section 112 is electrically connected between the first section 111 and the second conductive part 12. In the first direction, the second sections electrically connected from the first output end to the nth output end are sequentially arranged close to the second functional area, and the length of the second sections electrically connected from the first output end to the nth output end gradually increases.

[0116] Figure 5 Taking n as 5 as an example, taking the first side of the first center line L1 as an example, the first third routing line 3(1) to the fifth third routing line 3(5) are electrically connected to the first first conductive part 11 to the fifth first conductive part 11 in sequence, wherein the connection holes h1 to h5 are electrically connected to the first first conductive part 11 to the fifth first conductive part 11 in sequence, and the second segments 112 of the first first conductive part 11 to the fifth first conductive part 11 are arranged close to the second functional area Q2 in sequence, and the lengths of the second segments 112 of the first first conductive part 11 to the fifth first conductive part 11 gradually increase. In this embodiment, while avoiding the intersection of the multiple second conductive parts, the multiple third routing lines can be electrically connected to the multiple fourth routing lines in reverse order through the multiple first routing lines.

[0117] In some embodiments, the material impedance of the film layer where the first conductive portion 11 is located is smaller than the material impedance of the film layer where the second conductive portion 12 is located.

[0118] For example, the impedance per unit length of the first conductive portion 11 is smaller than the impedance per unit length of the second conductive portion 12 .

[0119] The second conductive part 12 is provided in the first line, which is equivalent to adopting a winding design method, moving the signal access end of the second conductive part 12 to the side of the first functional area Q1 close to the first edge e1, or moving the signal access end of the second conductive part 12 to the side of the first functional area Q1 close to the second edge e2, that is, the total length of the first line will increase. In this embodiment, the material impedance of the film layer where the second conductive part 12 is located is relatively small, so the impedance of the second conductive part 12 will be relatively small, and the impedance of the first line will not increase much as a whole.

[0120] In some embodiments, the film layer where the first conductive portion 11 is located is located on a side of the film layer where the second conductive portion 12 is located close to the light emitting surface of the display panel.

[0121] For example, the first conductive part 11 is located in the source-drain metal layer SD, some second conductive parts 12 are located in the first metal layer M1, and other second conductive parts 12 are located in the capacitor metal layer MC. The source-drain metal layer SD is closer to the light-emitting surface of the display panel than the first metal layer M1 and the capacitor metal layer MC. Fig.14 As shown, the display panel is a low temperature polysilicon (LTPS) type display panel, or, as shown Fig.15 As shown, the display panel is a low temperature polycrystalline oxide (LTPO) type display panel. The source-drain metal layer SD includes a first source-drain metal layer SD1, a second source-drain metal layer SD2, and a third source-drain metal layer SD3, and the first conductive portion 11 is located in any one of the first source-drain metal layer SD1 and the second source-drain metal layer SD2.

[0122] In some embodiments, the line widths of the first conductive portions 11 in at least two first traces 1 are different. For example, when the length of the first conductive portion 11 is longer, the line width of the first conductive portion 11 can be increased to balance the impedance differences of different first traces 1 and avoid large impedance jumps of adjacent first traces.

[0123] In some embodiments, Fig.11 As shown, the display panel also includes a trigger signal line STV, which is electrically connected to the gate drive circuit of the display panel (not shown in the figure). The trigger signal output by the driver chip IC is transmitted to the gate drive circuit through the trigger signal line STV to trigger the gate drive circuit to operate.

[0124] In the second direction Y, the trigger signal line STV is closer to the edge of the display panel than the first line in the line area fanout2. For example, one of the trigger signal lines STV is closer to the first edge e1 of the display panel than the first line in the line area fanout2, and the other trigger signal line STV is closer to the second edge e2 of the display panel than the first line in the line area fanout2.

[0125] In this embodiment, it is possible to avoid conflicts between the first routing line in the routing area fanout2 and the trigger signal line STV, thereby avoiding signal crosstalk between the two.

[0126] Exemplarily, the display panel also includes a clock signal line, a reset signal line, a high-level signal line, a low-level signal line, etc. electrically connected to the gate drive circuit. In the second direction, the clock signal line, the reset signal line, the high-level signal line, the low-level signal line, etc. are all closer to the edge of the display panel than the first line in the line area fanout2.

[0127] In some embodiments, the second functional area Q2 is a bending area. The bending area may also be referred to as a bending area. The second functional area Q2 can be bent, and the structure of the second functional area Q2 away from the display area AA can be bent to the back of the display panel to achieve a narrower frame design. One end of the fourth routing line 4 of the second functional area Q2 serves as an input end of the second functional area Q2.

[0128] In some embodiments, the first functional area Q1 is a test area. The test area may also be referred to as a Shorting bar area. A test circuit is disposed in the first functional area Q1. As an example, Fig.12 As shown, the test circuit includes a first transistor T1, a second transistor T2 and a third transistor T3. The data line includes a first data line Data 1 and a second data line Data2. The first data line Data1 is electrically connected to the first electrode of the first transistor T1 through the third wiring 3, and the second electrode of the first transistor T1 is electrically connected to the first test terminal VT1. The second data line Data2 is electrically connected to the first electrode of the second transistor T2 through the third wiring 3, and the second electrode of the second transistor T2 is connected to the second test terminal VT2, or the second data line Data2 is electrically connected to the first electrode of the third transistor T3 through the third wiring 3, and the second electrode of the third transistor T3 is electrically connected to the third test terminal VT3. In addition, the gate of the first transistor T1 is electrically connected to the first control signal terminal SW1, the gate of the second transistor T2 is electrically connected to the second control signal terminal SW2, and the gate of the third transistor T3 is electrically connected to the third control signal terminal SW3.

[0129] In this case, in the display area, the first data line Data1 may be a data line for controlling a green sub-pixel, and the second data line Data2 may be a data line for controlling a blue sub-pixel or a red sub-pixel.

[0130] It is understandable that part of the data line is electrically connected to the third line through the first line, and another part of the data line is electrically connected to the third line through the second line. The first line or the second line is electrically connected between the first data line Data1 and the third line, and the first line or the second line is electrically connected between the second data line Data2 and the third line.

[0131] When the display panel is undergoing a VT test, the signal at the test signal end is transmitted to the data line through the transistor, short-circuiting all sub-pixels displaying the same color together, thereby displaying a monochrome picture.

[0132] In some embodiments, Fig.13As shown, the display panel also includes a first power line PVDD and a second power line PVEE. The first power line PVDD is used to transmit a positive voltage signal, and the second power line PVEE is used to transmit a negative voltage signal. Exemplarily, the sub-pixel in the display area includes a light-emitting element and a pixel driving circuit, the first pole of the light-emitting element is electrically connected to the pixel driving circuit, the pixel driving circuit is also electrically connected to the first power line PVDD, and the second pole of the light-emitting element is electrically connected to the second power line PVEE.

[0133] In the thickness direction of the display panel, the first power line PVDD and / or the second power line PVEE overlap at least partly with the first wiring 1. It is understandable that the first power line PVDD and / or the second power line PVEE and the first wiring 1 are located in different film layers.

[0134] The display panel also includes a touch line (not shown in the figure), which is used to transmit a touch signal. The voltages on the first power line PVDD and the second power line PVEE are usually fixed. When at least part of the first line 1 overlaps with the first power line PVDD and / or the second power line PVEE, the interference of the signal on the touch line with the signal on the first line can be reduced.

[0135] Exemplarily, the fourth routing line 4 of the second functional area Q2 includes a first sub-line 41, a second sub-line 42, a third sub-line 43, and a fourth sub-line 44. The first sub-line 41 is electrically connected to the first routing line 1 in a one-to-one correspondence. The second sub-line 42 is electrically connected to the second routing line 2 in a one-to-one correspondence. The third routing line 43 is electrically connected to the first power line PVDD outside the second functional area Q2, and the first power line PVDD outside the second functional area Q2 can be electrically connected to multiple third sub-lines 43. The fourth sub-line 44 is electrically connected to the second power line PVEE outside the second functional area Q2, and the second power line PVEE outside the second functional area Q2 can be electrically connected to multiple fourth sub-lines 44.

[0136] The line width of the first power line PVDD and the line width of the second power line PVEE are both larger than the line width of the first routing 1, the line width of the first power line PVDD and the line width of the second power line PVEE are both larger than the line width of the second routing 2, and the line width of the first power line PVDD and the line width of the second power line PVEE are both larger than the line width of the fourth routing 4.

[0137] In some embodiments, an inorganic material layer is provided between the first power line PVDD and / or the second power line PVEE and the first conductive portion 11. Exemplarily, the material of the inorganic material layer includes silicon dioxide (SiO2) and / or silicon nitride (SiNx). The inorganic material layer can reduce electrochemical corrosion between the first power line PVDD and / or the second power line PVEE and the first conductive portion 11.

[0138] Of course, in other examples, an organic material layer is included between the first power line PVDD and / or the second power line PVEE and the first conductive portion 11 .

[0139] In some embodiments, the first power line PVDD and the second power line PVEE are located on a side of the first conductive portion 11 away from the substrate of the display panel.

[0140] As an example, the display panel is a low temperature polysilicon (LTPS) type display panel, and the film layer structure of the display panel is as follows: Fig.14 As shown, the first semiconductor layer B1 includes an active layer of a transistor, and the material of the first semiconductor layer B1 includes LTPS. The metal layer includes an auxiliary metal layer M0, a first metal layer M1, a capacitor metal layer MC, a source-drain metal layer SD, etc. The source-drain metal layer SD includes a first source-drain metal layer SD1, a second source-drain metal layer SD2, and a third source-drain metal layer SD3. The anode layer RE includes anodes of a plurality of light-emitting elements.

[0141] As another example, the display panel is a low temperature polycrystalline oxide (LTPO) type display panel. The film layer structure of the display panel is as follows: Fig.15 As shown, Fig.15 and Fig.14 The similarities are not repeated here, and the differences include: the display panel further includes a second semiconductor layer B2 and a gate metal layer MG. The material of the first semiconductor layer B1 includes LTPS, and the material of the second semiconductor layer B2 includes indium gallium zinc oxide (IGZO). The carrier movement speed of the LTPS transistor is faster, and the leakage current of the IGZO transistor is smaller.

[0142] Exemplarily, the first conductive portion 11 is located in the first source-drain metal layer SD1 , and the first power line PVDD and the second power line PVEE are located in the second source-drain metal layer SD2 and / or the third source-drain metal layer SD3 .

[0143] It should be noted that the number of routing lines in each area in the drawings of the present application are merely examples and are not intended to limit the present application.

[0144] The display panel provided in the embodiment of the present application can be used in various fields such as mobile phones, tablets, cars, televisions, etc., and can also be used for folding and curling display products.

[0145] The present application also provides a display device, including the display panel provided by the present application. Fig.16 , Fig.16It is a structural schematic diagram of a display device provided in an embodiment of the present application. Fig.16 The provided display device 1000 includes the display panel 100 provided by any of the above embodiments of the present application. Fig.16 The embodiment only takes a mobile phone as an example to illustrate the display device 1000. It can be understood that the display device provided in the embodiment of the present application can be a wearable product, a computer, a television, a car display device, or other display devices with display functions, and the present application does not make specific restrictions on this. The display device provided in the embodiment of the present application has the beneficial effects of the display panel provided in the embodiment of the present application. For details, please refer to the specific description of the display panel in the above embodiments, and this embodiment will not be repeated here.

[0146] According to the embodiments described above in the present application, these embodiments do not describe all the details in detail, nor do they limit the present application to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The present application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that: include: A display area and a non-display area, wherein the non-display area includes a first functional area, a wiring area, and a second functional area that are sequentially close to the display area in a first direction; The routing area includes multiple first routing lines, at least some of the first routing lines include a first conductive part and a second conductive part, the first end of the first conductive part is electrically connected to the output end of the first functional area, the second end of the first conductive part is electrically connected to the first end of the second conductive part, the second end of the second conductive part is electrically connected to the input end of the second functional area, and the first conductive part and the second conductive part are located in different film layers.

2. The display panel according to claim 1, characterized in that: In the second direction, the second ends of at least some of the first conductive portions are closer to the edge of the display panel than the first functional area, and the first direction intersects with the second direction.

3. The display panel according to claim 2, characterized in that: The first conductive portion includes at least a first segment and a second segment, the second segment is electrically connected between the first segment and the second conductive portion, and in the second direction, in the same first routing, the first segment and the second segment are closer to the first center line of the first functional area than the second conductive portion, and the first center line of the first functional area is at the same distance from two edges of the first functional area in the second direction.

4. The display panel according to claim 3, characterized in that: The first section and the second section are located in the same film layer.

5. The display panel according to claim 2, characterized in that: The first section extends along the first direction, and the second section extends along the second direction.

6. The display panel according to claim 2, characterized in that: The display panel includes a substrate, and a first metal layer and a capacitor metal layer which are sequentially away from the substrate. The first conductive portion is located on a side of the capacitor metal layer which is away from the first metal layer.

7. The display panel according to claim 3, characterized in that: The first conductive portion further includes a third segment, the second segment electrically connects the first segment and the third segment, and the third segment electrically connects the second conductive portion; In the first direction, the first segment and the third segment are located on a side of the second segment away from the display area.

8. The display panel according to claim 7, characterized in that: The first section, the second section and the third section are located in the same film layer.

9. The display panel according to claim 7, characterized in that: The second conductive portion includes a fourth segment, and an extending direction of the fourth segment intersects with an extending direction of the third segment.

10. The display panel according to claim 7, characterized in that: The second conductive portion includes a fourth segment and a fifth segment, and the fourth segment is electrically connected between the fifth segment and the third segment; The fourth section and the third section extend in the same direction.

11. The display panel according to claim 10, characterized in that: The orthographic projections of the fourth segment and the third segment on the plane where the display panel is located at least partially overlap.

12. The display panel according to claim 3, characterized in that: The first end of the second segment is electrically connected to the first segment, and the second end of the second segment is electrically connected to the second conductive portion; From the first end of the second segment to the second end of the second segment, the distance between the second segment and the display area in the first direction gradually increases.

13. The display panel according to claim 2, characterized in that: In the first direction, the first end of at least part of the first conductive portion is farther away from the second functional region than a fifth edge of the first functional region, where the fifth edge is an edge of the first functional region facing the second functional region.

14. The display panel according to claim 1, characterized in that: The routing area further includes a second routing line, wherein the second routing line electrically connects an output end of the first functional area and an input end of the second functional area; In the second direction, the second trace is closer to a first center line of the first functional area than the second conductive portion, and the first center line is at the same distance from two edges of the first functional area in the second direction.

15. The display panel according to claim 14, characterized in that: The second wiring and the first conductive portion are located in different film layers.

16. The display panel according to claim 15, characterized in that: Adjacent second routing lines are located in different film layers, and / or adjacent second conductive parts are located in different film layers.

17. The display panel according to claim 1, characterized in that: The first functional area includes a first output end to an nth output end which are sequentially close to a first center line of the first functional area, and the first center line is at the same distance from two edges of the first functional area in the second direction; The second functional area includes a first input end to an nth input end which are sequentially close to a second center line of the second functional area, and the second center line is at the same distance from two edges of the second functional area in the second direction; The output end and the input end are electrically connected via the first wiring; The first output terminal to the nth output terminal are sequentially connected to the first input terminal to the nth input terminal.

18. The display panel according to claim 17, characterized in that: The first conductive portion includes a first segment and a second segment electrically connected to each other, and the second segment is electrically connected between the first segment and the second conductive portion; In the first direction, the second section electrically connected from the first output end to the nth output end is sequentially arranged close to the second functional area, and the length of the second section electrically connected from the first output end to the nth output end gradually decreases.

19. The display panel according to claim 1, characterized in that: The first functional area includes a first output end to an nth output end which are sequentially close to a first center line of the first functional area, and the first center line is at the same distance from two edges of the first functional area in the second direction; The second functional area includes a first input end to an nth input end which are sequentially close to a second center line of the second functional area, and the second center line is at the same distance from two edges of the second functional area in the second direction; The output end and the input end are electrically connected via the first wiring; The first output terminal to the nth output terminal are sequentially connected to the nth input terminal and the first input terminal.

20. The display panel according to claim 19, characterized in that: The first conductive portion includes a first segment and a second segment electrically connected to each other, and the second segment is electrically connected between the first segment and the second conductive portion; In the first direction, the second section electrically connected from the first output end to the nth output end is sequentially arranged close to the second functional area, and the length of the second section electrically connected from the first output end to the nth output end gradually increases.

21. The display panel according to claim 1, characterized in that: The material impedance of the film layer where the first conductive portion is located is smaller than the material impedance of the film layer where the second conductive portion is located.

22. The display panel according to claim 1, characterized in that: The film layer where the first conductive part is located is located on a side of the film layer where the second conductive part is located close to the light emitting surface of the display panel.

23. The display panel according to claim 1, characterized in that: The line widths of the first conductive portions in at least two of the first wirings are different.

24. The display panel according to claim 1, characterized in that: The display panel further includes a trigger signal line. In the second direction, the trigger signal line is closer to the edge of the display panel than the first line.

25. The display panel according to claim 1, characterized in that: The second functional area is a bending area, the bending area includes a fourth routing line, a first end of the fourth routing line is electrically connected to the first routing line, and the first end of the fourth routing line serves as an input end of the second functional area.

26. The display panel according to claim 25, characterized in that: The first functional area is a testing area.

27. The display panel according to claim 1, characterized in that: The display panel comprises a first power line and a second power line. In the thickness direction of the display panel, the first power line and / or the second power line at least partially overlaps with the first wiring.

28. The display panel according to claim 27, characterized in that: The first power line and the second power line are located on a side of the substrate of the first conductive portion away from the display panel.

29. The display panel according to claim 28, characterized in that: An inorganic material layer is disposed between the first power line and / or the second power line and the first conductive portion.

30. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1-29.

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