Display panel and display device

Abstract

The invention provides a display panel and a display device, and belongs to the technical field of display. The display panel is provided with a display area, a peripheral area surrounding the display area, a binding area located on the side, away from the display area, of the peripheral area, and a bending area connected between the peripheral area and the binding area in a bent mode. The peripheral area comprises a first transition area close to the bending area; the display panel comprises a substrate, a signal wire and a stress dispersion structure, wherein the signal wire and the stress dispersion structure are arranged on the substrate; wherein the two ends of the signal wire respectively extend to the first transition area and the binding area from the bending area; the stress dispersion structure is at least partially located in the bending area and is used for dispersing bending stress when the signal wire is bent.

Description

Technical Field

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a display panel and a display device. Background Art

[0002] With the rapid development of organic light-emitting diodes (OLEDs), the market requirements for OLED displays are constantly increasing. Among them, narrow-border display products have a higher screen-to-body ratio and can provide users with better visual effects.

[0003] OLED display panels can bend part of the peripheral structure to the back to reduce the size of the frame; at the same time, the smaller the bending radius (Bending R), the narrower the frame. However, the design of a small bending radius (Bending R) will have a greater impact on process fluctuations such as coating glue in the bending area (used to protect the signal routing in the bending area), resulting in uneven stress distribution in the bending area, making it very easy for the signal routing to crack, and ultimately leading to adverse effects such as bright lines. Summary of the invention

[0004] The present disclosure aims to solve at least one of the technical problems existing in the prior art and provides a display panel and a display device.

[0005] In a first aspect, the technical solution adopted to solve the technical problem of the present disclosure is a display panel, which comprises a display area, a peripheral area surrounding the display area, a binding area located at a side of the peripheral area away from the display area, and a bending area bent and connected between the peripheral area and the binding area; the peripheral area comprises a first transition area close to the bending area;

[0006] The display panel includes a base substrate, a signal line and a stress dispersion structure arranged on the base substrate; wherein two ends of the signal line extend from the bending area to the first transition area and the binding area respectively;

[0007] The stress dispersion structure is at least partially located in the bending area, and is used to disperse the bending stress of the signal line when it is bent.

[0008] In some embodiments, the display panel includes a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer, and a third conductive layer arranged in sequence in a direction away from the base substrate;

[0009] The source and drain of the transistor in the pixel driving circuit are arranged in at least one of the first conductive layer, the second conductive layer and the third conductive layer; the signal wiring is located in the second conductive layer.

[0010] In some embodiments, an orthographic projection of the stress dispersion structure on the substrate is located between orthographic projections of adjacent signal traces on the substrate.

[0011] In some embodiments, the stress dispersion structure and the signal trace are disposed on the same layer.

[0012] In some embodiments, the stress dispersion structure is located in the first conductive layer or the third conductive layer.

[0013] In some embodiments, the stress dispersion structure is a first substructure located in the first conductive layer;

[0014] The orthographic projection of the first substructure on the substrate at least partially overlaps with the orthographic projection of the signal trace on the substrate.

[0015] In some embodiments, the stress dispersion structure is a second substructure located in the third conductive layer;

[0016] The orthographic projection of the second substructure on the substrate at least partially overlaps with the orthographic projection of the signal trace on the substrate.

[0017] In some embodiments, the stress dispersion structure includes a first substructure located in the first conductive layer and a second substructure located in the third conductive layer;

[0018] The orthographic projections of the first substructure, the second substructure, and the signal trace on the substrate at least partially overlap.

[0019] In some embodiments, the two ends of the first substructure are electrically connected to the two ends of the signal routing through two first connection vias passing through the first insulating layer; the two ends of the second substructure are electrically connected to the two ends of the signal routing through two second connection vias passing through the second insulating layer.

[0020] In some embodiments, the stress dispersion structure includes a third substructure located in the first conductive layer; the signal trace includes a first trace located in the bending area, a second trace located in the first transition area, and a third trace located in the binding area; the orthographic projection of the third substructure on the substrate overlaps with the orthographic projection of the first trace on the substrate;

[0021] The first insulating layer comprises a first slot located in the bending area; the first slot penetrates the first insulating layer along a thickness direction of the first insulating layer;

[0022] The first trace is in contact with the third substructure through the first slot.

[0023] In some embodiments, the stress dispersion structure includes a fourth substructure located in the third conductive layer; the signal trace includes a first trace located in the bending area, a second trace located in the first transition area, and a third trace located in the binding area; the orthographic projection of the fourth substructure on the substrate overlaps with the orthographic projection of the first trace on the substrate;

[0024] The second insulating layer comprises a second slot located in the bending area; the second slot penetrates the second insulating layer along the thickness direction of the second insulating layer;

[0025] The first trace is in contact with the fourth substructure through the second slot.

[0026] In some embodiments, the first insulating layer includes a plurality of first grooves extending along a first direction; the first grooves penetrate at least a portion of the first insulating layer along a thickness direction of the second insulating layer; the first direction is arranged to intersect with an extension direction of the signal trace;

[0027] A plurality of the first grooves are arranged side by side along the extension direction of the signal line, and at least part of the plurality of the first grooves are distributed in the bending area;

[0028] The signal line falls into the first groove in its extension direction, and the signal line falling into the first groove is reused as the fifth substructure of the stress dispersion structure.

[0029] In some embodiments, the first groove includes a first side wall and a first bottom wall, and a dihedral angle between an extension surface of the first side wall and a plane where the first bottom wall is located is an acute angle.

[0030] In some embodiments, the second insulating layer includes a plurality of second grooves extending along a first direction; the second grooves penetrate at least a portion of the second insulating layer along a thickness direction of the second insulating layer; the first direction is arranged to intersect with an extension direction of the signal trace;

[0031] A plurality of the second grooves are arranged side by side along the extension direction of the signal line, and at least part of the plurality of the second grooves are distributed in the bending area;

[0032] The stress dispersion structure comprises a sixth substructure located in the third conductive layer, and an orthographic projection of the sixth substructure on the substrate overlaps with an orthographic projection of the signal trace on the substrate;

[0033] In the extending direction of the signal line, the portion of the sixth substructure falling into the second groove contacts the signal line.

[0034] In some embodiments, the orthographic projections of the plurality of second grooves and the plurality of first grooves on the substrate are alternately arranged.

[0035] In some embodiments, the second conductive layer includes a first titanium material layer, an aluminum material layer, and a second titanium material layer sequentially disposed in a direction away from the substrate.

[0036] In some embodiments, the signal routing includes a first routing located in the bending area, a second routing located in the first transition area, and a third routing located in the binding area; the first routing is located in the aluminum material layer.

[0037] In some embodiments, the signal routing line includes a first routing line located in the bending area, a second routing line located in the first transition area, and a third routing line located in the binding area;

[0038] The first routing line includes a first sub-routing line located in the aluminum material layer and a second sub-routing line located in the second titanium material layer.

[0039] In some embodiments, the first titanium material layer includes a first opening located in the bending area, a portion of the aluminum material layer and a portion of the second titanium material layer located in the bending area fall into the first opening, and a portion of the aluminum material layer and a portion of the second titanium material layer falling into the first opening are reused as the stress dispersion structure.

[0040] In some embodiments, the first titanium material layer includes a first opening located in the bending region, the second titanium material layer includes a second opening located in the bending region, and the second opening exposes a portion of the aluminum material layer located in the bending region;

[0041] The portion of the aluminum material layer located in the bending area falls into the first opening, and the portion of the aluminum material layer falling into the first opening is reused as the stress dispersion structure.

[0042] In a second aspect, an embodiment of the present disclosure further provides a display device, comprising a display panel as described in any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1a and Figure 1b Schematic diagram of two different types of signal routing;

[0044] Figure 2 A schematic diagram of cracks caused by bending of signal lines in the related art;

[0045] Figure 3 A schematic plan view of a display panel provided in an embodiment of the present disclosure;

[0046] Figure 4A schematic diagram of stacking various film layers located in a display area provided in an embodiment of the present disclosure;

[0047] Figure 5a and Figure 5b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 1;

[0048] Figure 6a and Figure 6b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 2;

[0049] Figure 7a A cross-sectional schematic diagram of an example of a signal routing and stress dispersion structure;

[0050] Figure 7b It is a cross-sectional schematic diagram of another example of a signal routing and a stress dispersion structure;

[0051] Figure 8a and Figure 8b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 3;

[0052] Figure 8c It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 3;

[0053] Figure 9a and Figure 9b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 4;

[0054] Fig.9c It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 4;

[0055] Fig.10a and Fig.10b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 5;

[0056] Fig.10c It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 5;

[0057] Fig.11 It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 6;

[0058] Fig.12 It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 7;

[0059] Fig.13 It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 8;

[0060] Fig.14a and Fig.14bThey are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 9;

[0061] Fig.14c It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 9;

[0062] Fig.15a and Fig.15b They are respectively the plan schematic diagrams of different types of signal routing and the stress dispersion structure in Example 10;

[0063] Fig.15c It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 10;

[0064] Fig.16 It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 11;

[0065] Fig.17 is a schematic cross-sectional view of a second conductive layer located in a display area;

[0066] Fig.18 is a schematic cross-sectional view of a second conductive layer located in a bending region;

[0067] Fig.19 is a cross-sectional schematic diagram of another second conductive layer located in the bending region;

[0068] Fig. 20 It is a cross-sectional schematic diagram of the signal routing and the stress dispersion structure in Example 12;

[0069] Fig.21 Schematic diagram of the cross section of the signal routing and the stress dispersion structure in Example 13. DETAILED DESCRIPTION

[0070] In order to make the purpose, technical scheme and advantages of the embodiments of the present disclosure clearer, the technical scheme in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the present disclosure for protection, but merely represents the selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present disclosure.

[0071] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0072] The "multiple or several" mentioned in this disclosure refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0073] In the related art, the border of OLED display panels is getting narrower and narrower, and the bending radius (Bending R) is also getting smaller and smaller, which easily causes uneven stress distribution in the bending area CC. Figure 1a and Figure 1b As shown in the figure, there are two types of signal routing 01 designs, one is a chain-like routing and the other is a straight routing. However, in the area with the smallest bending radius, which is determined according to the actual product, it may be the bending center area or the bending starting area, both of which will cause bending cracks in the signal routing. Figure 2 shown.

[0074] In view of this, an embodiment of the present disclosure provides a display panel. Figure 3 A schematic plan view of a display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 3 As shown, the display panel has a display area AA, a peripheral area BB surrounding the display area AA, a binding area DD located on a side of the peripheral area BB away from the display area AA, and a bending area CC bent and connected between the peripheral area BB and the binding area DD; the peripheral area BB includes a first transition area BB1 close to the bending area CC. The display panel includes a substrate 1, a signal trace 4 ( Figure 3 Not shown, please refer to the following examples 1 to 13 for details) and the stress dispersion structure 5 ( Figure 3Not shown in the figure, please refer to the drawings of the following examples 1 to 13 for details); wherein, the two ends of the signal line 4 extend from the bending zone CC to the first transition zone BB1 ​​and the binding zone DD respectively. Exemplarily, one end of the signal line 4 extends to the first transition zone BB1 ​​and is electrically connected to the signal line extending from the display area AA to the first transition zone BB1, and the signal line is, for example, a touch electrode or a data line; the other end of the signal line 4 extends to the binding zone DD and is electrically connected to the driver chip located in the binding zone DD. The display panel is bent in the bending zone CC, so that the structure on the binding zone DD (such as the driver chip) is bent to the backlight side of the display panel to achieve a narrow frame. The stress dispersion structure 5 is at least partially located in the bending zone CC, and is used to disperse the bending stress when the signal line 4 is bent.

[0075] The embodiment of the present disclosure essentially adds a stress dispersion structure 5 in the bending zone CC to disperse the bending stress of the signal line 4 in the bending zone CC when it is bent, thereby eliminating the bending crack defect caused by the defects of the related art.

[0076] Before describing the stress dispersion structure 5 in detail, it is necessary to determine the position of the signal trace 4 of the present disclosure. In some embodiments, Figure 4 A schematic diagram of stacking various film layers in the display area provided in an embodiment of the present disclosure, such as Figure 4 As shown, the display panel includes a first conductive layer SD1, a first insulating layer PLN1, a second conductive layer SD2, a second insulating layer PLN2 and a third conductive layer SD3 arranged in sequence in a direction away from the base substrate 1; the display panel includes a light-emitting device 2 and a pixel driving circuit 3 for driving the light-emitting device 2; the source and drain of the transistor in the pixel driving circuit 3 are arranged in at least one of the first conductive layer SD1, the second conductive layer SD2 and the third conductive layer SD3. For example, the source and drain of the transistor in the pixel driving circuit 3 are arranged in the same layer, and are arranged in a three-layer wiring layout, which are respectively arranged in the first conductive layer SD1, the second conductive layer SD2 and the third conductive layer SD3. At the same time, the signal wiring 4 is located in the second conductive layer SD2, and can be electrically connected to the source or drain of the transistor in the pixel driving circuit 3.

[0077] Exemplarily, the light emitting device 2 is an OLED device. The pixel driving circuit 3 is a relatively complex circuit structure, such as 7T1C (7 transistors and 1 capacitor, such as Figure 4 The source and drain of multiple transistors, as well as the electrical connection structure of the source or drain of multiple transistors, can be realized through the first conductive layer SD1, the second conductive layer SD2 and the third conductive layer SD3, for example, the electrode cross-layer connection is realized by a via hole penetrating the first insulating layer PLN1 and / or the second insulating layer PLN2.

[0078] In order to solve the crack defect of the CC signal line 4 in the bending area, the stress dispersion structure 5 is described in detail below with a specific example.

[0079] In some embodiments, the orthographic projection of the stress dispersion structure 5 on the substrate 1 is located between the orthographic projections of adjacent signal traces 4 on the substrate 1 , so as to disperse the bending stress of the signal traces 4 located in the bending region CC by means of the stress dispersion structure 5 .

[0080] Optionally, Figure 5a and Figure 5b They are the planar schematic diagrams of different types of signal routing and the stress dispersion structure in Example 1, as shown in Figure 5a and Figure 5b As shown, the orthographic projection of the stress dispersion structure 5 on the substrate 1 is spaced apart from the orthographic projection of the adjacent signal trace 4 on the substrate 1. In this example, the stress dispersion structure 5 is disposed between the adjacent signal traces 4 and is spaced apart. By utilizing the narrower stress dispersion structure 5, the bending stress of the signal trace 4 located in the bending zone CC is dispersed without increasing the bending stress of the stress dispersion structure 5 itself.

[0081] Optionally, Figure 6a and Figure 6b They are the planar schematic diagrams of different types of signal routing and the stress dispersion structure in Example 2, as shown in Figure 6a and Figure 6b As shown, the orthographic projection of the stress dispersion structure 5 on the substrate 1 contacts the orthographic projection of the adjacent signal trace 4 on the substrate 1 .

[0082] Alternatively, if Figure 6a and Figure 6b As shown, the stress dispersion structure 5 includes a plurality of via holes V0 penetrating along the thickness direction thereof, and the via holes V0 are used to further disperse the bending stress of the stress dispersion structure 5 .

[0083] Optionally, for Example 1 and Example 2, Figure 7a This is a cross-sectional diagram of an example of a signal routing and stress dispersion structure. Figure 7a As shown, the stress dispersion structure 5 and the signal trace 4 are layered, for example, the stress dispersion structure 5 is located in the third conductive layer SD3.

[0084] Optionally, for Example 1 and / or Example 2, Figure 7b FIG. 1 is a cross-sectional diagram of another example of a signal routing and a stress dispersion structure. Figure 7b As shown, the stress dispersion structure 5 is located in the first conductive layer SD1.

[0085] Optionally, for Example 1 and / or Example 2, the stress dispersion structure 5 and the signal trace 4 are disposed in the same layer, that is, both are located in the second conductive layer SD2.

[0086] In some embodiments, the stress dispersion structure 5 includes a first substructure 51 located in the first conductive layer SD1; the orthographic projection of the first substructure 51 on the substrate substrate 1 at least partially overlaps with the orthographic projection of the signal line 4 on the substrate substrate 1. In this embodiment, the stress dispersion structure 5 is arranged on the signal line 4 and forms a double-layer composite film layer (SD1+SD2 double-layer composite film layer) with the signal line 4, thereby improving the bending stress of the overall bending structure of the bending zone CC.

[0087] Figure 8a and Figure 8b They are respectively the planar schematic diagrams of different types of signal routing and the stress dispersion structure under Example 3. It should be noted that, for the sake of easy understanding, the film layer of the stress dispersion structure 5 in this schematic diagram is made transparent to see through the signal routing 4 below, but this does not mean that the actual structure of the film layer is a transparent film layer; in addition, in order to show the film layer structure more clearly, the film layer is staggered, and the actual film layer stacking structure shall be subject to the actual contents of the specification. Figure 8a and Figure 8b As shown, two ends of the first substructure 51 extend from the bending area CC to the first transition area BB1 and the binding area DD respectively, and the orthographic projection of the first substructure 51 on the substrate 1 completely overlaps with the orthographic projection of the signal trace 4 on the substrate 1 .

[0088] The display panel includes a plurality of signal lines 4, and the plurality of signal lines 4 are arranged side by side along a first direction X. The stress dispersion structure 5 includes a plurality of first substructures 51 arranged side by side along the first direction X. The extension direction of the first substructure 51 is the same as the extension direction of the signal line 4, which is the second direction Y. The first direction X intersects the second direction Y. For example, the first direction X is perpendicular to the second direction Y.

[0089] Optionally, Figure 8c Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 3. Figure 8c As shown, the two ends of the first substructure 51 are electrically connected to the two ends of the signal line 4 through two first connection vias V1 penetrating the first insulating layer PLN1. In this example, the first substructure 51 is connected end to end with the signal line 4, and the two are connected in parallel, which can improve the problem of the signal line 4 being broken and open due to abnormal particles. Because, if the signal line 4 is open, the signal path can be maintained with the help of the first substructure 51 connected end to end with it.

[0090] Optionally, the first substructure 51 and the signal wiring 4 are spaced apart from each other, that is, a first insulating layer PLN1 is disposed between the two.

[0091] In some embodiments, the stress dispersion structure 5 is a second substructure 52 located on the third conductive layer SD3; the orthographic projection of the second substructure 52 on the substrate substrate 1 at least partially overlaps with the orthographic projection of the signal line 4 on the substrate substrate 1. In this embodiment, the stress dispersion structure 5 is arranged under the signal line 4 and forms a double-layer composite film layer (SD2+SD3 double-layer composite film layer) with the signal line 4, thereby improving the bending stress of the overall bending structure of the bending zone CC.

[0092] Figure 9a and Figure 9b They are respectively the plan schematic diagrams of different types of signal traces and the stress dispersion structure in Example 4. It should be noted that, for the sake of easy understanding, the film layer of the stress dispersion structure 5 in this schematic diagram is made transparent to see through the signal trace 4 below, but this does not mean that the actual structure of the film layer is a transparent film layer. Figure 9a and Figure 9b As shown, the two ends of the second substructure 52 extend from the bending area CC to the first transition area BB1 and the binding area DD respectively, and the orthographic projection of the second substructure 52 on the substrate 1 completely overlaps with the orthographic projection of the signal line 4 on the substrate 1. The extension direction of the second substructure 52 is the same as the extension direction of the signal line 4, both of which are the second direction Y.

[0093] Optionally, Fig.9c Schematic diagram of the cross section of the signal routing and the stress dispersion structure in Example 4. Fig.9c As shown, the two ends of the second substructure 52 are electrically connected to the two ends of the signal line 4 through two second connection vias V2 penetrating the second insulating layer PLN2. In this example, the second substructure 52 is connected end to end with the signal line 4, and the two are connected in parallel, which can improve the problem of the signal line 4 being broken and open due to abnormal particles. Because, if the signal line 4 is open, the signal path can be maintained with the help of the second substructure 52 connected end to end with it.

[0094] Optionally, the second substructure 52 and the signal wiring 4 are spaced apart from each other, that is, a second insulating layer PLN2 is disposed between the two.

[0095] In some embodiments, the stress dispersion structure 5 includes a first substructure 51 located in the first conductive layer SD1 and a second substructure 52 located in the third conductive layer SD3; the orthographic projections of the first substructure 51, the second substructure 52 and the signal trace 4 on the substrate 1 at least partially overlap.

[0096] Fig.10a and Fig.10bThe schematic diagrams are respectively plan views of different types of signal routing and stress dispersion structure in Example 5. It should be noted that, for the sake of easy understanding, the film layer of the stress dispersion structure 5 in this schematic diagram is made transparent to see through the signal routing 4 below, but this does not mean that the actual structure of the film layer is a transparent film layer. The difference between Example 6 and Example 4 is that a second substructure 52 is added. The difference between Example 6 and Example 5 is that a first substructure 51 is added. Fig.10a and Fig.10b As shown, the orthographic projections of the first substructure 51 and the second substructure 52 on the substrate 1 are completely overlapped, and the completely overlapped orthographic projections cover the orthographic projection of the signal trace 4 on the substrate 1 .

[0097] Optionally, Fig.10c Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 5. Fig.10c As shown, the two ends of the first substructure 51 are electrically connected to the two ends of the signal line 4 through two first connection vias V1 penetrating the first insulating layer PLN1; the two ends of the second substructure 52 are electrically connected to the two ends of the signal line 4 through two second connection vias V2 penetrating the second insulating layer PLN2. In this example, the first substructure 51 is connected end to end to the signal line 4, and the second substructure 52 is connected end to end to the signal line 4. The three are connected in parallel in pairs, which can improve the problem of the signal line 4 being broken and open due to abnormal particles. Because, if the signal line 4 is open, the signal path can be maintained with the help of the first substructure 51 and / or the second substructure 52 connected end to end to it.

[0098] Optionally, the first substructure 51 is spaced apart from the signal wiring 4 , that is, a first insulating layer PLN1 is disposed between the two; the second substructure 52 is spaced apart from the signal wiring 4 , that is, a second insulating layer PLN2 is disposed between the two.

[0099] In some embodiments, Fig.11 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 6. Fig.11 As shown, the stress dispersion structure 5 includes a third substructure 53 located in the first conductive layer SD1; the signal trace 4 includes a first trace 41 located in the bending area CC, a second trace 42 located in the first transition area BB1, and a third trace 43 located in the binding area DD; the orthographic projection of the third substructure 53 on the substrate substrate 1 overlaps with the orthographic projection of the first trace 41 on the substrate substrate 1; the first insulating layer PLN1 includes a first slot 61 located in the bending area CC; the first slot 61 penetrates the first insulating layer PLN1 along the thickness direction of the first insulating layer PLN1; wherein the first trace 41 and the third substructure 53 are in contact through the first slot 61. Specifically, the surface of the third substructure 53 facing away from the substrate substrate 1 is in direct contact with the surface of the first trace 41 close to the substrate substrate 1.

[0100] For example, the first slot 61 penetrates the first insulating layer PLN1 along the thickness direction of the first insulating layer PLN1, exposing the third substructure 53, so that the first trace 41 formed thereon directly falls into the first slot 61 and directly contacts the exposed third substructure 53. Alternatively, the third substructure 53 is arranged in the first slot 61, so that the first trace 41 formed thereon directly contacts the surface of the third substructure 53 away from the substrate 1.

[0101] In this embodiment, by adding the third substructure 53 directly contacting the first wiring 41 , the material thickness of the first wiring 41 in the bending region CC is indirectly increased, thereby improving the stress concentration of the signal wiring 4 in the bending region CC.

[0102] Optionally, the thickness of the third substructure 53 is greater than or equal to the thickness of the first wiring 41. The thickness of the third substructure 53 is 1 to 2 times the thickness of the first wiring 41.

[0103] Optionally, the signal wiring 4 includes a plurality of wirings, and the first slots 61 include a plurality of wirings. The first slots 61 are arranged in a one-to-one correspondence with the signal wirings 4. The third substructures 53 are arranged in a one-to-one correspondence with the signal wirings 4.

[0104] In some embodiments, Fig.12 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 7. Fig.12 As shown, the stress dispersion structure 5 includes a fourth substructure 54 located in the third conductive layer SD3; the signal trace 4 includes a first trace 41 located in the bending area CC, a second trace 42 located in the first transition area BB1, and a third trace 43 located in the binding area DD; the orthographic projection of the fourth substructure 54 on the substrate substrate 1 overlaps with the orthographic projection of the first trace 41 on the substrate substrate 1; the second insulating layer PLN2 includes a second slot 62 located in the bending area CC; the second slot 62 penetrates the second insulating layer PLN2 along the thickness direction of the second insulating layer PLN2; the first trace 41 and the fourth substructure 54 are in contact through the second slot 62. Specifically, the surface of the fourth substructure 54 close to the substrate substrate 1 is in direct contact with the surface of the first trace 41 away from the substrate substrate 1.

[0105] For example, the second groove 62 penetrates the second insulating layer PLN2 along the thickness direction of the second insulating layer PLN2 (that is, the third direction Z), exposing the first wiring 41, so that the fourth substructure 54 formed thereon directly falls into the second groove 62 and directly contacts the surface of the exposed first wiring 41 away from the substrate 1.

[0106] In this embodiment, by adding the fourth substructure 54 directly contacting the first wiring 41 , the material thickness of the first wiring 41 in the bending region CC is indirectly increased, thereby improving the stress concentration of the signal wiring 4 in the bending region CC.

[0107] Optionally, the thickness of the fourth substructure 54 is greater than or equal to the thickness of the first wiring 41. The thickness of the fourth substructure 54 is 1 to 2 times the thickness of the first wiring 41.

[0108] Optionally, the signal wiring 4 includes a plurality of wirings, and the second slots 62 include a plurality of wirings. The second slots 62 are arranged in a one-to-one correspondence with the signal wirings 4. The fourth substructures 54 are arranged in a one-to-one correspondence with the signal wirings 4.

[0109] In some embodiments, Fig.13 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 8. The difference between Example 8 and Example 6 is that a fourth substructure 54 is added; the difference between Example 8 and Example 7 is that a third substructure 53 is added. Fig.13 As shown, the stress dispersion structure 5 includes a third substructure 53 located in the first conductive layer SD1 and a fourth substructure 54 located in the third conductive layer SD3; the orthographic projection of the third substructure 53 on the substrate substrate 1 overlaps with the orthographic projection of the first routing line 41 on the substrate substrate 1; the orthographic projection of the fourth substructure 54 on the substrate substrate 1 overlaps with the orthographic projection of the first routing line 41 on the substrate substrate 1; the first insulating layer PLN1 includes a first groove 61 located in the bending area CC; the first groove 61 penetrates the first insulating layer PLN1 along the thickness direction of the first insulating layer PLN1; the first routing line 41 contacts the third substructure 53 through the first groove 61; the second insulating layer PLN2 includes a second groove 62 located in the bending area CC; the second groove 62 penetrates the second insulating layer PLN2 along the thickness direction of the second insulating layer PLN2; the first routing line 41 contacts the fourth substructure 54 through the second groove 62. Specifically, the surface of the third substructure 53 facing away from the substrate 1 is in direct contact with the surface of the first trace 41 close to the substrate 1 ; the surface of the fourth substructure 54 close to the substrate 1 is in direct contact with the surface of the first trace 41 facing away from the substrate 1 .

[0110] In this embodiment, by adding the third substructure 53 and the fourth substructure 54 directly contacting the first wiring 41 , the material thickness of the first wiring 41 in the bending region CC is indirectly increased, thereby improving the stress concentration of the signal wiring 4 in the bending region CC.

[0111] Optionally, the first conductive layer SD1, the second conductive layer SD2 and the third conductive layer SD3 have the same thickness. That is, the third substructure 53, the fourth substructure 54 and the first routing line 41 have the same thickness. In this embodiment, the stress concentration of the routing line in the bending area CC is improved by increasing the thickness of the first routing line 41 in the bending area CC by 200%.

[0112] Alternatively, the present embodiment can improve the stress concentration of the CC line in the bending area by using the third substructure 53 as a sacrificial layer or the fourth substructure 54 as a tensile stress sacrificial layer to ensure that the structure of the first line 41 is intact.

[0113] In some embodiments, Fig.14a and Fig.14b They are the planar schematic diagrams of different types of signal routing and the stress dispersion structure in Example 9. Fig.14c Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 9. Figure 14a to Figure 14c As shown, the first insulating layer PLN1 includes a plurality of first grooves 71 extending along a first direction X; the first grooves 71 penetrate at least a portion of the first insulating layer PLN1 along the thickness direction (third direction Z) of the second insulating layer PLN2; the first direction X is cross-arranged with the extension direction (second direction Y) of the signal line 4, for example, the first direction X is perpendicular to the second direction Y. A plurality of first grooves 71 are arranged side by side along the extension direction of the signal line 4, and at least a portion of the plurality of first grooves 71 are distributed in the bending area CC. The first groove 71 extends along the first direction X, and its orthographic projection on the substrate 1 crosses the orthographic projection of each signal line 4 on the substrate 1. The signal line 4 falls into the first groove 71 in its extension direction, and the signal line 4 falling into the first groove 71 is reused as the fifth substructure 55 of the stress dispersion structure 5. In this embodiment, the first insulating layer PLN1 is grooved to allow the signal line 4 to be distributed in a serpentine shape at least in the bending area CC, such as a horizontal "bow" shape, thereby increasing the length of the signal line 4 and alleviating the bending stress. When bending, the stress is more concentrated on the first groove 71 of the first insulating layer PLN1, rather than on the plane of the signal line 4.

[0114] Optionally, the first groove 71 penetrates part of the first insulating layer PLN1 along the third direction Z, that is, the first groove 71 is a blind groove.

[0115] Alternatively, if Fig.14c As shown, the first groove 71 penetrates the first insulating layer PLN1 along the third direction Z, that is, the first groove 71 is a through groove.

[0116] Alternatively, if Fig.14a and Fig.14b As shown, the plurality of first grooves 71 are evenly distributed in the bending zone CC, a partial sub-region of the first transition zone BB1 ​​close to the bending zone CC, and a partial sub-region of the binding zone DD close to the bending zone CC.

[0117] Alternatively, if Fig.14c As shown, the first groove 71 includes a first side wall and a first bottom wall, and the dihedral angle a1 between the extended surface of the first side wall and the plane where the first bottom wall is located is an acute angle to prevent stress concentration.

[0118] In some embodiments, Fig.15a and Fig.15b They are the planar schematic diagrams of different types of signal routing and the stress dispersion structure in Example 10. Fig.15c Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 10. Figure 15a to Figure 15c As shown, the difference from Example 9 is that the stress dispersion structure 5 also includes a sixth substructure 56. Specifically, the second insulating layer PLN2 includes a plurality of second grooves 72 extending along the first direction X; the second grooves 72 penetrate at least part of the second insulating layer PLN2 along the thickness direction (third direction Z) of the second insulating layer PLN2; the first direction X is arranged crosswise with the extension direction (second direction Y) of the signal wiring 4, for example, the first direction X is perpendicular to the second direction Y. A plurality of second grooves 72 are arranged side by side along the extension direction of the signal wiring 4, and at least part of the plurality of second grooves 72 are distributed in the bending area CC. The second groove 72 extends along the first direction X, and its orthographic projection on the substrate 1 crosses the orthographic projection of each signal wiring 4 on the substrate 1. The stress dispersion structure 5 includes a sixth substructure 56 located in the third conductive layer SD3, and the orthographic projection of the sixth substructure 56 on the substrate 1 overlaps with the orthographic projection of the signal wiring 4 on the substrate 1; in the extension direction of the signal wiring 4, the portion of the sixth substructure 56 falling into the second groove 72 contacts the signal wiring 4. In this embodiment, grooves are respectively dug for the first insulating layer PLN1 and the second insulating layer PLN2, so that the signal line 4 and the sixth substructure 56 are respectively distributed in a serpentine shape, such as a horizontal "bow" shape, at least in the bending area CC. While increasing the length of the signal line 4, the length of the sixth substructure 56 is also increased, thereby alleviating the bending stress. When bending, the stress is more concentrated on the first groove 71 and the second groove 72, rather than on the plane of the signal line 4.

[0119] Alternatively, if Fig.15c As shown, the second groove 72 penetrates the second insulating layer PLN2 along the third direction Z, that is, the second groove 72 is a through groove. The sixth substructure 56 contacts the signal trace 4 through the second groove 72 .

[0120] Optionally, the plurality of second grooves 72 are evenly distributed in the bending zone CC, a partial sub-region of the first transition zone BB1 ​​close to the bending zone CC, and a partial sub-region of the binding zone DD close to the bending zone CC.

[0121] Alternatively, if Fig.15c As shown, the second groove 72 includes a second side wall and a second bottom wall, and the dihedral angle a2 between the extended surface of the second side wall and the plane where the second bottom wall is located is an acute angle to prevent stress concentration.

[0122] Optionally, the sixth substructure 56 is arranged in one-to-one correspondence with the signal trace 4. The extension direction of the sixth substructure 56 is the same as the extension direction of the signal trace 4. The orthographic projection of the sixth substructure 56 on the substrate 1 completely overlaps with the orthographic projection of the signal trace 4 on the substrate 1.

[0123] Optionally, the orthographic projections of the plurality of second grooves 72 and the plurality of first grooves 71 on the base substrate 1 are alternately arranged.

[0124] In some embodiments, Fig.16 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 11. Fig.16 As shown, the second insulating layer PLN2 includes a plurality of second grooves 72 extending along the first direction X; the second grooves 72 penetrate at least part of the second insulating layer PLN2 along the thickness direction (third direction Z) of the second insulating layer PLN2; the first direction X is arranged crosswise with the extension direction (second direction Y) of the signal wiring 4, for example, the first direction X is perpendicular to the second direction Y. A plurality of second grooves 72 are arranged side by side along the extension direction of the signal wiring 4, and at least part of the plurality of second grooves 72 are distributed in the bending area CC. The second grooves 72 extend along the first direction X, and their orthographic projections on the substrate 1 cross the orthographic projections of each signal wiring 4 on the substrate 1. The stress dispersion structure 5 includes a sixth substructure 56 located in the third conductive layer SD3, and the orthographic projection of the sixth substructure 56 on the substrate 1 overlaps with the orthographic projection of the signal wiring 4 on the substrate 1; in the extension direction of the signal wiring 4, the portion of the sixth substructure 56 falling into the second groove 72 contacts the signal wiring 4. In this embodiment, the second insulating layer PLN2 is grooved so that the sixth substructure 56 is distributed in a serpentine shape at least in the bending area CC, such as a horizontal "bow" shape, thereby increasing the length of the sixth substructure 56 and alleviating the bending stress. When bending, the stress is more concentrated in the second groove 72 rather than on the plane of the signal line 4.

[0125] In the present disclosure, the first groove 71 and / or the second groove 72 can be prepared by a halftone mask (also called a grayscale mask) process. The halftone mask is a semi-transparent light-shielding film attached to a photomask so that the transmittance of light gradually decreases from the center of the groove to the edge, thereby forming a trapezoidal groove.

[0126] In some embodiments, Fig.17 is a schematic cross-sectional view of the second conductive layer located in the display area, such as Fig.17As shown, the second conductive layer SD2 includes a first titanium material layer 81, an aluminum material layer 82, and a second titanium material layer 83 arranged in sequence in a direction away from the base substrate 1. The materials of the first titanium material layer 81 and the second titanium material layer 83 are both titanium; the material of the aluminum material layer 82 is aluminum. Among them, the lower titanium (Ti) metal layer acts as a barrier layer, which can effectively prevent the electromigration problem of metal aluminum, thereby extending the service life of the light-emitting device 2. The upper titanium (Ti) metal layer acts as an anti-reflection layer, which can effectively reduce the standing wave effect and improve the signal transmission quality and stability of the circuit.

[0127] This embodiment can be combined with any of the above embodiments, and with the help of the stress dispersion structure 5, the stress in the bending zone CC is further dispersed to improve the crack defect.

[0128] Optionally, the first conductive layer SD1 and the second conductive layer SD2 adopt the same structural design, ie, Ti / Al / Ti.

[0129] Optionally, the third conductive layer SD3 and the second conductive layer SD2 adopt the same structural design, ie, Ti / Al / Ti.

[0130] In some embodiments, Fig.18 is a schematic cross-sectional view of a second conductive layer located in a bending region, such as Fig.18 As shown, the first routing line 41 of the signal routing line 4 located in the bending area CC is located in the aluminum material layer 82. That is, the difference between the first routing line 41 and the signal routing line 4 in the display area AA is that the single-layer aluminum material layer 82 design is adopted, which not only ensures that the first titanium metal layer in the display area AA can directly contact the active layer of the transistor, but also ensures that only the aluminum material layer 82 is left in the bending area CC, and utilizes the characteristics of the aluminum material layer 82 with higher ductility, more advantageous bending modulus and variability to improve the crack defect when the first routing line 41 is bent.

[0131] This embodiment can be combined with any of the above embodiments, and with the help of the stress dispersion structure 5, the stress in the bending zone CC is further dispersed to improve the crack defect.

[0132] Optionally, the first conductive layer SD1 and Fig.18 The second conductive layer SD2 shown in FIG. 1 has the same structural design. Optionally, the third conductive layer SD3 and Fig.18 The second conductive layer SD2 shown adopts the same structural design.

[0133] In some embodiments, Fig.19 is a cross-sectional schematic diagram of another second conductive layer located in the bending region, such as Fig.19As shown, the first routing line 41 includes a first sub-routing line 411 located in the aluminum material layer 82 and a second sub-routing line 412 located in the second titanium material layer 83. That is, the difference between the first routing line 41 and the signal routing line 4 in the display area AA is that the double-layer design of the lower aluminum material layer 82 and the upper titanium material layer is adopted, which not only ensures that the first titanium metal layer in the display area AA can directly contact the active layer of the transistor, but also ensures that the first titanium material layer 81 is etched away in the bending area CC, and utilizes the characteristics of the aluminum material layer 82 with higher ductility, more advantageous bending modulus and variability to improve the crack defect when the first routing line 41 is bent. At the same time, using the second titanium material layer 83 as an anti-reflection layer can effectively reduce the standing wave effect and improve the signal transmission quality and stability of the circuit.

[0134] This embodiment can be combined with any of the above embodiments, and with the help of the stress dispersion structure 5, the stress in the bending zone CC is further dispersed to improve the crack defect.

[0135] Optionally, the first conductive layer SD1 and Fig.19 The second conductive layer SD2 shown in FIG. 1 has the same structural design. Optionally, the third conductive layer SD3 and Fig.19 The second conductive layer SD2 shown adopts the same structural design.

[0136] Optionally, the above Fig.18 and / or Fig.19 Each sub-layer in the second conductive layer SD2 shown can be formed by a mask process with a specific pattern, or can also be formed by coating a whole layer of material and then etching.

[0137] In some embodiments, Fig. 20 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 12. Fig. 20 As shown, the first titanium material layer 81 includes a first opening 91 located in the bending area CC, and part of the aluminum material layer 82 and part of the second titanium material layer 83 located in the bending area CC fall into the first opening 91, and the part of the aluminum material layer 82 and part of the second titanium material layer 83 falling into the first opening 91 are reused as the stress dispersion structure 5. The first opening 91 is formed by etching away the first titanium material layer 81 located in the bending area CC, so that only the aluminum material layer 82 and the first titanium material layer 81 are retained in the bending area CC, and the characteristics of the aluminum material layer 82 are used to improve stress concentration, thereby improving crack defects.

[0138] In some embodiments, Fig.21 Schematic diagram of the cross section of the signal line and the stress dispersion structure in Example 13. Fig.21As shown, the first titanium material layer 81 includes a first opening 91 located in the bending zone CC, and the second titanium material layer 83 includes a second opening 92 located in the bending zone CC, and the second opening 92 exposes a portion of the aluminum material layer 82 located in the bending zone CC. The portion of the aluminum material layer 82 located in the bending zone CC falls into the first opening 91, and the portion of the aluminum material layer 82 that falls into the first opening 91 is reused as the stress dispersion structure 5. The first opening 91 is formed by etching away the first titanium material layer 81 located in the bending zone CC; and the second opening 92 is formed by etching away the second titanium material layer 83 located in the bending zone CC, so that the upper and lower surfaces of the aluminum material layer 82 located in the bending zone CC that are relatively arranged in the extended thickness direction are exposed, ensuring that only the aluminum material layer 82 is left in the bending zone CC, and utilizing the characteristics of the aluminum material layer 82 with higher ductility, more advantageous bending modulus and more flexible characteristics, to improve the crack defect when the first routing line 41 is bent.

[0139] For example, Figure 4 As shown, the display panel also includes a buffer structure layer B1 arranged on the side of the pixel driving circuit 3 close to the base substrate 1, and the buffer structure layer includes a single layer or a multi-layer structure, for example, including a buffer layer (Buffer) and a barrier layer (Barrier+). The material of the buffer layer can be amorphous silicon (a-Si), silicon nitride (SiNx), silicon oxide (SiOx) and a combination of one or more layers.

[0140] For example, Figure 4 As shown, the display panel also includes a driving layer arranged on the side of the buffer structure layer B1 away from the base substrate 1, the driving layer includes a pixel driving circuit 3, and the pixel driving circuit 3 includes at least a driving transistor TFT and a storage capacitor Cst. The driving transistor TFT includes an active layer, a gate, and a source-drain electrode arranged in sequence along a direction away from the base substrate 1. The driving layer also includes a first gate insulating layer G1 arranged between the active layer and the gate, a second gate insulating layer G2 arranged on the side of the gate away from the active layer, and an interlayer insulating layer ILD arranged on the side of the second gate insulating layer G2 away from the first gate insulating layer G1. The source and the drain are both arranged on the side of the interlayer insulating layer ILD away from the second gate insulating layer G2, and the upper plate and the lower plate of the storage capacitor Cst are respectively arranged on two opposite sides of the second gate insulating layer G2 in its thickness direction.

[0141] For example, Figure 4 As shown, the first insulating layer PLN1 is arranged on the side of the source and drain electrodes away from the interlayer insulating layer ILD, and is used to planarize the driving layer. The second insulating layer PLN2 is used to planarize the second conductive layer SD2. The third insulating layer is used to planarize the third conductive layer SD3.

[0142] For example, Figure 4As shown, the light-emitting device 2 is an OLED device, including a first electrode 21, a light-emitting functional layer 22, and a second electrode 23 arranged in sequence in a direction away from the substrate 1. Among them, one of the first electrode 21 and the second electrode 23 is an anode, and the other is a cathode. The present disclosure takes the first electrode 21 as an anode and the second electrode 23 as a cathode as an example for explanation. The light-emitting functional layer 22 can be a single-layer or multi-layer structure, and the light-emitting functional layer 22 at least includes a light-emitting layer.

[0143] It should be noted that the light-emitting device 2 involved in the embodiment of the present disclosure may include but is not limited to an organic light-emitting diode OLED, and may also be a quantum dot light-emitting diode (Quantum Dot Light Emitting Diodes, QLED) or a micro light-emitting diode (Micro Light Emitting Diodes, Micro LED), etc.

[0144] Optionally, the light emitting device 2 is an OLED device, and the display panel is an OLED display panel.

[0145] Optionally, the light emitting device 2 is a Micro LED device, and the display panel is a Micro LED display panel.

[0146] For example, the material of the substrate may include but is not limited to one of polyimide (PI), polyethylene naphthalene-2,6-dicarboxylate (PEN), polyethylene terephthalate (PET), colorless polyimide (CPI), thermoplastic urethane (TUP), or ultra-thin glass (UTG). In practical applications, a suitable material can be selected according to actual needs.

[0147] In addition, the embodiment of the present disclosure further provides a display device, which includes the display panel of any one of the above embodiments. The display device can be, for example, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a vehicle-mounted device, or any other product with a display function. Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be described in detail here, nor should they be used as limitations to the present disclosure.

[0148] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel comprising a display area, a peripheral area surrounding the display area, a binding area located at a side of the peripheral area away from the display area, and a bending area bent and connected between the peripheral area and the binding area; the peripheral area comprises a first transition area close to the bending area; The display panel includes a base substrate, a signal wiring and a stress dispersion structure arranged on the base substrate; wherein, Two ends of the signal line extend from the bending area to the first transition area and the binding area respectively; The stress dispersion structure is at least partially located in the bending area, and is used to disperse the bending stress of the signal line when it is bent.

2. The display panel according to claim 1, wherein: The display panel comprises a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a third conductive layer which are sequentially arranged in a direction away from the base substrate; The display panel includes a light emitting device and a pixel driving circuit for driving the light emitting device; The source and drain of the transistor in the pixel driving circuit are arranged in at least one of the first conductive layer, the second conductive layer and the third conductive layer; the signal wiring is located in the second conductive layer.

3. The display panel according to claim 2, wherein: The orthographic projection of the stress dispersion structure on the substrate is located between the orthographic projections of adjacent signal traces on the substrate.

4. The display panel according to claim 3, wherein: The stress dispersion structure and the signal wiring are arranged on the same layer.

5. The display panel according to claim 3, wherein: The stress dispersion structure is located in the first conductive layer or the third conductive layer.

6. The display panel according to claim 2, wherein: The stress dispersion structure is a first substructure located in the first conductive layer; The orthographic projection of the first substructure on the substrate at least partially overlaps with the orthographic projection of the signal trace on the substrate.

7. The display panel according to claim 2, wherein: The stress dispersion structure is a second substructure located in the third conductive layer; The orthographic projection of the second substructure on the substrate at least partially overlaps with the orthographic projection of the signal trace on the substrate.

8. The display panel according to claim 2, wherein: The stress dispersion structure includes a first substructure located in the first conductive layer and a second substructure located in the third conductive layer; The orthographic projections of the first substructure, the second substructure, and the signal trace on the substrate at least partially overlap.

9. The display panel according to claim 8, wherein: The two ends of the first substructure are electrically connected to the two ends of the signal routing through two first connection vias penetrating the first insulating layer; the two ends of the second substructure are electrically connected to the two ends of the signal routing through two second connection vias penetrating the second insulating layer.

10. The display panel according to claim 2, wherein: The stress dispersion structure includes a third substructure located in the first conductive layer; the signal routing includes a first routing located in the bending area, a second routing located in the first transition area, and a third routing located in the binding area; the orthographic projection of the third substructure on the substrate overlaps with the orthographic projection of the first routing on the substrate; The first insulating layer comprises a first slot located in the bending area; the first slot penetrates the first insulating layer along a thickness direction of the first insulating layer; The first trace is in contact with the third substructure through the first slot.

11. The display panel according to claim 2 or 10, wherein: The stress dispersion structure includes a fourth substructure located in the third conductive layer; the signal routing includes a first routing located in the bending area, a second routing located in the first transition area, and a third routing located in the binding area; the orthographic projection of the fourth substructure on the substrate overlaps with the orthographic projection of the first routing on the substrate; The second insulating layer includes a second slot located in the bending area; The second slot penetrates the second insulating layer along the thickness direction of the second insulating layer; The first trace is in contact with the fourth substructure through the second slot.

12. The display panel according to claim 2, wherein: The first insulating layer comprises a plurality of first grooves extending along a first direction; the first grooves penetrate at least a portion of the first insulating layer along a thickness direction of the second insulating layer; the first direction is arranged to intersect with an extension direction of the signal wiring; A plurality of the first grooves are arranged side by side along the extension direction of the signal line, and at least part of the plurality of the first grooves are distributed in the bending area; The signal line falls into the first groove in its extension direction, and the signal line falling into the first groove is reused as the fifth substructure of the stress dispersion structure.

13. The display panel according to claim 12, wherein: The first groove includes a first side wall and a first bottom wall, and a dihedral angle between an extended surface of the first side wall and a plane where the first bottom wall is located is an acute angle.

14. The display panel according to claim 2 or 12, wherein: The second insulating layer comprises a plurality of second grooves extending along a first direction; the second grooves penetrate at least a portion of the second insulating layer along a thickness direction of the second insulating layer; the first direction is arranged to intersect with an extension direction of the signal wiring; A plurality of the second grooves are arranged side by side along the extension direction of the signal line, and at least part of the plurality of the second grooves are distributed in the bending area; The stress dispersion structure comprises a sixth substructure located in the third conductive layer, and an orthographic projection of the sixth substructure on the substrate overlaps with an orthographic projection of the signal trace on the substrate; In the extending direction of the signal line, the portion of the sixth substructure falling into the second groove contacts the signal line.

15. The display panel according to claim 14, wherein: The orthographic projections of the plurality of second grooves and the plurality of first grooves on the base substrate are arranged alternately.

16. The display panel according to claim 2, wherein: The second conductive layer includes a first titanium material layer, an aluminum material layer and a second titanium material layer which are sequentially arranged in a direction away from the base substrate.

17. The display panel according to claim 16, wherein: The signal routing includes a first routing located in the bending area, a second routing located in the first transition area, and a third routing located in the binding area; the first routing is located in the aluminum material layer.

18. The display panel according to claim 16, wherein: The signal routing line includes a first routing line located in the bending area, a second routing line located in the first transition area, and a third routing line located in the binding area; The first routing line includes a first sub-routing line located in the aluminum material layer and a second sub-routing line located in the second titanium material layer.

19. The display panel according to claim 16, wherein: The first titanium material layer includes a first opening located in the bending area, and part of the aluminum material layer and part of the second titanium material layer located in the bending area fall into the first opening, and the part of the aluminum material layer and part of the second titanium material layer falling into the first opening are reused as the stress dispersion structure.

20. The display panel according to claim 16, wherein: The first titanium material layer includes a first opening located in the bending area, and the second titanium material layer includes a second opening located in the bending area, wherein the second opening exposes a portion of the aluminum material layer located in the bending area; The portion of the aluminum material layer located in the bending area falls into the first opening, and the portion of the aluminum material layer falling into the first opening is reused as the stress dispersion structure.

21. A display device, wherein: The invention comprises the display panel according to any one of claims 1 to 20.

Images