Display substrate and display device

Abstract

The invention discloses a display substrate and a display device. The display substrate comprises a substrate body, a light-emitting structure layer and a protruding structure, the substrate body comprises a display area, the display area comprises a first display area and a conventional display area at least partially surrounding the first display area, and the first display area comprises a plurality of sub-pixel areas arranged at intervals in the direction parallel to the substrate body; the projection structure is located between the pixel definition layer and the first electrode, and the orthographic projection of the projection structure on the substrate is located in the first display area and is not overlapped with the sub-pixel area; the protruding structure comprises a plurality of bosses, the bosses are arranged at intervals in the direction parallel to the base, and a first gap is formed in the space between every two adjacent bosses. The first electrode is provided with a light-transmitting channel, the light-transmitting channel is configured to transmit light in the direction perpendicular to the substrate, and the orthographic projection of the light-transmitting channel on the substrate is located in the first display area and overlapped with the orthographic projection of the first gap on the substrate.

Description

Technical Field

[0001] The present invention relates to display technology, and more particularly to a display substrate and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and Quantum-dot Light Emitting Diode (QLED) are active light-emitting display devices with the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, extremely high response speed, light weight, flexibility and low cost.

[0003] In order to further expand the screen-to-body ratio, the camera can be placed under the display screen and the area where the camera is located can be made into a translucent area, so that the area where the front camera is located can also display images, forming an Under Display Camera (UDC). Summary of the invention

[0004] The present application provides a display substrate, including:

[0005] A substrate, comprising a display area, wherein the display area comprises a first display area and a conventional display area at least partially surrounding the first display area, wherein the first display area comprises a plurality of sub-pixel areas arranged at intervals in a direction parallel to the substrate;

[0006] a light-emitting structure layer, disposed on the substrate, the light-emitting structure layer comprising a plurality of light-emitting devices and a pixel definition layer, the light-emitting device comprising an organic light-emitting layer and a first electrode sequentially arranged in a direction away from the substrate, the orthographic projection of the organic light-emitting layer on the substrate overlaps with the sub-pixel region, and the first electrode is located on a side of the pixel definition layer away from the substrate;

[0007] A protrusion structure is located between the pixel definition layer and the first electrode, wherein the orthographic projection of the protrusion structure on the substrate is located in the first display area and does not overlap with the sub-pixel area; the protrusion structure comprises a plurality of bosses, wherein the plurality of bosses are arranged at intervals in a direction parallel to the substrate, and the spaces between adjacent bosses form a first gap;

[0008] The first electrode is provided with a light-transmitting channel, and the light-transmitting channel is configured to transmit light in a direction perpendicular to the substrate. The orthographic projection of the light-transmitting channel on the substrate is located in the first display area and overlaps with the orthographic projection of the first gap on the substrate.

[0009] In some exemplary embodiments, the first electrode covers the end surface of the boss away from the substrate, the first electrode does not extend to the first gap, and the first gap is configured to block the first electrode to form the light-transmitting channel on the first electrode.

[0010] In some exemplary embodiments, the first electrode is formed on the pixel definition layer and the boss by an evaporation device having an evaporation source;

[0011] The height of the boss is d, and the plurality of bosses are arranged at intervals in a first direction, and the first direction is parallel to the base;

[0012] The width of the first gap is L, and the width of the first gap is set to be the minimum distance of the first gap in the first direction;

[0013] The minimum distance between the evaporation source and the pixel definition layer in a direction perpendicular to the substrate is Ts, and the distance between the evaporation source and the center of the first gap in the first direction is D, wherein L / d=D / Ts.

[0014] In some exemplary embodiments, the height of the mesas is set to be greater than 5 microns.

[0015] In some exemplary embodiments, the width of the boss is set to be no greater than 10 micrometers, and the width of the boss is set to be the maximum dimension of the boss in the first direction.

[0016] In some exemplary embodiments, the width of the first gap is no greater than 5 microns.

[0017] In some exemplary embodiments, an end surface of at least one end of the boss in the first direction is set as an inclined surface, an angle between the inclined surface and the first plane is set to θ1, and the first plane is parallel to the base;

[0018] The evaporation angle of the evaporation device is set to θ2, wherein θ1>θ2.

[0019] In some exemplary embodiments, θ1>45°.

[0020] In some exemplary embodiments, an end surface of the boss away from the base is a first arc surface.

[0021] In some exemplary embodiments, a tangent line of one end of the first curved surface close to the substrate is a first tangent line, an angle between the first tangent line and a first plane is set to θ3, the first plane is parallel to the substrate, and θ3≤45°.

[0022] In some exemplary embodiments, at least two of the bosses are spaced apart in a first direction, and the first direction is parallel to the base;

[0023] The cross section of the boss in a direction perpendicular to the base is arranged to be rectangular, trapezoidal, T-shaped, I-shaped, fan-shaped or arched.

[0024] In some exemplary embodiments, the width of the boss is set to decrease linearly in a direction away from the substrate, or the width of the boss is set to increase linearly in a direction away from the substrate, the width of the boss is set to be the size of the boss in the first direction, and the cross-section of the boss perpendicular to the substrate direction is set to be trapezoidal.

[0025] In some exemplary embodiments, a first groove is provided on a side wall of the boss, the first groove is arranged in a ring shape around the circumference of the boss, and the cross section of the boss perpendicular to the direction of the base is arranged in an I-shape.

[0026] In some exemplary embodiments, the display substrate includes a target sub-pixel located in the first display area, the target sub-pixel includes a first pixel circuit and a first light-emitting device, and the first pixel circuit and the first light-emitting device are electrically connected;

[0027] The first light emitting device includes a first light emitting layer, and an orthographic projection of at least part of the first pixel circuit on the substrate is arranged not to overlap with an orthographic projection of the first light emitting layer on the substrate.

[0028] In some exemplary embodiments, the display substrate further comprises a plurality of regular sub-pixels located in the regular display area, the regular sub-pixels comprising a second pixel circuit and a second light emitting device, the second pixel circuit and the second light emitting device being electrically connected;

[0029] The second light emitting device includes a second light emitting layer, and an orthographic projection of at least part of the second pixel circuit on the substrate is arranged not to overlap with an orthographic projection of the second light emitting layer on the substrate.

[0030] In some exemplary embodiments, a packaging structure layer is further included, wherein the packaging structure layer is located on a side of the light emitting structure layer away from the substrate;

[0031] The refractive index of the packaging structure layer is set to η1, the refractive index of the boss is set to η2, and |η1-η2|≤0.5.

[0032] In some exemplary embodiments, a packaging structure layer is also included, which includes a first packaging layer formed by inkjet printing, the thickness of the first packaging layer is not less than 10 microns, and the thickness of the first packaging layer is set to the minimum dimension of the first packaging layer in a direction perpendicular to the substrate.

[0033] In some exemplary embodiments, the material of the boss includes a non-deformable material, and the non-deformable material includes silicon oxynitride, silicon oxide, silicon nitride, and a resin material;

[0034] Alternatively, the material of the boss includes a deformable material, and the deformable material includes a resin material.

[0035] In some exemplary embodiments, a spacer layer is further included, and both the spacer layer and the protruding structure are arranged on the end surface of the pixel definition layer away from the substrate, and the spacer layer and the protruding structure are arranged in the same layer.

[0036] In some exemplary embodiments, the first display area further includes a light-transmitting area located between adjacent sub-pixel areas, and a pattern of the light-transmitting area is set to be a non-annular pattern.

[0037] An embodiment of the present application provides a display device, including the above-mentioned display substrate.

[0038] The display substrate of the embodiment of the present application can use the protruding structure to produce a shadow effect in the evaporation process, so that the first electrode forms a hollow structure in the first display area, thereby improving the light transmittance of the first electrode. The display substrate of the embodiment of the present application can use a deformable boss, and the boss morphology can be changed by heating treatment, thereby solving the problem of poor packaging reliability and uneven display brightness caused by the height and shape of the boss.

[0039] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0041] Figure 1 is a structural schematic diagram of a display device;

[0042] Figure 2 It is a schematic diagram of a planar structure of a display substrate;

[0043] Figure 3 is a schematic diagram of a display substrate of this exemplary embodiment;

[0044] Figure 4 for Figure 3 Schematic diagram of the aa-direction cross section;

[0045] Figure 5for Figure 4 A local enlarged schematic diagram of point A in FIG.

[0046] Figure 6 is a schematic diagram of preparing the first electrode of this exemplary embodiment;

[0047] Figure 7 for Figure 3 Schematic diagram of the bb section;

[0048] Figure 8 is a schematic diagram of another display substrate of this exemplary embodiment;

[0049] Fig. 9 for Figure 8 A local enlarged schematic diagram of point B in FIG.

[0050] Fig.10 for Fig. 9 Schematic diagram of preparation of the first electrode;

[0051] Fig.11 is a schematic diagram of another display substrate of this exemplary embodiment;

[0052] Fig.12 is a schematic diagram of another display substrate of this exemplary embodiment;

[0053] Fig.13 for Fig.12 A local enlarged schematic diagram of point C in FIG.

[0054] Fig.14 is a schematic diagram of another display substrate of this exemplary embodiment;

[0055] Fig.15 is a schematic diagram of another display substrate of this exemplary embodiment;

[0056] Fig.16 for Fig.15 A local enlarged schematic diagram of point D in FIG.

[0057] Fig.17 is a first preparation schematic diagram of a display substrate of this exemplary embodiment;

[0058] Fig.18 is a second schematic diagram of preparing a display substrate according to the exemplary embodiment;

[0059] Fig.19 is a third schematic diagram of preparing a display substrate of this exemplary embodiment;

[0060] Fig. 20 It is a fourth schematic diagram of preparing a display substrate according to this exemplary embodiment. DETAILED DESCRIPTION

[0061] The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0062] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme. Therefore, it should be understood that any feature shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

[0063] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.

[0064] In some exemplary embodiments, a display substrate includes:

[0065] The present application provides a display substrate, including:

[0066] A substrate, comprising a display area, wherein the display area comprises a first display area and a conventional display area at least partially surrounding the first display area, wherein the first display area comprises a plurality of sub-pixel areas arranged at intervals in a direction parallel to the substrate;

[0067] a light-emitting structure layer, disposed on the substrate, the light-emitting structure layer comprising a plurality of light-emitting devices and a pixel definition layer, the light-emitting device comprising an organic light-emitting layer and a first electrode sequentially arranged in a direction away from the substrate, the orthographic projection of the organic light-emitting layer on the substrate overlaps with the sub-pixel region, and the first electrode is located on a side of the pixel definition layer away from the substrate;

[0068] A protrusion structure is located between the pixel definition layer and the first electrode, wherein the orthographic projection of the protrusion structure on the substrate is located in the first display area and does not overlap with the sub-pixel area; the protrusion structure comprises a plurality of bosses, wherein the plurality of bosses are arranged at intervals in a direction parallel to the substrate, and the spaces between adjacent bosses form a first gap;

[0069] The first electrode is provided with a light-transmitting channel, and the light-transmitting channel is configured to transmit light in a direction perpendicular to the substrate. The orthographic projection of the light-transmitting channel on the substrate is located in the first display area and overlaps with the orthographic projection of the first gap on the substrate.

[0070] In some exemplary embodiments, the first electrode covers the end surface of the boss away from the substrate, the first electrode does not extend to the first gap, and the first gap is configured to block the first electrode to form the light-transmitting channel on the first electrode.

[0071] In some exemplary embodiments, the first electrode is formed on the pixel definition layer and the boss by an evaporation device having an evaporation source;

[0072] The height of the boss is d, and the plurality of bosses are arranged at intervals in a first direction, and the first direction is parallel to the base;

[0073] The width of the first gap is L, and the width of the first gap is set to be the minimum distance of the first gap in the first direction;

[0074] The minimum distance between the evaporation source and the pixel definition layer in a direction perpendicular to the substrate is Ts, and the distance between the evaporation source and the center of the first gap in the first direction is D, wherein L / d=D / Ts.

[0075] In some exemplary embodiments, at least two of the bosses are spaced apart in a first direction, and the first direction is parallel to the base;

[0076] The cross section of the boss in a direction perpendicular to the base is arranged to be rectangular, trapezoidal, T-shaped, I-shaped, fan-shaped or arched.

[0077] In some exemplary embodiments, a packaging structure layer is further included, wherein the packaging structure layer is located on a side of the light emitting structure layer away from the substrate;

[0078] The refractive index of the packaging structure layer is set to η1, the refractive index of the boss is set to η2, and |η1-η2|≤0.5.

[0079] In some exemplary embodiments, the encapsulation structure layer includes a first encapsulation layer formed by inkjet printing, the thickness of the first encapsulation layer is not less than 10 microns, and the thickness of the first encapsulation layer is set to the minimum dimension of the first encapsulation layer in a direction perpendicular to the substrate.

[0080] Figure 1 FIG. 1 is a schematic diagram of the structure of a display device. Figure 1As shown, the display device may include a timing controller, a data driver, a scan driver, a light emitting driver and a pixel array, the timing controller is respectively connected to the data driver, the scan driver and the light emitting driver, the data driver is respectively connected to a plurality of data signal lines (D1 to Dn), the scan driver is respectively connected to a plurality of scan signal lines (S1 to Sm), and the light emitting driver is respectively connected to a plurality of light emitting signal lines (E1 to Eo). The pixel array may include a plurality of sub-pixels Pxij, i and j may be natural numbers, at least one sub-pixel Pxij may include a circuit unit and a light emitting device connected to the circuit unit, the circuit unit may include a pixel driving circuit, and the pixel driving circuit is connected to the scan signal line, the light emitting signal line and the data signal line. In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specifications of the data driver to the data driver, may provide a clock signal suitable for the specifications of the scan driver, a scan start signal, etc. to the scan driver, and may provide a clock signal suitable for the specifications of the light emitting driver, an emission stop signal, etc. to the light emitting driver. The data driver can generate data voltages to be provided to data signal lines D1, D2, D3, ... and Dn using grayscale values ​​and control signals received from the timing controller. For example, the data driver can sample grayscale values ​​using a clock signal, and apply data voltages corresponding to grayscale values ​​to data signal lines D1 to Dn in units of unit lines, where n can be a natural number. The scan driver can generate scan signals to be provided to scan signal lines S1, S2, S3, ... and Sm by receiving clock signals, scan start signals, etc. from the timing controller. For example, the scan driver can sequentially provide scan signals with conduction level pulses to scan signal lines S1 to Sm. For example, the scan driver can be constructed in the form of a shift register, and can sequentially transmit scan start signals provided in the form of conduction level pulses to the next level circuit under the control of the clock signal to generate scan signals, where m can be a natural number. The light-emitting driver can generate emission signals to be provided to light-emitting signal lines E1, E2, E3, ... and Eo by receiving clock signals, emission stop signals, etc. from the timing controller. For example, the light emitting driver may sequentially provide an emission signal having a cut-off level pulse to the light emitting signal lines E1 to Eo. For example, the light emitting driver may be configured in the form of a shift register, and may generate an emission signal in a manner of sequentially transmitting an emission stop signal provided in the form of a cut-off level pulse to a next stage circuit under the control of a clock signal, and o may be a natural number. In an exemplary embodiment, a pixel array may be provided on a display substrate.

[0081] Figure 2 FIG. 1 is a schematic diagram of a planar structure of a display substrate. Figure 2As shown, the display substrate may include a plurality of pixel units P arranged in a matrix, and at least one pixel unit P may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. Each sub-pixel may include a circuit unit and a light-emitting device, and the circuit unit may include at least a pixel driving circuit, and the pixel driving circuit is respectively connected to the scanning signal line, the light-emitting signal line, and the data signal line, and the pixel driving circuit is configured to receive the data voltage transmitted by the data signal line under the control of the scanning signal line and the light-emitting signal line, and output a corresponding current to the light-emitting device. The light-emitting device in each sub-pixel is respectively connected to the pixel driving circuit of the sub-pixel, and the light-emitting device is configured to emit light of corresponding brightness in response to the current output by the pixel driving circuit of the sub-pixel.

[0082] In some exemplary embodiments, the first sub-pixel P1 may be a red sub-pixel (R) emitting red light, the second sub-pixel P2 may be a blue sub-pixel (B) emitting blue light, and the third sub-pixel P3 may be a green sub-pixel (G) emitting green light. In an exemplary embodiment, the shape of the sub-pixel Px may be a rectangle, a rhombus, a pentagon, or a hexagon, and the three sub-pixels Px may be arranged in a horizontal parallel, vertical parallel, or in a square, etc., which is not limited in the present disclosure. In some exemplary embodiments, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be arranged along a straight line, but are not limited thereto. For example, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 may be arranged in a non-straight line such as a square arrangement. In some exemplary embodiments, the pixel unit P may include four sub-pixels Px, and the four sub-pixels Px may be arranged in a horizontal parallel, vertical parallel, or in a square, etc., which is not limited in the present disclosure.

[0083] Figure 3 is a schematic diagram of a display substrate of this exemplary embodiment, Figure 4 for Figure 3 In the aa-direction cross-sectional schematic diagram, in some exemplary embodiments, Figure 4 In the figure, the structure of a sub-pixel in the display area is taken as an example for illustration. In some exemplary embodiments, Figures 2 to 4 As shown, the pixel circuit of each sub-pixel Px includes a transistor 210, and the transistor 210 may be a low-temperature polysilicon thin film transistor.

[0084] In some exemplary embodiments, Figure 4As shown, in a direction perpendicular to the display substrate, the display area of ​​the display substrate may include at least: a substrate 100, and a circuit structure layer 200, a light emitting structure layer 300, and an encapsulation structure layer 400 sequentially arranged on the substrate 100. The circuit structure layer 200 may include at least: a pixel circuit of a plurality of sub-pixels Px, and the pixel circuit of each sub-pixel Px may include a plurality of transistors and at least one capacitor. The light emitting structure layer 300 may include at least: a light emitting device of a plurality of sub-pixels. In other examples, a touch structure layer may be provided on the side of the encapsulation structure layer 400 away from the substrate 100 to integrate a touch function.

[0085] In some exemplary embodiments, Figure 4 As shown, the circuit structure layer 200 of the display area may include: a shielding layer 209, a semiconductor layer, a first conductive layer (also referred to as a first gate metal layer), a second conductive layer (also referred to as a second gate metal layer), and a third conductive layer (also referred to as a first source-drain metal layer) disposed on the substrate 100. A first insulating layer (also referred to as a buffer layer) 212 may be disposed between the shielding layer 209 and the semiconductor layer; a second insulating layer (also referred to as a first gate insulating layer) 213 may be disposed between the semiconductor layer and the first conductive layer; a third insulating layer (also referred to as a second gate insulating layer) 214 may be disposed between the first conductive layer and the second conductive layer; a fourth insulating layer (also referred to as an interlayer insulating layer) 215 may be disposed between the second conductive layer and the third conductive layer; and a fifth insulating layer (also referred to as a first flat layer) 216 may be disposed on the side of the third conductive layer away from the substrate 100. Among them, the first insulating layer 212, the second insulating layer 213, the third insulating layer 214, the fourth insulating layer 215, and the fifth insulating layer 216 may be inorganic insulating layers, and the fifth insulating layer 216 may be an organic insulating layer. The material of the inorganic insulating layer may include inorganic film layers such as silicon oxide (SiO) and silicon nitride (SiN); the material of the organic insulating layer may include resin materials. The material of the above-mentioned conductive layer may include metal materials or conductive oxides, and the metal materials may be titanium (Ti), aluminum (Al), molybdenum (Mo), copper (Cu), etc. The conductive oxide may be indium tin oxide (ITO), indium zinc oxide (IZO), etc.

[0086] In some exemplary embodiments, Figure 4As shown, the semiconductor layer of the display area may include: an active layer 201 of a transistor 210 of a pixel circuit. The active layer 201 of the transistor 210 may include: a first region 202, a second region 204, and a channel region 203 located between the first region 202 and the second region 204. The first conductive layer may include: a first gate 205 of the transistor 210. The orthographic projection of the first gate 205 of the transistor 210 on the substrate 100 may cover the orthographic projection of the channel region 203 of the active layer 201 on the substrate 100.

[0087] In some exemplary embodiments, Figure 4 As shown, the third conductive layer of the display area may include: a first source 206 and a first drain 207 of the transistor 210. The first source 206 of the transistor 210 may be electrically connected to the first region 202 of the active layer 201, and the first drain 207 may be electrically connected to the second region 204 of the first active layer 201. The first drain 207 of the transistor 210 may be electrically connected to the second electrode 301 through a via hole to achieve electrical connection between the pixel circuit and the light-emitting device.

[0088] In some exemplary embodiments, Figure 4As shown, the light emitting structure layer 300 may include: a pixel definition layer 304 and a plurality of light emitting devices 305. For example, each light emitting device 305 may include: a stacked second electrode 301, an organic light emitting layer 302 and a first electrode 303. The second electrode 301 of the light emitting device 305 may be an anode, and the second electrode 301 may be disposed on the fifth insulating layer 216, and electrically connected to the first drain electrode 207 through a via hole provided in the fifth insulating layer 216. The pixel definition layer 304 is disposed on the second electrode 301 and the fifth insulating layer 216, and the pixel definition layer 304 may be provided with a plurality of pixel openings, and one pixel opening may expose at least a portion of the surface of a corresponding second electrode 301. At least a portion of the organic light emitting layer 302 may be disposed in a pixel opening and connected to the corresponding second electrode 301. The first electrode 303 may be disposed on the organic light emitting layer 302 and connected to the organic light emitting layer 302, and the plurality of light emitting devices 305 may share the first electrode 303. The organic light emitting layer 302 can emit light under the drive of the second electrode 301 and the first electrode 303. In some exemplary embodiments, the organic light emitting layer 302 of the light emitting device 305 may include at least one light emitting layer (EML), and at least one of the following film layers: a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron blocking layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL). Under the voltage drive of the second electrode 301 and the first electrode 303, the light emitting characteristics of the organic material can be used to emit light according to the required grayscale.

[0089] In some exemplary embodiments, Figure 4As shown, the encapsulation structure layer 400 may include a stacked second encapsulation layer, a first encapsulation layer, and a third encapsulation layer. Among them, the second encapsulation layer and the third encapsulation layer may be made of inorganic materials, such as silicon nitride, silicon oxide, silicon oxynitride, etc. The inorganic material has high density and can prevent the intrusion of water, oxygen, etc. The first encapsulation layer may be arranged between the first encapsulation layer and the third encapsulation layer to ensure that external water vapor cannot enter the light-emitting device 305, and the first encapsulation layer may be prepared by inkjet printing (Inkjet Printing, referred to as IJP). The first encapsulation layer may be made of organic materials, for example, it may be a polymer material containing a desiccant or a polymer material that can block water vapor, or it may be a polymer resin, etc. to flatten the surface of the display substrate, and it may relieve the stress of the second encapsulation layer and the third encapsulation layer, and it may also include a desiccant and other water-absorbing materials to absorb water, oxygen, and other substances that invade the interior. However, this embodiment is not limited to this. For example, the encapsulation structure layer may adopt a five-layer stacked structure of inorganic / organic / inorganic / organic / inorganic.

[0090] In some exemplary embodiments, Figure 4 As shown, the display substrate also includes an optical structure layer 500 and a cover plate 600. The optical structure layer 500 can be arranged on the side of the packaging structure layer 400 away from the substrate 100. The optical structure layer 500 can include a color filter layer 501 arranged on the side of the packaging structure layer 400 away from the substrate 100 and a cover layer (OverCoat, OC for short) 502 arranged on the side of the color filter layer 501 away from the substrate 100. The color filter layer 501 is configured to filter the white light emitted by the light-emitting structure layer 300 into corresponding monochromatic light. The cover layer 502 can be a filling glue material for the color filter layer 501. In addition, the optical structure layer 500 can also include an anti-reflection layer, which is configured to increase the transmittance and reduce the reflection of external light. The cover plate 600 can be located on the side of the optical structure layer 500 away from the substrate 100, which can improve the strength of the display substrate.

[0091] In some exemplary embodiments, Figures 2 to 4 As shown, the substrate 100 of the display substrate may be a glass substrate, but is not limited thereto, and may also be a polyimide substrate. The substrate 100 of the display substrate may include a display area AA and a peripheral area BB surrounding the periphery of the display area AA. In some exemplary embodiments, the display area AA may include a plurality of sub-pixel areas C0 arranged in a matrix manner, the sub-pixels Px may be arranged one-to-one with the sub-pixel areas C0, and the sub-pixels Px may include a pixel driving circuit and a light-emitting device 305. The peripheral area BB may have an isolation dam, a gate driving circuit, and a power line for transmitting voltage signals to a plurality of sub-pixels, and the isolation dam of the peripheral area BB forms a ring structure surrounding the display area AA.

[0092] The applicant found that the lower-screen camera allows the area where the front camera is located to display images, thereby increasing the screen-to-body ratio. However, the first electrode 303 of the light-emitting structure layer 300 has a low transmittance, which is usually lower than 60%. The low transmittance has a greater impact on the camera effect and affects the user experience.

[0093] The technical solution of the embodiment of the present invention is described in detail below through specific embodiments.

[0094] Figure 5 for Figure 4 In the partially enlarged schematic diagram of A in FIG. 1 , in some exemplary embodiments, as shown in FIG. Figures 2 to 4 As shown, the display substrate may include a substrate 100, a light emitting structure layer 300, and a protruding structure 700. The substrate 100 may include a display area AA, the display area AA may include a first display area A1 and a conventional display area A0 at least partially surrounding the first display area A1, and the first display area A1 may include a plurality of sub-pixel areas C2 arranged at intervals in a direction parallel to the substrate 100. The light emitting structure layer 300 may be disposed on the substrate 100, and the light emitting structure layer 300 may include a plurality of light emitting devices 305 and a pixel definition layer 304, the light emitting device 305 includes an organic light emitting layer 302 and a first electrode 303 arranged in sequence in a direction away from the substrate 100, the orthographic projection of the organic light emitting layer 302 on the substrate 100 overlaps with the sub-pixel area C2, and the first electrode 303 may be located on a side of the pixel definition layer 304 away from the substrate 100. The protruding structure 700 may be located between the pixel definition layer 304 and the first electrode 303, and the orthographic projection of the protruding structure 700 on the substrate 100 is located in the first display area A1 and does not overlap with the sub-pixel area C2. The protruding structure 700 may include a plurality of bosses 702, and the plurality of bosses 702 may be arranged at intervals in a direction parallel to the substrate 100, and the space between adjacent bosses 702 forms a first gap 701. The first electrode 303 may be provided with a light-transmitting channel 800, and the light-transmitting channel 800 is configured to transmit light in a direction perpendicular to the substrate 100 (i.e., the second direction), and the orthographic projection of the light-transmitting channel 800 on the substrate 100 is located in the first display area A1 and overlaps with the orthographic projection of the first gap 701 on the substrate 100. Therefore, the display substrate of this example can use the protruding structure 700 to generate a shadow effect in the evaporation process, so that the first electrode 303 forms a hollow structure in the first display area A1, thereby improving the light transmittance of the first electrode 303.

[0095] In some exemplary embodiments, Figures 2 to 5As shown, the base 100 of the display substrate may include a display area AA, and the display area AA may include a plurality of sub-pixel areas C0 arranged in an array manner, and the sub-pixels in the display substrate are arranged one by one corresponding to the sub-pixel areas C0. The other areas of the display area AA except the first display area A1 are the conventional display area A0, and the front camera (not shown in the figure) may be arranged corresponding to the first display area A1 to form a lower screen camera. A plurality of sub-pixel areas C0 may be evenly distributed in the first display area A1 and the conventional display area A0, the sub-pixel area C0 in the first display area A1 may be the sub-pixel area C2, and the sub-pixel area C0 in the conventional display area A0 may be the sub-pixel area C1. However, it is not limited thereto, and the distribution density of the sub-pixel area C0 in the first display area A1 and the conventional display area A0 may be different, for example, the distribution density of the sub-pixel area C0 in the first display area A1 is less than the distribution density of the conventional display area A0. In addition to the sub-pixel area C2, the first display area A1 also includes an area between adjacent sub-pixel areas C2, which may include a light-transmitting area C3, so that the light-transmitting area C3 is located between adjacent sub-pixel areas C2. The protrusion structure 700 may be arranged in the light-transmitting area C3, that is, the orthographic projection of the protrusion structure 700 on the substrate 100 is located in the light-transmitting area C3.

[0096] In some exemplary embodiments, Figures 2 to 5 As shown, three adjacent sub-pixel regions C2 may constitute a pixel region unit CC, and a plurality of pixel region units CC are arranged in a matrix. The pattern of the light-transmitting region C3 between adjacent sub-pixel regions C2 in a pixel region unit CC may be a non-annular pattern, so that the light-transmitting region C3 may be arranged in a non-closed manner to prevent the cathode signal from being blocked by the protruding structure 700. For example, the three sub-pixel regions C2 in a pixel region unit CC are arranged in a "pink" shape, and the pattern of the light-transmitting region C3 in a pixel region unit CC may be a "Y" shape. The light-transmitting regions C3 in a plurality of pixel region units CC are arranged in an array.

[0097] In some exemplary embodiments, Figures 2 to 5As shown, one end of the boss 702 may be located on the end surface of the pixel definition layer 304 away from the substrate 100, and the other end extends in a direction away from the substrate 100. A plurality of bosses 702 may be arranged in an array on a plane parallel to the substrate 100, and at least two bosses 702 may be arranged at intervals in the first direction, and the first direction is parallel to the substrate 100. The height of the boss 702 is d, and the height (d) of the boss 702 may be the size of the boss 702 in the second direction; the width (S) of the boss 702 may be the maximum size of the boss 702 in the first direction; the width of the first gap 701 may be L, and the width of the first gap 701 may be the minimum distance of the first gap 701 in the first direction. The cross section of the boss 702 in the direction perpendicular to the substrate 100 may be a rectangle, and the width (S) of the boss 702 remains unchanged along the second direction. However, it is not limited thereto, and the cross section of the boss 702 in the direction perpendicular to the substrate 100 may also be a trapezoid, a T-shaped, an I-shaped, a fan-shaped, an arched shape, etc.

[0098] In some exemplary embodiments, Figures 3 to 5 As shown, the material of the boss 702 includes a non-deformable material, which includes silicon oxynitride, silicon oxide, silicon nitride and resin materials, and the non-deformable material does not change its shape when heated. However, it is not limited to this, for example, the material of the boss 702 includes a deformable material, which includes a resin material, and the deformable material can change its shape when heated.

[0099] In some exemplary embodiments, Figures 3 to 5 As shown, the display substrate also includes a spacer layer (not shown in the figure), which provides support for the fine metal mask used in the subsequent evaporation process. The spacer layer and the protruding structure 700 are both arranged on the end surface of the pixel definition layer 304 away from the substrate 100. The spacer layer can be made of the same material as the protruding structure 700 and arranged in the same layer. During the preparation process, the protruding structure 700 can be formed synchronously with the spacer layer.

[0100] In some exemplary embodiments, Figures 3 to 5As shown, the encapsulation structure layer 400 is located on the side of the light emitting structure layer 300 away from the substrate 100, the refractive index of the encapsulation structure layer 400 may be η1, and the refractive index of the boss 702 may be η2, wherein |η1-η2|≤0.5, so that the refractive index of the encapsulation structure layer 400 may be close to the refractive index of the boss 702, which can avoid strong reflection at the contact interface between the boss 702 and the encapsulation structure layer 400 and reduce light transmission. In some exemplary embodiments, the encapsulation structure layer 400 may include a second encapsulation layer, a first encapsulation layer, and a third encapsulation layer arranged in sequence away from the substrate 100, wherein the material of the second encapsulation layer of the encapsulation structure layer 400 may be silicon oxynitride, and the material of the boss 702 may be the same as the material of the second encapsulation layer. The refractive index of the material of the second encapsulation layer of the encapsulation structure layer 400 is 1.7, and the material of the boss 702 may be other materials with a refractive index close to 1.7 and different from the material of the second encapsulation layer, for example, a deformable resin material with a refractive index of 1.8.

[0101] In some exemplary embodiments, the first encapsulation layer of the encapsulation structure layer 400 may be formed by inkjet printing, and the thickness of the first encapsulation layer is not less than 10 microns, and the thickness of the first encapsulation layer is set to the minimum dimension of the first encapsulation layer in a direction perpendicular to the substrate 100. The thickness of the first encapsulation layer is relatively large, and material leveling can be achieved even with the boss 702 to avoid uneven brightness.

[0102] Figure 6 is a schematic diagram of preparing the first electrode of this exemplary embodiment. In some exemplary embodiments, as Figures 3 to 6 As shown, the first electrode 303 is formed by evaporation by an evaporation device having an evaporation source W. During the evaporation process of the first electrode 303, the height limit of the boss 702, the spacing between the bosses 702 and the evaporation angle limit of the evaporation device cause the electrode material that should be deposited in the first gap 701 to be deposited on the side wall of the boss 702, resulting in a shadow effect. There is no electrode material in the first gap 701, thereby reducing the "front" evaporation area of ​​the first electrode 303. The side wall of the boss 702 may be a portion of the outer surface of the boss 702 between the end face away from the substrate 100 and the end face close to the substrate 100. The first electrode 303 may cover the end face of the boss 702 away from the substrate 100, and the first electrode 303 does not extend to the first gap 701, so that the first gap 701 blocks the first electrode 303, and the first electrode 303 forms a light-transmitting channel 800 at the first gap 701.

[0103] In some exemplary embodiments, Figures 3 to 6As shown, during the evaporation process, the minimum distance between the evaporation source W and the pixel definition layer 304 in the direction perpendicular to the substrate 100 may be Ts, and the distance between the evaporation source W and the center of the first gap 701 in the first direction is D, and the center of the first gap 701 may be the middle position of the first gap 701 in the first direction. Wherein, L / d=D / Ts, for example, Ts=800mm, D=380mm, when the width (L) of the first gap 701 between the bosses 702 is 3 microns, the height (d) of the boss 702 is about 6.3 microns according to the above formula (i.e., L / d=D / Ts). When the height (d) of the boss 702 is higher than 6.3um, the first gap 701 between the bosses 702 will not be able to evaporate electrode materials. When the width (L) of the first gap 701 between the bosses 702 is reduced, the height (d) of the boss 702 needs to be reduced by a certain height, which can also meet the requirement that no electrode material is evaporated in the first gap 701.

[0104] In some exemplary embodiments, Figures 3 to 6 As shown, the height (d) of the boss 702 may be greater than 5 microns, that is, d>5μm. In this example, the height (d) of the boss 702 may be 6 microns, 7 microns or 8 microns. In some exemplary embodiments, the width (S) of the boss 702 may be no greater than 10 microns, and the smaller the width (S) of the boss 702, the more beneficial it is to the transmittance of the light-transmitting area C3. The width (L) of the first gap 701 may be no greater than 5 microns, and the smaller L is, the less likely it is to deposit electrode materials between the bosses 702, and thus the more beneficial it is to improve the transmittance of the first display area A1.

[0105] In some exemplary embodiments, Figures 3 to 6 As shown, the display substrate includes a target sub-pixel located in the first display area A1, and the target sub-pixel includes a first pixel circuit and a first light-emitting device 305-1, and the first pixel circuit and the first light-emitting device 305-1 are electrically connected. Among them, the first pixel circuit may include a first transistor 217, and the first drain 207 of the first transistor 217 may be electrically connected to the first light-emitting device 305-1. The first light-emitting device 305-1 may include a first light-emitting layer 302-1, and the orthographic projection of at least part of the first pixel circuit on the substrate 100 is set not to overlap with the orthographic projection of the first light-emitting layer 302-1 on the substrate 100, forming an external circuit. The external circuit can increase the transmittance of the transmission area, that is, avoid the first pixel circuit and the first light-emitting device 305-1 from overlapping and reducing the light transmittance.

[0106] Figure 7 for Figure 3 In the bb cross-sectional schematic diagram, in some exemplary embodiments, as Figure 3 and Figure 7As shown, the display substrate also includes a plurality of conventional sub-pixels located in the conventional display area A0, and the conventional sub-pixels may include a second pixel circuit and a second light-emitting device 305-2, and the second pixel circuit may be electrically connected to the second light-emitting device 305-2. Among them, the second pixel circuit may include a second transistor 218, and the first drain 207 of the second transistor 218 may be electrically connected to the second light-emitting device 305-2. The second light-emitting device 305-2 includes a second light-emitting layer 302-2, and the orthographic projection of at least part of the second pixel circuit on the substrate 100 is set not to overlap with the orthographic projection of the second light-emitting layer 302-2 on the substrate 100, forming an external circuit, so that the conventional sub-pixel can be arranged in the same manner as the pixel circuit of the target sub-pixel. However, it is not limited thereto, the second pixel circuit and the second light-emitting device 305-2 of the conventional sub-pixel are stacked in a direction perpendicular to the substrate 100 to form a built-in circuit, thereby improving the resolution of the conventional display area A0.

[0107] Figure 8 is a schematic diagram of another display substrate of this exemplary embodiment, Fig. 9 for Figure 8 In the locally enlarged schematic diagram of B in FIG. 1 , in some exemplary embodiments, as shown in FIG. Figure 8 and Fig. 9 As shown, the cross section of the boss 702 in the direction perpendicular to the substrate 100 may be a trapezoid, and the width of the boss 702 is set to decrease linearly in the direction away from the substrate 100 (the second direction). The width of the boss 702 at one end close to the substrate 100 may be S2, and the width of the boss 702 at one end away from the substrate 100 may be S1, wherein S2>S1. The end surfaces of the boss 702 at both ends in the first direction are the side walls 704 of the boss 702, and the side walls 704 may be inclined surfaces. The angle of the first plane of the side walls 704 is set to θ1, and the first plane is parallel to the substrate 100. In some exemplary embodiments, θ1>45°, which can reduce the space between adjacent bosses 702, thereby improving the transmittance of the first display area.

[0108] Fig.10 for Fig. 9 Schematic diagram of preparing the first electrode, in some exemplary embodiments, as Figures 8 to 10 As shown, the evaporation angle of the evaporation device is set to θ2, wherein the end point of the boss 702 close to the first gap 701 and away from the substrate 100 is J, the center of the evaporation source W can be the geometric center of the evaporation source W, and the angle between the line connecting the end point J and the center of the evaporation source W and the first direction can be the evaporation angle (θ2). In some exemplary embodiments, θ1>θ2, the space between adjacent bosses 702 can be reduced, thereby improving the transmittance of the first display area.

[0109] Fig.11 is a schematic diagram of another display substrate of this exemplary embodiment, such as Fig.11As shown, the cross section of the boss 702 in the direction perpendicular to the substrate 100 may be a trapezoid, and the width of the boss 702 is set to increase linearly along the direction (second direction) away from the substrate 100. The width of the boss 702 near the substrate 100 is smaller than the width of the boss 702 away from the substrate 100.

[0110] Fig.12 is a schematic diagram of another display substrate of this exemplary embodiment, Fig.13 for Fig.12 In the partially enlarged schematic diagram of C in FIG. 1 , in some exemplary embodiments, as shown in FIG. Fig.12 and Fig.13 As shown, the end surface of the boss 702 away from the substrate 100 may be a curved surface, that is, a first curved surface 705. The first curved surface 705 may be a curved surface protruding away from the substrate 100, and one end of the first curved surface 705 close to the substrate 100 extends to the pixel definition layer 304. The first tangent line T1 may be a tangent line of one end of the first curved surface 705 close to the substrate 100, and the first tangent line T1 is on a plane perpendicular to the substrate 100. The angle between the first tangent line T1 and the first plane (not shown in the figure) is set to θ3, and the first plane is parallel to the substrate 100, wherein θ3≤45°, so that the outer contour of the boss 703 is reduced, so that the encapsulation structure layer can better cover the first display area, and improve the encapsulation reliability of the first display area.

[0111] In some exemplary embodiments, Figure 5 , Fig.12 and Fig.13 As shown, the boss 702 is made of a deformable material, and the shape of the boss 702 before the heating treatment can be as follows: Figure 5 The cross section shown is rectangular, and after heating, the shape of the boss 702 may be changed to Fig.12 and Fig.13 The bow shape shown in the figure reduces the external dimensions in the second direction, thereby solving the problems of poor packaging reliability and uneven display brightness caused by excessively high boss height.

[0112] Fig.14 is another schematic diagram of a display substrate of the present exemplary embodiment. In some exemplary embodiments, as Fig.14 As shown, the cross section of the boss 702 in the direction perpendicular to the substrate 100 may be T-shaped. The boss 702 may include a first protrusion 706 and a second protrusion 707, and the second protrusion 707 is located at an end of the first protrusion 706 away from the substrate 100. The width of the first protrusion 706 in the first direction is smaller than the width of the second protrusion 707 in the first direction, so that the boss 702 has a structure that is wide at the top and narrow at the bottom, close to a T-shape. The materials of the first protrusion 706 and the second protrusion 707 may be different.

[0113] Fig.15is a schematic diagram of another display substrate of this exemplary embodiment, Fig.16 for Fig.15 In the partial enlarged schematic diagram of D in FIG. 1 , in some exemplary embodiments, as shown in FIG. Fig.15 and Fig.16 As shown, the side wall 704 of the boss 702 is provided with a first groove 708, and the first groove 708 is recessed from the surface of the side wall 704, and the first groove 708 is formed in a ring around the circumference of the boss 702, so that the width of the boss 702 first narrows and then widens in the direction away from the base 100, so that the cross-section of the boss 702 in the direction perpendicular to the base 100 is close to an "I" shape, which can also be understood as close to a dumbbell shape.

[0114] The following is an exemplary explanation through the preparation process of the display substrate. The "patterning process" mentioned in the present disclosure includes processes such as coating photoresist, mask exposure, development, etching, and stripping photoresist for metal materials, inorganic materials or transparent conductive materials, and includes processes such as coating organic materials, mask exposure and development for organic materials. Deposition can be any one or more of sputtering, evaporation, and chemical vapor deposition, coating can be any one or more of spraying, spin coating and inkjet printing, and etching can be any one or more of dry etching and wet etching, which are not limited in the present disclosure. "Thin film" refers to a layer of thin film made by deposition, coating or other processes of a certain material on the substrate 100. If the "thin film" does not require a patterning process during the entire production process, the "thin film" can also be called a "layer". If the "thin film" requires a patterning process during the entire production process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern". The "A and B are arranged in the same layer" mentioned in the present disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the size of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of the present disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0115] In an exemplary embodiment, a process of preparing a display substrate may include the following steps.

[0116] Step 1: Forming a circuit structure layer.

[0117] Fig.17 FIG. 1 is a first schematic diagram of preparing a display substrate of the present exemplary embodiment. In an exemplary embodiment, forming a circuit structure layer may include:

[0118] An oxide film, a first insulating film and a semiconductor film are sequentially deposited on the substrate 100, and the oxide film and the semiconductor film are patterned through a patterning process to form a blocking layer 209 covering the substrate 100, and a semiconductor layer pattern arranged on the first insulating layer. The semiconductor layer pattern of each sub-pixel may include at least a plurality of active layers 201.

[0119] Subsequently, a second insulating film and a first conductive film are deposited in sequence, and the first conductive film is patterned through a patterning process to form a second insulating layer covering the semiconductor layer pattern, and a first conductive layer pattern arranged on the second insulating layer. The first conductive layer pattern of each sub-pixel can include at least multiple first gates 205.

[0120] Subsequently, a third insulating film and a second conductive film are deposited in sequence, and the second conductive film is patterned through a patterning process to form a third insulating layer covering the first conductive layer, and a second conductive layer pattern arranged on the third insulating layer. The second conductive layer pattern of each sub-pixel can include at least a second gate 208.

[0121] Subsequently, a fourth insulating film is deposited and patterned by a patterning process to form a fourth insulating layer pattern covering the second conductive layer pattern. Two active vias are formed on the fourth insulating layer of each sub-pixel, and the two active vias expose two ends of the active layer respectively.

[0122] Subsequently, a third conductive film is deposited and patterned by a patterning process to form a third conductive layer pattern on the fourth insulating layer. The third conductive layer pattern includes at least: a first source electrode 206 and a first drain electrode 207 located in each sub-pixel. The first source electrode 206 and the first drain electrode 207 are respectively connected to the active layer 201 through active vias.

[0123] Subsequently, a flat film is coated on the substrate 100 with the aforementioned pattern formed thereon, and the flat film is patterned through a patterning process to form a flat layer pattern covering the third conductive layer pattern, and at least one connecting via is formed on the flat layer of each sub-pixel, and the connecting via exposes the surface of the first drain electrode 207 .

[0124] At this point, the circuit structure layer 200 is prepared, and the transistor 210 may include an active layer 201, a first gate 205, a first source 206, and a first drain 207. In an exemplary embodiment, the transistor 210 may be a driving transistor in a pixel driving circuit, and the driving transistor may be a thin film transistor (TFT).

[0125] In an exemplary embodiment, the substrate 100 may be a rigid substrate or a flexible substrate. The rigid substrate may be made of materials such as glass or quartz, and the flexible substrate may be made of materials such as polyimide (PI). The flexible substrate may be a single-layer structure or a laminated structure consisting of an inorganic material layer and a flexible material layer, which is not limited in the present disclosure.

[0126] In an exemplary embodiment, the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiN) and silicon oxynitride (SiON), and may be a single layer, a multilayer or a composite layer. The first insulating layer may be referred to as a buffer layer, the second insulating layer and the third insulating layer may be referred to as a (GI) layer, and the fourth insulating layer may be referred to as an interlayer insulating (ILD) layer. The first conductive layer, the second conductive layer and the third conductive layer may be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single layer structure, or a multilayer composite structure, such as Ti / Al / Ti, etc. The flat layer (fifth insulating layer) may be made of organic materials, such as resin, etc. The semiconductor layer can be made of various materials such as amorphous indium gallium zinc oxide material (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), sexithiophene, polythiophene, etc., that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology, and the present disclosure is not limited here.

[0127] Step 2: forming the light emitting structure layer 300 and the protrusion structure 700 .

[0128] Fig.18 is a second schematic diagram of preparing a display substrate according to this exemplary embodiment, Fig.19 is a third schematic diagram of manufacturing a display substrate of this exemplary embodiment, such as Figures 17 to 19 As shown, in an exemplary embodiment, forming the light emitting structure layer 300 and the protrusion structure 700 may include:

[0129] A fourth conductive film is deposited on the substrate 100 having the pattern formed in the previous step, and the fourth conductive film is patterned by a patterning process to form an anode electrode layer pattern. The anode electrode layer pattern of each sub-pixel may include at least a second electrode 301, and the second electrode 301 is connected to the first drain 207 of the transistor 210 through a connecting via.

[0130] Subsequently, a pixel definition film is coated on the substrate 100 with the aforementioned pattern formed thereon, and the pixel definition film is patterned through a patterning process to form a pixel definition layer 304 . The pixel definition layer 304 of each sub-pixel is provided with a pixel opening, and the pixel definition film in the pixel opening is removed to expose the surface of the second electrode 301 .

[0131] Subsequently, an organic light emitting layer 23 located at each sub-pixel is formed on the substrate 100 with the aforementioned pattern by evaporation or inkjet printing, and the organic light emitting layer 23 is connected to the second electrode 301 through the pixel opening.

[0132] Subsequently, a protrusion structure 700 is formed on the substrate 100 on which the aforementioned pattern is formed.

[0133] Subsequently, a cathode pattern is formed by evaporation using an open mask, and the cathode pattern includes a first electrode 303, and the first electrode 303 is connected to the organic light-emitting layer 23, so that the organic light-emitting layer 23 is simultaneously connected to the second electrode 301 and the first electrode 303. At the same time, during the evaporation process of the first electrode 303, the height limit of the bosses 702, the spacing between the bosses 702, and the evaporation angle limit of the evaporation equipment cause the electrode material that should be deposited between the bosses 702 to be deposited on the sidewalls of the bosses 702, resulting in a shadow effect, and no electrode material in the first gap 701, thereby reducing the "front" evaporation area of ​​the first electrode 303, and forming a light-transmitting channel 800.

[0134] At this point, the pattern of the light emitting structure layer 300 is prepared, and then the encapsulation structure layer 400, the optical structure layer 500 and the cover plate 600 are formed, and the following can be obtained. Figure 4 The display substrate is shown.

[0135] In an exemplary embodiment, the fourth conductive film may be made of a metal material, a transparent conductive material, or a multilayer composite structure of a metal material and a transparent conductive material. The metal material may include any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo), or an alloy material of the above metals. The transparent conductive material may include indium tin oxide (ITO) or indium zinc oxide (IZO). The multilayer composite structure may be ITO / Al / ITO, etc.

[0136] In an exemplary embodiment, the material of the pixel definition film may include polyimide or acrylic, etc. In an exemplary embodiment, a patterning process of a half tone mask may be used to form a spacer column pattern when forming the pixel definition layer 304 pattern, and the spacer column may be disposed outside the pixel opening, and the spacer column is configured to support a fine metal mask in a subsequent evaporation process, which is not limited in the present disclosure.

[0137] In exemplary embodiments, the organic light emitting layer may include a light emitting layer (EML), and any one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0138] In an exemplary embodiment, the organic light-emitting layer can be prepared in the following manner: first, an open mask (OPM) evaporation process or an inkjet printing process is used to sequentially form a hole injection layer, a hole transport layer and an electron blocking layer, and a common layer of the hole injection layer, the hole transport layer and the electron blocking layer is formed on the display substrate. Subsequently, a fine metal mask (FMM) evaporation process or an inkjet printing process is used to form different light-emitting layers in different sub-pixels, and the light-emitting layers of adjacent sub-pixels may have a small amount of overlap (for example, the overlapping portion occupies less than 10% of the area of ​​each light-emitting layer pattern), or may be isolated. Subsequently, an open mask evaporation process or an inkjet printing process is used to sequentially form a hole blocking layer, an electron transport layer and an electron injection layer, and a common layer of the hole blocking layer, the electron transport layer and the electron injection layer is formed on the display substrate.

[0139] In an exemplary embodiment, the organic light-emitting layer may include a microcavity adjustment layer so that the thickness of the organic light-emitting layer between the cathode and the anode meets the design of the microcavity length. In some exemplary embodiments, a hole transport layer, an electron blocking layer, a hole blocking layer or an electron transport layer may be used as the microcavity adjustment layer, and the present disclosure is not limited thereto.

[0140] In an exemplary embodiment, the first electrode 303 may be made of any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the above metals.

[0141] Fig. 20 FIG. 4 is a fourth schematic diagram of manufacturing a display substrate of the present exemplary embodiment. In some exemplary embodiments, in step 2, the material of the protruding structure 700 may be a deformable material, and the deformable material may change shape after being heated to a certain temperature. In some exemplary embodiments, the method for manufacturing the display substrate further includes heating treatment. After the pattern of the light emitting structure layer 300 is prepared, the display substrate obtained is as shown in FIG. Fig.19As shown, the display substrate can then be heated. The heating temperature can be maintained at a preset temperature for a certain period of time, and the preset temperature can be less than or equal to 100°C. During the heating process, the end surface of the boss 702 away from the substrate 100 becomes a curved surface. Subsequently, the encapsulation structure layer 400, the optical structure layer 500 and the cover plate 600 are formed, and the following can be obtained: Fig.12 The display substrate is shown.

[0142] In some exemplary embodiments, a display device includes the above-mentioned display substrate. The display device provided by the embodiments of the present disclosure can be applied to electronic devices, which can be mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo frames, navigators, car displays, wearable devices, and any products or components with display functions, such as smart watches, smart bracelets, smart glasses, smart headphones, smart clothing, head-mounted displays, etc.

[0143] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0144] In addition, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include at least one of the features.

[0145] In the description of the present application, “plurality” means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0146] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0147] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0148] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0149] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A display substrate, characterized in that: include: A substrate, comprising a display area, wherein the display area comprises a first display area and a conventional display area at least partially surrounding the first display area, wherein the first display area comprises a plurality of sub-pixel areas arranged at intervals in a direction parallel to the substrate; a light-emitting structure layer, disposed on the substrate, the light-emitting structure layer comprising a plurality of light-emitting devices and a pixel definition layer, the light-emitting device comprising an organic light-emitting layer and a first electrode sequentially arranged in a direction away from the substrate, the orthographic projection of the organic light-emitting layer on the substrate overlaps with the sub-pixel region, and the first electrode is located on a side of the pixel definition layer away from the substrate; A protrusion structure is located between the pixel definition layer and the first electrode, wherein the orthographic projection of the protrusion structure on the substrate is located in the first display area and does not overlap with the sub-pixel area; the protrusion structure comprises a plurality of bosses, wherein the plurality of bosses are arranged at intervals in a direction parallel to the substrate, and the spaces between adjacent bosses form a first gap; The first electrode is provided with a light-transmitting channel, and the light-transmitting channel is configured to transmit light in a direction perpendicular to the substrate. The orthographic projection of the light-transmitting channel on the substrate is located in the first display area and overlaps with the orthographic projection of the first gap on the substrate.

2. The display substrate according to claim 1, characterized in that: The first electrode covers the end surface of the boss away from the substrate, the first electrode does not extend to the first gap, and the first gap is configured to block the first electrode to form the light-transmitting channel on the first electrode.

3. The display substrate according to claim 2, characterized in that: The first electrode is formed on the pixel definition layer and the boss by an evaporation device having an evaporation source; The height of the boss is d, and the plurality of bosses are arranged at intervals in a first direction, and the first direction is parallel to the base; The width of the first gap is L, and the width of the first gap is set to be the minimum distance of the first gap in the first direction; The minimum distance between the evaporation source and the pixel definition layer in a direction perpendicular to the substrate is Ts, and the distance between the evaporation source and the center of the first gap in the first direction is D, wherein L / d=D / Ts.

4. The display substrate according to claim 3, characterized in that: The height of the boss is set to be greater than 5 microns.

5. The display substrate according to claim 3, characterized in that: The width of the boss is set to be no greater than 10 micrometers, and the width of the boss is set to be the maximum dimension of the boss in the first direction.

6. The display substrate according to claim 3, characterized in that: The width of the first gap is no greater than 5 micrometers.

7. The display substrate according to claim 3, characterized in that: An end surface of at least one end of the boss in the first direction is set as an inclined surface, an angle between the inclined surface and the first plane is set to θ1, and the first plane is parallel to the base; The evaporation angle of the evaporation device is set to θ2, wherein θ1>θ2.

8. The display substrate according to claim 7, characterized in that: θ1>45°.

9. The display substrate according to claim 2, characterized in that: The end surface of the boss away from the base is a first arc surface.

10. The display substrate according to claim 9, characterized in that: A tangent line of one end of the first arc surface close to the base is a first tangent line, an angle between the first tangent line and the first plane is set to θ3, the first plane is parallel to the base, and θ3≤45°.

11. The display substrate according to claim 2, characterized in that: At least two of the bosses are spaced apart in a first direction, and the first direction is parallel to the base; The cross section of the boss in a direction perpendicular to the base is arranged to be rectangular, trapezoidal, T-shaped, I-shaped, fan-shaped or arched.

12. The display substrate according to claim 11, characterized in that: The width of the boss is set to decrease linearly in the direction away from the substrate, or the width of the boss is set to increase linearly in the direction away from the substrate, the width of the boss is set to be the size of the boss in the first direction, and the cross-section of the boss perpendicular to the substrate direction is set to be a trapezoid.

13. The display substrate according to claim 11, characterized in that: A first groove is disposed on the side wall of the boss, and the first groove is formed into a ring around the circumference of the boss. The cross section of the boss perpendicular to the direction of the base is arranged in an I-shape.

14. The display substrate according to claim 1, characterized in that: The display substrate comprises a target sub-pixel located in the first display area, the target sub-pixel comprises a first pixel circuit and a first light-emitting device, and the first pixel circuit and the first light-emitting device are electrically connected; The first light emitting device includes a first light emitting layer, and an orthographic projection of at least part of the first pixel circuit on the substrate is arranged not to overlap with an orthographic projection of the first light emitting layer on the substrate.

15. The display substrate according to claim 14, characterized in that: The display substrate further comprises a plurality of regular sub-pixels located in the regular display area, wherein the regular sub-pixels comprise a second pixel circuit and a second light emitting device, wherein the second pixel circuit and the second light emitting device are electrically connected; The second light emitting device includes a second light emitting layer, and an orthographic projection of at least part of the second pixel circuit on the substrate is arranged not to overlap with an orthographic projection of the second light emitting layer on the substrate.

16. The display substrate according to any one of claims 1 to 15, characterized in that: It also includes a packaging structure layer, which is located on a side of the light-emitting structure layer away from the substrate; The refractive index of the packaging structure layer is set to η1, the refractive index of the boss is set to η2, and |η1-η2|≤0.

5.

17. The display substrate according to any one of claims 1 to 15, characterized in that: It also includes a packaging structure layer, which includes a first packaging layer formed by inkjet printing, the thickness of the first packaging layer is not less than 10 microns, and the thickness of the first packaging layer is set to the minimum size of the first packaging layer in a direction perpendicular to the substrate.

18. The display substrate according to any one of claims 1 to 15, characterized in that: The material of the boss includes a non-deformable material, and the non-deformable material includes silicon oxynitride, silicon oxide, silicon nitride and resin materials; Alternatively, the material of the boss includes a deformable material, and the deformable material includes a resin material.

19. The display substrate according to any one of claims 1 to 15, characterized in that: It also includes a spacer layer. The spacer layer and the protruding structure are both arranged on the end surface of the pixel definition layer away from the substrate. The spacer layer and the protruding structure are arranged in the same layer.

20. The display substrate according to any one of claims 1 to 15, characterized in that: The first display area further includes a light-transmitting area located between adjacent sub-pixel areas, and a pattern presented by the light-transmitting area is configured as a non-annular pattern.

21. A display device, characterized in that: Comprising the display substrate according to any one of claims 1 to 20.

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