Wafer testing device and semiconductor equipment
By designing a wafer testing device containing multiple probe cards and electric shafts, and automatically switching probe cards with a controller to match different pad configurations, the problems of low testing efficiency and difficulty in automation in the prior art are solved, and efficient automated testing is achieved.
Patent Information
- Application Number
- CN202411846775.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-14
- Publication Date
- 2025-04-22
AI Technical Summary
Existing wafer testing technology is difficult to achieve automated testing of different pad spacing and arrangement methods, resulting in inefficient testing, easy to damage the probe card, and frequent errors in the test program call.
A wafer testing device is designed, using a combination of at least two probe cards and an electric rotation shaft. The rotation of the electric rotation shaft is controlled by the controller. According to the number, arrangement and spacing of the wafer to be tested, the target probe card is automatically switched to match the pads to achieve automatic testing.
Automatic testing of different wafers to be tested is realized, testing efficiency is improved, probe card damage and test program call errors are reduced, and testing costs are saved.
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Figure CN119861273A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor testing, and in particular to a wafer testing device and semiconductor equipment. Background Art
[0002] After the wafer product (such as integrated circuit) is taped out and before quality inspection, a wafer acceptance test (WAT) is required to inspect the process conditions of each wafer product and evaluate the quality and stability of the semiconductor manufacturing process, so as to determine whether the wafer product meets the electrical specification requirements of the process technology platform.
[0003] Currently, wafer testing cannot be achieved without the use of probe cards. The probe card uses metal test probes to contact the pads of the integrated circuits on the surface of the wafer, and applies current and current through the test probes to test the electrical parameters of the integrated circuits.
[0004] However, with the development of semiconductor technology, integrated circuits tend to be miniaturized and complex, and there are often multiple pad pitches and multiple pad arrangements on the same wafer test structure. In the process of testing different wafers, the related technology needs to frequently eject the wafer to replace the probe card adapted to different pad pitch sizes, and needs to reload the wafer for testing after changing different test programs; in this process, different probe cards need to be replaced manually and the test program needs to be replaced and called, which is not only easy to cause damage to the probe card and test program call errors, but also reduces the wafer testing efficiency, making it difficult to achieve automated wafer testing. Summary of the invention
[0005] Based on this, the embodiments of the present application provide a wafer testing device and a semiconductor device, which can match corresponding probe cards for different wafers to be tested, which is conducive to realizing automated testing of wafers and improving testing efficiency.
[0006] In order to achieve the above-mentioned purpose, on the one hand, some embodiments of the present application provide a wafer testing device. The wafer testing device includes at least two probe cards, an electric shaft and a controller; the test surface of the probe card has a test probe; the electric shaft is connected to each of the probe cards and is used to drive each of the probe cards to rotate tangentially along the electric shaft; the controller is used to control the rotation of the electric shaft, rotate the target probe card to the target plane according to the test requirements, so as to test the wafer to be tested, and make the other probe cards except the target probe card vacant for standby; wherein each of the test probes on the target probe card matches the pad of the wafer to be tested.
[0007] In some embodiments, the wafer testing device also includes a circuit board and multiple test circuits; the circuit board is located in the target plane and surrounds the circumference of the probe card away from the electric rotating shaft; the multiple test circuits are arranged on the circuit board at intervals and surround the circumference of the probe card at intervals.
[0008] In some embodiments, different probe cards connected to the electric shaft have different numbers of test probes, different test probe arrangements, and / or different probe tip spacings.
[0009] In some embodiments, the controller is also used to control the electric shaft to rotate the target probe card to the target plane according to the number of pads, pad arrangement and / or pad spacing of the wafer to be tested, so as to test the wafer to be tested.
[0010] In some embodiments, each of the probe cards is centrally symmetrical about the electric rotating shaft.
[0011] In some embodiments, the test probe includes a connecting portion and a testing portion; the connecting portion is connected to the probe card; the testing portion is connected to the connecting portion and is used to contact the pad of the wafer to be tested to perform wafer testing.
[0012] In some embodiments, the wafer testing device further includes an insulating connection layer; the insulating connection layer is located on the test surface of the probe card; at least a portion of the connection portion of each of the test probes penetrates into the insulating connection layer and is connected to the probe card.
[0013] In some embodiments, the probe card has a first wire through hole on a side away from the electric shaft; the electric shaft has at least two second wire through holes extending radially along the electric shaft and a third wire through hole located at the axis of the electric shaft; the wafer testing device also includes a probe pull wire and a connecting wire; the probe pull wire is electrically connected to the test probe and passes through the first wire through hole from the test surface side of the probe card; the connecting wire is electrically connected to the probe pull wire on the non-test surface side of the probe card, and passes through the second wire through hole and the third wire through hole in turn, is led out from one end of the electric shaft and is electrically connected to the test circuit.
[0014] In some embodiments, the wafer testing device also includes a motor; the motor is located on one side of at least one of the circuit boards, connected to the controller and the electric shaft, and is used to drive the electric shaft to rotate according to a control instruction issued by the controller.
[0015] On the other hand, the present application also provides a semiconductor device according to some embodiments; the semiconductor device includes a wafer testing device as described in some of the aforementioned embodiments of the present application; wherein the wafer testing device includes at least two probe cards and a controller, the controller being used to select a target probe card from at least two of the probe cards and control the target probe card to perform wafer testing on the wafer to be tested according to the number of pads, pad arrangement and / or pad spacing of the wafer to be tested.
[0016] The embodiments of the present application may or at least have the following advantages:
[0017] In an embodiment of the present application, at least two probe cards are connected by an electric shaft, and the probe cards are driven to rotate by the electric shaft, and the rotation of the electric shaft is controlled by a controller, and the target probe card that matches the test probe with the pad of the wafer to be tested is rotated to the target plane according to the test requirements to test the wafer to be tested; in this way, through the definition of the test program and the control of the electric shaft by the controller to switch the probe cards according to the test requirements, the same test program can be used to match the corresponding probe cards to different wafers to be tested, and tests of patterns of different sizes can be performed. No human participation is required in this process, and there is no need to additionally establish and maintain multiple sets of test programs, which saves the time for establishing the test program, and there is no need to shut down, eject the wafer, manually replace the probe card, reload the wafer, and switch the test program. Problems such as damage to the test probe, test program call errors, and wafer damage are effectively avoided, and the test accuracy is effectively improved. It is also conducive to the realization of automated testing of different wafers, and the test efficiency of the test wafer is effectively improved. In addition, since the probe cards other than the target probe card are kept idle as spare, when a problem occurs in the target probe card, the spare probe card can be quickly switched to continue testing, thereby improving the test efficiency and saving the test cost.
[0018] The details of one or more embodiments of the present application are set forth in the following drawings and description. Other features, objects, and advantages of the present application will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0020] Figure 1 is a schematic structural diagram of a wafer testing device provided in some embodiments;
[0021] Figure 2 for Figure 1 A schematic top view of a wafer testing device is shown;
[0022] Figure 3 is a schematic structural diagram of another wafer testing device provided in some embodiments;
[0023] Figure 4 Schematic diagram of the positional relationship between the test probes of three probe cards and the pads of the wafer to be tested provided in some embodiments.
[0024] Description of reference numerals:
[0025] 1-probe card, 10-target probe card, 2-electric rotating shaft, W-wafer to be tested, 21-connecting arm, 11-test probe, 111-test part, 112-connecting part, 3-insulating connecting layer, 4-circuit board, 5-test circuit, P-solder pad, H1-first wire through hole, H2-second wire through hole, H3-third wire through hole, 6-probe pull wire, 7-connecting wire, S-solder point, 8-motor, 9-motor circuit. DETAILED DESCRIPTION
[0026] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0028] It should be understood that when an element or layer is referred to as being "on," "adjacent to," or "connected to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion.
[0029] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0030] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic representations of idealized embodiments (and intermediate structures) of the present application, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Embodiments of the present application should not be limited to the specific shapes of the regions shown herein, but include deviations in shapes due to, for example, manufacturing techniques. Therefore, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shapes of the regions of the device, and do not limit the scope of the present application.
[0031] The embodiment of the present application provides a wafer testing device and a semiconductor device to match corresponding probe cards 1 for different wafers to be tested, which is conducive to realizing automated testing of wafers and improving testing efficiency.
[0032] In some embodiments, please combine Figure 1 and Figure 2 It is understood that the wafer testing device includes at least two probe cards 1, an electric shaft 2 and a controller; the test surface of the probe card 1 has a test probe 11; the electric shaft 2 is connected to each probe card 1, and is used to drive each probe card 1 to rotate tangentially along the electric shaft 2; the controller is used to control the rotation of the electric shaft 2, and rotate the target probe card 10 to the target plane according to the test requirements to test the wafer W to be tested, and make other probe cards 1 except the target probe card 10 vacant for standby; wherein, each test probe 11 on the target probe card 10 matches the pad P of the wafer W to be tested.
[0033] For example, the shape of the electric shaft 2 includes but is not limited to a cylinder.
[0034] For example, see Figure 1 and Figure 2 , the electric shaft 2 extends along a first direction (eg, X direction).
[0035] Illustratively, the electric shaft 2 includes but is not limited to an electric hinge.
[0036] In some embodiments, please refer to Figure 1 and Figure 2 The wafer testing device further includes a connecting arm 21 ; the connecting arm 21 is used to connect the electric rotating shaft 2 and the probe card 1 .
[0037] For example, the shape of the connecting arm 21 includes but is not limited to a cuboid or a cylinder.
[0038] For example, the connecting arm 21 may extend along a first direction (eg, an X direction).
[0039] For example, the shape of each probe card 1 includes but is not limited to a sector or a quadrilateral, etc.; the shape of the probe card 1 may be, for example, a semicircle; wherein the straight side of the semicircle is connected to the electric shaft 2 .
[0040] For example, the size of the connecting arm 21 in the first direction (eg, X direction) may be equal to the size of the probe card 1 in the first direction (eg, X direction); wherein the size of the probe card 1 in the first direction (eg, X direction) may be, for example, the length of the straight side of its semicircle.
[0041] For example, when the probe card 1 rotates along the tangential direction of the electric shaft 2 , the normal direction of the probe card 1 remains parallel to the tangential direction of the electric shaft 2 .
[0042] It should be noted that when the target probe card 10 rotates to the target plane, the normal of the target probe card 10 is perpendicular to the surface of the wafer W to be tested, and each test probe 11 on the target probe card 10 contacts each pad P on the wafer W to be tested. For example, the target plane can be parallel to the plane where the wafer is located.
[0043] In addition, please refer to Figure 1 or Figure 3 When the target probe card 10 rotates to the target plane, the test probes 11 of the target probe card 10 are located at the lowest plane of the wafer testing device and contact the target wafer to perform wafer testing.
[0044] It should be explained that the other probe cards 1 except the target probe card 10 are kept idle for standby, which means that the other probe cards 1 except the target probe card 10 are rotated to an idle height relative to the target plane, and there is no contact between the test probes 11 thereon and the wafer W to be tested.
[0045] By way of example, the wafer testing device includes two or more probe cards 1 ; the number of the probe cards 1 may be, for example, 2, 3, 4, 5, 6, 7 or 8.
[0046] It should be noted that Figure 1 This example uses two probe cards 1. Figure 3 An example is given in which the number of probe cards 1 is four, but it is understandable that the number of probe cards 1 may be set in other ways, and the present application does not impose any limitation on this.
[0047] For some examples, see Figure 1or Figure 3 At least two probe cards 1 are symmetrical about the electric rotating shaft 2 .
[0048] For example, the angles between the probe cards 1 may be the same or different; it is understandable that Figure 1 and Figure 3 In the example, the angles between the probe cards 1 are the same, but the present application does not limit this.
[0049] It should be noted that the controller can control the rotation direction and rotation angle of the electric shaft 2 according to the number of probe cards 1 connected to the electric shaft 2 and the angle between the probe cards 1, thereby realizing the switching of different probe cards 1 in the test plane.
[0050] In an embodiment of the present application, at least two probe cards 1 are connected by an electric shaft 2, and the probe card 1 is driven to rotate by the electric shaft 2, and the rotation of the electric shaft 2 is controlled by a controller, and the target probe card 10 that matches the test probe 11 with the pad P of the wafer W to be tested is rotated to the target plane according to the test requirements to test the wafer W to be tested; in this way, through the definition of the test program and the control of the electric shaft 2 by the controller to switch the probe card 1 according to the test requirements, the same test program can be used to match the corresponding probe cards 1 to different wafers W to be tested, and tests of patterns of different sizes can be performed. No human participation is required in this process, and there is no need to additionally establish and maintain multiple sets of test programs, which saves the time for establishing the test program, and there is no need to shut down, eject the wafer, manually replace the probe card 1, reload the wafer, and switch the test program. Problems such as damage to the test probe 11, test program call errors, and wafer damage are effectively avoided, and the test accuracy is effectively improved. It is also conducive to the realization of automated testing of different wafers, and the test efficiency of the test wafer is effectively improved. In addition, since the probe cards 1 other than the target probe card 10 are kept idle for standby, when a problem occurs in the target probe card 10, the standby probe card 1 can be quickly switched to continue testing, thereby improving the test efficiency and saving the test cost.
[0051] By way of example, the material of the test probe 11 includes, but is not limited to, a conductive material; the material of the test probe 11 may be, for example, a conductive metal.
[0052] Please note that Figure 1 or Figure 3 The test probes 11 on each probe card 1 are arranged on the same side of the probe card 1 along the rotation direction of the electric shaft 2 .
[0053] In some embodiments, see Figure 4 The number of test probes 11 , the arrangement of the test probes 11 , and / or the distance between the probe tips on different probe cards 1 connected to the electric shaft 2 are different.
[0054] It should be noted that the number of the test probes 11 on the target probe card 10 , the arrangement of the test probes 11 and / or the distance between the probe tips all match the pads P on the wafer W to be tested.
[0055] For example, two or more test probes 11 are arranged on each probe card 1; the number of test probes 11 arranged on each probe card 1 may be, for example, 2, 3, 4, 5, 6, 7, 8, 9 or 10.
[0056] For example, the probe tips of the test probes 11 on each probe card 1 may be arranged in an array.
[0057] For example, the needle tip spacings of the test probes 11 on each probe card 1 may be the same or different, and the present application does not impose any limitation thereto, and is only limited to being able to match the spacings of the pads P on the wafer W to be tested.
[0058] In some embodiments, please refer to Figure 3 The controller is also used to control the electric shaft 2 to rotate the target probe card 10 to the target plane according to the number of pads P of the wafer W to be tested, the arrangement of the pads P and / or the distance between the pads P, so as to test the wafer W to be tested.
[0059] For example, the number of test probes 11 of the target probe card 10 can be the same as the number of pads P of the wafer W to be tested; the arrangement of the test probes 11 of the target probe card 10 can be the same as the arrangement of the pads P of the wafer W to be tested; the needle tip spacing of the test probes 11 of the target probe card 10 can match the spacing of the pads P of the wafer W to be tested.
[0060] In an embodiment of the present application, different probe cards 1 with different numbers of test probes 11, arrangements of test probes 11 and / or needle tip spacings are connected by an electric rotating shaft 2, and the corresponding probe cards 1 are switched to match the numbers of pads P, arrangements of pads P and / or spacings of pads P of different wafers W to be tested for testing. The same test program is used to match the corresponding probe cards 1 to different wafers W to be tested, and tests are performed on patterns of different sizes. In this process, there is no need to additionally establish and maintain multiple sets of test programs, which saves the time for establishing the test programs. No manual participation is required, and there is no need to shut down, eject wafers, manually replace probe cards 1, reload wafers, and switch test programs. Problems such as damage to the test probes 11, test program call errors, and wafer damage are effectively avoided, the test accuracy is effectively improved, and it is conducive to the realization of automated testing of different wafers, which effectively improves the test efficiency of test wafers.
[0061] In some embodiments, see Figure 1 or Figure 3The test probe 11 includes a connecting portion 112 and a testing portion 111 ; the connecting portion 112 is connected to the probe card 1 ; the testing portion 111 is connected to the connecting portion 112 , and is used to contact the pad P of the wafer W to be tested for wafer testing.
[0062] For example, the connecting portion 112 and the testing portion 111 are connected at an angle.
[0063] For example, the connecting portion 112 and the testing portion 111 may be an integrated structure.
[0064] For example, the materials of the connection portion 112 and / or the testing portion 111 include but are not limited to conductive materials; for example, they may be conductive metals.
[0065] In some embodiments, please refer to Figure 1 , Figure 2 or Figure 3 The wafer testing device further includes an insulating connection layer 3 ; the insulating connection layer 3 is located on the testing surface of the probe card 1 ; at least a portion of the connecting portion 112 of each testing probe 11 penetrates into the insulating connection layer 3 and is connected to the probe card 1 .
[0066] By way of example, the insulating connection layer 3 covers at least a portion of the surface of the test surface of the probe card 1 .
[0067] By way of example, the shape of the insulating connection layer 3 may be the same as or similar to that of the probe card 1 .
[0068] For example, the material of the insulating connection layer 3 includes but is not limited to insulating material; the material of the insulating connection layer 3 may be epoxy resin, for example.
[0069] It should be noted that the end of the connecting portion 112 of the test probe 11 that is away from the test portion 111 penetrates into the insulating connection layer 3 and is connected to the probe card 1 .
[0070] In the embodiment of the present application, the test surface of the probe card 1 is covered by the insulating connection layer 3 , and while each test probe 11 is fixed, insulation isolation between adjacent test probes 11 is achieved.
[0071] In some embodiments, see Figure 1 , Figure 2 and Figure 3 The wafer testing device also includes a circuit board 4 and a plurality of test circuits 5; the circuit board 4 is located in the target plane and surrounds the probe card 1 on the side away from the electric shaft 2; the plurality of test circuits 5 are arranged on the circuit board 4 at intervals and surround the probe card 1 at intervals.
[0072] It should be noted that the circuit board 4 can be fixed on the card slot of the probe card 1; and during the rotation of each probe card 1, the circuit board 4 does not rotate with the electric shaft 2; when the target probe card 10 rotates to the target plane, the target probe card 10 and the circuit board are in the same plane (i.e., the target plane), such as Figure 1 or Figure 3 shown.
[0073] For some examples, see Figure 2 or Figure 3 , there is no direct contact between the probe card 1 and the circuit board 4 .
[0074] By way of example, the number of the circuit boards 4 may be two.
[0075] By way of example, the circuit board 4 includes but is not limited to a printed circuit board 4 (Printed Circuit Board, PCB for short).
[0076] In some examples, a plurality of test circuits 5 are disposed on each circuit board 4 .
[0077] For example, a plurality of test circuits 5 may be arranged on the circuit board 4 in a ring array.
[0078] In some examples, each test probe 11 may be electrically connected to a corresponding test circuit 5 . In addition, adjacent test probes 11 are insulated from each other by the isolation function of the insulating connection layer 3 .
[0079] In some embodiments, see Figure 1 The probe card 1 has a first wire through hole H1 on the side away from the electric shaft 2; the electric shaft 2 has at least two second wire through holes H2 extending along the radial direction of the electric shaft 2 and a third wire through hole H3 located at the axis of the electric shaft 2; the wafer testing device also includes a probe pull wire 6 and a connecting wire 7; the probe pull wire 6 is electrically connected to the test probe 11 and passes through the first wire through hole H1 from the test surface side of the probe card 1; the connecting wire 7 is electrically connected to the probe pull wire 6 on the non-test surface side of the probe card 1, and passes through the second wire through hole H2 and the third wire through hole H3 in sequence, is led out from one end of the electric shaft 2 and is electrically connected to the test circuit 5.
[0080] By way of example, the extending direction of the first conductive through hole H1 is perpendicular to the testing surface of the probe card 1 .
[0081] By way of example, the first wire through hole H1 includes but is not limited to a square hole, a cylindrical hole, a regular polygonal hole, or the like.
[0082] For example, the second wire through hole H2 extends along the radial direction of the electric shaft 2 .
[0083] For example, the second wire through hole H2 includes but is not limited to a square hole, a cylindrical hole, a regular polygonal hole, or the like.
[0084] It should be noted that the third wire through hole H3 being located at the axis of the electric rotating shaft 2 means that the electric rotating shaft 2 may be a hollow structure (for example, a hollow cylinder).
[0085] By way of example, the third wire through hole H3 includes but is not limited to a square hole, a cylindrical hole, a regular polygonal hole, or the like.
[0086] For example, the material of the probe wire 6 includes, but is not limited to, a conductive material; the material of the probe wire 6 may be, for example, a conductive metal.
[0087] For example, the material of the connecting wire 7 includes but is not limited to a conductive material; the material of the connecting wire 7 may be, for example, a conductive metal.
[0088] It should be noted that the probe wire 6 can extend into the insulating connection layer 3 and be electrically connected to the portion of the connecting portion 112 of the test probe 11 located inside the insulating connection layer 3 .
[0089] For example, see Figure 1 One end of the probe wire 6 is electrically connected to the test probe 11 , and the other end can be fixed to the opening of the first wire through hole H1 through a solder joint S and pass through the first wire through hole H1 from the test surface side of the probe card 1 .
[0090] For example, please combine Figure 1 and Figure 2 It is understood that one end of the connecting wire 7 is electrically connected to the non-test surface side of the probe card 1 and the probe pull wire 6 through the solder joint S, and the other end passes through the second wire through hole H2 along the radial direction of the electric shaft 2, and then passes through the third wire through hole H3 along the extension direction of the electric shaft 2 and is led out from either end of the electric shaft 2 and electrically connected to the test circuit 5.
[0091] For example, each test probe 11 may be connected to the test circuit 5 in a one-to-one correspondence via a probe pull wire 6 and a connecting wire 7 .
[0092] In some embodiments, see Figure 1 and Figure 2 The wafer testing device also includes a motor 8; the motor 8 is located on one side of at least one circuit board 4, connected to the controller and the electric shaft 2, and is used to drive the electric shaft 2 to rotate according to a control instruction issued by the controller.
[0093] For example, the control instruction issued by the controller is associated with the number of pads P of the wafer W to be tested, the arrangement of the pads P and / or the distance between the pads P.
[0094] By way of example, the motor 8 may be located on the circuit board 4 on the same side as the test surface of the probe card 1 .
[0095] In some embodiments, see Figure 2 The wafer testing device further includes a motor circuit 9. The motor circuit 9 is arranged on the peripheral circuit, and the motor 8 is electrically connected to the motor circuit 9.
[0096] The present application also provides a semiconductor device according to some embodiments, and the semiconductor device includes the wafer testing device in some of the above embodiments. The semiconductor device also has the technical advantages of the above wafer testing device. It should be noted that the parts that are the same or corresponding to the above embodiments can refer to the corresponding description of the above embodiments, and will not be described in detail below.
[0097] In some embodiments, the wafer testing device includes at least two probe cards 1 and a controller, and the controller is used to select a target probe card 10 from at least two probe cards 1 and control the target probe card 10 to perform wafer testing on the wafer W to be tested according to the number of pads P, the arrangement of pads P and / or the spacing between pads P of the wafer W to be tested.
[0098] In some embodiments, each test probe 11 on the target probe card 10 matches a pad P of the wafer W to be tested.
[0099] In some examples, the number of test probes 11 , the arrangement of the test probes 11 , and / or the distance between the probe tips on different probe cards 1 are different.
[0100] For example, the number of test probes 11 of the target probe card 10 can be the same as the number of pads P of the wafer W to be tested; the arrangement of the test probes 11 of the target probe card 10 can be the same as the arrangement of the pads P of the wafer W to be tested; the needle tip spacing of the test probes 11 of the target probe card 10 can match the spacing of the pads P of the wafer W to be tested.
[0101] It should be added that after switching different probe cards 1, the semiconductor equipment also needs to align each test probe 11 with the pad P of the wafer W to be tested. After the alignment is completed, the test pattern (Testkey) with different pad pitches (Pitch) can be tested without removing the film.
[0102] In an embodiment of the present application, at least two probe cards 1 are connected by an electric shaft 2, and the probe card 1 is driven to rotate by the electric shaft 2, and the rotation of the electric shaft 2 is controlled by a controller, and the target probe card 10 that matches the test probe 11 with the pad P of the wafer W to be tested is rotated to the target plane according to the test requirements to test the wafer W to be tested; in this way, through the definition of the test program and the control of the electric shaft 2 by the controller to switch the probe card 1 according to the test requirements, the same test program can be used to match the corresponding probe cards 1 to different wafers W to be tested, and tests of patterns of different sizes can be performed, without the need to additionally establish and maintain multiple sets of test programs, saving the time for establishing the test program, and no manual participation is required in the process, and there is no need to shut down, eject the wafer, manually replace the probe card 1, reload the wafer, and switch the test program. Problems such as damage to the test probe 11, test program call errors, and wafer damage are effectively avoided, effectively improving the test accuracy, and facilitating the realization of automated testing of different wafers, effectively improving the test efficiency of the test wafer. In addition, since the probe cards 1 other than the target probe card 10 are kept idle for standby, when a problem occurs in the target probe card 10, the standby probe card 1 can be quickly switched to continue testing, thereby improving the test efficiency and saving the test cost.
[0103] In the description of this specification, the description with reference to the terms "some embodiments", "some examples", "exemplarily", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0104] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0105] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application.
Claims
1. A wafer testing device, characterized in that: include: At least two probe cards; the test surfaces of the probe cards have test probes; An electric rotating shaft connected to each of the probe cards, and used to drive each of the probe cards to rotate tangentially along the electric rotating shaft; A controller, used for controlling the rotation of the electric rotating shaft, rotating the target probe card to the target plane according to the test requirements, so as to test the wafer to be tested, and making the other probe cards except the target probe card idle for standby; Wherein, each of the test probes on the target probe card matches a pad of the wafer to be tested.
2. The wafer testing device according to claim 1, characterized in that: Also includes: A circuit board is located in the target plane and surrounds the circumference of the probe card away from the electric shaft; A plurality of test circuits are arranged at intervals on the circuit board and are spaced around the periphery of the probe card.
3. The wafer testing device according to claim 1, characterized in that: The number of test probes, arrangement of the test probes and / or probe tip spacing on different probe cards connected by the electric rotating shaft are different.
4. The wafer testing device according to claim 1, characterized in that: The controller is also used to control the electric shaft to rotate the target probe card to the target plane according to the number of pads, pad arrangement and / or pad spacing of the wafer to be tested, so as to test the wafer to be tested.
5. The wafer testing device according to claim 1, characterized in that: Each of the probe cards is symmetrical about the electric rotating shaft.
6. The wafer testing device according to claim 1, characterized in that: The test probe comprises: A connecting portion connected to the probe card; The testing part is connected to the connecting part and is used for contacting the pad of the wafer to be tested to perform wafer testing.
7. The wafer testing device according to claim 6, characterized in that: The wafer testing device further comprises: An insulating connection layer is located on the test surface of the probe card; at least a portion of the connection portion of each test probe penetrates into the insulating connection layer and is connected to the probe card.
8. The wafer testing device according to claim 2, characterized in that: The probe card has a first wire through hole on one side away from the electric shaft; the electric shaft has at least two second wire through holes extending along the radial direction of the electric shaft and a third wire through hole located at the axis of the electric shaft; the wafer testing device also includes: A probe pull wire, electrically connected to the test probe and passing through the first wire through hole from a test surface side of the probe card; A connecting wire is electrically connected to the probe wire on the non-test surface side of the probe card, passes through the second wire through hole and the third wire through hole in sequence, is led out from one end of the electric shaft and is electrically connected to the test circuit.
9. The wafer testing device according to claim 2, characterized in that: Also includes: The motor is located on one side of at least one of the circuit boards, connected to the controller and the electric shaft, and is used to drive the electric shaft to rotate according to a control instruction issued by the controller.
10. A semiconductor device, characterized in that: include: A wafer testing device as described in any one of claims 1 to 9; wherein the wafer testing device comprises at least two probe cards and a controller, the controller being used to select a target probe card from at least two of the probe cards and control the target probe card to perform wafer testing on the wafer to be tested according to the number of pads, pad arrangement and / or pad spacing of the wafer to be tested.
Citation Information
Patent Citations
Wafer test device, system and method
CN108535622A