Memory extension integrated device and computing device
Through the design of memory expansion integrated devices, multiple memory expansion cards provide a large amount of memory space, solving the problem that existing computing devices cannot effectively expand the memory capacity, meeting the needs of big data processing and improving memory utilization.
Patent Information
- Application Number
- CN202311368083.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-20
- Publication Date
- 2025-04-22
AI Technical Summary
The chassis space of existing computing devices is limited, and the memory capacity cannot be effectively expanded, which cannot meet the needs of scenarios such as big data processing.
It provides a memory expansion integrated device, which realizes memory expansion of electronic devices through the combination of a box, circuit board, connection interface, multiple memory slots and memory expansion cards, and integrates multiple memory expansion cards to provide a large amount of memory space.
It realizes memory expansion of computing devices, meets the needs of scenarios such as big data processing, improves the overall utilization rate of memory expansion integrated devices, and avoids the problems of memory exclusiveness and dispersion.
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Figure CN119861793A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electronic equipment, and in particular to a memory expansion integrated device and a computing device. Background Art
[0002] With the increasing popularity of big data processing scenarios such as AI (Artificial Intelligence) large models, the calculation process usually requires that massive data be saved to memory before the next step of calculation can be performed. However, the chassis space of current computing devices is limited, the memory capacity cannot be effectively expanded, and the design architecture of computing devices cannot provide a large amount of memory space for applications. Summary of the invention
[0003] The purpose of the embodiments of the present application is to provide a memory expansion integrated device and a computing device, wherein the memory expansion integrated device can provide a large amount of memory space for the electronic device, thereby meeting the needs of the computing device for scenarios such as big data processing.
[0004] An embodiment of the present application provides a computing device, including an electronic device and a memory expansion integrated device, the memory expansion integrated device including a housing, a first circuit board, a first connection interface, a plurality of first memory slots and a plurality of first memory expansion cards, the first circuit board, the first connection interface and the plurality of first memory slots are all arranged inside the housing, the plurality of first memory slots are arranged at intervals on the first circuit board, the first connection interface is electrically connected to the first circuit board, the first connection interface is exposed relative to the outer surface of the housing, the housing is provided with a plurality of first plug holes, each first plug hole connects the inside and the outside of the housing, each first memory expansion card is inserted into a first plug hole and can be detachably plugged into a first memory slot, the electronic device is connected to the first connection interface of the memory expansion integrated device.
[0005] In the computing device provided in the embodiment of the present application, a memory expansion integrated device is used to connect with an electronic device. When the memory of the electronic device is insufficient, the memory expansion integrated device can be directly used to expand the memory of the electronic device. The memory expansion integrated device integrates multiple first memory expansion cards, has a high memory density, and can provide a large amount of memory space for the computing device, thereby meeting the computing device's needs for scenarios such as big data processing. In addition, by setting the first connection interface to be exposed relative to the outer surface of the case, it is convenient to connect the memory expansion integrated device to the electronic device through the first connection interface, thereby facilitating the use of the memory expansion integrated device to expand the memory of the electronic device. By setting the memory expansion integrated device, the embodiment of the present application solves the problem that the memory capacity cannot be effectively expanded due to the limited chassis space of the existing electronic equipment.
[0006] In addition, the memory expansion integrated device can be connected to multiple electronic devices, and multiple electronic devices can access the memory expansion integrated device to improve the overall utilization of the memory expansion integrated device, avoiding the problem that the idle memory cannot be allocated to other electronic devices when the memory of some electronic devices is idle due to the existing electronic devices monopolizing the memory. At the same time, it also solves the problem that a large amount of memory is scattered in different electronic devices, which is inconvenient for operation and management.
[0007] In a possible implementation manner, the electronic device is a server and / or a switch.
[0008] In a possible implementation, the computing device further includes a cabinet, and the electronic device and the memory expansion integrated device are both installed inside the cabinet.
[0009] In a possible implementation, the computing device further includes a hard disk device, which is installed inside the cabinet and electrically connected to both the electronic device and the memory expansion integrated device.
[0010] An embodiment of the present application also provides a memory expansion integrated device, which is used to expand memory for a server. The memory expansion integrated device includes a housing, a first circuit board, a first connection interface, a plurality of first memory slots and a plurality of first memory expansion cards. The first circuit board, the first connection interface and the plurality of first memory slots are all arranged inside the housing. The plurality of first memory slots are arranged at intervals on the first circuit board. The first connection interface is electrically connected to the first circuit board. The first connection interface is exposed relative to the outer surface of the housing and is used to connect to the server. The housing is provided with a plurality of first plug holes, each of which connects the inside and the outside of the housing. Each first memory expansion card is inserted into a first plug hole and can be detachably plugged into a first memory slot.
[0011] The embodiment of the present application provides a memory expansion integrated device, which utilizes the first memory slot in the memory expansion integrated device to be electrically connected to the first memory expansion card, and utilizes the first connection interface to be electrically connected to the electronic device, so as to realize the expansion of the memory of the electronic device by using the memory expansion card. The memory expansion integrated device of the embodiment of the present application can provide a large amount of memory space by plugging in multiple first memory expansion cards, thereby meeting the needs of computing devices for scenarios such as big data processing. In addition, the memory expansion integrated device can be electrically connected to multiple electronic devices through the first connection interface, and multiple electronic devices can access the memory expansion integrated device through the first connection interface, thereby achieving high utilization of the memory expansion integrated device and avoiding the problem that the memory exclusively occupied by the existing electronic device itself cannot be allocated to other electronic devices. At the same time, the memory expansion integrated device is independent of the electronic device, and also solves the problem that a large amount of memory is scattered in different electronic devices, which is inconvenient for operation and management.
[0012] In addition, by setting the first memory expansion card to pass through the first plug hole and to be detachably plugged into the first memory slot, it is convenient to manage and maintain the first memory expansion card. By setting multiple first memory slots in the memory expansion integrated device, the number of first memory expansion cards plugged into the first memory slots can be increased, thereby facilitating the increase of the memory space of the memory expansion integrated device, thereby achieving high scalability of the memory expansion integrated device.
[0013] In a possible implementation, the memory expansion integrated device further includes a first adapter circuit board, which is mounted on the box body and electrically connected between the first connection interface and the first circuit board.
[0014] In a possible implementation, the memory expansion integrated device further includes a second circuit board, a second connection interface, a plurality of second memory slots and a plurality of second memory expansion cards, the second circuit board, the second connection interface and the plurality of second memory slots are all arranged inside the housing, the second circuit board is arranged at intervals from the first circuit board, the plurality of second memory slots are arranged at intervals on the second circuit board, the second connection interface is electrically connected to the second circuit board, the second connection interface is exposed relative to the outer surface of the housing, and is used to electrically connect to the server, the housing is further provided with a plurality of second plug holes, the plurality of second plug holes and the plurality of first plug holes are respectively located on opposite sides or adjacent sides of the housing, each second plug hole connects the inside and the outside of the housing, each second memory expansion card is passed through a second plug hole, and is detachably plugged into a second memory slot. By simultaneously arranging the first connection interface and the second connection interface at different positions of the housing, the electronic device can be electrically connected to the memory expansion integrated device from different sides of the housing, thereby improving the plug density of the memory expansion integrated device and expanding the use scenario of the memory expansion integrated device.
[0015] In one possible implementation, the first connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector, and / or the second connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector.
[0016] In a possible implementation, the box includes a first panel and a second panel that are arranged opposite to each other, the first plug hole is arranged on the first panel and penetrates the first panel along the thickness direction of the first panel, the first circuit board is spaced apart from and arranged opposite to the first panel, the first memory slot is arranged on a surface of the first circuit board facing the first panel, and the first connection interface is exposed relative to the outer surface of the first panel;
[0017] And / or, the second plug hole is arranged on the second panel and penetrates the second panel along the thickness direction of the second panel, the second circuit board is spaced apart from and arranged opposite to the first circuit board, and is spaced apart from and arranged opposite to the second panel, the second memory slot is arranged on the surface of the second panel facing the second panel, and the second connection interface is exposed relative to the outer surface of the second panel.
[0018] In a possible implementation, the memory expansion integrated device further includes a power module, and the power module is located between the second panel and the second circuit board and is electrically connected to the second circuit board.
[0019] In a possible implementation, the first circuit board and the second circuit board are electrically connected so that when the electronic device is connected to the memory expansion integrated device from one side of the first connection interface, the electronic device can use the memory expansion card located on the same side as the second connection interface to expand the memory; when the memory expansion integrated device is connected from the second connection interface, the electronic device can use the memory expansion card located on the same side as the first connection interface to expand the memory, thereby improving the utilization efficiency of the memory expansion cards in the memory expansion integrated device.
[0020] In a possible implementation, the memory expansion integrated device further includes a third circuit board, which is installed between the first circuit board and the second circuit board and is electrically connected to the first circuit board and the second circuit board.
[0021] In a possible implementation, the memory expansion integrated device further includes a processor, the processor is mounted on the third circuit board and electrically connected to the third circuit board, and the processor is capable of managing a plurality of first memory expansion cards and a plurality of second memory expansion cards.
[0022] In a possible implementation, the memory expansion integrated device also includes a management control chip and an indicator. The management control chip is installed on a third circuit board and electrically connected to the third circuit board. The indicator is installed on a housing and electrically connected to the third circuit board. The management control chip is used to obtain a transmission signal between the memory expansion card and the server, and control the indicator to indicate that the memory expansion integrated device is in an operating state or in a fault state.
[0023] In a possible implementation, the memory expansion integrated device further includes a heat sink, which is mounted on the first circuit board and electrically connected to the first circuit board, or the heat sink is mounted on the second circuit board and electrically connected to the second circuit board, or the heat sink is mounted on the third circuit board and electrically connected to the third circuit board. The heat sink is provided to dissipate heat from components in the memory expansion integrated device.
[0024] In a possible embodiment, the heat sink is located between the first circuit board and the second circuit board, and both the first circuit board and the second circuit board are provided with vents, the vents of the first circuit board penetrate the first circuit board along the thickness direction of the first circuit board, and the vents of the second circuit board penetrate the second circuit board along the thickness direction of the second circuit board.
[0025] In a possible implementation, a plurality of first plug holes are located on opposite sides of the first connection interface, so that the first connection interface is relatively concentrated on the first panel. When an external electronic device is connected to the memory expansion integrated device through the first connection interface, the electronic device is concentrated at the location where the memory expansion integrated device is plugged in, which is conducive to the management and control chip to centrally manage and control multiple electronic devices. Alternatively, there are multiple first connection interfaces, and the multiple first connection interfaces are located on opposite sides of the multiple first plug holes, so as to realize the concentration of the first plug holes in the middle of the first panel. When the electronic device is plugged into the first connection interface exposed relative to the first through hole through the connecting cable, the obstruction caused by the connecting cable when the first memory expansion card passes through the first plug hole is avoided, and it is convenient to plug in the electronic device from both sides of the first panel. Alternatively, multiple second plug holes are located on opposite sides of the second connection interface, or there are multiple second connection interfaces, and the multiple second connection interfaces are located on opposite sides of the multiple second plug holes.
[0026] In a possible implementation, a first receiving cavity is formed between the first panel and the first circuit board, a second receiving cavity is formed between the second panel and the second circuit board, and the memory expansion integrated device further comprises a first partition and a second partition, the first partition is installed in the first receiving cavity, and divides the first receiving cavity into a plurality of first receiving portions along a height direction of the box body, and the second partition is installed in the second receiving cavity, and divides the second receiving cavity into a plurality of second receiving portions along a height direction of the box body;
[0027] A plurality of first memory slots arranged at intervals along the length direction of the first circuit board constitute a group of first memory slots, a plurality of groups of first memory slots are arranged at intervals along the height direction of the first circuit board, and each group of first memory slots is located in a first receiving portion, a plurality of second memory slots arranged at intervals along the length direction of the second circuit board constitute a group of second memory slots, a plurality of groups of second memory slots are arranged at intervals along the height direction of the second circuit board, and each group of second memory slots is located in a second receiving portion. By providing a first partition and a second partition, the first receiving cavity is divided into a plurality of first receiving portions, and the second receiving cavity is divided into a plurality of second receiving portions, which is conducive to increasing the number of memory expansion cards accommodated, thereby facilitating the memory expansion capability of the memory expansion integrated device. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0029] Figure 1 A schematic diagram of the three-dimensional structure of a computing device provided in the first embodiment of the present application;
[0030] Figure 2 for Figure 1 A schematic diagram of the electrical connection structure of the electronic device, the memory expansion integrated device and the hard disk device in the computing device shown;
[0031] Figure 3 for Figure 1 A schematic diagram of the structure of a memory expansion integrated device in the computing device shown in the first example;
[0032] Figure 4 for Figure 3 The schematic diagram of the structure of the memory expansion integrated device shown in another perspective;
[0033] Figure 5 for Figure 3 The schematic diagram of the exploded structure of the memory expansion integrated device shown in FIG. 1 is a schematic diagram of the structure of the memory expansion integrated device with part of the side shell and the top shell removed;
[0034] Figure 6 for Figure 1 A schematic diagram of the structure of the memory expansion integrated device in the computing device in the second example;
[0035] Figure 7 for Figure 1 A schematic diagram of a partial structure of a memory expansion integrated device in a third example in the computing device shown;
[0036] Figure 8 for Figure 1 A schematic diagram of an exploded structure of a portion of the structure of a memory expansion integrated device in a computing device in a fourth example;
[0037] Fig. 9 for Figure 1 A schematic structural diagram of a portion of the structure of a memory expansion integrated device in a computing device in a fifth example;
[0038] Fig.10 A schematic diagram of the three-dimensional structure of a computing device provided in the second embodiment of the present application. DETAILED DESCRIPTION
[0039] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. In the embodiments of the present application, "multiple" means two or more.
[0040] See also Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the three-dimensional structure of a computing device 1 provided in the first embodiment of the present application. Figure 2 for Figure 1 The schematic diagram of the electrical connection structure of the electronic device 3, the memory expansion integrated device 4 and the hard disk device 5 in the computing device 1 is shown.
[0041] For the convenience of description, we define Figure 1 The length direction of the computing device 1 is the X-axis direction, the width direction is the Y-axis direction, and the height direction is the Z-axis direction. The X-axis direction, the Y-axis direction, and the Z-axis direction are perpendicular to each other. The terms "top", "bottom", "front", and "back" mentioned in the description of the panel 10200 in the present application embodiment are based on the attached specification. Figure 1 The description of the orientation shown, with the positive direction of the Z axis as the "top", the negative direction of the Z axis as the "bottom", the negative direction of the Y axis as the "front", and the positive direction of the Y axis as the "back", does not constitute a limitation on the computing device 1 in actual application scenarios.
[0042] The computing device 1 may include a cabinet 2, an electronic device 3, a memory expansion integrated device 4, and a hard disk device 5. In this embodiment, the electronic device 3, the memory expansion integrated device 4, and the hard disk device 5 are all installed inside the cabinet 2. Of course, in other embodiments, the computing device 1 may also include only the cabinet 2, the electronic device 3, and the memory expansion integrated device 4, the memory expansion integrated device 4 is installed inside the cabinet 2, and the electronic device 3 may be arranged outside the cabinet 2. Alternatively, the computing device 1 may also include only the cabinet 2, the electronic device 3, and the memory expansion integrated device 4.
[0043] Exemplarily, the electronic device 3 may be a server 3a and / or a switch 3b. In the present embodiment, there are multiple electronic devices 3, and the multiple electronic devices 3 include a server 3a and a switch 3b. Exemplarily, the server 3a may be a server whose processor is a central processing unit (CPU), or a server whose processor is an eXtreme Processing Unit (XPU). The server 3a may also be a server equipped with a high-performance graphics processing unit (GPU). Exemplarily, the switch 3b is a Top of Rack Switch (ToR Switch).
[0044] The memory expansion integrated device 4 is connected to multiple electronic devices 3 to expand the memory of the electronic devices 3, thereby facilitating the improvement of the operating efficiency of the electronic devices 3. Exemplarily, the memory expansion integrated device 4 can be connected to the electronic devices 3 via an open interconnection protocol (Compute Express Link, CXL). The hard disk device 5 is connected to both the electronic devices 3 and the memory expansion integrated device 4 to store data information of the electronic devices 3 and the memory expansion integrated device 4.
[0045] In the computing device 1 provided in the embodiment of the present application, the memory expansion integrated device 4 is connected to the electronic device 3. When the memory of the electronic device 3 is insufficient, the memory of the electronic device 3 can be directly expanded through the memory expansion integrated device 4, so that the memory expansion integrated device 4 can provide a large amount of memory space for the electronic device 3, thereby meeting the needs of the computing device 1 for scenarios such as big data processing. By setting up the memory expansion integrated device 4, the problem that the memory capacity cannot be effectively expanded due to the limited chassis space of the existing electronic device 3 is solved.
[0046] In addition, the memory expansion integrated device 4 can be connected to multiple electronic devices 3, and all electronic devices 3 can access the memory expansion integrated device 4 to improve the overall utilization of the memory expansion integrated device 4, avoiding the problem that the idle memory cannot be allocated to other electronic devices 3 when the memory of some electronic devices 3 is idle due to the existing electronic devices 3 monopolizing the memory. At the same time, it also solves the problem that a large amount of memory is scattered in different electronic devices 3, which is inconvenient for operation and management.
[0047] See also Figure 3 , Figure 4 and Figure 5 , Figure 3 for Figure 1 The schematic diagram of the structure of the memory expansion integrated device 4 in the computing device 1 in the first example is shown, Figure 4 for Figure 3The schematic diagram of the structure of the memory expansion integrated device 4 from another perspective is shown. Figure 5 for Figure 3 The schematic diagram of the exploded structure of the memory expansion integrated device 4 is shown with part of the side shell 30 and the top shell 40 removed. Figure 5 The guide groove 60 is not shown in its entirety, only a portion of the guide groove 60 is shown. Figure 5 Only a portion of the second memory slot 333 is shown, and the second memory slot 333 is presented in a perspective angle and is indicated by a dotted line.
[0048] The memory expansion integrated device 4 may include a housing 100, a plug-in assembly 300, a memory expansion card 400, a connection interface 500, a power module 700, a management control chip 810, a power button 820, an indicator 830, and a heat sink 850. The plug-in assembly 300, the memory expansion card 400, the power module 700, the management control chip 810, and the heat sink 850 are all installed inside the housing 100, and the connection interface 500, the power button 820, and the indicator 830 are installed on the housing 100.
[0049] Specifically, the box 100 may include two panels 10, two side shells 30, a top shell 40 and a bottom shell 50. The two panels 10 are arranged relative to each other along the Y-axis direction. In this embodiment, the two panels 10 include a first panel 10a and a second panel 10b, the first panel 10a is a front panel, and the first panel 10a faces the negative direction of the Y-axis, and the second panel 10b is a rear panel, and the second panel 10b faces the positive direction of the Y-axis. The length directions of the first panel 10a and the second panel 10b are both in the X-axis direction, the height directions of the first panel 10a and the second panel 10b are both in the Z-axis direction, and the thickness directions of the first panel 10a and the second panel 10b are both in the Y-axis direction. In this embodiment, the height of the box 100 along the Z-axis direction is 1U, that is, the height of the first panel 10a and the second panel 10b along the Z-axis direction is 1U. Among them, U is a unit representing the external dimensions of the server (unit of measurement: height or thickness), which is an abbreviation of unit, and the height 1U means that the height is 4.445cm. The two side shells 30 are arranged opposite to each other along the X-axis direction, and are both connected between the first panel 10a and the second panel 10b. The top shell 40 and the bottom shell 50 are arranged opposite to each other along the Z-axis direction, and are connected to the two panels 10 and the two side shells 30. The first panel 10a, the second panel 10b, the two side shells 30, the top shell 40 and the bottom shell 50 are surrounded to form a receiving cavity.
[0050] The housing 100 is provided with a plug hole 11, a through hole 13 and an opening 15. The openings of the plug hole 11, the through hole 13 and the opening 15 are all provided on the outer surface of the housing 100, and the plug hole 11, the through hole 13 and the opening 15 are connected to the accommodating cavity. Among them, the plug hole 11 is used to insert the memory expansion card 400, the through hole 13 is used to expose the connection interface 500, and the opening 15 is used to expose the interface of the power module 700.
[0051] In this embodiment, there are multiple plug holes 11, and the multiple plug holes 11 include a first plug hole 11a and a second plug hole 11b. There are multiple through holes 13, and the multiple through holes 13 include a first through hole 13a and a second through hole 13b. Among them, the first plug hole 11a and the first through hole 13a are both arranged on the first panel 10a, and both penetrate the first panel 10a along the thickness direction of the first panel 10a, so that the first plug hole 11a and the first through hole 13a are connected to the accommodating cavity of the box body 100, so as to realize that the first plug hole 11a and the first through hole 13a are connected to the inside and outside of the box body 100. There are multiple first plug holes 11a, and the multiple first plug holes 11a are arranged in sequence along the length direction of the first panel 10a, and are spaced apart from each other. Each first plug hole 11a can be used to insert a memory expansion card 400. In this embodiment, the plurality of first plugging holes 11 a include a first sub-plugging hole 111 a and a second sub-plugging hole 113 a , and there are a plurality of each of the first sub-plugging hole 111 a and the second sub-plugging hole 113 a .
[0052] There are multiple first through holes 13a, and the multiple first through holes 13a are arranged at intervals from each other. Each first through hole 13a is used to expose a connection interface 500. In this embodiment, the multiple first through holes 13a are roughly located in the middle of the first panel 10a, and are located between the first sub-plug hole 111a and the second sub-plug hole 113a, so that the multiple first plug holes 11a are located on opposite sides of the first through hole 13a. It can be understood that the positions of the first through holes 13a and the first plug holes 11a on the first panel 10a can be flexibly adjusted according to actual conditions.
[0053] The second plug hole 11b, the second through hole 13b and the opening 15 are all arranged on the second panel 10b, and all penetrate the second panel 10b along the thickness direction of the second panel 10b, so as to realize that the second plug hole 11b, the second through hole 13b and the opening 15 are connected to the accommodating cavity of the box body 100, thereby realizing that the second plug hole 11b, the second through hole 13b and the opening 15 are connected to the inside and outside of the box body 100. Among them, the opening 15 is used to expose the interface of the power module 700. In this embodiment, there are two openings 15, and the two openings 15 are arranged at intervals along the Z-axis direction. In this embodiment, there are multiple second plug holes 11b, and the multiple second plug holes 11b are arranged in sequence along the length direction of the first panel 10a, and are arranged at intervals from each other. Each second plug hole 11b can be used to insert a memory expansion card 400. In this embodiment, the plurality of second plug holes 11b include a third sub-plug hole 111b and a fourth sub-plug hole 113b, and there are a plurality of the third sub-plug hole 111b and the fourth sub-plug hole 113b. It can be understood that in this embodiment, the first plug hole 11a and the second plug hole 11b are respectively arranged on the first panel 10a and the second panel 10b of the box 100 that are arranged opposite to each other, so that the first plug hole 11a and the second plug hole 11b are respectively located on opposite sides of the box 100. Of course, in other embodiments, the first plug hole 11a and the second plug hole 11b can also be respectively arranged on adjacent sides of the box 100, for example, the first plug hole 11a is arranged on the first panel 10a, and the second plug hole 11b is arranged on the side shell 30, or the first plug hole 11a is arranged on the side shell 30, and the second plug hole 11b is arranged on the second panel 10b.
[0054] There are a plurality of second through holes 13b, and the plurality of second through holes 13b are arranged at intervals from each other, and each second through hole 13b is used to expose a connection interface 500. In this embodiment, the plurality of second through holes 13b are located between the third sub-plugging hole 111b and the fourth sub-plugging hole 113b, so that the plurality of second plugging holes 11b are located on opposite sides of the second through holes 13b. It can be understood that the positions of the second through holes 13b, the second plugging holes 11b and the opening 15 on the second panel 10b can be flexibly adjusted according to actual conditions.
[0055] The housing 100 is further provided with a guide groove 60, which is provided on the top shell 40 and the bottom shell 50 and is used to guide the movement of the memory expansion card 400. There are multiple guide grooves 60, which are arranged in sequence along the X-axis direction, and each guide groove 60 is provided corresponding to a plug-in hole 11 and is used to guide a memory expansion card 400 to move along the Y-axis direction. The side wall of each guide groove 60 can limit the displacement of the memory expansion card 400 along the Y-axis direction.
[0056] It is understandable that, in other embodiments, the guide groove 60 may also be provided only on the top shell 40 , or only on the bottom shell 50 .
[0057] The groove sidewalls of each guide groove 60 include a first groove sidewall 61 and a second groove sidewall 62 arranged at intervals along the X-axis direction. In this embodiment, the first groove sidewall 61 and the second groove sidewall 62 are both protruded from the top shell 40 and the bottom shell 50, and the first groove sidewall 61 protruded from the top shell 40, the second groove sidewall 62 protruded from the top shell 40 and the top shell 40 together form the guide groove 60 of the top shell 40, and the first groove sidewall 61 protruded from the bottom shell 50, the second groove sidewall 62 protruded from the bottom shell 50 and the bottom shell 50 together form the guide groove 60 of the bottom shell 50.
[0058] In this embodiment, the first slot sidewall 61 and the second slot sidewall 62 are generally in the shape of long strips, both extending along the Y-axis direction, and spaced apart along the X-axis direction. In this embodiment, the spacing width between the first slot sidewall 61 and the second slot sidewall 62 along the X-axis direction is slightly greater than the width of the memory expansion card 400.
[0059] In other embodiments, the guide groove 60 may also be directly opened on the top shell 40 and the bottom shell 50. In this case, the guide groove 60 of the top shell 40 is recessed from the surface of the top shell 40 toward the accommodating cavity in a direction away from the accommodating cavity, and the guide groove 60 of the bottom shell 50 is recessed from the surface of the bottom shell 50 toward the accommodating cavity in a direction away from the accommodating cavity.
[0060] The plug-in assembly 300 may include a circuit board 310 and a memory slot 330. The circuit board 310 and the memory slot 330 are both installed in the accommodating cavity to realize the installation of the plug-in assembly 300 in the box 100. In this embodiment, there are multiple circuit boards 310. The multiple circuit boards 310 may include a first circuit board 311 and a second circuit board 313, and the first circuit board 311 and the second circuit board 313 are both installed between the two side shells 30 and are spaced apart from each other. Among them, the first circuit board 311 is spaced apart from and arranged opposite to the first panel 10a, and is enclosed with the two side shells 30 and the first panel 10a to form a first accommodating cavity 17. The first accommodating cavity 17 is used to accommodate the memory expansion card 400. The second circuit board 313 is arranged opposite to the second panel 10b, and is enclosed with the two side shells 30 and the second panel 10b to form a second accommodating cavity 18. The second accommodating cavity 18 is used to accommodate the memory expansion card 400 and the power module 700. It is understandable that, in this embodiment, by providing a receiving cavity for receiving the memory expansion card 400 on both sides of the memory expansion integrated device 4, the memory expansion integrated device 4 can integrate more memory expansion cards 400, thereby effectively improving the memory density of the memory expansion integrated device 4. Of course, in other embodiments, a receiving cavity for receiving the memory expansion card 400 can be provided only on one side of the memory expansion integrated device 4, for example, only the first receiving cavity 17 is provided, in which case only the first panel 10a is provided with the first plug hole 11a, or only the second receiving cavity 18 is provided, in which case only the second panel 10b is provided with the second plug hole 11b. Of course, in other embodiments, a receiving cavity for receiving the memory expansion card 400 can also be provided on three sides, four sides, five sides or six sides of the memory expansion integrated device 4.
[0061] In this embodiment, the first circuit board 311 is electrically connected to the second circuit board 313. In other embodiments, the first circuit board 311 and the second circuit board 313 may not be electrically connected.
[0062] The plug assembly 300 is provided with a vent 315, and the vent 315 is used for ventilation. In this embodiment, the vent 315 is provided on the first circuit board 311 and the second circuit board 313. Specifically, the vent 315 of the first circuit board 311 penetrates the first circuit board 311 along the thickness direction of the first circuit board 311 and is connected to the first receiving cavity 17. The vent 315 of the second circuit board 313 penetrates the second circuit board 313 along the thickness direction of the second circuit board 313 and is connected to the second receiving cavity 18. It can be understood that in other embodiments, the vent 315 can also be provided only on the first circuit board 311 or the second circuit board 313.
[0063] In this embodiment, the vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 are both in the shape of long rectangular strips. It is to be understood that in other embodiments, there may be multiple vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313, and the multiple vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 are spaced apart from each other, so that the vents 315 of the first circuit board 311 and the vents 315 of the second circuit board 313 present a hollow design. It is to be understood that in other embodiments, the surface of the first circuit board 311 facing the top shell 40 may be spaced apart from the top shell 40, so that the vents 315 are spaced apart from the top shell 40, and / or the surface of the first circuit board 311 facing the bottom shell 50 may be spaced apart from the bottom shell 50, so that the vents 315 are spaced apart from the bottom shell 50.
[0064] The memory slot 330 is installed on the surface of the circuit board 310 facing the plug hole 11, and is electrically connected to the circuit board 310. The memory slot 330 is used to be plugged with the memory expansion card 400. Exemplarily, the memory slot 330 can be a PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) slot, and the specific models of the memory slot 330 include E3.S, E3.L, E1.S and E1.L. At this time, the memory expansion card 400 plugged into the memory slot 330 corresponds to an E3.S interface memory expansion card, an E3.L interface memory expansion card, an E1.S interface memory expansion card and an E1.L interface memory expansion card.
[0065] In this embodiment, there are multiple memory slots 330, and the multiple memory slots 330 include a first memory slot 331 and a second memory slot 333. There are multiple first memory slots 331, and the multiple first memory slots 331 are installed on the surface of the first circuit board 311 facing the first panel 10a, and are spaced from each other and arranged in sequence along the length direction of the first circuit board 311. Each first memory slot 331 is arranged opposite to a first plug hole 11a provided on the first panel 10a. There are multiple second memory slots 333, and the multiple second memory slots 333 are installed on the surface of the second circuit board 313 facing the second panel 10b, and are spaced from each other and arranged in sequence along the length direction of the second circuit board 313. Each second memory slot 333 is arranged opposite to a second plug hole 11b provided on the second panel 10b. In this embodiment, the plug-in assembly 300 may further include a third circuit board 350. The third circuit board 350 is installed on the bottom shell 50, and is arranged opposite to the top shell 40, and is installed between the first circuit board 311 and the second circuit board 313, and is electrically connected to the first circuit board 311 and the second circuit board 313. Exemplarily, the third circuit board 350 is electrically connected to the first circuit board 311 and the second circuit board 313 by wire welding. In this embodiment, the plane where the first circuit board 311 is located is roughly parallel to the plane where the second circuit board 313 is located, and the plane where the third circuit board 350 is located is roughly perpendicular to the plane where the first circuit board 311 and the second circuit board 313 are located.
[0066] The memory expansion card 400 may include a CXL (Compute Express Link) control chip and a memory. The memory may include a dual inline memory module (DIMM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a solid state disk (SSD), or a persistent memory (PMEM), and the memory is an actual physical carrier that provides storage space for the electronic device 3.
[0067] The CXL control chip is used to write data to the memory in the memory expansion card 400 or read data from the memory according to the read / write data request sent by the electronic device 3. The CXL control chip is also called a memory expansion (CXL memory expander) chip, a CXL memory controller (CXL memory expander controller) or a CXL memory pooling (CXL memory expander pooling) chip.
[0068] There are multiple memory expansion cards 400, and the multiple memory expansion cards 400 include a first memory expansion card 410 and a second memory expansion card 430. The first memory expansion card 410 is accommodated in the first accommodation cavity 17, and is detachably plugged into the first memory slot 331, and is electrically connected to the first memory slot 331. The second memory expansion card 430 is accommodated in the second accommodation cavity 18, and is detachably plugged into the second memory slot 333, and is electrically connected to the second memory slot 333, so as to realize the electrical connection between the memory expansion card 400 and the plug-in assembly 300.
[0069] Among them, the memory expansion card 400 may include a plug-in state and a pull-out state. Specifically, take the memory expansion card 400 as the first memory expansion card 410 as an example. When the first memory expansion card 410 is in the plug-in state, the first memory expansion card 410 can penetrate the first plug hole 11a and plug into the first memory slot 331. When the first memory expansion card 410 is in the pull-out state, the first memory expansion card 410 can be detached from the first plug hole 11a. The plug-in state and pull-out state of the second memory expansion card 430 can refer to the first memory expansion card 410, which will not be repeated here. It can be understood that when the memory expansion integrated device 4 is actually used, the number of the first memory expansion card 410 and the second memory expansion card 430 can be increased or decreased according to the actual demand for memory.
[0070] There are multiple connection interfaces 500, and multiple connection interfaces 500 are installed on the circuit board 310 and electrically connected to the circuit board 310. Each connection interface 500 is arranged opposite to a through hole 13, and the interface of each connection interface 500 is exposed relative to a through hole 13, so as to facilitate the electrical connection between the memory expansion integrated device 4 and the interface of the external electronic device 3 through the connection interface 500.
[0071] Exemplarily, the connection interface 500 may be a UBC connector (Union Bus Connector), a UBC-DD (Unified Bus Connector-DoubleDensity), a MCIO (Mini Cool Edge Input / Output), an ASM (OminiEdge ASM) connector, or a fiber optic interface connector. The fiber optic interface connector includes an SFP (Small Form Pluggable) connector, an OSFP (Octal Small Formfactor Pluggable) connector, or a QSFP (Quad Small Form-factor Pluggable) connector.
[0072] In this embodiment, the plurality of connection interfaces 500 include a first connection interface 510 and a second connection interface 530. There are a plurality of first connection interfaces 510, and the plurality of first connection interfaces 510 are all installed on the first panel 10a, and each first connection interface 510 is arranged opposite to a first through hole 13a, so that the interface of the first connection interface 510 is exposed relative to the first through hole 13a, thereby realizing that the interface of the first connection interface 510 is exposed relative to the outer surface of the box body 100, and further facilitating the memory expansion integrated device 4 to be connected to the external electronic device 3 through the first connection interface 510. In this embodiment, the plurality of first connection interfaces 510 are all electrically connected to the first circuit board 311 through wires, so as to realize the electrical connection between the first connection interface 510 and the plug-in assembly 300.
[0073] There are multiple second connection interfaces 530, and the multiple second connection interfaces 530 are all installed on the second panel 10b. Each second connection interface 530 is arranged opposite to a second through hole 13b, so that the interface of the second connection interface 530 is exposed relative to the second through hole 13b, thereby realizing that the interface of the second connection interface 530 is exposed relative to the outer surface of the box body 100, thereby facilitating the memory expansion integrated device 4 to be connected to the external electronic device 3 through the second connection interface 530. In this embodiment, the multiple second connection interfaces 530 are all electrically connected to the second circuit board 313 through wires to realize the electrical connection between the second connection interface 530 and the plug-in assembly 300.
[0074] The power module 700 is installed in the second receiving cavity 18 so that the power module 700 is located between the second panel 10b and the second circuit board 313. The power module 700 is electrically connected to the second circuit board 313 to realize the electrical connection between the power module 700 and the plug assembly 300. The power module 700 is used to supply power to the first circuit board 311 and the second circuit board 313 in the plug assembly 300. The interface of the power module 700 is exposed relative to the opening 15, so as to facilitate the electrical connection of the power module 700 with an external power source through a power cable. In this embodiment, there are two power modules 700, and the interface of each power module 700 is exposed relative to an opening 15.
[0075] The power button 820 and the indicator 830 are both installed on the first panel 10a, and are both connected to the first circuit board 311 to realize the electrical connection between the power button 820 and the indicator 830 and the plug-in assembly 300, thereby realizing the signal transmission between the power button 820 and the power module 700. Among them, the power button 820 is used to turn on the memory expansion integrated device 4 and turn off the memory expansion integrated device 4. In this embodiment, there are multiple indicators 830, and the multiple indicators 830 include a first indicator 831 and a second indicator 833. The first indicator 831 is used to indicate that the memory expansion integrated device 4 is in a running state. The second indicator 833 is used to indicate that the memory expansion integrated device 4 is in a fault state. Exemplarily, the first indicator 831 and the second indicator 833 are both indicator lights.
[0076] In this embodiment, the heat sink 850 is mounted on the surface of the third circuit board 350 away from the bottom case 50, and is electrically connected to the third circuit board 350, so that the heat sink 850 is located between the first circuit board 311 and the second circuit board 313. Exemplarily, the heat sink 850 is a fan. It is understood that in other embodiments, the heat sink 850 may also be mounted on the surface of the first circuit board 311 away from the first panel 10a, and / or the heat sink 850 may be mounted on the surface of the second circuit board 313 away from the second panel 10b.
[0077] In this embodiment, the memory expansion integrated device 4 further includes a processor, which is mounted on the third circuit board 350 and electrically connected to the third circuit board 350. The processor can manage the first memory expansion card 410 and the second memory expansion card 430. For example, the processor can manage the first memory expansion card 410 and the second memory expansion card 430 by running a fabric management (Fabric Management, FM) program. For example, the processor can be a management control chip 810 or a central processing unit (Central Processing Unit, CPU).
[0078] Among them, "managing the first memory expansion card 410 and the second memory expansion card 430" means that the processor can record the address, memory size and electronic device 3 with specific signal interconnection between the first memory expansion card 410 and the second memory expansion card 430 in the memory expansion integrated device 4 by running the FM program. When the memory expansion integrated device 4 is connected to the electronic device 3 to be plugged in, such as a server, the processor in the memory expansion integrated device 4 can run the FM program to allocate the first memory expansion card 410 and / or the second memory expansion card 430 to perform signal interconnection with the electronic device 3 to be plugged in according to the size of the memory required by the electronic device 3 to be plugged in, so as to provide memory for the electronic device 3 to be plugged in.
[0079] It is understandable that the memory expansion integrated device 4 may not be provided with a processor, or the provided processor, such as the management control chip 810, may not run the FM program. In this case, the electronic device 3 connected to the memory expansion integrated device 4, such as a server, is usually provided with a central processing unit (CPU), and the central processing unit can run the FM program. When the electronic device 3 is connected to multiple memory expansion integrated devices 4, the FM program run by the central processing unit of the electronic device 3 can manage each first memory expansion card 410 and each second memory expansion card 430 in the multiple memory expansion integrated devices 4.
[0080] In this embodiment, the processor is taken as an example of a management control chip 810. The management control chip 810 may be a SOC chip (System on Chip) or a BMC chip (Baseboard management controller). Specifically, the management control chip 810 is mounted on the surface of the third circuit board 350 away from the bottom shell 50, and is electrically connected to the third circuit board 350 to achieve electrical connection between the management control chip 810 and the plug-in component 300, so as to achieve management of the first memory expansion card 410 and the second memory expansion card 430 by the management control chip 810.
[0081] In this embodiment, the management control chip 810 is spaced apart from the heat sink 850, and is electrically connected to the heat sink 850 through the third circuit board 350, so that the management control chip 810 manages the heat sink 850. Specifically, the management control chip 810 can control the opening and closing of the heat sink 850, and control the rotation speed of the heat sink 850, such as a fan.
[0082] In addition, the management control chip 810 can also be used to manage the running state and fault state of the memory expansion integrated device 4. Specifically, the management control chip 810 is electrically connected to the indicator 830 through the third circuit board 350 and the first circuit board 311. When the management control chip 810 detects that the electronic device 3 and the memory expansion card 400 of the memory expansion integrated device 4 are transmitting signals, the signal can be transmitted to the first indicator 831 in the indicator 830 to control the first indicator 831 to turn on, so that the first indicator 831 indicates that the memory expansion integrated device 4 is in a running state. When the memory expansion integrated device 4 fails, the management control chip 810 can detect that the signal transmission between the electronic device 3 and the memory expansion card 400 of the memory expansion integrated device 4 is interrupted, and transmit the signal to the second indicator 833 to control the second indicator 833 to turn on, so that the second indicator 833 indicates that the memory expansion integrated device 4 is in a fault state.
[0083] Continue reading Figure 1 and Figure 2 , in the assembled computing device 1, the power cable is connected between the external power supply and the interface of the power module 700. The power module 700 can convert the input voltage of the external power supply into the working voltage of the first circuit board 311 and the second circuit board 313 to power the first circuit board 311 and the second circuit board 313, so as to realize the operation of the memory expansion integrated device 4. The connection cable is connected between the connection interface 500 and the interface of the electronic device 3 to realize the connection between the memory expansion integrated device 4 and the electronic device 3. Specifically, each first connection interface 510 can be connected to an electronic device 3 through a connection cable to realize the connection with the electronic device 3 from the front side of the memory expansion integrated device 4. Each second connection interface 530 can be connected to an electronic device 3 through a connection cable to realize the connection with the electronic device 3 from the back side of the memory expansion integrated device 4.
[0084] The first memory expansion card 410 is detachably plugged into the first memory slot 331, and the second memory expansion card 430 is detachably plugged into the second memory slot 333, so that the memory expansion card 400 can be detachably plugged into the memory slot 330. Specifically, in the process of plugging the memory expansion card 400, the first memory expansion card 410 is inserted from the first plug hole 11a, and moves along the guide groove 60 to be plugged into the first memory slot 331, so as to realize the electrical connection between the first memory expansion card 410 and the first circuit board 311. The second memory expansion card 430 is inserted from the second plug hole 11b, and moves along the guide groove 60 to be plugged into the second plug hole 11b, so as to realize the electrical connection between the second memory expansion card 430 and the second circuit board 313. In the process of removing the memory expansion card 400, the first memory expansion card 410 is separated from the first memory slot 331 and moves along the guide groove 60 to be separated from the first plug hole 11a, and the second memory expansion card 430 is separated from the second memory slot 333 and moves along the guide groove 60 to be separated from the second plug hole 11b. By setting the first memory expansion card 410 to be detachably plugged into the first memory slot 331 and the second memory expansion card 430 to be detachably plugged into the second memory slot 333, it is convenient to manage and maintain the first memory expansion card 410 and the second memory expansion card 430.
[0085] When using the computing device 1, press the power button 820 to make the memory expansion integrated device 4 work. During the operation of the computing device 1, the management control chip 810 controls the heat sink 850 to work, and the heat sink 850 rotates and drives the air flow to form a wind flow. The formed wind flow can flow from the first panel 10a to the second panel 10b, from the first receiving cavity 17, through the vents 315 of the first circuit board 311, the vents 315 of the second circuit board 313 to the second receiving cavity 18, so as to achieve heat dissipation of the plug-in component 300, the memory expansion card 400, the connection interface 500 and the power module 700. The external electronic device 3 can access the memory expansion integrated device 4 through the first connection interface 510 and / or the second connection interface 530. The management control chip 810 runs the FM program, and according to the size of the memory required by the external electronic device 3, the first memory expansion card 410 and / or the second memory expansion card 430 are allocated to the external electronic device 3 for signal interconnection, so as to achieve the memory expansion of the external electronic device 3 using the memory expansion card 400.
[0086] When the management control chip 810 detects that the signal transmission is performed between the external electronic device 3 and the memory expansion card 400, the first indicator 831 is controlled to be turned on, so that the first indicator 831 indicates that the memory expansion integrated device 4 is in a running state. When the management control chip 810 detects that the signal transmission between the external electronic device 3 and the memory expansion card 400 is interrupted, the second indicator 833 is controlled to be turned on, so that the second indicator 833 indicates that the memory expansion integrated device 4 is in a fault state.
[0087] In the computing device 1 provided in the embodiment of the present application, the first memory slot 331 in the memory expansion integrated device 4 is electrically connected to the memory expansion card 400, and the first connection interface 510 is used to connect to the electronic device 3, so as to realize the expansion of the memory of the electronic device 3 by using the memory expansion card 400. The memory expansion integrated device 4 in the embodiment of the present application can provide a large amount of memory space by plugging in a large number of memory expansion cards 400, thereby meeting the needs of the computing device 1 for scenarios such as big data processing. In addition, the memory expansion integrated device 4 can be connected to multiple electronic devices 3 through the first connection interface 510, and multiple electronic devices 3 can access the memory expansion integrated device 4 through the first connection interface 510, thereby achieving high utilization of the memory expansion integrated device 4 and avoiding the problem that the memory exclusively occupied by the existing electronic device 3 cannot be allocated to other electronic devices 3. At the same time, the memory expansion integrated device 4 is independent of the electronic device 3, and also solves the problem that a large amount of memory is scattered in different electronic devices 3, which is inconvenient for operation and management.
[0088] In addition, by providing a first plug hole 11a disposed opposite to the first memory slot 331 on the housing 100, the first memory expansion card 410 can be inserted into the first memory slot 331 through the first plug hole 11a and can be removed from the first plug hole 11a, thereby facilitating the management and maintenance efficiency of the first memory expansion card 410. By providing a second plug hole 11b disposed opposite to the second memory slot 333 on the housing 100, the second memory expansion card 430 can be inserted into the second memory slot 333 through the second plug hole 11b and can be removed from the second plug hole 11b, thereby facilitating the management and maintenance efficiency of the second memory expansion card 430.
[0089] In addition, by setting multiple first memory slots 331 in the memory expansion integrated device 4, the number of memory expansion cards 400 plugged into the first memory slots 331 can be increased, thereby facilitating the increase of the memory space of the memory expansion integrated device 4, thereby achieving high scalability of the memory expansion integrated device 4.
[0090] In addition, in the memory expansion integrated device 4 provided in the embodiment of the present application, by simultaneously providing the first connection interface 510 and the second connection interface 530, the electronic device 3 can be connected to the memory expansion integrated device 4 from different sides, thereby improving the plug-in density of the memory expansion integrated device 4 and expanding the use scenario of the memory expansion integrated device 4. In addition, by providing the first circuit board 311 and the second circuit board 313 to be electrically connected, when the electronic device 3 is connected to the memory expansion integrated device 4 from the first connection interface 510 side, the electronic device 3 can use the second memory expansion card 430 located on the same side as the second connection interface 530 to expand the memory, and when the electronic device 3 is connected to the memory expansion integrated device 4 from the second connection interface 530 side, the electronic device 3 can use the first memory expansion card 410 located on the same side as the first connection interface 510 to expand the memory, thereby improving the utilization efficiency of the memory expansion card in the memory expansion integrated device 4.
[0091] In addition, in this embodiment, multiple first plug holes 11a are arranged on opposite sides of the first through hole 13a to achieve that the multiple first plug holes 11a are located on opposite sides of the first connection interface 510 exposed relative to the first through hole 13a, so that the first connection interface 510 is relatively concentrated on the first panel 10a. When the external electronic device 3 is connected to the memory expansion integrated device 4 through the first connection interface 510, the electronic device 3 is concentrated at the position where the memory expansion integrated device 4 is plugged in, which is beneficial for the management control chip 810 to centrally manage and control multiple electronic devices 3.
[0092] See also Figure 6 , Figure 6 for Figure 1 The structure diagram of the memory expansion integrated device 4 in the computing device 1 in the second example is shown.
[0093] The memory expansion integrated device 4 of the second example is different from the memory expansion integrated device 4 of the first example in that, in the memory expansion integrated device 4 of the second example, a plurality of first through holes 13a are distributed on opposite sides of the first plug hole 11a along the length direction of the first panel 10a.
[0094] Among them, similar to the arrangement positions of the first through hole 13a and the first plugging hole 11a, the plurality of second through holes 13b are distributed on opposite sides of the second plugging hole 11b along the length direction of the second panel 10b. It can be understood that the arrangement positions of the second through holes 13b and the second plugging hole 11b of the memory expansion integrated device 4 of the second example on the second panel 10b can also be the same as the arrangement positions of the second through holes 13b and the second plugging hole 11b of the memory expansion integrated device 4 of the first example on the second panel 10b.
[0095] In the memory expansion integrated device 4 of this example, a plurality of first through holes 13a are arranged distributed on opposite sides of the first plug-in hole 11a along the length direction of the first panel 10a, so as to realize concentrating the first plug-in holes 11a in the middle of the first panel 10a. When the electronic device 3 is plugged into the first connection interface 510 exposed relative to the first through hole 13a through a connecting cable, obstruction caused by the connecting cable to the first memory expansion card 410 passing through the first plug-in hole 11a is avoided, and at the same time, it is convenient to plug the electronic device 3 from both sides of the first panel 10a.
[0096] It should be understood that the memory expansion integrated device 4 provided in the embodiment of the present application can flexibly arrange the first through hole 13a and the first plug hole 11a at the position of the first panel 10a, and the second through hole 13b and the second plug hole 11b at the position of the second panel 10b according to actual needs. For example, the first through hole 13a can be arranged on one side of the first panel 10a along the length direction, and the second through hole 13b can be arranged on one side of the second panel 10b along the length direction. The present application does not impose any restrictions on this.
[0097] See also Figure 7 , Figure 7 for Figure 1 The schematic diagram of the partial structure of the memory expansion integrated device 4 in the computing device 1 in the third example is shown. Figure 7 Only a portion of the second memory slot 333 is shown, and the second memory slot 333 is presented in a perspective angle and is indicated by a dotted line.
[0098] The memory expansion integrated device 4 of the third example is different from the memory expansion integrated device 4 of the first example in that the memory expansion integrated device 4 of the third example further includes a partition 900 , which is installed inside the box 100 .
[0099] Specifically, the partition 900 is connected between the two side shells 30, and is spaced apart from the top shell 40 and the bottom shell 50. In the present embodiment, there are a plurality of partitions 900, and the plurality of partitions 900 include a first partition 910 and a second partition 930. The first partition 910 is installed in the first receiving cavity 17, and divides the first receiving cavity 17 into a plurality of first receiving portions 171 along the height direction of the first panel 10a. The first panel 10a of the box body 100 is provided with a plurality of first plug holes 11a, and a plurality of first plug holes 11a spaced apart along the length direction of the first panel 10a constitute a group of first plug holes 11a. The plurality of groups of first plug holes 11a are arranged in sequence along the height direction of the first panel 10a. Each group of first plug holes 11a is connected to a first receiving portion 171.
[0100] A plurality of first memory slots 331 spaced apart along the length direction of the first circuit board 311 constitute a group of first memory slots 331, and the plurality of groups of first memory slots 331 are sequentially arranged along the height direction of the first circuit board 311. Each group of first memory slots 331 is located in a first receiving portion 171. A first memory slot 331 in each group of first memory slots 331 is arranged opposite to a first plugging hole 11a in a group of first plugging holes 11a.
[0101] The second partition 930 is installed in the second receiving cavity 18, and divides the second receiving cavity 18 into a plurality of second receiving parts 181 along the height direction of the second panel 10b. The second panel 10b is provided with a plurality of second plug holes 11b, and a plurality of second plug holes 11b arranged at intervals along the length direction of the second panel 10b constitute a group of second plug holes 11b. The plurality of groups of second plug holes 11b are arranged in sequence along the height direction of the second panel 10b. Each group of second plug holes 11b is connected to a second receiving part 181. A plurality of second memory slots 333 arranged at intervals along the length direction of the second circuit board 313 constitute a group of second memory slots 333, and the plurality of groups of second memory slots 333 are arranged in sequence along the height direction of the second circuit board 313. Each group of second memory slots 333 is located in a second receiving part 181. One second memory slot 333 in each group of second memory slots 333 is arranged opposite to one second plug hole 11b in a group of second plug holes 11b.
[0102] The plurality of memory expansion cards 400 include a plurality of first memory expansion cards 410 and a plurality of second memory expansion cards 430. Some of the first memory expansion cards 410 of the plurality of first memory expansion cards 410 are provided with a group of first plug holes 11a, and are received in a first receiving portion 171, and are respectively plugged with a group of first memory slots 331 located in a first receiving portion 171. Some of the second memory expansion cards 430 of the plurality of second memory expansion cards 430 are provided with a group of second plug holes 11b, and are received in a second receiving portion 181, and are respectively plugged with a group of second memory slots 333 located in a second receiving portion 181.
[0103] In this example, the height of the box body 100 is 2U, that is, the height of the first panel 10a and the second panel 10b is 2U. There is one first partition 910, which divides the first receiving cavity 17 into two first receiving parts 171 along the height direction of the first panel 10a, and the height of each first receiving part 171 along the Z-axis direction is approximately 1U. There is one second partition 930, which divides the second receiving cavity 18 into two second receiving parts 181 along the height direction of the second panel 10b. A plurality of first plug holes 11a constitute two groups of first plug holes 11a, and the two groups of first plug holes 11a are respectively connected to the two first receiving parts 171. A plurality of second plug holes 11b constitute two groups of second plug holes 11b, and the two groups of second plug holes 11b are respectively connected to the two second receiving parts 181. The plurality of first memory slots 331 constitute two groups of first memory slots 331, the two groups of first memory slots 331 are respectively located in the two first receiving portions 171, and each first memory slot 331 in the two groups of first memory slots 331 is respectively arranged opposite to each first plugging hole 11a in the two groups of first plugging holes 11a. The plurality of second memory slots 333 constitute two groups of second memory slots 333, the two groups of second memory slots 333 are respectively located in the two second receiving portions 181, and each second memory slot 333 in the two groups of second memory slots 333 is respectively arranged opposite to each second plugging hole 11b in the two groups of second plugging holes 11b. Multiple memory expansion cards 400 constitute two groups of first memory expansion cards 410 and two groups of second memory expansion cards 430. The two groups of first memory expansion cards 410 are respectively provided with two groups of first plug holes 11a, and are respectively received in two first receiving parts 171, and are respectively plugged with two groups of first memory slots 331. The two groups of second memory expansion cards 430 are respectively provided with two groups of second plug holes 11b, and are respectively received in two second receiving parts 181, and are respectively plugged with two groups of second memory slots 333.
[0104] It is understandable that in other embodiments, the height of the box 100 can also be 3U, 4U, 5U, etc. At this time, the arrangement of the first plug hole 11a, the second plug hole 11b, the first memory slot 331 and the second memory slot 333 can refer to the arrangement when the height of the box 100 is 2U. The present application does not limit the height of the box 100.
[0105] In the memory expansion integrated device 4 provided in this example, a first partition 910 and a second partition 930 are provided to divide the first receiving cavity 17 into a plurality of first receiving portions 171, and to divide the second receiving cavity 18 into a plurality of second receiving portions 181, thereby facilitating the increase in the number of memory expansion cards 400 that can be accommodated, thereby facilitating the improvement of the memory expansion capability of the memory expansion integrated device 4.
[0106] See also Figure 8 , Figure 8 for Figure 1The schematic diagram of the decomposition structure of the memory expansion integrated device 4 in the computing device 1 in the fourth example. Figure 8 Only a portion of the second memory slot 333 is shown, and the second memory slot 333 is presented in a perspective angle and is indicated by a dotted line.
[0107] The memory expansion integrated device 4 in the fourth example is different from the memory expansion integrated device 4 in the first example in that the memory expansion integrated device 4 in the fourth example further includes a transfer circuit board 600 , which is electrically connected between the connection interface 500 and the circuit board 310 of the plug-in component 300 .
[0108] Specifically, in the memory expansion integrated device 4 of the fourth example, there are multiple adapter circuit boards 600, and the multiple adapter circuit boards 600 include a first adapter circuit board 610 and a second adapter circuit board 630. The first adapter circuit board 610 is electrically connected between the first circuit board 311 and the first connection interface 510, and the second adapter circuit board 630 is electrically connected between the second circuit board 313 and the second connection interface 530. Exemplarily, the first adapter circuit board 610 is electrically connected to the first circuit board 311 and the first connection interface 510 respectively through wires, and the second adapter circuit board 630 is electrically connected to the second circuit board 313 and the second connection interface 530 respectively through wires.
[0109] In the memory expansion integrated device 4 of the fourth example, a first adapter circuit board 610 is provided to electrically connect the first connection interface 510 and the first circuit board 311, and a second adapter circuit board 630 is provided to electrically connect the second connection interface 530 and the second circuit board 313, so as to realize that the adapter circuit board 600 is electrically connected between the connection interface 500 and the circuit board 310 of the plug-in assembly 300. The connection method is simple and the connection structure is neat, which can avoid the problem of messy connection caused by directly connecting multiple wires through the connection interface 500 and the circuit board 310.
[0110] See also Fig. 9 , Fig. 9 for Figure 1 The schematic diagram of the structure of part of the memory expansion integrated device 4 in the computing device 1 in the fifth example is shown.
[0111] The memory expansion integrated device 4 in the fifth example is different from the memory expansion integrated device 4 in the first example in that a side shell 30 of the memory expansion integrated device 4 in the fifth example is provided with a plug hole 11 and a through hole 13, and the plug hole 11 and the through hole 13 both penetrate the side shell 30 along the thickness direction of the side shell 30.
[0112] Specifically, the memory expansion integrated device 4 in the fifth example further includes a fourth circuit board, a third memory slot, a third memory expansion card 450 and a third connection interface 550. The plug hole 11 and the through hole 13 provided on the side shell 30 can be arranged with reference to the positions of the first plug hole 11a and the first through hole 13a in the first example, respectively. The fourth circuit board, the third memory slot, the third memory expansion card 450 and the third connection interface 550 can be arranged with reference to the structures and positions of the first circuit board 311, the first memory slot 331, the first memory expansion card 410 and the first connection interface 510, respectively, and this application will not repeat them.
[0113] It is understandable that in other examples, the memory expansion integrated device 4 can also be provided with the plug hole 11 and the through hole 13 at other positions of the case 100, such as on both side shells 30, so as to enable the electronic device 3 to be plugged into the memory expansion integrated device 4 from the direction of the two side shells 30, and the present application does not impose any restrictions on this.
[0114] See also Fig.10 , Fig.10 A schematic diagram of the three-dimensional structure of a computing device 1 provided in the second embodiment of the present application.
[0115] The computing device 1 of the second embodiment is different from the computing device 1 of the first embodiment in that the computing device 1 of the second embodiment is not provided with a cabinet 2 .
[0116] Specifically, the computing device 1 includes an electronic device 3 and a memory expansion integrated device 4, and the electronic device 3 is electrically connected to the first connection interface 510 or the second connection interface 530 of the memory expansion integrated device 4 through a cable to realize signal transmission between the electronic device 3 and the memory expansion integrated device 4. Among them, there can be multiple electronic devices 3, and the multiple electronic devices 3 can all be servers 3a, or some can be servers 3a and some can be switches 3b, and the switch 3b is connected between the memory expansion integrated device 4 and the server 3a, so that the memory expansion integrated device 4 can be connected to more servers 3a through the switch 3b without being limited by the number of the first connection interface 510 and the second connection interface 530, so that more servers 3a can expand memory through the memory expansion integrated device 4. Alternatively, the switch 3b can be connected to multiple memory expansion integrated devices 4 and multiple servers 3a, so that multiple servers 3a can share the extended memory of multiple memory expansion integrated devices 4, and increase the memory expansion density for multiple servers 3a. It can be understood that the memory expansion integrated device 4 in the computing device 1 of the second embodiment can be any one of the memory expansion integrated devices 4 in the first example to the fifth example.
[0117] What is disclosed above is only a preferred embodiment of the present application, and it certainly cannot be used to limit the scope of rights of the present application. Ordinary technicians in this field can understand that all or part of the processes of implementing the above embodiments and equivalent changes made according to the claims of the present application are still within the scope covered by the present application.
Claims
1. A computing device, characterized in that: It includes an electronic device and a memory expansion integrated device, the memory expansion integrated device includes a case, a first circuit board, a first connection interface, multiple first memory slots and multiple first memory expansion cards, the first circuit board, the first connection interface and the multiple first memory slots are all arranged inside the case, the multiple first memory slots are arranged on the first circuit board at intervals, the first connection interface is electrically connected to the first circuit board, the first connection interface is exposed relative to the outer surface of the case, the case is provided with multiple first plug holes, each of the first plug holes connects the inside and the outside of the case, each of the first memory expansion cards is inserted into one of the first plug holes and can be detachably plugged into one of the first memory slots, and the electronic device is connected to the first connection interface of the memory expansion integrated device.
2. A memory expansion integrated device, characterized in that: The memory expansion integrated device is used to expand the memory of the server, and the memory expansion integrated device includes a housing, a first circuit board, a first connection interface, a plurality of first memory slots and a plurality of first memory expansion cards. The first circuit board, the first connection interface and the plurality of first memory slots are all arranged inside the housing, and the plurality of first memory slots are arranged at intervals on the first circuit board. The first connection interface is electrically connected to the first circuit board, and the first connection interface is exposed relative to the outer surface of the housing and is used to connect to the server. The housing is provided with a plurality of first plug holes, each of which connects the inside and the outside of the housing, and each of the first memory expansion cards is inserted into one of the first plug holes and can be detachably plugged into one of the first memory slots.
3. The memory expansion integrated device according to claim 2, characterized in that: The memory expansion integrated device also includes a second circuit board, a second connection interface, multiple second memory slots and multiple second memory expansion cards. The second circuit board, the second connection interface and the multiple second memory slots are all arranged inside the box. The second circuit board is spaced apart from the first circuit board, and the multiple second memory slots are spaced apart from the second circuit board. The second connection interface is electrically connected to the second circuit board, and the second connection interface is exposed relative to the outer surface of the box and is used to connect to the server. The box is also provided with multiple second plug-in holes. The multiple second plug-in holes and the multiple first plug-in holes are respectively located on opposite sides or adjacent sides of the box. Each second plug-in hole connects the inside and the outside of the box. Each second memory expansion card is inserted into a second plug-in hole and can be detachably plugged into a second memory slot.
4. The memory expansion integrated device according to claim 3, characterized in that: The first connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector, and / or the second connection interface is a UBC connector, a UBC-DD connector, a MCIO connector, an ASM connector or a fiber optic interface connector.
5. The memory expansion integrated device according to claim 3, characterized in that: The box body includes a first panel and a second panel that are arranged opposite to each other, the first plug hole is provided on the first panel and penetrates the first panel along the thickness direction of the first panel, the first circuit board is spaced apart from and arranged opposite to the first panel, the first memory slot is provided on the surface of the first circuit board facing the first panel, and the first connection interface is exposed relative to the outer surface of the first panel; and / or, the second plug hole is provided on the second panel and penetrates the second panel along the thickness direction of the second panel, the second circuit board is spaced apart from and arranged opposite to the first circuit board, and is spaced apart from and arranged opposite to the second panel, the second memory slot is provided on the surface of the second panel facing the second panel, and the second connection interface is exposed relative to the outer surface of the second panel.
6. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: The memory expansion integrated device further includes a power module, which is located between the second panel and the second circuit board and is electrically connected to the second circuit board.
7. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: The memory expansion integrated device also includes a third circuit board, which is installed between the first circuit board and the second circuit board and is electrically connected to the first circuit board and the second circuit board.
8. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a processor, which is installed on the third circuit board and electrically connected to the third circuit board. The processor can manage multiple first memory expansion cards and multiple second memory expansion cards.
9. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a management control chip and an indicator. The management control chip is installed on the third circuit board and is electrically connected to the third circuit board. The indicator is installed on the box and is electrically connected to the third circuit board. The management control chip is used to obtain a transmission signal between the memory expansion card and the server, and control the indicator to indicate that the memory expansion integrated device is in an operating state or a fault state.
10. The memory expansion integrated device according to claim 7, characterized in that: The memory expansion integrated device also includes a heat sink, which is installed on the first circuit board and electrically connected to the first circuit board, or the heat sink is installed on the second circuit board and electrically connected to the second circuit board, or the heat sink is installed on the third circuit board and electrically connected to the third circuit board.
11. The memory expansion integrated device according to claim 10, characterized in that: The heat sink is located between the first circuit board and the second circuit board. Both the first circuit board and the second circuit board are provided with ventilation holes. The ventilation holes of the first circuit board penetrate the first circuit board along the thickness direction of the first circuit board, and the ventilation holes of the second circuit board penetrate the second circuit board along the thickness direction of the second circuit board.
12. The memory expansion integrated device according to any one of claims 3 to 5, characterized in that: Multiple first plug-in holes are located on opposite sides of the first connection interface, or, there are multiple first connection interfaces and multiple first connection interfaces are located on opposite sides of the multiple first plug-in holes, or, multiple second plug-in holes are located on opposite sides of the second connection interface, or, there are multiple second connection interfaces and multiple second connection interfaces are located on opposite sides of the multiple second plug-in holes.
13. The memory expansion integrated device according to any one of claims 3 to 12, characterized in that: A first receiving cavity is formed between the first panel and the first circuit board, and a second receiving cavity is formed between the second panel and the second circuit board. The memory expansion integrated device further comprises a first partition and a second partition. The first partition is installed in the first receiving cavity and divides the first receiving cavity into a plurality of first receiving portions along the height direction of the box body. The second partition is installed in the second receiving cavity and divides the second receiving cavity into a plurality of second receiving portions along the height direction of the box body. A plurality of first memory slots arranged at intervals along the length direction of the first circuit board constitute a group of first memory slots, a plurality of groups of first memory slots are arranged at intervals along the height direction of the first circuit board, and each group of first memory slots is located in a first accommodating portion, a plurality of second memory slots arranged at intervals along the length direction of the second circuit board constitute a group of second memory slots, a plurality of groups of second memory slots are arranged at intervals along the height direction of the second circuit board, and each group of second memory slots is located in a second accommodating portion.