Bus current detection method and device and computer readable storage medium

Abstract

The invention discloses a bus current detection method and device and a computer readable storage medium, and relates to the technical field of motor control. The method comprises the following steps: acquiring respective corresponding conduction time of a U phase, a V phase and a W phase in a space vector pulse width modulation period; adjusting the conduction time by using an adjustment strategy corresponding to the dead time of the inverter, calculating to obtain a first time corresponding to the first voltage vector and a second time corresponding to the second voltage vector, and setting the first voltage vector and the second voltage vector to be adjacent and form a sector and to be arranged in an anticlockwise direction; sampling a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within a space vector pulse width modulation period; based on the first time, the second time, the first current and the second current, the bus average current in the space vector pulse width modulation period is obtained. The precision of the detection result can be improved.

Description

Technical Field

[0001] The present application relates to the field of motor control technology, and in particular to a bus current detection method, a detection device and a computer-readable storage medium. Background Art

[0002] The motor bus current is an important physical quantity used to determine the motor's operating status, such as whether the motor is overcurrent, idling, or stalled. Generally, the field-oriented control of a permanent magnet synchronous motor requires the detection of the motor's three-phase current. When reconstructing the bus current, only the sampled phase current and the applied phase voltage can be used. However, the deviation between the sampled phase current and the actual bus current causes a deviation in the bus current reconstruction, and the applied phase voltage cannot be accurately calculated, which further amplifies the bus current reconstruction deviation. Summary of the invention

[0003] One of the embodiments of the present application provides a bus current detection method, including: obtaining the conduction time corresponding to the U phase, V phase and W phase respectively within the space vector pulse width modulation period; adjusting the conduction time respectively using the adjustment strategy corresponding to the dead time of the inverter, and calculating the first time corresponding to the first voltage vector and the second time corresponding to the second voltage vector, the first voltage vector and the second voltage vector are set to be adjacent and constitute a sector, and are arranged in a counterclockwise direction; sampling the first current corresponding to the first voltage vector and the second current corresponding to the second voltage vector within the space vector pulse width modulation period; obtaining the bus average current within the space vector pulse width modulation period based on the first time, the second time, the first current and the second current.

[0004] A further embodiment is that the conduction time is adjusted separately using an adjustment strategy corresponding to the dead time of the inverter, including: obtaining the adjustment strategy based on the current flow directions corresponding to the U phase, the V phase and the W phase respectively; and adjusting the conduction time corresponding to the U phase, the V phase and the W phase respectively using the adjustment strategy.

[0005] A further embodiment is that the adjustment strategy is obtained based on the current flow direction corresponding to each of the U phase, the V phase and the W phase, including: if the current flow direction of one phase among the U phase, the V phase and the W phase is positive, then the adjustment strategy is the conduction time corresponding to the one-phase current minus the dead time; if the current flow direction of one phase among the U phase, the V phase and the W phase is negative, then the adjustment strategy is the conduction time corresponding to the one-phase current plus the dead time; wherein, if the one-phase current flows into the motor, it is positive, and if the one-phase current flows out of the motor, it is negative.

[0006] A further embodiment is that the calculation of the first time corresponding to the first voltage vector and the second time corresponding to the second voltage vector includes: determining the sector attribute; and obtaining the first time and the second time corresponding to the adjusted conduction time under a calculation strategy corresponding to the sector attribute.

[0007] A further embodiment is that the bus average current within the space vector pulse width modulation period is obtained based on the first time, the second time, the first current and the second current, including: the sum of the product of the first time and the first current plus the product of the second time and the second current divided by the value of the space vector pulse width modulation period, as the bus average current.

[0008] A further embodiment is that it further comprises: performing low-pass filtering on the bus average current.

[0009] A further embodiment is that before sampling the first current corresponding to the first voltage vector and the second current corresponding to the second voltage vector within the space vector pulse width modulation period, it also includes: in response to the result that the sampling time of sampling the first current and / or the second current is less than the minimum sampling time, the phase with the smallest conduction time duty cycle corresponding to the U phase, the V phase and the W phase is shifted backward within the space vector pulse width modulation period, and the phase with the largest duty cycle is shifted forward within the space vector pulse width modulation period; changing the value of the register.

[0010] One of the embodiments of the present application provides a bus current detection method, including: within a space vector pulse width modulation period, obtaining a first action time of a first voltage vector and a second action time of a second voltage vector based on a target voltage vector and a volt-second balance principle, wherein the first voltage vector and the second voltage vector are arranged to be adjacent to each other and constitute a sector, and are arranged in a counterclockwise direction; sampling a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; obtaining an adjusted first action time and an adjusted second action time using an adjustment strategy corresponding to the dead time of an inverter; and calculating an average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current.

[0011] A further embodiment is that the use of an adjustment strategy corresponding to the dead time of the inverter to obtain the adjusted first action time and the adjusted second action time includes: determining the sector attribute and the current flow direction corresponding to the U phase, the V phase and the W phase respectively; obtaining the adjusted first action time and the adjusted second action time in the adjustment strategy, and the adjustment strategy is as follows;

[0012]

[0013]

[0014] A further embodiment is that the bus average current within the space vector pulse width modulation period is calculated based on the adjusted first action time, the adjusted second action time, the first current and the second current, including: the sum of the product of the adjusted first action time and the first current plus the product of the adjusted second action time and the second current divided by the value of the space vector pulse width modulation period, as the bus average current.

[0015] A further embodiment is that it further comprises: performing low-pass filtering on the bus average current.

[0016] One of the embodiments of the present application provides a bus current detection device, including: an acquisition module, used to acquire the conduction time corresponding to each of the U phase, the V phase and the W phase within a space vector pulse width modulation period; a time processing module, used to adjust the conduction time respectively using an adjustment strategy corresponding to the dead time of the inverter, and calculate a first time corresponding to a first voltage vector and a second time corresponding to a second voltage vector, wherein the first voltage vector and the second voltage vector are arranged adjacent to each other and constitute a sector, and are arranged in a counterclockwise direction; a sampling module, used to sample a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; and a current processing module, used to acquire the average bus current within the space vector pulse width modulation period based on the first time, the second time, the first current and the second current.

[0017] One of the embodiments of the present application provides a bus current detection device, including: an acquisition module, used to acquire a first action time of a first voltage vector and a second action time of a second voltage vector based on a target voltage vector and a volt-second balance principle within a space vector pulse width modulation period; a sampling module, used to sample a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; a time processing module, used to acquire an adjusted first action time and an adjusted second action time using an adjustment strategy corresponding to the dead time of an inverter; and a current processing module, used to calculate an average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current.

[0018] One of the embodiments of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method described above is implemented.

[0019] The present application adopts the above-mentioned technical solution to collect the instantaneous value of the bus current, which is more accurate than reconstructing the bus current by multi-resistance sampling. It does not require current reconstruction and then processes to obtain the average value of the bus current. In addition, dead time is used for time compensation in this process, which greatly improves the accuracy of the detection results. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A topological structure diagram of a single resistor bus current sampling circuit in some embodiments of the present application;

[0021] Figure 2 Schematic diagram of eight voltage space vectors in some embodiments of the present application;

[0022] Figure 3 This is a schematic diagram of target voltage vector synthesis in some embodiments of the present application;

[0023] Figure 4 This is a flow chart of bus current detection in some embodiments of the present application;

[0024] Figure 5 This is a schematic diagram of phase shifting in some embodiments of the present application;

[0025] Figure 6 A flowchart of bus current detection in some other embodiments of the present application;

[0026] Figure 7 This is a schematic diagram of the framework of a bus current detection device in some embodiments of the present application;

[0027] Figure 8It is a schematic diagram of the framework of a computer-readable storage medium in one embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0029] The present application describes a bus current detection method, which can be used to detect the bus current in a motor. The bus current of a motor is a key physical quantity related to safety, and can be used as key data for controlling the motor so as to control the motor based on the bus current of the motor. The method can also be used for devices including motors, such as electric vehicles, air conditioners, fans, and washing machines, and can detect the bus current of the motor. Here, an electric vehicle is taken as an example of a device including a motor.

[0030] Electric vehicles may include pure electric vehicles, plug-in hybrid vehicles, fuel cell vehicles, etc. The bus current of the motor may need to be uploaded to the vehicle controller in real time by the motor controller to achieve control of the electric vehicle and improve the reliability of the electric vehicle. In some embodiments, the motor may be a permanent magnet synchronous motor (PMSM).

[0031] In this method, a single resistor bus current sampling circuit is used. The single resistor bus current sampling circuit can be electrically connected to the motor to achieve bus current sampling. Figure 1 , Figure 1 The topological structure diagram of the single resistor bus current sampling circuit in some embodiments of the present application; the single resistor bus current sampling circuit 100 may include an inverter 20 electrically connected to the motor 10, a low-side sampling resistor 30 arranged on the bus, and an operational amplifier 40 electrically connected to both sides of the low-side sampling resistor 30. Among them, the bus current passes through the inverter 20 to form a phase current and is input to the motor 10. When the bus current passes through the low-side sampling resistor 30, the voltage on both sides of the low-side sampling resistor 30 is processed by the operational amplifier 40, and finally the sampling of the bus current is realized on the basis of amplifying the sampling voltage.

[0032] In some embodiments, the single-resistance bus current sampling circuit 100 may be a circuit in an automotive electronic control system, which can reduce the increase in hardware and reduce costs such as component costs or printed circuit board costs.

[0033] Taking a three-phase permanent magnet synchronous motor as an example, the inverter 20 may include three-phase bridge arms, such as an A-phase bridge arm, a B-phase bridge arm, and a C-phase bridge arm. Each phase bridge arm may include two switch tubes ( Figure 1 The upper switch tube and Figure 1 The input ends of the upper switch tubes of the three-phase bridge arm are connected together to form the first input end of the inverter 20, and the output ends of the lower switch tubes of the three-phase bridge arm are connected together to form the second input end of the inverter 20. The first input end can be a high level, and the second input end can be a low level, and can be electrically connected to the low-side sampling resistor 30.

[0034] The controlled end of each switching tube constitutes a controlled end of the inverter 20, and the output end of the upper switching tube and the input end of the lower switching tube of each phase bridge arm are connected together to constitute an output end of the inverter 20, which are respectively electrically connected to the A phase (also called "U phase"), B phase (also called "V phase") and C phase (also called "W phase") of the motor 10.

[0035] Among them, the switch tube has the function of being turned on or off under the triggering of an electrical signal (such as a pulse width modulation (PWM) signal), and is used to play the role of an electronic switch. Specifically, it can be an insulated gate bipolar transistor (IGBT), a bipolar junction transistor (BJT), a field effect transistor (FET), etc. The insulated gate bipolar transistor is a composite fully controlled voltage-driven power semiconductor device composed of a bipolar transistor and an insulated gate field effect transistor, and has the advantages of both the high input impedance of the insulated gate field effect transistor and the low conduction voltage drop of the bipolar transistor. The field effect transistor can specifically be a metal oxide semiconductor field effect transistor (Metal-Oxide Semiconductor FET, referred to as MOS-FET).

[0036] See also Figure 1 , the bridge arm where the upper switch tube is located is the upper bridge arm, the bridge arm where the lower switch tube is located is the lower bridge arm, and the connection between the upper bridge arm and the lower bridge arm is the output end of the inverter 20. Among them, when the upper bridge arm of each phase is turned on and the lower bridge arm is turned off, it is recorded as 0, and when the upper bridge arm is turned off and the lower bridge arm is turned on, it is recorded as 1. Under the space vector pulse width modulation (SVPWM) method, the three phases have eight states, namely 111, 000, 001, 010, 011, 100, 101, and 110, and each state can generate a magnetic field with a fixed direction.

[0037] See also Figure 2 , Figure 2 Schematic diagram of eight voltage space vectors in some embodiments of the present application. Each state in 111, 000, 001, 010, 011, 100, 101, 110 is a voltage vector and is recorded in Figure 2 Among them, the two states 111 and 000 are zero vectors, and the remaining six voltage vectors divide the coordinate axis into six sectors. By setting the action time of two adjacent voltage vectors and the zero vector, the reference voltage vector in any direction can be modulated.

[0038] See also Figure 4 , Figure 4 This is a flow chart of bus current detection in some embodiments of the present application. The method may include:

[0039] Step S401: obtaining the conduction time corresponding to each of the U phase, the V phase and the W phase in a space vector pulse width modulation period.

[0040] The motor is controlled by an inverter to realize the conduction or cutoff of each of the U phase, V phase and W phase of the motor. Furthermore, the conduction of each of the U phase, V phase and W phase can correspond to an electrical signal (such as a pulse width modulation (PWM) signal), and the conduction time corresponding to each of the U phase, V phase and W phase can be obtained based on the electrical signal.

[0041] For example, we can remember that T u It represents the conduction time of motor U phase in the space vector pulse width modulation cycle, T v It represents the conduction time of motor V phase in the space vector pulse width modulation cycle, T w It indicates the conduction time of motor W phase in the space vector pulse width modulation period.

[0042] In some embodiments, the motor is controlled mainly by using Field Oriented Control (FOC) to complete closed-loop control of torque and speed.

[0043] Step S402: adjusting the on-times respectively using an adjustment strategy corresponding to the dead time of the inverter, and calculating a first time corresponding to the first voltage vector and a second time corresponding to the second voltage vector.

[0044] Any voltage vector, such as a target voltage vector, can be modulated by the first voltage vector and the second voltage vector. Figure 3 shown. Figure 3 Schematic diagram of target voltage vector synthesis in some embodiments of the present application. The first voltage vector is U'1, the first voltage vector is U'2, and the target voltage vector is U outT1 represents the first action time of the first vector, and T2 represents the second action time of the second vector. The space vector pulse width modulation period is T S .

[0045] See also Figure 2 , the six voltage vectors divide the coordinate axis into six sectors. In each sector, the first voltage vector and the second voltage vector are arranged adjacent to each other and constitute a sector, and are arranged in a counterclockwise direction.

[0046] For example, the first voltage vector of sector I is U4 (100), and the second voltage vector is U6 (110).

[0047] For example, the first voltage vector of sector II is U6 (110), and the second voltage vector is U2 (010).

[0048] For example, the first voltage vector of sector III is U2 (010), and the second voltage vector is U3 (011).

[0049] For example, the first voltage vector of sector IV is U3 (011), and the second voltage vector is U1 (001).

[0050] For example, the first voltage vector of sector V is U1 (001), and the second voltage vector is U5 (101).

[0051] For example, the first voltage vector of sector VI is U5 (101), and the second voltage vector is U4 (100).

[0052] In some embodiments, in order to prevent each phase bridge arm of the inverter from being directly connected, the on and off of the upper switch tube and the lower switch tube of each phase bridge arm need to be staggered (dead time). The dead time is denoted as T d For example, in a certain phase bridge arm, the opening action of the upper switch tube is generated at the comparison value moment of the corresponding phase, and the closing action of the lower switch tube is generated before the comparison value moment of the corresponding phase and in advance of the dead time; for example, in a certain phase bridge arm, the opening action of the lower switch tube is generated at the comparison value moment of the corresponding phase, and the closing action of the upper switch tube is generated before the comparison value moment of the corresponding phase and in advance of the dead time.

[0053] The existence of dead time affects the accuracy of bus current detection. Therefore, in the method, it is necessary to consider the influence of dead time on the action time of the first voltage vector and the action time of the second voltage vector, so as to improve the accuracy of the detection result.

[0054] Furthermore, an adjustment strategy can be formed based on the dead time, and the adjustment strategy can be used to correct the conduction time corresponding to the U phase, V phase and W phase, so as to be used for determining the bus current in the subsequent steps and improve the accuracy of the detection result.

[0055] In some embodiments, step S402 may include acquiring an adjustment strategy based on the current flow directions corresponding to the U phase, V phase and W phase; and adjusting the conduction time corresponding to the U phase, V phase and W phase respectively using the adjustment strategy.

[0056] In some embodiments, if the current flow direction of one phase among the U phase, V phase and W phase is positive, the adjustment strategy is the conduction time corresponding to the one phase current minus the dead time; if the current flow direction of one phase among the U phase, V phase and W phase is negative, the adjustment strategy is the conduction time corresponding to the one phase current plus the dead time. If the current of one phase flows into the motor, it is positive, and if the current of one phase flows out of the motor, it is negative.

[0057] In some embodiments, taking sector I as an example, I a Indicates the motor U phase current, T' u Indicates the conduction time compensation dead time T of the motor U phase in the space vector pulse width modulation cycle d The result. Among them, the condition is met: if I a <0, then T' u =T u +T d . If I a >0, then T' u =T u -T d For the remaining sectors, please refer to Sector Ⅰ.

[0058] In some embodiments, taking sector I as an example, I b Represents the motor V phase current, T' v Indicates the conduction time compensation dead time T of motor V phase in the space vector pulse width modulation cycle d The result. Among them, the condition is met: if I b <0, then T' v =T v +T d . If I b >0, then T' v =T v -T d The remaining sectors can refer to sector I. In some embodiments, taking sector I as an example, c Represents the motor W phase current, T' w Indicates the conduction time compensation dead time T of the motor W phase in the space vector pulse width modulation cycle d The result. Among them, the condition is met: if I c <0, then T' w =T w +T d . If I c >0, then T' w =Tw -T d For the remaining sectors, please refer to Sector Ⅰ.

[0059] In some embodiments, taking sector I as an example, I a >0,I b <0,I c <0, then T' u =T u -T d , T' v =T v +T d , T' w =T w +T d .

[0060] In some embodiments, taking sector I as an example, I a >0,I b >0,I c <0, then T' u =T u -T d , T' v =T v -T d , T' w =T w +T d .

[0061] In some embodiments, taking sector I as an example, I a <0,I b >0,I c <0, then T' u =T u +T d , T' v =T v -T d , T' w =T w +T d .

[0062] In some embodiments, taking sector I as an example, I a <0,I b >0,I c >0, then T' u =T u +T d , T' v =T v -T d , T' w =T w -T d In some embodiments, taking sector I as an example, I a <0,Ib <0,I c >0, then T' u =T u +T d , T' v =T v +T d , T' w =T w -T d In some embodiments, taking sector I as an example, I a >0,I b <0,I c >0, then T' u =T u -T d , T' v =T v +T d , T' w =T w -T d .

[0063] In some embodiments, step S402 may include determining a sector attribute; and obtaining a first time and a second time corresponding to the adjusted on-time under a calculation strategy corresponding to the sector attribute.

[0064] There is a correlation between the conduction time corresponding to the U phase, the V phase and the W phase and the action time of the first voltage vector and the action time of the second voltage vector of a certain sector. This correlation can be determined as a calculation strategy, and then when the conduction time corresponding to the U phase, the V phase and the W phase is known, the action time of the first voltage vector and the action time of the second voltage vector can be determined based on the calculation strategy. Similarly, the conduction time adjusted by the dead time can naturally be processed based on this calculation strategy to obtain the first time and the second time.

[0065] In addition, the calculation strategies may be different for different sector attributes, and thus the sector attributes need to be confirmed, and the calculation strategies corresponding to the sector attributes may be provided. The sector attributes may be sector numbers or sector positions, etc. For example, the calculation strategies may include calculation strategies corresponding to sector I, calculation strategies corresponding to sector II, calculation strategies corresponding to sector III, calculation strategies corresponding to sector IV, calculation strategies corresponding to sector V, and calculation strategies corresponding to sector VI, etc.

[0066] In some embodiments, T'1 represents the first vector compensation dead time T d The post-action time value (ie, the first time). T'2 represents the second vector compensation dead time T d The calculation strategy for the post-action time value (ie, the second time) corresponding to sector I may be: T'1 = T' u -T'v , T'2=T' v -T' w .

[0067] In some embodiments, the calculation strategy corresponding to sector II may be: T'1 = T' v -T' u , T'2=T' u -T' w .

[0068] In some embodiments, the calculation strategy corresponding to sector III may be: T'1 = T' v -T' w , T'2=T' w -T' u .

[0069] In some embodiments, the calculation strategy corresponding to sector IV may be: T'1 = T' w -T' v , T'2=T' v -T' u .

[0070] In some embodiments, the calculation strategy corresponding to sector V may be: T'1 = T' w -T' u , T'2=T' u -T' v .

[0071] In some embodiments, the calculation strategy corresponding to sector VI may be: T'1 = T' u -T' v , T'2=T' v -T' w .

[0072] Step S403: sampling a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within a space vector pulse width modulation period.

[0073] In some embodiments, the Figure 1 The single resistor bus current sampling circuit 100 shown performs single resistor bus current sampling.

[0074] Step S404: obtaining an average bus current within a space vector pulse width modulation period based on the first time, the second time, the first current and the second current.

[0075] In some embodiments, the sum of the product of the first time and the first current plus the product of the second time and the second current divided by the value of the space vector pulse width modulation period is used as the bus average current.

[0076] In some embodiments, after step S404, the average bus current may be low-pass filtered to remove high-frequency interference.

[0077] In some embodiments, the first time and the second time meet the requirements in the following table:

[0078]

[0079]

[0080] It is understandable that step S401 and step S403 may be performed in any order. For example, step S403 may be performed before step S401, or step S401 may be performed before step S403.

[0081] In some embodiments, before step S403, in response to the result that the sampling time of the first current and / or the second current is less than the minimum sampling time, the phase with the smallest duty cycle of the conduction time corresponding to the U phase, the V phase and the W phase can be shifted backward within the space vector pulse width modulation cycle, and the phase with the largest duty cycle can be shifted forward within the space vector pulse width modulation cycle; the value of the register is changed. Then step S403 can be performed. It can be understood that when the sampling time of the first current and the second current is greater than the minimum sampling time, it can be skipped and step S403 can be performed directly.

[0082] See also Figure 5 , Figure 5 This is a schematic diagram of phase shifting in some embodiments of the present application. Figure 5 In the process, the U phase duty ratio is small, and then the phase is shifted backward within the space vector pulse width modulation period, that is, Figure 5 The phase shifts rightward to the position of X1. The W phase duty ratio is large, and then the phase shifts forward within the space vector pulse width modulation cycle, that is, Figure 5 Phase shifted leftward to the position of X2.

[0083] See also Figure 6 , Figure 6 This is a flow chart of bus current detection in some other embodiments of the present application. The method may include:

[0084] Step S601: within a space vector pulse width modulation period, obtaining a first action time of a first voltage vector and a second action time of a second voltage vector based on a target voltage vector and a volt-second balance principle.

[0085] The first voltage vector and the second voltage vector are arranged adjacent to each other and form a sector, and are arranged in a counterclockwise direction, such as Figure 2 shown.

[0086] In some embodiments, taking sector I as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. u -T v . T2 = T v -T w For the remaining sectors, please refer to Sector Ⅰ.

[0087] In some embodiments, taking sector II as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. v -T u , T2=T u -T w .

[0088] In some embodiments, taking sector III as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. v -T w , T2=T w -T u .

[0089] In some embodiments, taking sector IV as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. w -T v , T2=T v -T u .

[0090] In some embodiments, taking sector V as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. w -T u , T1=T u -T v .

[0091] In some embodiments, taking sector VI as an example, when step S601 is executed, T1=T can be obtained based on the target voltage vector and the volt-second balance principle. u -T v , T1=T v -T w .

[0092] Step S602: sampling a first current corresponding to a first voltage vector and a second current corresponding to a second voltage vector within a space vector pulse width modulation period.

[0093] For step S602, please refer to the above step S403 and no further description is given.

[0094] In some embodiments, before step S602, in response to the result that the sampling time of the first current and / or the second current is less than the minimum sampling time, the phase with the smallest duty cycle of the conduction time corresponding to the U phase, the V phase and the W phase is shifted backward within the space vector pulse width modulation cycle, and the phase with the largest duty cycle is shifted forward within the space vector pulse width modulation cycle; the value of the register is changed. Then step S402 can be performed. It can be understood that when the sampling time of the first current and the second current is greater than the minimum sampling time, it can be skipped and step S402 can be performed directly.

[0095] Step S603: obtaining an adjusted first action time and an adjusted second action time by using an adjustment strategy corresponding to the dead time of the inverter.

[0096] Step S603 may include: determining the sector position and the current flow direction corresponding to the U phase, the V phase and the W phase respectively; obtaining the adjusted first action time and the adjusted second action time in the adjustment strategy, and the adjustment strategy is as follows;

[0097]

[0098]

[0099] In some embodiments, taking sector I as an example, wherein:

[0100] (1) When I a >0,I b <0,I c When <0, T' u =T u -T d , T' v =T v +T d , T' w =T w +T d Then, before adjusting the inverter dead time, T1 = T u -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1-2T d , T'2=T' v -T' w =T2.

[0101] (2) When I a >0,I b >0,I c When <0, T'u =T u -T d , T' v =T v -T d , T' w =T w +T d Then, before adjusting the inverter dead time, T1 = T u -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1, T'2 = T' v -T' w =T2-2T d .

[0102] (3) When I a <0,I b >0,I c When <0, T' u =T u +T d , T' v =T v -T d , T' w =T w +T d Then, before adjusting the inverter dead time, T1 = T u -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1+2T d , T'2=T' v -T' w =T2-2T d .

[0103] (4)When I a <0,I b >0,I c >0, then T' u =T u +T d , T' v =T v -T d , T' w =T w -T d Then, before adjusting the inverter dead time, T1 = Tu -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1+2T d , T'2=T' v -T' w =T2.

[0104] (5)When I a <0,I b <0,I c >0, then T' u =T u +T d , T' v =T v +T d , T' w =T w -T d Then, before adjusting the inverter dead time, T1 = T u -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1, T'2 = T' v -T' w =T2+2T d .

[0105] (6)When I a >0,I b <0,I c >0, then T' u =T u -T d , T' v =T v +T d , T' w =T w -T d Then, before adjusting the inverter dead time, T1 = T u -T v . T2 = T v -T w After adjusting the inverter dead time, T'1 = T' u -T' v =T1-2T d , T'2=T' v -T' w =T2+2Td .

[0106] For the remaining sectors, please refer to sector Ⅰ.

[0107] Step S604: Calculating the average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current.

[0108] For step S604, please refer to the above step S404 and no further details are given.

[0109] It is understandable that step S601 and step S602 may be performed in any order. For example, step S602 may be performed before step S601, or step S601 may be performed before step S602. Similarly, step S602 and step S603 may be performed in any order. For example, step S602 may be performed before step S603, or step S603 may be performed before step S602.

[0110] Next, a bus current detection device is described, which can be used to perform the above steps S401, S402, S403 and S404, etc. It can also be used to perform the above steps S601, S602, S603 and S604, etc. Please refer to Figure 7 , Figure 7 Schematic diagram of the bus current detection device in some embodiments of the present application. The bus current detection device 200 may include an acquisition module 201, a time processing module 202, a sampling module 203 and a current processing module 204 that are coupled to each other.

[0111] When the bus current detection device 200 is used to perform the above steps S401, S402, S403 and S404:

[0112] In some embodiments, the acquisition module 201 is used to acquire the conduction time corresponding to each of the U phase, the V phase and the W phase in the space vector pulse width modulation period. In some embodiments, the acquisition module 201 is used to implement step S401.

[0113] In some embodiments, the time processing module 202 is used to adjust the conduction time respectively using the adjustment strategy corresponding to the dead time of the inverter, and calculate the first time corresponding to the first voltage vector and the second time corresponding to the second voltage vector, the first voltage vector and the second voltage vector are arranged to be adjacent and form a sector, and are arranged in a counterclockwise direction. In some embodiments, the time processing module 202 is used to implement step S402.

[0114] In some embodiments, the sampling module 203 is used to sample the first current corresponding to the first voltage vector and the second current corresponding to the second voltage vector during the space vector pulse width modulation period. In some embodiments, the sampling module 203 is used to implement step S403.

[0115] In some embodiments, the current processing module 204 is used to obtain the average bus current within the space vector pulse width modulation period based on the first time, the second time, the first current and the second current. In some embodiments, the current processing module 204 is used to implement step S403.

[0116] When the bus current detection device 200 is used to perform the above steps S601, S602, S603 and S604, etc.:

[0117] In some embodiments, the acquisition module 201 is used to acquire the first action time of the first voltage vector and the second action time of the second voltage vector based on the target voltage vector and the volt-second balance principle within the space vector pulse width modulation period. In some embodiments, the acquisition module 201 is used to implement step S601.

[0118] In some embodiments, the sampling module 203 is used to sample the first current corresponding to the first voltage vector and the second current corresponding to the second voltage vector during the space vector pulse width modulation period. In some embodiments, the sampling module 203 is used to implement step S602.

[0119] In some embodiments, the time processing module 202 is used to obtain the adjusted first action time and the adjusted second action time using an adjustment strategy corresponding to the dead time of the inverter. In some embodiments, the time processing module 202 is used to implement step S603.

[0120] In some embodiments, the current processing module 204 is used to calculate the average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current. In some embodiments, the current processing module 204 is used to implement step S604.

[0121] It is understandable that the bus current detection device 200 may also include a phase shift module, which is used to respond to the result that the sampling time of the first current and / or the second current is less than the minimum sampling time, and shift the phase with the smallest duty cycle of the conduction time corresponding to the U phase, V phase and W phase backward within the space vector pulse width modulation period, and shift the phase with the largest duty cycle forward within the space vector pulse width modulation period; and change the value of the register. It is understandable that when the sampling time of the first current and the second current is greater than the minimum sampling time, it may not be performed.

[0122] In some embodiments, the sampling module 203 may be the single resistor bus current sampling circuit 100 in the above embodiment. In some embodiments, the sampling module 203 may at least include the low side sampling resistor 30 in the above embodiment and an operational amplifier 40 electrically connected to both sides of the low side sampling resistor 30.

[0123] The following describes a computer readable storage medium. Figure 8 , Figure 8 The computer-readable storage medium 300 is a schematic diagram of a computer-readable storage medium in an embodiment of the present application. The computer-readable storage medium 300 stores a computer program 301, and the computer program 301 implements the above method when executed by a processor.

[0124] The computer-readable storage medium 300 may specifically be a medium that can store the computer program 301, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, or may be a server that stores the computer program 301. The server may send the stored computer program 301 to other devices for execution, or may also execute the stored computer program 301 itself.

[0125] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0126] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "one embodiment" and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in the present application does not necessarily refer to the same embodiment. In addition, certain features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0127] In addition, unless explicitly stated in the claims, the order of processing elements and sequences, the use of alphanumeric characters, or the use of other names in the present application are not intended to limit the order of the processes and methods of the present application. Although the above disclosure discusses some embodiments currently considered useful through various examples, it should be understood that such details are only for illustrative purposes, and the attached claims are not limited to the disclosed embodiments. On the contrary, the claims are intended to cover all modifications and equivalent combinations that are consistent with the essence and scope of the embodiments of the present application. For example, although the system components described above can be implemented by hardware devices, they can also be implemented only by software solutions, such as installing the described system on an existing server or mobile device.

[0128] Similarly, it should be noted that in order to simplify the description disclosed in this application and thus help understand one or more embodiments, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0129] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in this application are approximate values, which may change according to the required characteristics of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining the digits. Although the numerical domains and parameters used to confirm the breadth of the range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0130] Each patent, patent application, patent application disclosure, and other materials, such as articles, books, applications, publications, documents, etc., cited in this application are hereby incorporated by reference in their entirety. Except for application history documents that are inconsistent with or conflicting with the content of this application, documents that limit the broadest scope of the claims of this application (currently or later attached to this application) are also excluded. It should be noted that if the description, definition, and / or use of terms in the attached materials of this application are inconsistent or conflicting with the content of this application, the description, definition, and / or use of terms in this application shall prevail.

[0131] Finally, it should be understood that the embodiments in this application are only used to illustrate the principles of the embodiments of this application. Other variations may also fall within the scope of this application. Therefore, as an example and not a limitation, the alternative configurations of the embodiments of this application may be considered to be consistent with the teachings of this application. Accordingly, the embodiments of this application are not limited to the embodiments explicitly introduced and described in this application.

Claims

1. A bus current detection method, characterized in that: include: Obtain the conduction time corresponding to the U phase, the V phase and the W phase respectively within the space vector pulse width modulation period; The conduction time is adjusted respectively by using an adjustment strategy corresponding to the dead time of the inverter, and a first time corresponding to the first voltage vector and a second time corresponding to the second voltage vector are calculated, wherein the first voltage vector and the second voltage vector are arranged adjacent to each other and form a sector and are arranged in a counterclockwise direction; Sampling a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; An average bus current within the space vector pulse width modulation period is obtained based on the first time, the second time, the first current, and the second current.

2. The method according to claim 1, characterized in that The step of adjusting the on-times respectively by using an adjustment strategy corresponding to the dead time of the inverter comprises: Acquire the adjustment strategy based on the current flow directions corresponding to the U phase, the V phase and the W phase respectively; The adjustment strategy is used to adjust the conduction time corresponding to the U phase, the V phase and the W phase respectively.

3. The method according to claim 2, characterized in that The obtaining of the adjustment strategy based on the current flow directions corresponding to the U phase, the V phase, and the W phase respectively includes: If the current flow direction of one phase among the U phase, the V phase and the W phase is positive, the adjustment strategy is to subtract the dead time from the conduction time corresponding to the one phase current; If the current direction of one phase among the U phase, the V phase and the W phase is negative, the adjustment strategy is the conduction time corresponding to the one phase current plus the dead time; Among them, if the one-phase current flows into the motor, it is positive, and if the one-phase current flows out of the motor, it is negative.

4. The method according to any one of claims 1 to 3, characterized in that: The calculating to obtain a first time corresponding to the first voltage vector and a second time corresponding to the second voltage vector includes: Determining the sector attributes; Under a calculation strategy corresponding to the sector attribute, the first time and the second time corresponding to the adjusted on-time are obtained.

5. The method according to claim 1, characterized in that The obtaining the average bus current within the space vector pulse width modulation period based on the first time, the second time, the first current and the second current includes: The sum of the product of the first time and the first current plus the product of the second time and the second current divided by the value of the space vector pulse width modulation period is used as the bus average current.

6. The method according to claim 1, characterized in that Also includes: The bus average current is low-pass filtered.

7. The method according to claim 1, characterized in that Before sampling the first current corresponding to the first voltage vector and the second current corresponding to the second voltage vector in the space vector pulse width modulation period, the method further includes: In response to the result that the sampling time of the first current and / or the second current is less than the minimum sampling time, the phase with the smallest on-time duty ratio corresponding to each of the U phase, the V phase and the W phase is shifted backward within the space vector pulse width modulation period, and the phase with the largest duty ratio is shifted forward within the space vector pulse width modulation period; Change the value of a register.

8. A bus current detection method, characterized in that: include: In a space vector pulse width modulation period, a first action time of a first voltage vector and a second action time of a second voltage vector are obtained based on a target voltage vector and a volt-second balance principle, wherein the first voltage vector and the second voltage vector are arranged adjacent to each other and form a sector and are arranged in a counterclockwise direction; Sampling a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; Obtaining the adjusted first action time and the adjusted second action time by using an adjustment strategy corresponding to the dead time of the inverter; The average bus current within the space vector pulse width modulation period is calculated based on the adjusted first action time, the adjusted second action time, the first current, and the second current.

9. The method according to claim 8, characterized in that The step of obtaining the adjusted first action time and the adjusted second action time by using the adjustment strategy corresponding to the dead time of the inverter includes: Determine the sector attributes and the current flow directions corresponding to the U phase, the V phase and the W phase respectively; Obtaining the adjusted first action time and the adjusted second action time in an adjustment strategy, the adjustment strategy is as follows; 10. The method according to claim 8, characterized in that The calculating the average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current includes: The sum of the product of the adjusted first action time and the first current plus the product of the adjusted second action time and the second current divided by the value of the space vector pulse width modulation period is used as the bus average current.

11. The method according to claim 10, characterized in that Also includes: The bus average current is low-pass filtered.

12. A bus current detection device, characterized in that: include: An acquisition module is used to acquire the conduction time corresponding to each of the U phase, the V phase and the W phase in a space vector pulse width modulation period; a time processing module, configured to adjust the conduction time respectively by using an adjustment strategy corresponding to the dead time of the inverter, and calculate a first time corresponding to the first voltage vector and a second time corresponding to the second voltage vector, wherein the first voltage vector and the second voltage vector are arranged adjacent to each other and constitute a sector, and are arranged in a counterclockwise direction; a sampling module, configured to sample a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; as well as A current processing module is used to obtain a bus average current within the space vector pulse width modulation period based on the first time, the second time, the first current and the second current.

13. A bus current detection device, characterized in that: include: An acquisition module, configured to acquire a first action time of a first voltage vector and a second action time of a second voltage vector based on a target voltage vector and a volt-second balance principle within a space vector pulse width modulation period; a sampling module, configured to sample a first current corresponding to the first voltage vector and a second current corresponding to the second voltage vector within the space vector pulse width modulation period; A time processing module, configured to obtain the adjusted first action time and the adjusted second action time by using an adjustment strategy corresponding to the dead time of the inverter; as well as A current processing module is used to calculate the average bus current within the space vector pulse width modulation period based on the adjusted first action time, the adjusted second action time, the first current and the second current.

14. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

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